JP3055362B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a mounting structure thereof.

[0002]

2. Description of the Related Art There are many methods for packaging semiconductor devices. FIG. 3 shows the most frequently used method at present. In this method, a die pad 31 is provided at a central portion of a lead frame 30, and a semiconductor element 3 is provided at this portion.
2 is mounted. An electrode 33 formed near the periphery of the semiconductor element 32 is connected to a corresponding lead of the lead frame 30 by a wire 34. Then, the whole is molded with the resin 35.

[0003]

However, in the above-mentioned method, the following problems have arisen especially in a memory chip.

In recent years, electronic devices using memory chips have increased, and their capacity has been increasingly required. In order to meet these demands, the fine processing technology for semiconductor devices has been further improved, and the storage capacity thereof has been significantly increased. Along with this, the chip size tends to be larger.

[0005] The type and size of the memory chip package and the arrangement and position of the external terminals are standardized by all semiconductor manufacturers. Tend to be packaged. This causes the following problems.

(A) In order to put a large chip in a package as small as possible, the chip occupancy in the package increases, and the thickness of the mold resin decreases, which causes package cracks and other reductions in reliability. Cause.

(B) Since the electrodes formed on the chip are connected to the corresponding lead frames by wires,
There is a restriction that the electrodes are arranged around the chip. For this reason, a chip having electrodes formed in the center of the chip could not be packaged by this method.

(C) In this method, since the electrodes formed around the chip are connected to the lead frame by wires, a region for extending the wire and a region for forming the mold resin to ensure reliability are formed around the chip. Need to secure. Therefore, in this package, it becomes larger than the chip by a certain distance from the periphery of the chip. This is an extremely disadvantageous factor in reducing the size of the package.

(D) As the integration of memory chips progresses,
The chip causes a soft error due to the influence of α rays entering from outside and α rays emitted from the mounting material. To prevent this, at present, a polyimide film is formed on the surface of the memory chip that has been completed up to the final process to prevent the penetration of α rays. However, this method causes an increase in cost because the process and material cost for forming the polyimide film are extra.

(E) In the design of a memory chip, it is necessary to provide a power supply and a ground terminal at several places in the chip in order to improve the electric characteristics, particularly the access time. However, in the conventional method, the power supply and the ground terminal in the lead frame are fixed, and the electrode of the chip and the lead frame are connected in one-to-one correspondence, so that the above-described electrode specification cannot be supported. .

[0011]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a mounting method in which an electrode formed on one main surface of a semiconductor element and an inner lead of a film carrier are connected via a metal projection. In the body, at least a part of the electrode is provided inside the semiconductor element, and the polyimide surface of the film carrier is one side of the semiconductor element.
It is installed in a state facing the main surface, at least a part of the inner lead extends on the polyimide,
The semiconductor device is characterized in that two or more specific metal protrusions are connected to the electrode, and the two or more specific metal protrusions are shared by a conductor portion extending on the same plane as one main surface of the semiconductor element from the metal protrusions. A semiconductor device is provided.

[0012]

According to the present invention, the polyimide tape of the film carrier and the main surface of the chip are installed so as to face each other by using the structure and the manufacturing method described above, and the polyimide tape extends toward the center of the chip. The inner lead and the chip electrode are connected via metal projections, and the whole is sealed with a mold resin if necessary. Free connection is possible with the inner lead extended from the electrode provided in the center of the chip, and a small and thin package is realized because the film carrier arranged on the chip is thin. In addition, the polyimide film of the film carrier functions as an α-ray prevention film, and the terminal shared in the electrode can be arbitrarily and freely formed by a conductor extending from a metal projection used for connection.

[0013]

An embodiment of the present invention will be described with reference to FIG.

FIG. 1 shows a sectional structure of a package according to an embodiment of the present invention. In FIG. 1, 1 is a semiconductor element, 2 is a polyimide of a fill carrier, 3 is an inner lead of a film carrier, 4 is an electrode (electrode pad) of the semiconductor element 1, 5 is a metal projection, and 6 is a metal projection 5 arbitrarily. The conductor portion to be converted, 7 indicates a mold resin.

As the film carrier 2, any one generally used can be used. However, it is necessary to pay close attention to radioactive substances (uranium and thorium) contained in the polyimito used, and it is important that the content of the radioactive substance in the material is 1 ppb or less. The inner lead 3 is made of copper foil with tin or gold plated on the surface. In this material, it is necessary to pay attention to the content of radioactive substances as described above. Same as 2. The metal protrusion 5 and the conductor 6 that arbitrarily shares the metal protrusion 5 use gold formed by plating.

FIG. 2 shows a manufacturing process of the package according to the embodiment of the present invention. First, as shown in FIG. 1A, a conductive film 21 is formed on an insulating substrate 20 such as glass or ceramic.
Is formed on the entire surface, and an opening 22 and a line-shaped opening 23 for sharing a specific opening are formed on the plating mask 2 at a position corresponding to the electrode 4 of the semiconductor element 1.
4 is formed. Pt or ITO (indium tin oxide) was used for the conductive film 21, and a photosensitive photoresist was used for the plating mask 24, and the thickness was 10 to 20 μm. The size of the opening 22 is 50 to 80 μm square or round, and the width of the linear opening 23 is set to 30 to 60 μm, which is smaller than that of the opening 22.

Next, as shown in FIG.
The opening 22 and the linear opening 23 are plated with gold by using an electrode as an electrode by electroplating to form a metal projection 25 and a metal bar 26. After plating, the plating mask 24, which is a photoresist, is removed. Plating thickness is 10
２０20 μm.

Next, as shown in FIG. 1C, the inner leads 27 of the film carrier are aligned with the metal projections 25, and pressure is applied by a heated tool. At this time, the surface of the inner lead 27 is plated with Sn or Au, and Au—Sn eutectic or Au—Au is formed between the metal protrusion 25 and the inner lead 27 by heating and pressing.
Is transferred and bonded to the inner lead 27 side.

At this time, as shown in FIG. 1D, the metal bar 26 is simultaneously transferred to the inner lead 27 side. At this time, the inner lead 27 is formed at the time of transfer,
Since the tip of the inner lead 27 is located below the film carrier, the common bar 26 does not contact other leads.

Thereafter, as shown in FIG.
The electrode 4 and the metal protrusion 25 transferred and joined to the inner lead 27 are aligned, and heated and pressed by a tool to join them. The bonding at this time is made of an Au-Al alloy.

Thereafter, a resin 30 is coated on the surface of the semiconductor element 1 and the inner leads 27, and punched out from the outer leads 29 of the film carrier by punching. The punched outer lead 29 forms near the edge of the semiconductor element 1. (Shown in (f))
The structure shown in FIG. 1 can be obtained by performing resin molding instead of coating the resin 30 shown in FIG.

[0022]

The present invention has the following effects.

(A) Since mounting is performed using a film carrier, there is no need to provide a die pad, so that a small and thin package can be realized, and a highly reliable package can be realized without problems such as package cracks.

(B) Since the inner leads of the film carrier are arranged on the chip surface via the polyimide, the electrodes of the chip do not necessarily have to be arranged around the chip as in the prior art. Thus, the electrodes can be arbitrarily arranged at the time of chip design, so that signal and power supply line lengths can be shortened, and wiring delay and noise are reduced due to reduction in wiring capacitance and wiring resistance. The characteristics can be improved.

(C) The present invention has a structure in which a film carrier is arranged on the chip surface and the electrodes of the chip and the inner leads are joined via metal projections. A package size can be made substantially equal to a chip size without requiring a region for stretching or a region for forming a mold resin.

(D) In general, as a countermeasure against α-rays of a memory chip, polyimide is coated or attached on the chip surface.

In the present invention, since the polyimide of the film carrier can be used as it is as a polyimide for countermeasures against α-rays, it is necessary to coat or attach polyimide on the chip surface for countermeasures against α-rays as in the prior art. Therefore, a low-cost package can be realized.

(E) In designing a memory chip, it is necessary to provide a power supply and a ground electrode at several places in the chip in order to improve the electric characteristics, particularly the access time. Such a chip can be easily coped with because a metal bar which is freely shared when forming the metal projections is formed at the same time.

[Brief description of the drawings]

FIG. 1 is an exploded perspective view showing a configuration of an embodiment of a semiconductor device of the present invention.

FIG. 2 is a process chart showing a method for manufacturing the apparatus of the embodiment.

FIG. 3 is an exploded perspective view of a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Film carrier 3 Inner lead 4 Electrode 5 Metal protrusion 6 Metal bar 7 Mold resin

Claims (3)

(57) [Claims] 1. A mounting body for transferring and joining a metal projection on a substrate formed at a position corresponding to an electrode of a semiconductor element to an inner lead of a film carrier, and then joining the metal projection to an electrode of the semiconductor element. A semiconductor device, wherein at least two or more metal protrusions on a substrate are connected to each other by a conductor made of the same material as the metal protrusions. 2. The semiconductor device according to claim 1, wherein the height of the conductor is lower than at least the metal protrusion. 3. The semiconductor device according to claim 1, wherein a width of the conductor is smaller than at least an outer dimension of the metal protrusion.