JP2924965B2 - Electronic musical instrument - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic musical instrument capable of changing an address from which a waveform data storage device is read out according to the type of the storage device.

2. Description of the Related Art It is well known that an electronic musical instrument stores data of different waveforms corresponding to a timbre and a tone range (pitch) in a storage device, and gives a read address to each musical tone generator for reading. I have. FIG. 6 shows a block diagram of a conventional electronic musical instrument. In FIG. 6, 1 is a key switch and tone selection switch, 2 is an assignment circuit for the switch, 3 is an execution control circuit, 4 is a waveform data storage device, 5 is a bank memory, 6 is a frequency number circuit, and 7 is a frequency number. The accumulating means, 8 is an envelope waveform circuit, 9 is a multiplication circuit, and 10 is an acoustic circuit.

A key switch and a tone switch 1 are a switch group for selecting a key position played by a player and a set tone, and an assignment circuit 2 electrically scans the switch 1 of the switch group to determine whether the switch is open or closed. Information allocated internally. Then, it sends it to the execution control circuit 3 as key information and tone color information. The execution control circuit 3 has a built-in central processing unit and performs processes such as generating an address for reading waveform data from the waveform data storage device 4 based on the key information and timbre information as described later. The waveform data storage device 4 stores different waveform data corresponding to the timbre and the tone range (pitch) in different places. That is, the storage device 4 is composed of a plurality of banks (areas), and, for example, the timbre and the gamut (pitch) are associated with the banks. Therefore, a bank is designated by the bank memory 5 in order to generate a certain musical tone. Next, the read address range corresponding to the key information is stored in the frequency number circuit 6.
And the accumulation means 7. The waveform data storage device 4 is read from the address determined by the bank memory 5, the frequency number circuit 6, and the accumulating means 7. An envelope is added to the read waveform data by the output of the envelope waveform circuit 8 by the multiplication circuit 9, and the acoustic circuit 10 performs digital-to-analog conversion to obtain a tone signal.

[Problems to be Solved by the Invention] The waveform data storage device 4 includes a read-only memory (hereinafter abbreviated as ROM in this specification) and a static random access type read / write memory (hereinafter, S-RAM in this specification). ) And a dynamic random access type read / write memory (hereinafter abbreviated as D-RAM in this specification). The data storage method, how to use it in the system, the operation method when reading data are different, and the type can be changed arbitrarily according to the tone generator. When a storage device is used, it is necessary to use a dedicated address circuit separately, especially since the address format for the D-RAM is different. Therefore, there is a disadvantage that the configuration of the system becomes large.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an electronic musical instrument having an address control circuit capable of obtaining an address format corresponding to the type of a waveform data storage device for each of a plurality of tone generators. To provide.

[Means for Solving the Problems] FIG. 1 is a diagram showing the principle configuration of the present invention. In FIG. 1, 3 is an execution control circuit, 40 is a waveform data storage device,
Reference numeral 5 denotes a bank memory, 6 denotes a frequency number circuit, 7 denotes a frequency number accumulating means, and 12 denotes an address control circuit.

A plurality of tone generators, a keyboard having a plurality of keys and a plurality of tone selection switches for setting a desired tone, and various control signals are generated for each tone according to the key and tone information obtained by scanning them. An execution control circuit for transmitting the frequency number according to the key information, a frequency number circuit for storing the frequency number corresponding to the key information corresponding to the tone generator, and an output value of the frequency number circuit which is accumulated in a time-division manner to obtain the key information. Accumulating means for outputting an address corresponding to the key information, and a waveform data storage device for storing desired waveform data constituted by memories having different address formats from each other, and stored in advance by an address corresponding to the key information. The present invention has the following configuration in an electronic musical instrument that reads out data from a waveform data storage device and generates a desired musical tone by a plurality of musical tone generators. That is, an address control circuit for converting an address corresponding to the key information into an address format corresponding to a memory in which desired waveform data in the waveform data storage device is stored,
The address control circuit is controlled by a control signal from the execution control circuit to change an address format for accessing desired data in the waveform data storage device in accordance with the tone generator.

[Operation] A large amount of waveform data is stored in advance in the waveform data storage device 40 in FIG. 1, for example, in a format corresponding to a timbre and a tone range (pitch). The frequency number is obtained in the frequency number circuit 6 based on the key information, tone color information, and the like obtained from the execution control circuit 3, and is accumulated by the accumulating means 7 in order to obtain a predetermined read address range. Next, the output value of the accumulator 7 and the output of the bank memory 5 are stored in a desired waveform data storage device 4.
To the internal memory address format. The address control circuit 12 is the execution control circuit 3
Since the control information corresponding to the tone generator is obtained in advance, the address is converted to a predetermined address. Therefore, the address format can be changed corresponding to the tone generator, which is convenient for accessing the storage device.

[Embodiment] It is assumed that the waveform data storage device 40 is of three types: ROM, S-RAM, and D-RAM. When the memory capacity is different, for example, when the D-RAM has 64 k words and 256 k words,
The former is referred to as D-RAM I and the latter as D-RAM II. The output of the frequency number circuit 6 in FIG. 1 is accumulated by the accumulating means 7 so as to access a predetermined storage device, and the output of the accumulating means 7 and the output of the bank memory 5 are represented by AB23-0.
Assume that 24 bits have been obtained. For ROM and S-RAM, this 24
The bits may be output as addresses MA23-0 as they are. In the case of a D-RAM, it is necessary to access a row address and a column address in the form of a multiplex address. The address control for that is processed as shown in FIG. In FIG. 2, the left column indicates the type of storage device, AB23-0 in the table indicate addresses applied to the address control circuit, and the upper columns MA23-0 MA23 indicate addresses output from the control circuit and accessing the storage device. Therefore, for the D-RAMI, among the applied AB23-0, the eight outputs of MA7-0 are used in the first half and the second half for the address of AB15-0, and the AB17-0 for the D-RAM II are used. To MA8-0 of 9
This indicates that the output of the book is used twice.

FIG. 3 is a circuit diagram for executing the operation shown in FIG.
In FIG. 3, 12-1 and 12-2 are data selectors and 12-3
Indicates an inverter, 12-4 indicates an AND circuit, and 12-5 indicates an inverter. The signal terminals MS0, MS1, and MPX are signals for setting an address according to the type of the storage device, AB23-0 are a bit sequence for selecting an address, and MA23-0 are a bit sequence changed according to the type of the storage device. Is shown. Data selector 12
-1, 12-2 each have two sets of 8 or 9 bit terminals on the input side, SA and SB, and 8 to 9 bit terminals on the output side, and have a predetermined input side according to data applied to SA and SB. Output data. MS0, MS1, and MPX are set for each tone generator according to the format of the storage device, and control the data selector. For example, when MS0 is “L” and MS1 is “L”, ROM is “H”, “L” S-RAM is “L”, “H” D-RAM I is “H”, “H” D -Address is selected to access RAM II.

Now, when MS0 is "L", address bits AB15 to
8 is output, and when MS0 is "H", address bits AB16-9 are output at Y7-0. That is, the data selector 12-1 is a selector for the latter half address of the multiplex when the D-RAM II is selected. The second half address, address bit AB17, and address bits AB8-0 selected in this manner are selected by the data selector 12-2. By setting the signals MS1, MS0, and MPX, the addresses MA23 to MA0 are output to the respective storage devices as shown in the bottom row of FIG. 4, and when the D-RAM is selected, the output becomes 2
A broken line is drawn in the middle of the address data because the time is divided. In addition, each code | symbol of FIG. 4 is as showing in FIG. Thus, the selections made by MS0, MS1 and MPX in FIG. 3 are as shown in FIG.

Next, FIG. 5 shows a configuration in which a memory having n words is inserted between the execution control circuit 3 and the address control circuit 12 shown in FIG. 1 in order to control n tone generators. In this figure, a bank memory having n words is not particularly shown, but FIG. 1 may be developed. In FIG. 5, 61 is a frequency number memory having n words, and 13 is a state memory having n words. Reference numeral 71 denotes an adder, and reference numeral 72 denotes an accumulation result buffer memory, both of which form known accumulation means. The execution control circuit 3 stores a frequency number corresponding to the key information in the frequency number memory 61 for each tone generator. Further, addressing format change information MS is stored in the state memory 13 so as to control the address control circuit 3 for each musical instrument occurrence. The execution control circuit can obtain a predetermined musical tone by controlling musical tone generation in a time-division manner.

[Effects of the Invention] As described above, according to the present invention, regardless of the type of the waveform data storage device, such as ROM or D-RAM, the waveform data storage device is selected and used in correspondence with the tone generator. The address setting may be performed, and the versatility of the system design is improved. .

[Brief description of the drawings]

FIG. 1 is a diagram showing the principle configuration of the present invention, FIG. 2 is a diagram for explaining the operation of the address control circuit of the present invention, and FIG. 3 is a diagram showing the configuration of the address control circuit as an embodiment of the present invention. 4, FIG. 4 is an operation time chart of FIG. 2, FIG. 5 is a diagram showing a configuration for controlling n tone generators, and FIG. 6 is a diagram showing a configuration of a conventional electronic musical instrument. 3 Execution control circuit 6 Frequency number circuit 7 Accumulation means 12 Address control circuit 40 Waveform data storage device

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-62-67597 (JP, A) JP-A-62-164153 (JP, A) JP-A-61-245193 (JP, A) JP-A-57-164193 92397 (JP, A) Fully open 1988-45593 (JP, U) Fully open 1987-103094 (JP, U)

Claims (1)

(57) [Claims] 1. A plurality of tone generators, a keyboard having a plurality of keys, a plurality of tone selection switches for setting a desired tone, and various controls in accordance with key and tone information obtained by scanning them. An execution control circuit for transmitting a signal corresponding to each tone generator, a frequency number circuit for storing a frequency number corresponding to the key information corresponding to each tone generator, and time division of an output value of the frequency number circuit And accumulating means for outputting an address corresponding to the key information, and a waveform data storage device configured of memories having different address formats and storing desired waveform data. In an electronic musical instrument that reads out waveform data stored in the waveform data storage device in advance and generates a desired musical tone by the plurality of musical tone generators, an address corresponding to the key information is stored in the electronic musical instrument. An address control circuit for converting the data into an address format corresponding to a memory in which desired waveform data is stored in the shape data storage device. The address control circuit sends out the data in correspondence with each tone generator from the execution control circuit. An electronic musical instrument controlled by a control signal provided to change an address type for accessing desired waveform data in the waveform data storage device in correspondence with each tone generator.