JP2923967B2 - High Definition Television Display - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-definition television display device capable of displaying a standard television non-interlaced image signal.

2. Description of the Related Art In recent years, with the development of the MUSE high-definition television system, high-definition television as a next-generation television has been realized. Among them, there has been devised one that attempts to display an image based on a conventional standard television signal on a display of a high-definition television.

2. Description of the Related Art As a prior art, for example, as disclosed in Japanese Patent Application Laid-Open No. 62-263783, a high-definition television signal, a standard television signal and an external signal are used as input signals, and a standard television signal is converted to a high-definition television display device. There is a type that outputs an external signal to a signal missing portion caused by the relationship of the aspect ratio when outputting to an external device.

However, in the above-described conventional configuration, when the standard television signal is an upper and lower cut-off video such as a cinemascope size, the output screen is as shown in FIG. However, there is a problem that the size of the display screen cannot be utilized.

The present invention has been made in view of the above problems, and projects a standard television signal image on a high-definition television output device.
A high-definition television that can display an image with a good screen size even if it is a signal of which the upper and lower portions are cut off as in the above-mentioned cinemascope size image, even if it is a standard television signal. It is an object to provide a display device.

Means for Solving the Problems To achieve this object, a high-definition television display device according to the present invention comprises a signal conversion circuit for converting a standard television interlace signal into a standard television non-interlace signal, A time axis compression circuit for compressing a non-interlaced signal on a time axis, an output control circuit for controlling an output period of the time axis compressed signal, and a time-compressed standard television non-interlaced signal and a non-time-compressed standard A switching circuit for switching a signal to be output by an external operation with a television non-interlaced signal as an input, a switching circuit for receiving an output of the switching circuit and a high-definition television signal and switching an output signal by an external operation, and a high-definition television Different synchronization and deflection are performed when outputting a signal and when outputting a standard television signal. Synchronization
A deflection circuit.

Operation With this configuration, when a standard television signal having an aspect ratio different from that of a high-definition television signal is output to a high-definition television output device, the magnitude of the deflection and the time compression of the signal are performed depending on the state of the signal. Thus, an output screen having a good size can be obtained.

Embodiment An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram of one embodiment of the present invention.

In FIG. 1, 1 is a signal conversion circuit, 2 is a time compression circuit, 3 is an output control circuit, 4 is a switching circuit, 5 is a switching circuit,
Reference numeral 6 denotes a high-definition television output device, and reference numeral 7 denotes a synchronization / deflection circuit.

Digital data form to a standard television interlaced signal which has been made to the component signal (NTSC signal) a ₂ is input to the signal conversion circuit 1, 525: output as a standard television noninterlaced signal a ₃ in (1 1) You. The standard television noninterlaced signal a ₃ is input to the time base compression circuit 2, is output as a signal a _4, which is temporally compressed axis 3/4 two hours.

The period of Jimajiku compressed signal a ₄ is output is the output control signal a ₆ control from the output control circuit 3. In this embodiment, when the output control signal a ₆ is “L”, signal output is enabled,
Disabled when “H”.

FIG. 2 shows a comparison between the cycle of each signal and the time length of data. However, standard television interlace signal a ₂ , signal conversion output signal a ₃ , time compression output signal
The timing of a ₄ from the actual says.

Signal conversion circuit output signal a ₃ and the time compression circuit output signal a ₄ is input to the switching circuit 4, one by switching control signal a ₁₀ is selected and the output signal a _5.

When the signal converting circuit output signal a ₃ is selected, but it should video signal is displayed as an output screen 22, becomes the above, the video has expired down to only the magnitude of the output screen 20 is actually .

If the time compression circuit output signal a ₄ is selected, the video signal is displayed as an output screen 21.

Here the output screen 21 is being displayed on the left side, by modifying the output control signal a ₆ can be displayed at any position in the horizontal scanning period.

Output a ₅ and a high definition television signal a ₁ of the switching circuit 4 is inputted to the switching circuit 5, one by switching control signals a ₈ are output is selected as the output signal a _11. This switching control signal a
₈ is also input to the synchronization / deflection circuit 7. Synchronization and deflection circuit 7 switching control signal a ₈ is a high definition television signal screen 1125 when is selected a ₁ as output a ₁₁ (2: 1 interlaced) output a synchronization signal a ₉ for performing a display image I will be. Further, the switching control signal a ₈ is an output a ₅ of the switching circuit 4
When selecting a a ₁₁ 1 Screen 525: outputting a synchronizing signal a ₉ for displaying an image of the (1 1 non-interlaced).
Also, when 525 lines (1: 1) are output as synchronization signals,
If the signal a ₃ is selected to output a ₅ of the switching circuit 4, on to a large than when the vertical deflection amplitude signal a ₄ has been selected for issuing the video signal of the lower outside screen.

Video output a ₁₁ a synchronizing signal a ₉ the video is input to the high-definition television output device is issued movies.

Hereinafter, another embodiment of the present invention will be described with reference to the drawings.

FIG. 4 shows a high-definition television display device according to another embodiment of the present invention.

In FIG. 4, 1 is a signal conversion circuit, 2 is a time compression circuit, 3 is an output control circuit, 4 is a switching circuit, 5 is a switching circuit,
6 is a high-definition television output device, 7 is a deflection circuit, 8 is a signal conversion circuit, and 9 is an image synthesis circuit.

Digital data form to a standard television interlaced signal which has been made to the component signal (NTSC signal) a ₂ is input to the signal conversion circuit 1, one screen 525: standard television non-interlaced signals (1 1 non-interlaced) a ₃
Is output as This standard television non-interlaced signal a ₃ is input to the time axis compression circuit 2 and
The output signal is output as a signal a ₄ that has been compressed on a time axis.

The period of time compressed signal a ₄ is output is controlled by the output a ₆ of the output control circuit 3.

Further, the video signal a ₁₂ was made a component signal is digitized is input to the signal conversion circuit 8, an output screen 2
It is output as displayed as 3.

Output a ₁₃ time warp circuit outputs a ₄ and a signal conversion circuit 8 is input to the image synthesizing circuit 9, its output a ₁₄ become those synthesized images 21 and 23 shown in Figure 5 a. Output a ₁₄ outputs a ₃ and the image synthesizing circuit 9 of the signal conversion circuit 1 is input to the switching circuit 4, one by switching control signal a ₁₀ is selected as an output signal a _5.

Output a ₅ and a high definition television signal a ₁ of the switching circuit 4 is inputted to the switching circuit 5, one by switching control signals a ₈ are output is selected as the output signal a _11. This switching control signal a
₈ is also input to the synchronization / deflection circuit 7. Synchronization and deflection circuit 7 switching control signal a ₈ output a high definition television signal a ₁
screen 1125 when being selected as a _11: outputting a synchronizing signal a ₉ for displaying an image of the (2 1 interlace). Further, when the switching control signal a ₈ selects the output a ₅ switching circuit 4 as an output a ₁₁ is one screen 525: outputting a synchronizing signal a ₉ for displaying an image of the (1 1 non-interlaced) . Further, one screen 525 as a synchronization signal: if the signal a ₃ is selected to the output a ₅ of the switching circuit 4 when outputs a signal of (1 1 non-interlaced) for the top, bottom of the video signal in order to issue outside the screen, larger than when the vertical deflection amplitude signal a ₄ has been selected.

Video output a ₁₁ a synchronizing signal a ₉ is inputted to the high definition television output device, video is displayed.

Here, although the number of the signal conversion circuit 8 is one, a plurality of the signal conversion circuits are used and input to the image synthesizing circuit.
It is also possible to output such that a plurality of small screens are displayed as shown in FIG.

Effect of the Invention As described above, according to the present invention, by using a time axis compression circuit and a synchronization / deflection circuit whose synchronous deflection frequency changes by operating a switch, a standard television is provided on a high-definition television display device by a switching circuit. The display surface can also be effectively used when displaying the John signal, and its practical effect is significant.

[Brief description of the drawings]

FIG. 1 is a block diagram of a high-definition television display device according to an embodiment of the present invention, FIG. 2 is a waveform diagram of signals of respective parts thereof, FIG. 3 is a front view of a display screen according to the configuration of FIG. 4 is a block diagram of a high-definition television display device according to another embodiment of the present invention, FIG. 5 is a front view of a display screen according to the configuration of FIG. 4, and FIG. 6 is a front view of a display screen according to a conventional example. is there. DESCRIPTION OF SYMBOLS 1 ... Signal conversion circuit, 2 ... Time compression circuit, 3 ... Output control circuit, 4 ... Switching circuit, 5 ... Switching circuit, 6 ... High-definition television output device, 7 ... Synchronization / deflection circuit .

Claims (2)

(57) [Claims] 1. A first signal conversion circuit for receiving a standard television interlace signal and outputting a standard television non-interlace signal, and compressing a time axis of the signal output from the first signal conversion circuit. A time compression circuit, an output control circuit for controlling the output period of the time-compressed output signal, and a first switching control signal to which the output signal of the first signal conversion circuit and the output signal of the time compression circuit are input. A first switching circuit for selectively selecting both output signals and outputting the selected signal, a high-definition television interlace signal and an output signal of the first switching circuit, and a second switching control signal. A second switching circuit for selecting and outputting both signals;
A synchronizing / deflecting circuit whose synchronization and deflection frequencies are switched by the first and second switching control signals, and a high-definition television to which an output signal of the second switching circuit and an output signal of the synchronizing / deflecting circuit are input. A high-definition television display device comprising a television output device. 2. The high-definition television display device according to claim 1, wherein at least the first and second terminals are inserted between the input terminal of the first switching circuit and the output terminal of the time compression circuit.
An image synthesizing circuit having a signal input terminal to which a standard television signal is input, and a second signal conversion circuit connected to a second signal input terminal of the image synthesizing circuit. (1) an output signal from the time compression circuit input to the signal input terminal
2. The first signal conversion according to claim 1, wherein the image synthesis circuit combines an output signal from a second signal conversion circuit connected to the signal input terminal of the first signal conversion circuit with the signal output from the image synthesis circuit. 2. The second switching circuit according to claim 1, wherein an output signal from a circuit is switched by said first switching circuit, and a standard television signal and a high-definition television signal that are selectively selected by said first switching circuit are switched. A high-definition television display device, wherein the switching is performed by the switching circuit.