JP2943385B2 - Semiconductor device having conductivity modulation type MOSFET - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a conductivity modulation type MOSFE used as a switching element for driving multiple power supplies.
The present invention relates to a configuration of a semiconductor device including T (IGBT).

[0002]

2. Description of the Related Art FIG. 3 shows a structure of a conventional conductivity modulation type MOSFET (IGBT). In this IGBT, an N ⁻ type conductivity is epitaxially grown on a semiconductor substrate 3 formed by a P ⁺ type drain layer 1 and an N ⁺ type buffer layer 2 laminated on the drain layer 1. The modulation layer 4 is formed. A gate electrode 6 made of polysilicon is formed on the surface of the conductivity modulation layer 4 via a gate oxide film 5. Further, by a self-alignment method using the gate electrode 6 as a mask, impurities are introduced into the surface of the conductivity modulation layer 4 to form a P-type base layer 7. Similarly, an N-type source layer 9 is introduced using an aluminum source electrode 8 formed on a base layer 7 to form a cell (MOS section) 10.

In such an IGBT, when a positive potential is applied to the gate electrode 6 with respect to the source electrode 8, the surface of the base layer 7 below the gate electrode is inverted to form a channel. Electrons are injected from the source layer 9 into the conductivity modulation layer 4 through this channel. In response to this, holes are injected from the drain layer 1, so that the conductivity of the conductivity modulation layer 4 sharply increases, and the element becomes a low-resistance element. The IGBT exhibiting such characteristics has been attracting attention as an insulated gate bipolar device.

FIG. 5 shows a voltage / turn-off voltage when the IGBT is used as a voltage resonance type switching element.
The current waveform is shown. As can be seen in FIG.
In T, from the moment t ₀ when the gate voltage V _G is interrupted, it decreases sharply main current i _M, after the tail current i _T is generated, becomes zero at time t _1. During this time, IGBT
In is from time t ₀ begins consuming voltage V _M, the product of the current value from this voltage V _M and the time t ₀ to t ₁ is the turn-off loss Eoff.

[0005]

The turn-off loss E
It is desirable that off be small in using the IGBT as a switching element. In order to decrease the loss Eoff, it is effective to reduce the tail current i _T. This current i _T is caused by the carrier of the electrons and holes injected to bring the conductivity modulation layer 4 into the conductivity modulation state, after the channel disappears and the injection is stopped.
Source - hole with increasing voltage V _M between the drain to the source side, electrons are generated when swept out to the drain side. Therefore, it is impossible to make this current i _T zero. However, when the conductivity modulation layer 4 is made thinner,
That is, when improving the h _FE of the IGBT-chip transistors, the number of carriers involved in the conductivity modulation is reduced, it is possible to suppress the sweep of carrier. Therefore, the tail current i _T can be reduced.

However, focusing on the withstand voltage performance of the IGBT, the withstand voltage performance is mainly determined by the thickness of the N ⁻ type conductivity modulation layer 4. That is, a high breakdown voltage IGBT
Therefore, the thickness of the conductivity modulation layer 4 must be maintained, and the tail current i _T cannot be reduced in order to secure the withstand voltage performance.

[0007] Further, as for the withstand voltage performance of the element, in order to secure a safe operation area in use, the withstand voltage performance of several percent of the voltage generated in normal operation is required. This requirement is to use, in the circuit configuration, an element having a withstand voltage higher than the withstand voltage generated in the normal operation so that the element is not destroyed even during abnormal operation of the circuit. For example, if it is used in a circuit in which 1000 V is applied to the element in normal operation, an element having a withstand voltage performance of 1200 V which is 20% higher is selected. Similarly, since the IGBT is required to have a withstand voltage performance that is several percent higher, it is difficult to reduce the thickness of the conductivity modulation layer 4 described above, and therefore, the loss Eof
It was difficult to reduce f.

In view of these problems, in the present invention, the thickness of the conductivity modulation layer is adjusted to the withstand voltage during normal operation by processing the surplus withstand voltage required on the circuit by a built-in circuit. Thus, an IGBT with a small turn-off loss is realized.

[0009]

In order to solve the above-mentioned problems, in the present invention, first, an avalanche diode is incorporated between the gate and the drain of the IGBT. That is, an IGBT according to the present invention is a MOS section including a second conductivity type conductivity modulation layer, a first conductivity type base layer and a second conductivity type source layer formed on the surface of the conductivity modulation layer. And a conductivity modulation type MOSFET having a first conductivity type drain layer formed on the front surface or the back surface of the conductivity modulation layer facing the MOS portion, wherein the semiconductor device includes a conductivity modulation type MOSFET facing the drain layer. At least a part of the curvature is large on the surface of the conductivity modulation layer with respect to the base layer.
Kii and avalanche layer of the first conductivity type is formed, the avalanche layer is characterized by being connected to the gate electrode of the MOS portion.

Further, the avalanche layer is desirably connected to a gate electrode via a Zener diode, and the gate electrode is connected to a source electrode of a MOS section via at least one Zener diode. It is effective.

[0011] Such a Zener diode may be formed of polysilicon and may be built in a semiconductor device.

[0012]

In the IGBT as described above, the first conductivity type avalanche layer on the surface of the conductivity modulation layer is opposed to the base layer.
Large curvature, and it tends partial high electric field concentration occurs is formed. For this reason, when an overvoltage is applied between the source and the drain in the off state in which the gate and the source are at the same potential, the IGBT exceeds the breakdown voltage at the portion having the large curvature and the first voltage. The diode formed by the avalanche layer of the conductivity type and the conductivity modulation layer of the second conductivity type enters the avalanche. Therefore, a current flows between the gate and the drain via the avalanche layer, and a higher potential than the source is applied to the gate. Accordingly, the MOS portion of the IGBT is turned on, a current flows between the source and the drain, and the IGBT is protected from an overvoltage state between the source and the drain.

Thus, in the IGBT of the present invention,
Since the protection circuit for the overvoltage is built in the IGBT main body, it is not necessary to maintain an excessive withstand voltage performance in anticipation of the overvoltage. Therefore, the thickness of the conductivity modulation layer can be suppressed to a necessary minimum, so that the amount of carriers swept out when the transistor is turned off is suppressed, and the turn-off loss is reduced.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows the structure of an IGBT according to an embodiment of the present invention. In the IGBT of this example, the drain layer 1, the buffer layer 2, the conductivity modulation layer 4, the base layer 7, the source layer 9,
The structures of the gate electrode 6 and the source electrode 8 are the same as those of the above-described conventional IGBT. In the IGBT of this example, in addition to the above-described layers, the avalanche layer 11 having a shallower and larger well curvature than the normal cell 10 of the P-type is formed on the surface of the conductivity modulation layer 4.
a and 11b are formed. Further, the conductivity modulation layer 4
Zener diodes 12, 13, 14 made of polysilicon are formed on the oxide film on the surface of the semiconductor device. The avalanche layers 11a and 11b are connected to a gate electrode 6 via a Zener diode 12, and the gate electrode 6 is connected to a source electrode 8 via Zener diodes 13 and 14.

FIG. 2 shows an equivalent circuit of the IGBT of this embodiment. In this example, an avalanche diode 11 is connected between the gate G and the drain D of the conventional IGBT shown in FIG.
And the Zener diode 12 are inserted so that the direction of each diode faces each other.

Furthermore, Zener diodes 13 and 14 are inserted between the gate G and the source S such that the directions of the diodes face each other.

The operation of the IGBT of this embodiment in the ON state and the OFF state is the same as that of the above-described conventional IGBT, and therefore the description is omitted. Focusing on the avalanche layer 11 which is a feature of the IGBT of this example, in the off state of the IGBT, that is, in the voltage blocking state, the base layer 7 and the avalanche layer 11 have a negative potential with respect to the drain layer 1.
The depletion region 30 extends toward the drain layer 1 and the depletion electric field is concentrated at the tip 20 of the avalanche layer having a large curvature. In such a state, if an overvoltage is applied between the source and the drain of the IGBT due to the abnormal operation of the circuit, the breakdown voltage is exceeded at the tip 20 of the avalanche layer 11 where the depletion electric field is concentrated. Therefore, the diode formed by the avalanche layer 11 and the conductivity modulation layer 4 enters the avalanche, and a current flows through this diode. The rise in the gate potential V _G is stopped, the positive relative to the potential V _G is the source potential V _S. Accordingly, the MOS of the cell 10 is turned on, electrons are injected into the conductivity modulation layer 4, and the IGBT is turned on. As a result, a current flows from the drain to the source, and the overvoltage state between the source and the drain is eliminated.
At T, destruction of the element due to overvoltage is prevented. When the overvoltage condition is resolved, the avalanche layer 11
And avalanche constituted diode conductivity modulation layer 4 is stopped, the gate potential V _G is equal to the source potential V _S, IGBT is turned off.

Further, a Zener diode 12 is provided between the avalanche layer 11 and the gate electrode 6.
Insertion is performed with the direction from 1 to the gate electrode 6 being the forward direction.

[0020] Therefore, on-off of the gate potential V _G of the normal operation of the IGBT of the present embodiment is prevented from propagating to the drain 1 side. By forming the Zener diode 12 from polysilicon, it can be easily formed on the surface of the IGBT by the same process as the gate electrode.

On the other hand, a pair of zener diodes 13 and 14 are inserted between the gate electrode 6 and the source electrode 8 to protect the gate oxide film 5. These Zener diodes 13 and 14 are arranged so that the forward direction of each diode faces each other, and a surge voltage generated when the gate is turned on / off by an overvoltage is absorbed.
The destruction of the gate oxide film 5 is prevented. Furthermore, these Zener diodes 13 and 14 are also made of polysilicon, and are incorporated as a built-in circuit on the IGBT of this example.

As described above, the IGBT according to the present embodiment is an IGB having an overvoltage protection circuit including an avalanche diode.
T, and further includes a gate protection circuit using a Zener diode. Therefore, it is possible to safely cope with an overvoltage caused by an abnormal operation of the circuit. For this reason, unlike the conventional case, it is not necessary to use an IGBT having a high withstand voltage in a circuit in anticipation of safety with respect to a normally required withstand voltage, and the thickness of the conductivity modulation layer can be kept to a necessary minimum. In the IGBT of this example, since the thickness of the conductivity modulation layer can be suppressed, it is possible to suppress the tail current accompanying the sweeping out of carriers at the time of turn-off, and it is possible to obtain an element having a small turn-off loss. .

Further, in the IGBT of this embodiment,
Since the overvoltage protection circuit and the gate protection circuit are built in the IGBT, the IGBT is a three-terminal IGBT unchanged from the conventional one. Therefore, it can be used in a circuit without any difference from the conventional one. Further, since the diode used in the above circuit is formed of polysilicon, it can be manufactured by a conventional IGBT manufacturing process.
It is easy to manufacture and does not increase costs. Further, the area occupied by the above protection circuit on the IGBT is 1
%, It is possible to incorporate a protection circuit with almost no effect on the characteristics as an element.

In this embodiment, the description has been given based on the vertical type in which the drain layer is formed on the back surface of the IGBT.
In a lateral IGBT in which the drain layer is formed on the surface of the IGBT similarly to the source layer, the above-described protection circuit can be similarly incorporated.

[0025]

As described above, the semiconductor device (IGBT) provided with the conductivity modulation type MOSFET according to the present invention is:
The overvoltage protection circuit is constituted by an avalanche diode and a zener diode built in the IGBT. Therefore, damage to the element due to an overvoltage caused by an abnormal operation of the circuit can be dealt with by the built-in protection circuit. Therefore, since the thickness of the conductivity modulation layer can be suppressed to a thickness corresponding to the withstand voltage required in normal operation, the tail current at the time of turn-off can be suppressed,
An IGBT element having a small turn-off loss can be realized.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a structure of an IGBT according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing an equivalent circuit of the IGBT shown in FIG.

FIG. 3 is a cross-sectional view showing a structure of a conventional IGBT.

FIG. 4 is a circuit symbol of the IGBT shown in FIG.

FIG. 5 is a graph showing a turn-off waveform in a voltage resonance type circuit using an IGBT.

[Explanation of symbols]

1 ... P ⁺ -type drain layer 2 ... N ⁺ -type buffer layer 3 of ... semiconductor substrate 4 ... N ^- -type conductivity modulation layer 5 ... gate oxide film 6 ... Gate Electrode 7 P-type base layer 8 Source electrode 9 N-type source layer 10 Cell (MOS section) 11, 11a, 11b P-type avalanche layer 12, 13 , 14 ... Zener diode 20 ... avalanche layer of the distal portion 30 ... depletion field V _G ... gate potential V _S ... source potential V _M ... blocking voltage i _M ... main current i _T ··· Tail current t ₀ ··· Time when the gate potential is turned off t ₁ ··· Time when the tail current becomes zero

Claims (4)

(57) [Claims] A second conductivity type conductivity modulation layer, a first conductivity type base layer and a second conductivity type source layer formed on the surface of the conductivity modulation layer; A conductivity modulation type M having a MOS portion and a first conductivity type drain layer formed on the front surface or the back surface of the conductivity modulation layer facing the MOS portion;
In a semiconductor device provided with an OSFET, on a surface of the conductivity modulation layer facing the drain layer,
An avalanche layer of a first conductivity type having at least a portion of a curvature larger than that of the base layer is formed, and the avalanche layer is connected to a gate electrode of the MOS unit. A semiconductor device provided with a degree modulation type MOSFET. 2. The conductivity modulation type MOSFET according to claim 1, wherein said avalanche layer is connected to said gate electrode via a Zener diode.
A semiconductor device comprising: 3. The semiconductor device according to claim 1, wherein the gate electrode is connected to a source electrode of the MOS unit via at least one Zener diode. apparatus. 4. The semiconductor device according to claim 2, wherein at least one of said Zener diodes is formed of polysilicon and is built in said semiconductor device.