JP2943067B1 - Display control method and device - Google Patents

Abstract

An object of the present invention is to provide a display control method and apparatus capable of displaying a plurality of lines of kanji with high quality by a simple method without putting a load on a CPU. SOLUTION: After displaying dot display data of a character font in a storage area having the same configuration as a character display area in a dual port RAM 6 and storing the same in a display data latch 10 as line data according to a line address value from a common counter 14. In the display control method in which the data is latched and displayed over a plurality of rows at a timing synchronized with the common counter value, the space line data is stored in advance at predetermined line addresses (30, 31) in the RAM 6, and The space line data is displayed on the liquid crystal display by changing the correspondence between the line address value for sequentially designating and reading line data from the LCD and the common counter value for determining the display common of the liquid crystal display 1 for the line data. It was inserted between the rows on the container 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display control method and apparatus for driving and controlling a display panel for displaying characters, and more particularly to a display control method for displaying a character font having a fixed number of dots over a plurality of lines. The present invention relates to a display control method and apparatus for displaying characters without causing inter-junction.

[0002]

2. Description of the Related Art Heretofore, when displaying characters and the like using a small dot matrix display panel, there is known a method using a display control device having a display data RAM for storing ON / OFF of each dot of the display panel. ing. Here, one bit of the display data RAM corresponds to one dot of the display panel, and an interface between the display control device and the main CPU is generally an 8-bit or 4-bit parallel interface or a serial interface. In each of the interfaces, data is handled in units of 8 bits.

On the other hand, character font data of a fixed number of dots is used as a source of character data. In many cases, a 16-dot font is used to display Chinese characters in detail or in high quality.

[0004]

However, when the above-mentioned conventional technique is used, 16-dot font data is simply converted to 8 dots.
When a process of dividing the data into two dots and sequentially writing font data in units of 8 bits to the display data RAM by the CPU interface is performed, a state where there is no gap between adjacent lines occurs. This causes a problem that the characters are joined.

In order to prevent the joining of characters, a 16-bit data of a character font must be provided with a space between lines.
The main CPU needs to perform data shaping processing so that 17-bit data obtained by adding bits is written by an 8-bit interface, and there is a problem that the load on the main CPU increases.

An object of the present invention is to solve the above-described conventional problems by displaying characters over a plurality of lines.
In response to a request from the main CPU, the display control device performs a process of providing a space between lines, thereby reducing the load on the main CPU and displaying multiple lines of kanji with high quality by a simple method. To provide a display control method and apparatus.

[0007]

A feature of the method of the present invention for solving the above-mentioned problems is that dot display data of a character font to be displayed is received, and dot display data of the character font to be displayed is temporarily stored in a display data RAM. The dot display data stored in the display data RAM corresponds to one line of the character display area according to the common counter value from the common counter after being expanded and stored in the storage area having the same configuration as the character display area in the character display area. In a display control method in which line data is read out as a unit, latched in a display data latch, and synchronized with the common counter value data and displayed over a plurality of rows on a dot matrix display panel, the space line data is The display data is stored in advance at a predetermined line address in the display data RAM, and the display data The space line data is displayed as a space line at a position between rows on the display panel by changing a correspondence between a line address value for sequentially specifying and reading line data from an AM and the common counter value. That's the point.

According to this configuration, normally, a line address value for reading line data from the display data RAM is generated based on common counter value data for drive control of a common driver of a display panel.
In the kanji display mode, the common counter value for generating the line address value is used as the internal common counter value, and a separate display common counter value for controlling the drive of the common driver is provided. By changing the display common counter value so as to form a drive waveform of the common driver corresponding to the position where the space line is inserted, it is possible to display with a space between rows. Therefore, it is only necessary to change the correspondence between the display common counter value and the line address value, and the display can be performed with spaces between lines without increasing the load in the CPU.

The display control device according to the present invention is characterized in that a display data RAM for expanding and storing dot display data of a character font to be displayed in a storage area having the same configuration as a character display area, and a line address value. , A common counter that outputs a display common counter value that is the basis of the drive waveform of the common driver, and the display data R that responds to the internal common counter value.
A line address generator for generating a line address value for reading dot display data from the AM as a plurality of line data, and sequentially latching the line data read from the display data RAM in response to the line address value And a display control device for displaying required characters over a plurality of lines on the display panel based on the line data latched by the latch in response to the display common counter value. A first determination unit configured to determine whether or not an internal common counter value corresponds to a line address value for displaying a line spacing on the display panel; Equivalent to the line address value for the character data of the line on the data RAM A second discriminating means for discriminating whether or not Luke, the display data R in response to the line address value
The first and second lines are used to generate a drive waveform of a common driver for displaying line data read from an AM at a display position where a space line is inserted between rows on the display panel.
Correction means for correcting the internal common counter value to obtain a display common counter value based on each judgment result of the determination means, wherein the display common counter value from the correction means generates a drive waveform of a common driver. It is used as a common counter value.

With this configuration, the display data RAM stores character font data of a required number of dots in a display form and stores them over a plurality of lines without taking up space between lines. The dot display data stored in the display data RAM so as to correspond to the display mode is a display common counter value obtained by correcting the internal common counter value according to each determination result in the first and second determination means. Are displayed based on the driving waveform of the common driver formed on the basis of the above. As a result, characters can be displayed on a display panel over a plurality of lines with a space between lines.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the drawings.

FIGS. 1 to 6 show an example of an embodiment of a display control device according to the present invention for performing display control of a liquid crystal display device for displaying figures, characters and the like by dot matrix display. . In the present embodiment, three lines of a 16-dot font are displayed.
The description will be given taking the display capacity of g as an example, but the present invention is not limited to this specific configuration example.

FIG. 1 is a diagram showing a block configuration of a display control device according to the present invention. In FIG. 1, reference numeral 1 denotes a liquid crystal display. In the liquid crystal display 1, liquid crystal is sealed between a pair of transparent glass substrates, and a plurality of scanning lines and signal lines are formed in a matrix on opposing surfaces of the pair of transparent glass substrates. A display dot made of liquid crystal is formed at each intersection with the scanning driver and the scanning driver and the signal line are sequentially selected and driven by the drive control by the common driver and the segment driver, and the electric charge is accumulated in the liquid crystal at the sequentially selected intersection. It has a known configuration capable of displaying characters and images.

Reference numeral 2 denotes a display control device for driving and controlling the liquid crystal display 1 for displaying characters and images on the liquid crystal display 1, and displaying characters and images for display from an external CPU (not shown). It has an MPU interface 3 for receiving data and instructions, a command decoder 4 for decoding received instructions, and a display data memory block 5 for storing received dot display data and preparing dot display data for display. ing.

The display data memory block 5 includes a display data RAM 6, an input / output circuit 7, a column address decoder 8,
Line address generator 9 and display data latch 1
Consists of zero. The page address prepared by the page address register 11 is given to the input / output circuit 7,
The column address prepared by the column address register 12 and the column address counter 13 is given to the column address decoder 8.

The common counter value from the common counter 14 is input to the display data RAM 6 and is input from the display data latch 10 to the liquid crystal drive circuit 15 to which display data prepared for display is supplied. I have. 16 is a liquid crystal power supply circuit, 17 is a CR oscillation circuit for producing a timing pulse, and 18 is a display timing circuit.

The display data RAM 6 has a dual port RA.
M, the dot display data input from the outside via the MPU interface 3 is stored in the page address register 1
Page address from 1 and column address counter 13
Stored according to the column address from

FIGS. 2 and 3 show an example in which kanji dot display data of "document" is stored in the display data RAM 6. FIG. In the example shown in FIGS. 2 and 3,
8 simply obtained by dividing 16-dot character font data into two
Writing is performed as bit parallel data.

Then, a page address (0,
The dot display data of the character "" is stored in the column addresses 00 to 07 specified by (0, 1, 0) and (0, 0, 1, 1).

In practice, the page address (0, 0, 0,
0), column address 07 in (0, 0, 0, 1)
Thereafter, the dot display data is stored in the same manner, and the characters for the first line are stored in the memory area defined by the page address (0, 0, 0, 0), (0, 0, 0, 1) and the column address. The data is stored as dot display data. Similarly, page addresses (0, 0, 1, 0),
In the next memory area defined by (0, 0, 1, 1) and the column address, character data for the second line is stored as dot display data.

The page address (0, 1, 0, 0),
In the memory area defined by (0, 1, 0, 1) and the column addresses 00 to 5F, character data for the third row is stored in the same manner.

The page address (0, 1, 1, 0) contains 3
A data memory area for a line is secured, and data for representing a space between lines is stored in the data memory area.

In the display data RAM 6, as described above, the dot display data is expanded to the display position on the liquid crystal display 1 in units of 8 bits, and three lines of character data are stored as the dot display data. . The data stored in this manner is transmitted to the line address generator 9.
Are read from the display data RAM 6 in units of one line data from column addresses 00 to 5F at the line address specified by the line address value from
It is latched by the display data latch 10.

FIG. 4 shows an internal common input which is input to a line address generator 9 for outputting a line address value for sequentially reading dot data line by line from the display data RAM 6 from the clock output from the display timing circuit 18. A detailed block diagram of a counter value and a common counter that generates a display common counter value to be input to the liquid crystal drive circuit 15 that generates an output waveform of the common terminal is shown.

The liquid crystal drive circuit 15 decodes the display common counter value, activates a specific terminal corresponding to the display common counter value among the plurality of common terminals, and activates one display dot line of the liquid crystal panel. .

The common counter 14 responds to a mode signal output from the command decoder 4 and outputs a kanji display common counter value for displaying characters such as kanji, and a kanji mode for displaying figures such as illustrations. Of the normal mode for outputting the common counter value for graphic display.

In the normal mode, the internal common counter value is output as it is as the display common counter value. The internal common counter value and the line address value are equal. That is, as shown in the normal mode of FIG. 5, the line address value is equal to the display common counter value, and the effective common terminals are incremented by one in order from common 1.

On the other hand, in the kanji mode, three lines of character data are displayed in a form in which a space is inserted between each line in order to prevent joining of upper and lower characters by directly displaying three lines of character data. In order to realize this, it is necessary to change the correspondence of the common terminal which is valid for the data of one line of the display dot read from the RAM 6 by the line address value as shown in the kanji mode of FIG. .

The common counter 14 is provided between the row decoder 9
1, row block decoder 92, counter forced change circuit 9
3, an adding circuit 95 and a frequency dividing circuit 96.

When the line address decoder 91 detects that the line address value is a value corresponding to a place to be a line space on the display panel surface of the liquid crystal display 1, the line common value is forcibly decremented. This is a circuit that outputs a jump signal SX for changing to a display common counter value for displaying space data.

In the present embodiment shown in FIG. 5, the line address values for the character string on the first line are 00 to 0Fh.
However, 10 to 1Fh is assigned to the second row, and 20 to 2Fh is assigned to the third row, and the line address value of the data for the space is 30 to 31h for two lines. ing.

In response to the input of the jump signal SX, the counter forcible change circuit 93 changes the internal common counter value at that time to a display common counter value corresponding to a common terminal for displaying a space between lines. That is,
Since the line address values 30, 31h are line address values for reading the space between lines, they are changed to display common counter values 10, 21h corresponding to the common terminals for displaying the space between lines in response to the jump signal SX. .

The row block decoder 92 determines whether or not the current line address value is a line address value corresponding to a specific row block requiring a shift process. In the present embodiment, as understood from the above description, when the line address value is 10 to 1 Fh, the result of adding 1 is used as the display common counter value, and when the line address value is 20 to 2 Fh, 2 is used. It is necessary to make the added result the display common counter value. From the row block decoder 92, data indicating the added value is output as added value data SY.

The addition value data SY from the row block decoder 92 is input to the addition circuit 95, where the result obtained by adding the addition data SY to the internal common counter value equal to the line address value is used as the display common counter value. The jump signal SX is input to the addition circuit 95, and when the jump signal SX is output, the addition circuit 95
Has a configuration in which the addition operation is prohibited.

FIG. 5 shows the line address value, the display common counter value in the normal mode, and the display common counter value in the kanji mode in a corresponding manner. Hereinafter, the operation of the common counter 14 will be described with reference to FIG.

First, in the normal mode, the line address value is output as it is as the display common counter value. On the other hand, in the kanji mode, the line address value is 00 to 0Fh.
Until then, this is sequentially output as it is as the display common counter value. And the line address value is 10 to 1Fh
For, the display common counter values 11 to 20h for the character strings on the second line must be assigned.
In row block decoder 92, line address value 1
It is determined that 1 should be added to 0 to 1Fh, and a process of adding 1 to the line address values 10 to 1Fh is executed in the adding circuit 95, and the display common counter value becomes 11 to 20h.

Next, for the line address values of 20 to 2Fh, the display common counter values 22 to 31h for the character strings on the third line must be assigned. In the row block decoder 92, the line address value 20
It is determined that 2 should be added to .about.2Fh, and the adding circuit 95 performs a process of adding 2 to the line address value of 20 to 2Fh, and the display common counter value becomes 22 to 31h.

When the line address value becomes 30, a jump signal SX is output from the inter-row decoder 91, and the value 30h
Display common counter value 10 indicating line spacing instead of
h is output. This sets the upper bit 11b to 01b
This is realized by replacing At this time, since the addition circuit 95 does not operate, the display common counter value 10h obtained by the counter forcible change circuit is output from the common counter 14 as it is.

When the line address value becomes 31h, a jump signal SX is output from the inter-row decoder 91 and the value 31
Display common counter value 2 indicating line spacing instead of h
1h is output. This sets the upper bit 11b to 10
b. At this time, since the addition circuit 95 does not operate, the display common counter value 21h obtained by the counter forcible change circuit is output from the common counter 14 as it is.

Since the line address value 32h indicates the position of the icon on the display panel, it is output as the display common counter value 32h as it is.

By controlling the effective common output in accordance with the display common counter value obtained from the common counter 14 as described above, as shown in FIG. Third character display string M
Character display over a plurality of lines is executed with the space lines SL1 and SL2 inserted between the lines 1 to M3.

The common counter 14 can be realized by a simple logic circuit.
Compared to running complex programs in U
When writing the 6-dot font data into the display data RAM 6, the 16-dot font data can be simply divided into 8 dots and written 8 bits at a time in the memory area specified by each page address and column address. The space between lines can be easily inserted without imposing a large burden.

[0043]

According to the present invention, when font data is written to the display data RAM, it is simply divided into predetermined dots and written in a memory area specified by each page address and column address in units of these dots. Since it is possible to provide a display with a space between lines, it is possible to reduce the load on the CPU when writing font data to the display data RAM.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an example of an embodiment of a display control device according to the present invention.

FIG. 2 is a diagram showing a part of an address configuration diagram for explaining a state of kanji dot display data stored in a display data RAM shown in FIG. 1;

FIG. 3 is a diagram showing the remaining part of the address configuration diagram for explaining the state of the kanji dot display data stored in the display data RAM shown in FIG. 1;

FIG. 4 is a detailed block diagram of the common counter shown in FIG. 1;

FIG. 5 is an explanatory diagram for explaining an operation of the common counter shown in FIG. 4;

FIG. 6 is a view showing a state in which a character string of a plurality of lines is displayed by the display control device shown in FIG. 1;

[Explanation of symbols]

 Reference Signs List 1 liquid crystal display device 1A display panel 2 display control device 3 MPU interface 4 command decoder 5 display data memory block 6 display data RAM 7 input / output circuit 8 column address decoder 9 line address generator 10 display data latch 11 page address register 12 column address register 13 Column address counter 14 Common counter 15 Liquid crystal drive circuit 16 Liquid crystal power supply circuit 17 CR oscillation circuit 18 Display timing circuit 91 Inter-row decoder 92 Row block decoder 93 Counter value forced change circuit 94 Addition circuit 95 Divider circuit M1 to M3 Character display string SX jump signal

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI G09G 3/36 G09G 3/36 5/24 650 5/24 650T

Claims (2)

(57) [Claims] 1. After receiving dot display data of a character font to be displayed and temporarily expanding and storing dot display data of the character font to be displayed in a storage area having the same configuration as a character display area in a display data RAM, The display data RAM according to a common counter value from a common counter.
The dot display data stored therein is read out in units of line data corresponding to one line of the character display area, latched in a display data latch, and synchronized with a common counter value from the common counter to display a dot matrix. In a display control method for displaying a plurality of lines on a panel, space line data is stored in advance at a predetermined line address in the display data RAM, and line data is sequentially designated from the display data RAM. The space line data is displayed as a space line at a position between rows on the display panel by changing a correspondence between a line address value for reading and the common counter value forming a driving waveform of a common driver. A display control method, comprising: 2. A display data RAM for storing dot display data of a character font to be displayed in a storage area having the same configuration as a character display area, an internal common counter value serving as a source of a line address value, A common counter that outputs a display common counter value that is a source of a drive waveform of the common driver; and a line address value for reading dot display data as a plurality of line data from the display data RAM in response to the internal common counter value. A line address generator, and latch means for sequentially latching line data read from the display data RAM in response to the line address value, wherein the latch means responds to the display common counter value. The required characters are duplicated on the display panel based on the line data latched in In a display control device configured to display over several lines, the common counter determines whether or not an internal common counter value corresponds to a line address value for displaying a space between lines on the display panel. First determining means, second determining means for determining whether or not the internal common counter value corresponds to the line address value of the line data of the character data on the display data RAM; In order to generate a drive waveform of the common driver for displaying the line data read out from the display data RAM in a position where a space line is inserted between rows on the display panel in response to the line data, each of the determination results of the first and second determination means Correction means for correcting the internal common counter value to obtain a display common counter value based on the Display control apparatus characterized by down counter value is used as a common counter value to make the driving waveform of the common driver.