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JP2810182B2 - Structure of hybrid integrated circuit components - Google Patents

Structure of hybrid integrated circuit components

Info

Publication number
JP2810182B2
JP2810182B2 JP2003105A JP310590A JP2810182B2 JP 2810182 B2 JP2810182 B2 JP 2810182B2 JP 2003105 A JP2003105 A JP 2003105A JP 310590 A JP310590 A JP 310590A JP 2810182 B2 JP2810182 B2 JP 2810182B2
Authority
JP
Japan
Prior art keywords
composite
opening
integrated circuit
hybrid integrated
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003105A
Other languages
Japanese (ja)
Other versions
JPH03208366A (en
Inventor
克治 安田
稔 高谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP2003105A priority Critical patent/JP2810182B2/en
Publication of JPH03208366A publication Critical patent/JPH03208366A/en
Application granted granted Critical
Publication of JP2810182B2 publication Critical patent/JP2810182B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Coils Or Transformers For Communication (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、磁性体と導体との積層構造により形成され
た複合インダクタからなる単一基板、もしくは複合イン
ダクタと複合コンデンサあるいは複合抵抗の少なくとも
いずれかとを重畳した複合基板を備えた混成集積回路部
品の構造に関する。
The present invention relates to a single substrate made of a composite inductor formed by a laminated structure of a magnetic material and a conductor, or at least one of a composite inductor and a composite capacitor or a composite resistor. The present invention relates to a structure of a hybrid integrated circuit component provided with a composite substrate on which a heel is superimposed.

(従来の技術) 第4図はこの種の従来の混成集積回路部品を示す断面
図であり、磁性体1とコイル用導体2とを印刷法等によ
り積層して複数のインダクタを形成した複合インダクタ
3(なお、複合インダクタ1内にトランスを構成する場
合もあるが、本明細書においては、インダクタで代表さ
せ、トランスについての説明を省略する)と、誘電体4
と電極用導体5とを印刷法等により積層して複数のコン
デンサを構成した複合コンデンサ6とを重畳し、この重
畳体を一体化基板として用い、該基板上にトランジス
タ、ICあるいはチップ抵抗等の1個以上の電子部品7A、
7Bを搭載してなる。8は積層体の側面に形成した導体で
ある端子電極であり、内蔵するインダクタやコンデンサ
あるいは電子部品7A、7Bとの間を接続すると共に、所定
の端子電極8がマザー基板(図示せず)に半田付けされ
る。9は電子部品7A、7Bの端子10と前記端子電極8等と
を接続する導体パターンである。
(Prior Art) FIG. 4 is a cross-sectional view showing a conventional hybrid integrated circuit component of this kind, and a composite inductor in which a plurality of inductors are formed by laminating a magnetic body 1 and a coil conductor 2 by a printing method or the like. 3 (a transformer may be formed in the composite inductor 1, but in this specification, the transformer is represented by an inductor, and the description of the transformer is omitted);
And a conductor 5 for electrodes are laminated by a printing method or the like, and a composite capacitor 6 constituting a plurality of capacitors is superimposed, and this superimposed body is used as an integrated substrate. One or more electronic components 7A,
It is equipped with 7B. Reference numeral 8 denotes a terminal electrode which is a conductor formed on the side surface of the laminate, and connects between built-in inductors, capacitors or electronic components 7A and 7B, and a predetermined terminal electrode 8 is provided on a mother board (not shown). Soldered. Reference numeral 9 denotes a conductor pattern for connecting the terminals 10 of the electronic components 7A and 7B to the terminal electrodes 8 and the like.

(発明が解決しようとする問題点) このような混成集積回路部品においては、電子部品7A
または7Bがスイッチング素子等のように、放射ノイズを
発生するものである場合、その放射ノイズが周辺部品へ
伝わり、周辺回路の誤動作あるいは信号の乱れ等の原因
となる。このような放射ノイズを発生させる電子部品を
有するものにおいては、原因となる素子および回路にシ
ールドケースを被せるか、あるいは周辺回路から距離を
とって配置する等の対策をとっているが、回路全体の大
型化を招来するという問題点がある。
(Problems to be Solved by the Invention) In such a hybrid integrated circuit component, the electronic component 7A
Or, when 7B generates radiated noise such as a switching element, the radiated noise is transmitted to peripheral components, causing malfunction of peripheral circuits or disturbance of signals. In the case of electronic components that generate such radiation noise, measures such as covering the element and circuit causing the noise with a shield case or disposing them at a distance from peripheral circuits are taken. There is a problem that the size of the device is increased.

本発明は、上述した問題点に鑑み、放射ノイズの周辺
回路への影響を極力少なくした混成集積回路部品の構造
を提供することを目的とする。
The present invention has been made in view of the above problems, and has as its object to provide a structure of a hybrid integrated circuit component in which the influence of radiation noise on peripheral circuits is minimized.

(問題点を解決するための手段) 上記の目的を達成するため、本発明は、磁性体と導体
との積層構造により形成された複合インダクタからなる
単一基板、もしくは複合インダクタと複合コンデンサあ
るいは複合抵抗の少なくともいずれかとを重畳した複合
基板を備えた混成集積回路部品において、前記基板を厚
み方向に貫通する開口部を設け、該開口部内に放射ノイ
ズを発生する電子部品を収容し、前記開口部の内径部に
沿って放射ノイズをシールドするショートリングを設け
たことを特徴とする。
(Means for Solving the Problems) In order to achieve the above object, the present invention provides a single substrate composed of a composite inductor formed by a laminated structure of a magnetic material and a conductor, or a composite inductor and a composite capacitor or a composite. In a hybrid integrated circuit component comprising a composite substrate having at least one of resistors superimposed thereon, an opening penetrating the substrate in a thickness direction is provided, and an electronic component generating radiated noise is accommodated in the opening, and the opening is provided. A short ring for shielding radiation noise is provided along the inner diameter of the.

(作用) 本発明は、上述の構造を有するので、開口部に収容さ
れた電子部品で発生する放射ノイズは、ショートリング
で電流に変換され、熱消費される。
(Operation) Since the present invention has the above-described structure, radiation noise generated in the electronic component housed in the opening is converted into a current by the short ring and is consumed.

(実施例) 第1図は本発明による混成集積回路部品の構造の一実
施例を示す断面図、第2図は該実施例の平面図である。
第1図および第2図において、11はマザー基板であり、
該マザー基板11上に放射ノイズを発生させるトランジス
タ等の電子部品7が、その端子10を、マザー基板11上に
形成した導体パターン12に固着して取付けられる。複合
インダクタ3には、ほぼ中央部に、厚み方向に貫通した
開口部13を設け、該開口部13内に前記電子部品7を収容
し、複合インダクタ3でなる基板の側面の端子電極8の
所定のものを導体パターン12に半田付け等により固着す
る。また、開口部13の内径部に、積層構造で導体を印刷
するかシート状の導体を積層する等の方法でショートリ
ング14を形成する。
(Embodiment) FIG. 1 is a sectional view showing an embodiment of a structure of a hybrid integrated circuit component according to the present invention, and FIG. 2 is a plan view of the embodiment.
1 and 2, reference numeral 11 denotes a mother substrate,
An electronic component 7 such as a transistor that generates radiation noise is fixedly attached to the conductor pattern 12 formed on the mother board 11 on the mother board 11. The composite inductor 3 is provided with an opening 13 which penetrates in the thickness direction substantially at the center, accommodates the electronic component 7 in the opening 13, and forms a predetermined portion of the terminal electrode 8 on the side surface of the substrate made of the composite inductor 3. Is fixed to the conductor pattern 12 by soldering or the like. Further, a short ring 14 is formed on the inner diameter of the opening 13 by a method such as printing a conductor in a laminated structure or laminating a sheet-shaped conductor.

このような構造とすることにより、電子部品7で放射
されるノイズは、ショートリング14に還流する電流に変
換され、熱消費される。
With such a structure, noise radiated from the electronic component 7 is converted into a current flowing back to the short ring 14 and is consumed.

また、本発明において、複合インダクタ3でなる基板
上に放射ノイズを実質的に発生しない電子部品を搭載し
ても良いが、本実施例のように、電子部品7を開口部13
内に収容するものだけとする構成においては、部品全体
の厚みTは、複合インダクタ3の厚みのみとなり、薄型
化が達成される。
Further, in the present invention, an electronic component that does not substantially generate radiation noise may be mounted on the substrate made of the composite inductor 3, but as in the present embodiment, the electronic component 7 is connected to the opening 13.
In a configuration in which only the components are housed inside, the thickness T of the entire component is only the thickness of the composite inductor 3, and a reduction in thickness is achieved.

第3図は本発明の他の実施例であり、複合インダクタ
3に複合コンデンサ6を一体に重畳させたものに前記実
施例と同様に開口部13を設け、該開口部13に放射ノイズ
を発生させる電子部品7を収容したものである。また、
本実施例においては、電子部品7の端子10は、マザー基
板11上の導体パターン12ではなく、積層体でなる基板上
に形成した導体パターン9に半田付けしている。
FIG. 3 shows another embodiment of the present invention, in which an opening 13 is provided in a composite inductor 3 in which a composite capacitor 6 is integrally superimposed as in the previous embodiment, and radiation noise is generated in the opening 13. The electronic component 7 is accommodated. Also,
In the present embodiment, the terminals 10 of the electronic component 7 are soldered not to the conductor patterns 12 on the mother board 11, but to the conductor patterns 9 formed on a board made of a laminate.

本発明は、上記実施例以外に、複合インダクタ3に複
合抵抗を重畳したもの、あるいは第3図の積層体をさら
に複合抵抗を重畳したものにも適用できる。
The present invention can be applied not only to the above-described embodiment but also to a composite inductor 3 having a composite resistor superimposed thereon, or a laminate of FIG. 3 in which a composite resistor is further superimposed.

(発明の効果) 本発明によれば、積層体でなる基板を厚み方向に貫通
する開口部を設け、該開口部内に放射ノイズを発生する
電子部品を収容し、前記開口部の内径部に沿って放射ノ
イズをシールドするショートリングを設けたので、放射
ノイズの周辺部品への伝達が阻止され、回路の誤動作あ
るいは信号の乱れ等が防止される。また、従来のように
シールドケースを被せるか、あるいは周辺回路から距離
をとる等の対策をとる場合に比較し、本発明によれば、
積層体と一体にショートリングを設けることができるの
で、回路全体の小型化が達成できる。
(Effects of the Invention) According to the present invention, an opening penetrating a substrate made of a laminate in the thickness direction is provided, an electronic component generating radiated noise is accommodated in the opening, and the opening is formed along the inner diameter of the opening. Since the short ring is provided to shield the radiated noise, transmission of the radiated noise to peripheral components is prevented, and malfunction of the circuit or disturbance of the signal is prevented. Also, according to the present invention, compared to the case where a shield case is covered as in the related art or a measure such as taking a distance from a peripheral circuit is taken,
Since the short ring can be provided integrally with the laminate, the size of the entire circuit can be reduced.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明による混成集積回路部品の一実施例を示
す断面図、第2図は該実施例の平面図、第3図は本発明
の他の実施例を示す断面図、第4図は従来の混成集積回
路部品の構造を示す断面図である。 1:磁性体、2:コイル用導体、3:複合インダクタ、4:誘電
体、5:電極用導体、6:複合コンデンサ、7:電子部品、8:
端子電極、9、12:導体パターン、10:端子、11:マザー
基板、13:開口部、14:ショートリング
1 is a sectional view showing an embodiment of a hybrid integrated circuit component according to the present invention, FIG. 2 is a plan view of the embodiment, FIG. 3 is a sectional view showing another embodiment of the present invention, and FIG. FIG. 2 is a cross-sectional view showing the structure of a conventional hybrid integrated circuit component. 1: magnetic body, 2: conductor for coil, 3: composite inductor, 4: dielectric, 5: conductor for electrode, 6: composite capacitor, 7: electronic component, 8:
Terminal electrode, 9, 12: conductor pattern, 10: terminal, 11: mother board, 13: opening, 14: short ring

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】磁性体と導体との積層構造により形成され
た複合インダクタからなる単一基板、もしくは複合イン
ダクタと複合コンデンサあるいは複合抵抗の少なくとも
いずれかとを重畳した複合基板を備えた混成集積回路部
品において、前記基板を厚み方向に貫通する開口部を設
け、該開口部内に放射ノイズを発生する電子部品を収容
し、前記開口部の内径部に沿って放射ノイズをシールド
するショートリングを設けたことを特徴とする混成集積
回路部品の構造。
1. A hybrid integrated circuit component comprising a single substrate composed of a composite inductor formed by a laminated structure of a magnetic substance and a conductor, or a composite substrate in which a composite inductor and at least one of a composite capacitor and a composite resistor are superimposed. An opening that penetrates the substrate in the thickness direction, an electronic component that generates radiation noise is accommodated in the opening, and a short ring that shields the radiation noise along the inner diameter of the opening is provided. The structure of the hybrid integrated circuit component characterized by the above.
JP2003105A 1990-01-10 1990-01-10 Structure of hybrid integrated circuit components Expired - Fee Related JP2810182B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003105A JP2810182B2 (en) 1990-01-10 1990-01-10 Structure of hybrid integrated circuit components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003105A JP2810182B2 (en) 1990-01-10 1990-01-10 Structure of hybrid integrated circuit components

Publications (2)

Publication Number Publication Date
JPH03208366A JPH03208366A (en) 1991-09-11
JP2810182B2 true JP2810182B2 (en) 1998-10-15

Family

ID=11548070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003105A Expired - Fee Related JP2810182B2 (en) 1990-01-10 1990-01-10 Structure of hybrid integrated circuit components

Country Status (1)

Country Link
JP (1) JP2810182B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4798840B2 (en) * 1999-12-01 2011-10-19 イビデン株式会社 Package substrate
JP5336127B2 (en) * 2008-08-26 2013-11-06 株式会社デンソー Circuit board
JP5879679B2 (en) * 2010-09-24 2016-03-08 株式会社村田製作所 Circuit board and arrangement method of noise countermeasure component
JP2014072483A (en) * 2012-10-01 2014-04-21 Fujitsu Semiconductor Ltd Semiconductor device

Also Published As

Publication number Publication date
JPH03208366A (en) 1991-09-11

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