JP2800408B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a process for manufacturing a polycrystalline silicon film.

[Conventional technology]

In recent years, as the integration of DRAMs has increased, the cell size has tended to decrease, and the area of capacitors has tended to decrease. Therefore, in order to secure a sufficient capacitance, a stacked capacitor or a trench stacked capacitor having a large capacitance portion area and having little α-ray resistance and little interference with the capacitance portion is used. However, the cell area of a 64 Mbit DRAM is expected to be 1.5 μm ² or less, and even if these structures are used, a capacitance insulating film having an oxide film equivalent thickness of 50 ° or less is required as a capacitance insulating film. It is extremely difficult to uniformly form such a thin capacitive insulating film without defects on the entire chip. Therefore, a method has been proposed in which the current thickness of the capacitor is maintained by increasing the area of the capacitor.

In the specification of Japanese Patent Application No. 2-72462 (filed on Mar. 20, 1990), the present inventor described that when polysilicon is formed in LPCVD in a certain temperature range, the boundary between the amorphous region and the polysilicon changes at the surface. The hemispherical grains grew densely and the surface area was about 2 times that of the silicon film grown at other temperatures.
It shows that it becomes double. By adapting this polysilicon to the storage electrode of the stacked capacitor,
A sufficient amount of accumulated charge is stored in the capacitance insulating film having a thickness equivalent to an oxide film of about 100 °, and the leak current is also reduced.

[Problems to be solved by the invention]

However, in the above-described method, the condition under which hemispherical grains appear on the surface is that the growth temperature is slightly higher than 545 ° C to 555 ° C.
The temperature is in the range of 10 ° C., and when used for production, there is a problem that the temperature control of LPCVD is very difficult.

An object of the present invention is to provide a method of manufacturing a semiconductor device which does not require such difficult-to-manage steps and has a polycrystalline silicon film manufacturing step capable of increasing the surface area of a silicon film to the same extent as the above-described method. To provide.

[Means for solving the problem]

The method for manufacturing a semiconductor device according to the present invention includes a step of forming an amorphous silicon layer on a substrate, a step of removing a native oxide film on a surface of the amorphous silicon layer, and a heat treatment in a state where the native oxide film is removed. Forming a silicon layer having an irregular surface due to crystallization of the surface of the amorphous silicon layer.

[Action]

The present inventor crystallizes amorphous silicon deposited by LPCVD or the like by heat treatment in a vacuum or a non-oxidizing atmosphere such as an inert gas while maintaining a clean surface state without taking it out to the atmosphere. At that time, they found that irregularities were formed at high density on the surface of the silicon film due to migration and crystallization of silicon on the surface. A polysilicon film having a large surface area can be formed by utilizing the unevenness. At this time, the conditions for growing the amorphous silicon and the conditions for the heat treatment in a vacuum or in a non-oxidizing atmosphere are very loose, and do not require difficult process management as in the above-described method.

Further, the present inventor takes out amorphous silicon into the atmosphere, and even if a natural oxide film is formed on the surface of the amorphous silicon, the natural oxide film is removed by reduction or sputtering or the like, and then removed in a vacuum or an inert gas. It has been found that when crystallizing by heat treatment in a non-oxidizing atmosphere such as the above, irregularities are formed on the surface of the silicon film due to crystallization from the surface and migration of silicon on the surface. A polysilicon film having a large surface area can be formed by utilizing the unevenness. Again, there are no difficult steps to manage.

In the present invention, in any of the manufacturing methods, since the amorphous silicon film is deposited via the oxide film provided on at least a part of the semiconductor substrate, the amorphous silicon film does not become single-crystallized even when heated. It is possible to form irregularities made of very dense polycrystalline silicon. In other words, this oxide film is to prevent the influence of the crystal structure of the substrate from affecting amorphous silicon, and it is necessary to provide such a film when forming a polycrystalline silicon film by the method of the present invention. .

〔Example〕

Example 1 A capacitor having the structure shown in the sectional view of FIG. 3 is to be manufactured. On the Si substrate 50 on which the thick SiO ₂ film 52 was formed, a silicon film 54 was deposited at 510 ° C. and 2500 mm thick. The deposition is performed by the LPCVD method, and the gas used is SiH ₄ + He (SiH ₄ : 20%, He:
80%) and the pressure is 1 Torr.

FIG. 1A shows a surface state when the deposited silicon film 54 is taken out to the atmosphere. FIG. 1 (b) shows the surface state when the silicon film 54 was taken out into the atmosphere after the Ar gas was introduced into the furnace without annealing and the silicon film was annealed at 600 ° C. for 1 hour. Is shown. FIGS. 1 (a) and 1 (b) are scanning electron microscope (SEM) photographs of the surface of the silicon film formed this time. FIG. 1 (a) is a magnification of 100,000 and FIG. 1 (b) is a magnification. It is 400,000 times. The accelerating voltage of this scanning electron microscope is 20 kv. Next, phosphorus diffusion is performed on the deposited silicon film 54 at 820 ° C. for 60 minutes, and thereafter a capacitance insulating film 56 is formed on the surface, and a polysilicon film 58 is formed thereon as an upper electrode. To form the capacitive insulating film 56, first, a Si ₃ N ₄ film is formed on the silicon film 54 by an LPCVD method,
After that, the surface of the Si ₃ N ₄ film is oxidized. The Si ₃ N ₄ film has a temperature of 780
° C, working gas SiH ₄ + NH ₃ (SiH ₄ / NH ₃ = 1/100), pressure 30Pa
Then, the surface was oxidized by pyrogenic oxidation at 900 ° C. and wet 1: 1 until the thickness increased by 20% in terms of oxide film out of 120 mm. Under these conditions, the capacitance insulating film 56 is equivalent to 100 ° (expressed as deff) in terms of a SiO ₂ film. After forming the capacitance insulating film 56 with deff = 100 °, a polysilicon film 58 was deposited thereon at 600 ° C., and then phosphorus was diffused. Thereafter, the substrate was divided into a size of 1 mm × 1 mm by a lithography technique and a dry etching technique to obtain a stacked capacitor as shown in FIG.

As shown in FIG. 1 (a), the surface of the silicon film 54 deposited only at 510 ° C. is very smooth, no grain growth is observed, and the surface area when divided into 1 mm × 1 mm is a 1mm ^2. The capacitance of the capacitor was 3.5 nF as shown in FIG.

Ar gas was introduced into the furnace without taking out the silicon film 54 deposited at 510 ° C. to 2500 ° C. into the atmosphere and annealed at 600 ° C. for 1 hour. As shown in FIG. Grains are formed densely and uniformly,
Fine irregularities occur on the surface, and the surface area increases drastically. Capacity is 2nd
As can be seen from the figure, it is 7 nF, the surface area is about 2 mm ^2, which is about ^twice that at 510 ° C. FIG. 2 shows the change in the capacitance of the capacitor (the surface area of the silicon film) before and after the heat treatment (annealing).

In the first embodiment, annealing was performed in Ar gas, but He, Ne,
Similar results can be obtained by annealing in a vacuum.

As described above, heat treatment of a deposited silicon film having a clean surface that has not been taken out to the atmosphere in a non-oxidizing atmosphere causes very fine irregularities on the surface of the silicon film and increases the surface area. I understand. In this embodiment, the deposition of the amorphous silicon film does not require strict conditions such as temperature. The same applies to annealing, for example, the temperature may be about 650 ° C.

Embodiment 2 If a silicon film is formed by the method shown in Embodiment 1, the surface area can be increased, but it is difficult to always keep the amorphous silicon surface clean. For example, when annealing is performed in another furnace, amorphous silicon is taken out of the growth furnace and transported to the atmosphere. For this reason, a natural oxide film is formed on the surface of the amorphous silicon. When the natural oxide film is present, migration of silicon atoms on the silicon surface is suppressed, so that no unevenness is formed on the silicon film surface even by the heat treatment. Therefore, heat treatment may be performed after removing the natural oxide film formed on the amorphous silicon at a low temperature. The surface state when the natural oxide film of amorphous silicon is removed by Ar gas plasma and then heat-treated in vacuum is also the first condition.
As in FIG. 2B, the surface had fine irregularities. The Ar gas plasma was generated by a high frequency of 13.56 MHz.

We are also conducting the following experiments. After removing the natural oxide film of amorphous silicon using the oxide film reducing effect of SiH ₄ gas, the surface shape when heat-treated in a vacuum is also the first.
The surface had fine irregularities as in the photograph shown in FIG. Reduction of oxide film by SiH ₄ gas, furnace temperature 480 ° C
0.1Torr using SiH ₄ + He (SiH: 20%, He: 80%) gas
Under an atmosphere of 5 minutes.

As in the first embodiment, the present embodiment does not require strict conditions for deposition of an amorphous silicon film, removal of a natural oxide film, and annealing.

〔The invention's effect〕

ADVANTAGE OF THE INVENTION According to this invention, when forming the silicon film which has a fine unevenness | corrugation on a surface, it can be formed very easily, without requiring the process difficult to manage.

[Brief description of the drawings]

FIGS. 1 (a) and 1 (b) are electron micrographs showing the grain structure of the surface of an amorphous silicon film and a film obtained by heat-treating the same. FIG. 2 is a diagram showing a change in capacitor capacity (surface area of a silicon film) before and after a heat treatment (annealing). FIG. 3 is a sectional view showing the structure of the capacitor. 54: Silicon film 56: Capacitive insulating film 58: Polysilicon film

Continued on the front page (58) Fields surveyed (Int.Cl. ⁶ , DB name) H01L 27/04 H01L 21/822 H01L 21/20

Claims (8)

(57) [Claims] A step of forming an amorphous silicon layer on a substrate, a step of removing a native oxide film on a surface of the amorphous silicon layer, and performing a heat treatment in a state where the native oxide film is removed. Forming a silicon layer whose surface is made uneven by crystallization on the surface of the silicon layer. 2. The method according to claim 1, further comprising the step of forming a dielectric layer on the irregularities on the surface of the silicon layer, forming a conductor layer on the dielectric layer, and forming a capacitor comprising these layers. The method for manufacturing a semiconductor device according to claim 1, wherein: 3. The method according to claim 2, wherein said dielectric layer is a silicon oxynitride layer. 4. The method of manufacturing a semiconductor device according to claim 1, wherein said amorphous silicon layer is formed on an oxide film provided on at least a part of a semiconductor substrate. Method. 5. The method according to claim 1, wherein the heat treatment is performed in a vacuum or a non-oxidizing atmosphere. 6. The method of manufacturing a semiconductor device according to claim 5, wherein said non-oxidizing atmosphere is an atmosphere of a gas selected from argon, helium and nitrogen. 7. The method for manufacturing a semiconductor device according to claim 1, wherein the irregularities on the surface of the silicon layer are hemispherical grains. 8. The method according to claim 7, wherein said hemispherical grains have a diameter of about 1000 °.