JP2897056B2 - Video coding control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] A video coding control method that records a video with high efficiency coding and that also enables easy reverse playback, and enables high efficiency coding by motion compensation For the purpose, one screen of the input video signal is divided into a plurality of blocks,
A first encoding unit that performs inter-frame encoding by performing transform coding for each block, and a second encoding unit that performs intra-frame encoding by performing transform encoding for the block.
A motion compensator for performing motion compensation processing corresponding to blocks between frames, a controller for controlling switching between the first and second encoders, and an image recorder for recording and reproducing encoded video signals And the control unit periodically controls the first unit.
Is switched from the inter-frame encoding by the encoding unit to the intra-frame encoding by the second encoding unit, and the intra-frame encoding is also performed by the second encoding unit for blocks in the motion compensation search range by the motion compensation unit. It was configured to perform the conversion.

[Industrial applications]

The present invention relates to a moving picture coding control system which records a moving picture with high efficiency coding, and also enables easy reverse reproduction.

In a system that records a moving image on a recording medium such as a magnetic tape, a magnetic disk, or an optical disk, and reproduces the moving image when necessary, a moving image is displayed on a screen. High-efficiency coding is performed by transform coding and inter-frame coding to reduce the amount of recorded information.

In such a moving image recording / reproducing method, there is a demand to further compress and encode the moving image by motion compensation and to facilitate reverse reproduction or cueing from an arbitrary position.

[Conventional technology]

For example, the following method is known as a conventional coding method for performing magnetic recording or optical recording by encoding a moving image with high efficiency.

(1). A method in which the first frame of a moving image sequence is intra-frame encoded, and the second and subsequent frames are inter-frame encoded.

(2). A method in which the first frame of a moving image sequence is intra-frame encoded, the second and subsequent frames are inter-frame encoded, and the intra-frame encoding is performed on a frame-by-frame basis every certain number of frames.

(3). A method in which the first frame of a moving image sequence is intra-frame encoded, the second and subsequent frames are inter-frame encoded, and a plurality of blocks in one frame are periodically intra-frame encoded.

FIG. 9 is a block diagram of a conventional example of an encoding apparatus using the method (1), wherein 41 is an adder, 42 is a discrete cosine transformer (DCT), 43 is a quantizer (Q), and 44 is an inverse quantum , 45 is an inverse discrete cosine transformer (IDCT), 46 is an adder, 47 is a frame memory (FM), 48 is a variable delay circuit (VD
LY), 49 is a motion compensator, 50 is a variable length coder (VLC), 5
Reference numeral 1 denotes a recording device that performs magnetic recording or optical recording.

The input moving image signal is applied to an adder 41, and a difference from a moving image signal of a previous frame added from a frame memory 47 via a variable delay circuit 48 is obtained. , A DCT coefficient is obtained, and the DCT coefficient is quantized in a quantizer 43, is variable-length coded by a Huffman coding or the like by a variable-length coder 50, and is added to the recording device 51.

The signal quantized by the quantizer 43 is used as an inverse quantizer.
The DCT coefficients are inversely quantized by 44, are subjected to inverse discrete cosine transform by an inverse discrete cosine transformer 45, are added to a video signal of a previous frame by an adder 46, and are added to a frame memory as a video signal of the current frame. Added to 47.
The motion compensator 49 compares the input video signal with the video signal of the previous frame to obtain a motion vector, and the variable delay circuit 48 is controlled according to the motion vector.
Therefore, the moving image signal applied to the recording device 51 is a signal obtained by performing motion compensation interframe coding.

Also, when reproducing and displaying the encoded moving image signal from the recording device 51, decoding is performed by a variable length decoder that performs an inverse process of the variable length encoder 50, and is converted into DCT coefficients by an inverse quantizer. The original moving picture signal can be reproduced by adding the DCT coefficient as the original inter-frame difference signal by the inverse discrete cosine transformer and the reproduction signal of the previous frame.

FIG. 10 is a block diagram of a conventional example of an encoding apparatus according to the above-mentioned method (2). The same reference numerals as those in FIG. 9 denote the same parts, 52 denotes a discrete cosine transformer (DCT), and 53 denotes a frame counter. , 54 and 55 are changeover switches. The configuration for performing motion compensation inter-frame coding is the same as the configuration shown in FIG. 9, but in order to perform intra-frame coding in frame units, a frame counter 53, a discrete cosine transformer 52, and changeover switches 54, 55 Are provided.

The frame counter 53 counts the frame synchronization signal, and when the count content reaches a predetermined number, that is, in order to switch from inter-frame coding to intra-frame coding for each predetermined number of frames, the changeover switch 54 is turned on, and the changeover switch 55 is set. Is turned off, the input video signal is subjected to discrete cosine transform by the discrete cosine transformer 52, the DCT coefficient of the transform output is quantized by the quantizer 43, and the variable-length encoder 50 performs variable-length encoding. Then, it is added to the recording device 51.

In this case, it is also possible to adopt a configuration in which the discrete cosine transformer 52 used when performing intra-frame encoding and the discrete cosine transformer 42 used when performing inter-frame encoding are shared.

FIG. 11 is a block diagram of a conventional example of an encoding apparatus according to the above-mentioned method (3). The same reference numerals as those in FIGS. 9 and 10 denote the same parts, 56 is a predictor, 57 is a control unit, 58 is a counter and 59 is a memory. One screen is divided into a plurality of blocks, and inter-frame encoding is sequentially performed for each block, and intra-frame encoding is performed for each block at a constant block cycle. The control unit 57 includes a counter 58 and a memory.
59, a block position for performing intra-frame encoding is stored in the memory 59, and in the next frame, the storage content is updated so as to shift the intra-frame encoded block position.

The predictor 56 determines whether to perform inter-frame coding or intra-frame coding based on the prediction error amount. If the intra-frame coding reduces the amount of recorded information, the Is forced to be an intra-frame encoding,
The switching information is added to the control unit 57.

FIG. 12 is a flowchart showing the operation of the counter 58 and the memory 59 in FIG.
2), the cycle is set to S, the value of the counter 58 is set to a, and the initial value of the memory 59 is set by the following steps. That is,
a = 0, M (I, J) (block position of one screen is X, Y
(Indicated by the coordinates I and J), I = 1, J = 1, the value a of the count content is added by modulo S, and the result is set as the content M (I, J) of the memory 59. Then, J = J + 1, it is determined whether J> M2, and when the last block position in the Y-axis direction is reached, I = I + 1,
It is determined whether or not I> M1, and the last block position in the X-axis direction is reached, so that the memory 59 is initialized.

Then, the block No. U, V for the input video signal
The processing for (block numbers indicated by the X and Y coordinates of one screen) is performed, and it is determined by the predictor 56 whether or not to perform intra-frame encoding. For the corresponding block number of M
(U, V) = 1, the intra-frame encoding is performed on the block of “1”, and if the prediction result is not the intra-frame encoding, the inter-frame encoding is performed, and the block No. U, V
Is completed, it is determined whether or not one frame has been completed. If one frame has been completed, 1 is added to the contents of the memory 59 by modulo S. Thus, intra-frame encoding is performed for each block in each frame of the period S.

[Problems to be solved by the invention]

In the above-mentioned conventional example, in the method (1), since the first frame is intra-frame coded, it is necessary to perform the reproduction process after returning to the first frame. And reverse playback is difficult.

In the method (2), intra-frame encoding is performed periodically on a frame basis, so that forward reproduction and reverse reproduction can be performed with the frame subjected to intra-frame encoding as a start point. . However, in order to facilitate the reproduction start or the reverse reproduction start from such a midway,
The number of frames to be subjected to intra-frame encoding must be increased, and high-efficiency encoding of a moving image signal cannot be performed.

In the method (3), intra-frame encoding is performed by dispersing the blocks into blocks. Therefore, by reproducing the number of frames having the period S, one screen is composed of the blocks subjected to intra-frame encoding. Therefore, reproduction from the middle and reproduction in the reverse direction become easy.

However, there is a disadvantage that it is impossible to introduce motion compensation prediction. That is, in FIG. 13, if the shaded block A is an intra-frame coded block and the white block C is an inter-frame coded block or a block having no image information at the time of reproduction, n frames to n + 4 When there is no motion vector for a frame, by reproducing four frames from frame n to frame n + 3, intra-frame coded video signals are read out for all blocks of one frame, and one frame is formed by intra-frame coding. Will be. Also in the reverse reproduction, the intra-frame coded video signal is read for all the blocks of one screen by reproducing four frames, so that the reproduction processing in the reverse direction can be performed from that point.

However, when there is a motion vector, for example, when performing reverse playback or midway playback from n frames as shown as the presence of a motion vector on the right side of FIG. 13, the white block C, as described above, Since the block has no image information of the frame, a noise-like screen is obtained even if inter-frame decoding is performed. If there is no block including a motion vector in the n-th frame, the intra-frame decoding of the block A is performed normally. Block B indicates a block that has been subjected to intra-frame decoding in the previous frame.

In the (n + 1) th frame next to the nth frame, intra-frame decoding is performed on the block A. However, if there is a block including a motion vector in the direction indicated by the arrow, that is,
The block corresponding to the base of the arrow is a block C obtained by performing inter-frame decoding in n frames, and performs motion compensation based on noise-like image information. As a result, the motion-compensated image information is written to the block B in which the intra-frame decoding has been performed in the previous frame. Therefore, even in the block B in which the intra-frame decoding has been normally performed in the previous frame, the noise-like decoded image information according to the motion vector is overwritten. Even if the intra-frame decoding for
Normal in-frame decoding for all blocks of the screen is not completed. Since such a state continues, there is a disadvantage that a normal reproduced moving image cannot be obtained.

An object of the present invention is to enable high-efficiency coding by motion compensation.

[Means for solving the problem]

The moving picture coding control method of the present invention divides one screen into a plurality of blocks and performs intra-frame coding according to a predetermined block cycle, which will be described with reference to FIG.

One screen of the input video signal is divided into a plurality of blocks,
A first encoding unit 1 that performs interframe coding by performing transform coding such as discrete cosine transform for each block, and a second coding that performs intraframe coding by performing transform coding for each block. Unit 2, a motion compensating unit 3 for performing motion compensation processing corresponding to blocks between frames, and first and second encoding units 1,
2 and a video recording unit 5 such as a magnetic disk device or an optical disk device for recording and reproducing encoded moving image signals. Is switched to inter-frame encoding by the first encoding unit 1 and intra-frame encoding by the second encoding unit 2, and motion compensation around the block is performed. The second encoder 2 also performs intra-frame encoding on the blocks in the motion compensation search range by the encoder 3.

[Action]

The first and second coding units 1 and 2 perform transform coding such as discrete cosine transform to perform inter-frame coding and intra-frame coding. The data is recorded in the recording unit 5 and read and decoded as needed. The control unit 4 designates a block selected at a predetermined cycle (for example, a hatched block) and a block of a motion compensation search range based on the block (a block indicated by a solid line), The intra-frame encoding by the encoding unit 2 is performed. Therefore, since it is not intra-frame encoding of a single block, a desired image can be reproduced even for a block including a motion vector.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a block diagram of an embodiment of the present invention, in which 11 is an adder, 12 and 13 are discrete cosine transformers (DCT), 14 is a quantizer (Q), 15 is an inverse quantizer (), 16 is an inverse discrete cosine transformer (IDCT), 17 is an adder, 18 is a frame memory (F
M), 19 is a variable delay circuit (VDLY), 20 is a motion compensator, 21
Is a control unit, 22 is a counter, 23 is a memory (M, MX), 24, 25
Is a changeover switch, 26 is a direction information processing unit, 27 is a variable length coder (VLC), and 28 is a recording device.

The adder 11, the discrete cosine transformer 12, the quantizer 14, the inverse quantizer 15, the inverse discrete cosine transformer 16, the adder 17, the frame memory 18, and the variable length encoder 27 perform inter-frame encoding. A first encoder 1 for performing intra-frame encoding is configured by the discrete cosine transformer 13, the quantizer 14, and the variable-length encoder 27, and a motion compensation is performed. The motion compensator 3 is composed of the device 20 and the variable delay circuit 19. The control unit 21 includes a counter 22 and a memory 23. The memory 23 has areas M and MX for storing information on whether to perform intra-frame encoding corresponding to a block obtained by dividing one screen into blocks. It is.

The input video signal is added to an adder 11, a discrete cosine converter 13,
In addition to the motion compensator 20 and the direction information processing unit 21, one screen is divided into a plurality of blocks, and a block selected periodically and a motion compensation search range of the motion compensator 20 based on the block are selected. With respect to the blocks, the changeover switch 24 is turned on and the changeover switch 25 is turned off in accordance with the contents of the area M of the memory 23 of the control unit 21, and the intra-frame encoding is performed.

The information corresponding to the blocks in the areas M and MX of the memory 23 is updated for each frame, and the block position for performing intra-frame encoding is shifted for each frame. Also, the direction information processing unit 26 adds auxiliary information indicating the presence or absence of backward direction information to the variable length encoder 27 according to the motion vector from the motion compensator 20 and records the auxiliary information together with the encoded moving image signal in the recording device 28. It is to let.

FIG. 3 is a diagram for explaining the operation of the embodiment of the present invention.
When performing intra-frame encoding in block units, there are cases where intra-frame encoded blocks are dispersed for each frame (a) and cases where the intra-frame encoded blocks are linearly arranged (c). Note that the hatched blocks indicate blocks for which intra-frame encoding is performed periodically.

Assuming that the motion compensation search range is one adjacent block, if the intra-frame coded blocks are dispersed for each frame, as shown in FIG. Also performs intra-frame encoding. If the intra-frame coded blocks are arranged linearly for each frame,
As shown in (d), the intra-frame encoding is also performed on the blocks on both sides of the block that is originally subjected to the intra-frame encoding. If the blocks for which intra-frame coding is to be performed are arranged linearly in the horizontal direction for each frame, intra-frame coding is performed for blocks above and below the block for which intra-frame coding is to be performed. Then, the intra-frame encoding for all the blocks of one screen is completed by the S frame corresponding to the cycle S.

FIGS. 4A, 4B and 4C are flow charts of an embodiment of the present invention, in which the memory is stored in M (M1, M2) (maximum on the X-axis of the block based on the X and Y coordinates of one screen). The value M1, the maximum value M2 on the Y axis), the cycle is S, the value of the counter 22 is defined as a (1), a = 0 and (2), I = 1 and J = 1 (X, Block positions I and J by Y coordinate are each set to 1)
(3), (4), the value a of the counter 22 is incremented by 1 by modulo S, and the value a of the counter 22 is changed to the value MX of the area MX of the memory.
(I, J) (5).

Next, J is set as J = J + 1 (6), and it is determined whether or not this J is larger than the maximum value M2 (7). If it is not larger, the process returns to step (5), and if it is larger, I = I + 1 (8), It is determined whether or not this I is greater than the maximum value M1 (9). If it is not greater, the process returns to step (4).
Numbers (1, 2, 3,... S) according to the cycle S are stored in the 23 areas MX corresponding to one screen block. The block with the number "1" is a block for which intra-frame encoding is performed periodically.

Next, I = 1, J = 1 (10), (11), and it is determined whether or not the value of MX (I = 1, J = 1) in the area MX of the memory 23 is “1”. (12). If not "1", go to step (1
The process proceeds to 4), and when it is “1”, the process proceeds to step (13). This step (13) shows a case where the motion compensation search range is set to one adjacent block.
Using the area M corresponding to MX, M where MX (I, J) = 1
The number corresponding to eight blocks around the position of (I, J) is set to “1”, and the block to be subjected to intra-frame encoding is represented.

Then, J is set to J + 1 (14), it is determined whether or not this J is larger than the maximum value M2 (15). If it is not larger, the process proceeds to step (12). It is determined whether or not this I is greater than the maximum value M1 (17). If it is not greater, the process proceeds to step (11), and if it is greater, the processing of one frame ends (18).

Next, the value corresponding to the block in the area M of the memory 23 is read out in accordance with the progress of the processing corresponding to the block of one screen. When the value is "1", the changeover switch 24 is turned on and the changeover switch 25 is controlled to be off. Encoding is performed. Accordingly, as shown in FIG. 3 (b), the blocks around the blocks for which the periodic intra-frame coding is performed with diagonal lines are also subjected to the intra-frame coding, and the motion compensation vector is shifted vertically, horizontally, and horizontally. In either case, the motion compensation search range is
In the case of a block, an image according to a motion vector can be reproduced at the time of reproduction.

Next, I = I + 1, J = J + 1, (19), (20), MX (I, J) = MX (I, J) +1 is calculated by modulo S (21), and J = J + 1 (22) ) Then, it is determined whether or not J> M2 (23). If J is not larger than M2, step (21)
When it is large, I = I + 1 is set (24), and then I>
It is determined whether or not it is M1 (25). If I is not larger than M1, the process proceeds to step (20), and if I is larger, the process proceeds to step (10). That is, by incrementing the block-corresponding number (1, 2, 3,... S) of the area MX of the memory 23 by modulo S, the block position at which intra-frame encoding is performed becomes the third position.
The shift is performed as shown in FIGS.

FIG. 5 is an explanatory diagram of an intra-frame coding block for motion compensation. Assuming that the block BL1 is periodically selected as a block at a different position and performs intra-frame coding, as described above, In the area M of 23, the block B2 of the motion compensation search range
"1" indicating that intra-frame encoding is to be performed as in L1
Is stored.

The moving image signal thus encoded is recorded in the image recording unit 5 (recording device 28), and the recorded contents are recorded in the motion vector of the block shown in white at the start of reproduction from the middle or in the reverse reproduction. Playback image information by block BL
2 will be overwritten, but the central block B
L1 will not be affected. Thus, the period S
Since one screen is formed by the intra-frame decoding of at least the block BL1 by the decoding process of, the normal decoding process including the inter-frame decoding is performed thereafter.
A correct image can be reproduced.

As shown in (c) and (d) of FIG. 3, when the blocks for periodically performing frame encoding are linearly arranged in one screen, the period as shown in FIG. "1" indicating that the intra-frame encoding is to be performed on the blocks BL2 on both sides of the block BL1 on which the intra-frame encoding is to be performed is stored in the area M of the memory 23.

FIG. 7 shows DCT coefficients of a block of 8 × 8 pixels.
Since the coefficient of (1, 1) (shown by a black circle) in the X and Y coordinates indicates a DC component, the DC component can be encoded by obtaining a difference. That is, it becomes a kind of DPCM processing, and the compression ratio can be improved.

FIG. 8 is a schematic flowchart of another embodiment of the present invention. As shown in FIG. 3 (d) and FIG. 6, the case where blocks for performing intra-frame encoding are linearly arranged. This shows an outline of the processing. First, the memory 23
M (M3), MX (M3), the period is set to S, the counter value is set to a (31), and X ≒ M3 / S is calculated (32),
a = 0, I = 1, II = 1, this I is increased to the value of M3-X, II is increased to the value of X (33), and the following steps are sequentially performed, and MX (I + II) = A, M (I + II) = a (34), the value a of the counter is calculated by modulo S, and +1 is calculated (35). Step (3) until I, II becomes the maximum value M3-X, X
Repeat steps 4) and (35).

Next, the following steps are repeated from I = 1 to I = M3 (36), and it is determined whether MX (I) = 1 (37),
When "1", it is an intra-frame coded block.
According to (I-1) = 1 and M (I + 1) = 1 (38), the blocks on both sides of the block which is supposed to be subjected to intra-frame encoding are blocks to be subjected to intra-frame encoding. When the processing of one frame is completed (39), the intra-frame coded block position in one screen is held in the area M of the memory 23, and switching between intra-frame coding and inter-frame coding is performed with reference to the area M. Control is performed.

Also, as in step (21) shown in FIG.
The calculation of (*) = MX (*) + 1 is performed by modulo S (40), and the process proceeds to step (36).

This embodiment is a case where the intra-frame coding blocks are arranged in the vertical direction of one screen. However, it is needless to say that the embodiment is applicable to a case where the intra-frame coding blocks are arranged in the horizontal direction.

〔The invention's effect〕

As described above, according to the present invention, the control unit 4 periodically changes the inter-frame encoding by the first encoding unit 1 to the second encoding.
In addition to switching to intra-frame encoding by the encoding unit 2, control is also performed so that intra-frame encoding is performed on blocks in the motion compensation search range by the motion compensation unit 3, and highly efficient encoding by motion compensation is performed. At the same time, by performing intra-frame encoding corresponding to the block periodically, when reproduction is started from an arbitrary intermediate frame in the forward or reverse direction, the reproduction of the frame for one cycle
Since an intra-frame decoding block for one screen is generated, there is an advantage that the original moving image can be reproduced for subsequent frames.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining the principle of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, FIG.
4 (A), (B) and (C) are flowcharts of an embodiment of the present invention, FIGS. 5 and 6 are explanatory diagrams of an intra-frame coded block for motion compensation, and FIG. FIG. 8 is a schematic flow chart of another embodiment of the present invention, FIG. 9, FIG. 10 and FIG. 11 are block diagrams of a conventional example, FIG. FIG. 13 is an explanatory diagram when motion compensation is applied. Reference numerals 1 and 2 denote first and second encoding units, 3 denotes a motion compensation unit, 4 denotes a control unit, and 5 denotes an image recording unit.

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04N 5/92 H04N 7/24 H04N 11/04

Claims (1)

(57) [Claims] 1. A first encoding unit (1) for dividing one screen of an input moving image signal into a plurality of blocks, performing transform coding for each block, and performing inter-frame coding, A second encoding unit (2) that performs intra-frame encoding by performing transform coding, a motion compensation unit (3) that performs motion compensation processing corresponding to blocks between frames, A control unit (4) for switching control of the encoding units (1) and (2); and an image recording unit (5) for recording and reproducing the encoded moving image signal. ), The block at periodically different positions is selected, and the inter-frame coding by the first coding unit (1) and the intra-frame coding by the second coding unit (2) are performed on the block. And the motion by the motion compensator (3) around the block. A moving image coding control method, wherein the intra-frame coding is performed by the second coding unit (2) also on blocks in the compensation search range.