JP2878394B2 - Multiple image decoding device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a multiple image decoding device for simultaneously decoding a plurality of images encoded by a predictive encoding method.

(Prior Art) In the decoding of an image coded by the predictive coding method, a prediction process based on image data decoded in the past is performed, so that decoded image data necessary for a subsequent prediction process is decoded. (Hereinafter, referred to as prediction source data) must be provided with a memory for storing prediction source data. For example, the inter-frame predictive coding method requires a frame memory for storing a reproduced image of the previous frame, and stores a reproduced image around a portion to be processed by the intra-frame predictive coding method. You need memory to keep.

On the other hand, a plurality of decoding circuits for decoding coded image data for a predetermined processing unit are provided, and a plurality of coded image data of a plurality of images are divided into processing units and distributed to the decoding circuit, whereby a plurality of decoding circuits are provided. There are multiple image decoding devices that decode images simultaneously.

FIG. 3 is a block diagram for explaining the configuration of such a multiple image decoding device, and shows an example of a five image decoding device using three decoding circuits. In the figure, 1 to 3 are decoding circuits, 4 to 8 are input buffers, 9 is a distributor, 10 is a redistributor, and 11 to 15 are output buffers.

First, the input coded image data D _{1 to} D ₅ of the _{first to fifth} images are temporarily stored in the input buffers 4 to 8 for each image, respectively, and each time one of the decoding circuits 1 to 3 becomes empty, a predetermined value is set. Is determined from which input buffer the coded image data is to be extracted from the input buffer, and the distributor 9 fetches coded image data for a predetermined processing unit from the input buffer, and passes the data to an empty decoding circuit. The decoding is performed.
Then, the reproduced images d1 to d5 of the _{first to fifth} images are stored in the output buffers 11 to 15 of the respective decoded image data by the redistributor 10. In such a multi-image decoding device,
In general, the correspondence between an image and a decoding circuit is not fixed, and which decoding circuit processes data of a certain image is generally determined adaptively at the time of processing.

FIG. 4 is a timing chart for explaining such a distribution method. In the figure, numerals indicate image data D _{1 to} D ₅ processed by the respective decoding circuits. For example, the decoding circuit 1 outputs the first image from time t ₁ to time t _2. was treated decode the encoded image data D _1, between the time t ₂ at time t ₃ represents the treated decoding encoded image data D ₂ of the second image. As shown in this figure, in the multi-image decoding apparatus as shown in FIG. 3, each of the decoding circuits 1 to 3 is used for decoding a plurality of images.

Therefore, in order to decode an image coded by the predictive coding method using the above-described multi-image decoding device, each of the images is distributed so that the decoding can be performed regardless of the distribution of the image data. It is necessary that the decoding circuit be able to obtain the prediction source data of all the images.

FIG. 5 shows a configuration diagram of a memory for storing prediction source data of a decoding circuit, and as shown in the drawing, a memory for storing prediction source data 16 to 18 is provided for each of the decoding circuits 1 to 3; When the prediction source data is generated in step (1), the data is stored in all the prediction source data storage memories, and is read out from the memory provided in the decoding circuit and decoded at the time of prediction processing. That is, the prediction source data generated by the decoding circuit 1 is transferred to all of the prediction source data storage memories 16 to 18. Similarly, the prediction source data generated by the decoding circuits 2 and 3 are also stored in all the memories 16 to 18. Therefore, even if any of the memories 16 to 18 is accessed, the prediction source data of all the images can be obtained.
And the decoding circuit 3 reads prediction source data from the memory 18 and performs prediction processing.

(Problems to be Solved by the Invention) However, in the conventional configuration as shown in FIG. 5, since the prediction source data generated by the decoding circuit is transferred to all memories and stored, the overhead due to data transfer increases. There was a problem. Further, when viewed as a whole of a plurality of image decoding apparatuses, there is a problem that the circuit configuration of the apparatus is redundant because the same number of memories having the same storage contents are held as many as the number of decoding circuits.

(Object of the Invention) It is an object of the present invention to solve the above-mentioned problems and to achieve an efficient, compact, and economical circuit configuration in which a plurality of decoding circuits can share prediction source data.

(Means for Solving the Problems) In order to solve the above problems and achieve the object, the present invention includes a plurality of decoding circuits for decoding coded image data for a predetermined processing unit, and A multi-image decoding apparatus for simultaneously decoding a plurality of images encoded by the predictive coding method by dividing the encoded image data into the processing units and distributing the divided image data to the decoding circuit; A storage means for storing data serving as a source of prediction processing in a circuit is connected so as to be shared by a plurality of decoding circuits.

(Operation) According to the present invention, a prediction source data storage memory is provided only in a plurality of image decoding devices, and the memory is shared by a plurality of decoding circuits. Source data is stored in the shared memory, and the prediction source data is obtained from the shared memory in the prediction processing in the decoding circuit. That is, when the prediction source data generated by the decoding circuit is stored, it is only necessary to write the data into one shared memory. When the prediction circuit requires the prediction source data, the shared memory is accessed. The prediction source data of all images can be obtained.

(Embodiment) FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention. As shown in FIG. 1, only one prediction source data storage memory 19 is provided in a plural image decoding apparatus, and decoding is performed. Circuit 1
All the prediction source data generated in 3 are stored in the memory 19. Then, in the prediction processing in each decoding circuit,
The prediction source data is read from the memory 19.

FIG. 2 is a block diagram showing a configuration of a multi-picture decoding apparatus using the decoding circuits 1 to 3 and the memory 19 for storing prediction source data in FIG. In the figure, numerals, symbols and the like are the same as those in FIG.

Coded image data D ₁ to D ₅ of the input image in this apparatus is temporarily stored in the input buffer 4-8 provided by the image.
The input buffer 4 is the image data D ₁ first, the image data D ₂ is a second 5, a third image data D ₃ of 6, 7 to the fourth image data D ₄ of the 8 5 corresponding to the image data D ₅ of.

The distributor 9 includes decoding circuits 1 to 3 and input buffers 4 to 8
When the end of the processing of one of the decoding circuits is detected, it is determined according to a predetermined procedure from which input buffer the coded image data is to be extracted next, and the processing in the decoding circuit is performed from the input buffer. The encoded image data for the unit is extracted, and the data is input to the decoding circuit that has completed the processing. That is, the image and the decoding circuit are not fixedly associated with each other, and the correspondence dynamically changes and is distributed for each processing unit.

The decoding circuits 1 to 3 decode the encoded image data distributed by the distributor 9 for each processing unit. In general, the decoding process in the decoding circuit is generally performed in units of blocks obtained by dividing a screen, but it is also possible to perform decoding in units of processing other than blocks. The prediction process is one of a series of decoding processes performed by the decoding circuit, and prediction source data necessary for the prediction process is obtained from the prediction source storage memory 19. The memory 19 stores prediction source data of all five images, and
Can be accessed from any of the above, even if encoded image data of any image is distributed to the decoding circuit, the data can be decoded.

The memory 19 is a memory for storing prediction source data of all images, and is accessible from any of the decoding circuits 1 to 3. The prediction source data is read from the memory 19 in response to a request from the decoding circuits 1 to 3. Also,
The prediction source data generated by the decoding circuit is written to the memory 19. The storage capacity of the memory 19 varies depending on the prediction method. In the case of the inter-frame prediction method, the memory 19 has a capacity enough to store prediction source data for five images.

The redistributor 10 monitors the decoding circuits 1 to 3 and, when detecting the end of processing of any one of the decoding circuits, receives the decoded image data from the decoding circuit, and Distribute to output buffer. Output buffer 11
The first image d ₁ is 12 in the second image d _2, the third image d ₃ 13, 14 in the fourth image d _4, 15 corresponding respectively to the image d ₅ of the fifth I do.

The decoded image data sorted by image in the redistributor 10 is temporarily stored in the output buffers 11 to 15, and is read out in synchronization with an external signal. The output buffer 11 to 15 is a buffer corresponding to the image d ₁ to d ₅ of the first image-fifth, respectively.

In the present embodiment, the case where coded image data of a plurality of images is input has been described. However, it is apparent that the same operation can be performed when only one image is input.

As described above, the present invention has been specifically described based on the examples.
It is needless to say that the present invention is not limited to the above-described embodiment, but can be variously modified without departing from the gist thereof.

(Effect of the Invention) As described above, according to the present invention, since the memory for storing the prediction source data is shared by a plurality of decoding circuits,
Conventionally, only one prediction source data storage memory is required in a plurality of image decoding devices in a plurality of image decoding devices, so that it is efficient in terms of circuit configuration. Can be achieved. Further, since it is not necessary to transfer the prediction source data generated by the decoding circuit to a plurality of prediction source data storage memories, the overhead due to data transfer is reduced, and the processing speed can be increased.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention, FIG. 2 is a block diagram showing a configuration of a multiple image decoding apparatus using the decoding circuit and the memory for prediction data storage of FIG. FIG. 3 is a block diagram for explaining the configuration of a conventional multiple image decoding apparatus, FIG. 4 is a timing chart for explaining a method of distributing the image data of FIG. 3, and FIG. FIG. 3 shows a configuration diagram of a memory for storing prediction source data of a decoding circuit. 1-3 decoding circuits, 4-8 input buffers, 9 distributors, 10 redistributors, 11-15 output buffers, 16-19 prediction source data storage memories.

Claims (1)

(57) [Claims] 1. A plurality of decoding circuits for decoding coded image data for a predetermined processing unit are provided, and coded image data of a plurality of images are divided into the processing units and distributed to the decoding circuits. In the multiple image decoding device that simultaneously decodes a plurality of images encoded by the predictive coding method, a storage unit that stores data that is a source of prediction processing in the decoding circuit includes a plurality of decoding units. A plurality of image decoding devices, wherein the plurality of image decoding devices are connected so as to be shared between the optimization circuits.