JP2867780B2 - Back-illuminated infrared solid-state imaging device - Google Patents
Back-illuminated infrared solid-state imaging deviceInfo
- Publication number
- JP2867780B2 JP2867780B2 JP4046462A JP4646292A JP2867780B2 JP 2867780 B2 JP2867780 B2 JP 2867780B2 JP 4046462 A JP4046462 A JP 4046462A JP 4646292 A JP4646292 A JP 4646292A JP 2867780 B2 JP2867780 B2 JP 2867780B2
- Authority
- JP
- Japan
- Prior art keywords
- state imaging
- imaging device
- chip
- amplifier
- stage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、赤外像情報を時系列電
気信号に変換する裏面照射型赤外線固体撮像素子に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a back-illuminated infrared solid-state imaging device for converting infrared image information into a time-series electric signal.
【0002】[0002]
【従来の技術】従来の裏面照射型赤外線固体撮像素子の
出力部付近の平面構造を図2に示す。これは2次元の素
子である。裏面照射型赤外線検出素子1が2次元に配列
され、各検出素子1から電荷を転送する垂直電荷結合素
子2が検出素子間を縦に走っている。垂直電荷結合素子
列の終端が水平電荷結合素子3に接続されている。水平
電荷結合素子3出力端には読出しゲート4を経て浮遊拡
散容量5があり、さらに信号電荷を掃き出してリセット
するリセットトランジスタ6に繋っている。前記浮遊拡
散容量5に2段ソースフォロアアンプ(オンチップアン
プ)18が接続されている。この例では2段であるが、
オンチップアンプはこれ以上の多段構成であることもあ
る。従来例ではオンチップアンプの全ての段が水平電荷
結合素子出力端に近接して設けられていた。2. Description of the Related Art FIG. 2 shows a planar structure in the vicinity of an output portion of a conventional back-illuminated infrared solid-state imaging device. This is a two-dimensional element. The back-illuminated infrared detecting elements 1 are two-dimensionally arranged, and a vertical charge-coupled element 2 for transferring charges from each detecting element 1 runs vertically between the detecting elements. The end of the vertical charge coupled device column is connected to the horizontal charge coupled device 3. At the output end of the horizontal charge-coupled device 3, there is a floating diffusion capacitance 5 via a read gate 4, which is further connected to a reset transistor 6 which sweeps out signal charges and resets them. A two-stage source follower amplifier (on-chip amplifier) 18 is connected to the floating diffusion capacitance 5. In this example, there are two stages,
The on-chip amplifier may have a multistage configuration of more than this. In the conventional example, all stages of the on-chip amplifier are provided near the output terminal of the horizontal charge-coupled device.
【0003】[0003]
【発明が解決しようとする課題】裏面照射型赤外線固体
撮像素子チップがパッケージ及び冷却装置に実装された
構造を図3に示す。図3のようにチップ11は赤外像情
報を持つ赤外線を入射させる窓が開いたパッケージ19
に固着され、表面側がパッケージ蓋21で封入される。
裏面照射型赤外線固体撮像素子は一般に冷却を必要とす
るが、この冷却は蓋21側を冷却装置のコールドステー
ジ22に密着させることにより行なわれる。従って、裏
面照射型赤外線固体撮像素子チップ11の熱はパッケー
ジ19との接触面からパッケージ19及び蓋21を経て
放出される。オンチップアンプは、裏面照射型赤外線固
体撮像素子の消費電力のほとんどを占めており、発熱源
として振舞う。従来オンチップアンプは全ての段が水平
電荷結合素子出力端に近接して設けられているため、パ
ッケージとの接触面直上(図2中の裏面パッケージ搭載
領域12)から外れたチップ中央寄りに位置している。
従って、オンチップアンプで発生した熱がパッケージに
逃げづらく、また、撮像領域近くで熱を供給してしまう
ため、撮像領域の冷却到達温度を高くしてしまうという
欠点がある。FIG. 3 shows a structure in which a back-illuminated infrared solid-state imaging device chip is mounted on a package and a cooling device. As shown in FIG. 3, the chip 11 is a package 19 having an open window through which infrared light having infrared image information is incident.
And the front side is sealed with a package lid 21.
The back-illuminated infrared solid-state imaging device generally requires cooling. This cooling is performed by bringing the lid 21 into close contact with the cold stage 22 of the cooling device. Therefore, the heat of the back-illuminated infrared solid-state imaging device chip 11 is released from the contact surface with the package 19 through the package 19 and the lid 21. The on-chip amplifier occupies most of the power consumption of the back-illuminated infrared solid-state imaging device and acts as a heat source. In the conventional on-chip amplifier, since all stages are provided close to the output terminal of the horizontal charge-coupled device, the on-chip amplifier is located near the center of the chip, just off the contact surface with the package (the back surface package mounting area 12 in FIG. 2). doing.
Therefore, the heat generated by the on-chip amplifier is difficult to escape to the package, and the heat is supplied near the imaging region, so that the temperature at which the imaging region reaches the cooling temperature is increased.
【0004】[0004]
【課題を解決するための手段】本発明は、裏面照射型赤
外線検出素子から成る受光部が1次元あるいは2次元に
配列され、これら受光部から電荷結合素子により光信号
電荷を転送し、出力部に少なくとも2段以上のアンプ回
路を具備し、このオンチップアンプから赤外像情報を時
系列電気信号として出力する裏面照射型赤外線固体撮像
素子において、前記オンチップアンプの2段目以降が、
該赤外線固体撮像素子の実装工程で性能劣化を受ける領
域外のチップ端近傍であって、冷却されたパッケージと
の接触面直上に位置することを特徴とする。According to the present invention, a light receiving portion comprising a back-side illuminated infrared detecting element is arranged one-dimensionally or two-dimensionally, optical signal charges are transferred from these light receiving portions by a charge-coupled device, and an output portion is provided. A back-illuminated infrared solid-state imaging device that includes at least two or more stages of amplifier circuits and outputs infrared image information as a time-series electric signal from the on-chip amplifier, wherein the second and subsequent stages of the on-chip amplifier are :
Areas that suffer performance degradation during the mounting process of the infrared solid-state imaging device
Near the edge of the chip outside the
Is located just above the contact surface .
【0005】[0005]
【作用】一般に、多段のアンプ回路では、初段から後段
へいくに従って消費電力が大きくなるものである。本発
明の裏面照射型赤外線固体撮像素子では、オンチップア
ンプの2段目以降が該赤外線固体撮像素子の実装工程で
性能劣化を受ける領域外のチップ端近傍に位置している
ので、電荷結合素子出力端近傍での消費電力が大幅に低
減され、そこでの発熱量が僅かになる。また、前記チッ
プ端近傍は撮像領域から距離が離れているうえにパッケ
ージとの接触面直上となるので、オンチップアンプ2段
目以降で発生した熱が撮像領域に伝わりづらくパッケー
ジに逃げ易くなる。これらの理由により、本発明では撮
像領域の冷却到達温度を低くすることができる。Generally, in a multi-stage amplifier circuit, power consumption increases from the first stage to the subsequent stage. In the back-illuminated infrared solid-state imaging device of the present invention, since the second and subsequent stages of the on-chip amplifier are located near the chip end outside the area where performance is deteriorated in the mounting process of the infrared solid-state imaging device, the charge-coupled device The power consumption near the output end is greatly reduced, and the amount of heat generated there is small. In addition, since the vicinity of the chip end is far from the imaging area and directly above the contact surface with the package, heat generated in the second and subsequent stages of the on-chip amplifier is less likely to be transmitted to the imaging area and easily escapes to the package. For these reasons, in the present invention, the temperature at which the imaging region reaches the cooling end can be lowered.
【0006】[0006]
【実施例】次に、本発明の実施例について図面を用いて
詳細に説明する。Next, an embodiment of the present invention will be described in detail with reference to the drawings.
【0007】本発明の実施例の出力部付近の平面構造を
図1に示す。これは2次元の素子であり、オンチップア
ンプは2段ソースフォロアである。この例では2段であ
るが、オンチップアンプはこれ以上の多段構成であって
もかまわない。裏面照射型赤外線検出素子1が2次元に
配列され、各検出素子1から電荷を転送する垂直電荷結
合素子2が検出素子間を縦に走っている。垂直電荷結合
素子列の終端が水平電荷結合素子3に接続してある。水
平電荷結合素子3の終端に読出しゲート4を経て浮遊拡
散容量5が設けてあり、2段ソースフォロアアンプの初
段ドライブトランジスタのゲート14に接続してある。
2段ソースフォロアアンプ第1段目7の出力はドライブ
トランジスタのソース兼ロードトランジスタのドレイン
15から引き出し、2段ソースフォロアアンプ第2段目
8のドライブトランジスタのゲート14に金属信号線9
で接続してある。最終的な2段ソースフォロアアンプ出
力は第2段目ドライブトランジオスタのソース兼ロード
トランジスタのドレイン15から引き出している。2段
ソースフォロアアンプ第1段目7は水平電荷結合素子出
力端近傍に位置しているが、2段ソースフォロアアンプ
第2段目8はアンプ出力のボンディングパッド10近傍
の裏面パッケージ搭載領域12内に設けてある。2段ソ
ースフォロアアンプ2段目8がある位置はチップ切り出
し作業等で破損などの影響を受けないところである。2
段ソースフォロアアンプの第1段目と第2段目とを比較
すると、チャネル幅が第2段目の方が数倍大きく、その
分消費電力が多くなるが、上述のように2段ソースフォ
ロアアンプ第2段目は撮像領域から離れたパッケージと
の接触面直上となるので、冷却を効率良く行なうことが
できる。FIG. 1 shows a planar structure in the vicinity of an output unit according to an embodiment of the present invention. This is a two-dimensional element, and the on-chip amplifier is a two-stage source follower. In this example, there are two stages, but the on-chip amplifier may have a multistage configuration of more stages. The back-illuminated infrared detecting elements 1 are two-dimensionally arranged, and a vertical charge-coupled element 2 for transferring charges from each detecting element 1 runs vertically between the detecting elements. The end of the vertical charge coupled device row is connected to the horizontal charge coupled device 3. A floating diffusion capacitor 5 is provided at the end of the horizontal charge-coupled device 3 via a read gate 4 and is connected to the gate 14 of the first-stage drive transistor of the two-stage source follower amplifier.
The output of the first stage 7 of the two-stage source follower amplifier is drawn from the drain 15 of the source / load transistor of the drive transistor, and the metal signal line 9 is connected to the gate 14 of the drive transistor of the second stage 8 of the two-stage source follower amplifier .
Connected by The final two-stage source follower amplifier output is drawn from the drain 15 of the source / load transistor of the second-stage drive transistor. The first stage 7 of the two-stage source follower amplifier is located near the output end of the horizontal charge-coupled device, while the second stage 8 of the two-stage source follower amplifier is located in the back surface package mounting area 12 near the bonding pad 10 for the amplifier output. It is provided in. The position where the second-stage source follower amplifier 2nd stage 8 is located is not affected by breakage or the like due to chip cutting work or the like. 2
Comparing the first stage and the second stage of the two-stage source follower amplifier, the channel width of the second stage is several times larger than that of the second stage, and the power consumption increases accordingly. Since the second stage of the amplifier is located immediately above the contact surface with the package away from the imaging region, cooling can be performed efficiently.
【0008】[0008]
【発明の効果】以上説明したように本発明の裏面照射型
赤外線固体撮像素子では、オンチップアンプの中で発熱
量が大きい2段目以降が冷却効率の良いパッケージ接触
面直上に位置するので、撮像領域の冷却到達温度を低く
できる効果がある。As described above, in the back-illuminated infrared solid-state imaging device of the present invention, the second and subsequent stages of the on-chip amplifier, which generate a large amount of heat, are located immediately above the package contact surface with good cooling efficiency. There is an effect that the temperature at which cooling of the imaging region can be reduced can be reduced.
【図1】本発明の裏面照射型赤外線固体撮像素子におけ
る出力部付近の平面構造図である。FIG. 1 is a plan view of the vicinity of an output unit in a back-illuminated infrared solid-state imaging device of the present invention.
【図2】従来の裏面照射型赤外線固体撮像素子における
出力部付近の平面構造図である。FIG. 2 is a plan view showing a structure near an output unit in a conventional back-illuminated infrared solid-state imaging device.
【図3】裏面照射型赤外線固体撮像素子チップがパッケ
ージ及び冷却装置へ実装された状態を示す図であり、
(a)はチップを実装したパッケージを裏から見た図、
(b)は冷却装置実装状態の縦断面構造図である。FIG. 3 is a diagram showing a state in which a back-illuminated infrared solid-state imaging device chip is mounted on a package and a cooling device;
(A) is a view of the package on which the chip is mounted viewed from the back,
(B) is a longitudinal cross-sectional structure diagram of the cooling device mounted state.
1 裏面照射型赤外線検出素子 2 垂直電荷結合素子 3 水平電荷結合素子 4 読出しゲート 5 浮遊拡散容量 6 リセットトランジスタ 7 2段ソースフォロアアンプ第1段目 8 2段ソースフォロアアンプ第2段目 9 金属信号線 10 ボンディングパッド 11 裏面照射型赤外線固体撮像素子チップ 12 裏面パッケージ搭載領域 13 ドライブトランジスタのドレイン 14 ドライブトランジスタのゲート 15 ドライブトランジスタのソース兼ロードトランジ
スタのドレイン 16 ロードトランジスタのゲート 17 ロードトランジスタのソース 18 2段ソースフォロアアンプ 19 裏面入射窓付パッケージ 20 リード 21 パッケージ蓋 22 冷却装置のコールドステージREFERENCE SIGNS LIST 1 back-illuminated infrared detection element 2 vertical charge-coupled element 3 horizontal charge-coupled element 4 read gate 5 floating diffusion capacitance 6 reset transistor 7 two-stage source follower amplifier first stage 8 two-stage source follower amplifier second stage 9 metal signal Line 10 Bonding pad 11 Backside illuminated infrared solid-state imaging device chip 12 Backside package mounting area 13 Drain of drive transistor 14 Gate of drive transistor 15 Source of load transistor and drain of load transistor 16 Load transistor gate 17 Load transistor source 18 2 Step source follower amplifier 19 Package with back entrance window 20 Lead 21 Package lid 22 Cold stage of cooling device
Claims (1)
が1次元あるいは2次元に配列され、これら受光部から
電荷結合素子により光信号電荷を転送し、出力部に少な
くとも2段以上のアンプ回路を具備し、このオンチップ
アンプから赤外像情報を時系列電気信号として出力する
裏面照射型赤外線固体撮像素子において、前記オンチッ
プアンプの2段目以降が、該赤外線固体撮像素子の実装
工程で性能劣化を受ける領域外のチップ端近傍であっ
て、冷却されたパッケージとの接触面直上に位置するこ
とを特徴とする裏面照射型赤外線固体撮像素子。1. A light receiving section comprising a back-illuminated infrared detecting element is arranged one-dimensionally or two-dimensionally, optical signal charges are transferred from these light receiving parts by a charge-coupled device, and at least two or more stages of amplifier circuits are output to an output part. A back-illuminated infrared solid-state imaging device that outputs infrared image information as a time-series electrical signal from the on-chip amplifier , wherein the second and subsequent stages of the on-chip amplifier are mounted with the infrared solid-state imaging device.
In the vicinity of the chip edge outside the area where performance degradation occurs during the process
A back-illuminated infrared solid-state imaging device, which is located immediately above a contact surface with a cooled package .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4046462A JP2867780B2 (en) | 1992-03-04 | 1992-03-04 | Back-illuminated infrared solid-state imaging device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4046462A JP2867780B2 (en) | 1992-03-04 | 1992-03-04 | Back-illuminated infrared solid-state imaging device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH05251677A JPH05251677A (en) | 1993-09-28 |
JP2867780B2 true JP2867780B2 (en) | 1999-03-10 |
Family
ID=12747834
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4046462A Expired - Fee Related JP2867780B2 (en) | 1992-03-04 | 1992-03-04 | Back-illuminated infrared solid-state imaging device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2867780B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010165941A (en) * | 2009-01-16 | 2010-07-29 | Sharp Corp | Solid-state imaging device, and method of setting the same |
JP7330124B2 (en) * | 2020-03-19 | 2023-08-21 | 株式会社東芝 | Solid-state imaging device |
-
1992
- 1992-03-04 JP JP4046462A patent/JP2867780B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH05251677A (en) | 1993-09-28 |
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Legal Events
Date | Code | Title | Description |
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A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19981124 |
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LAPS | Cancellation because of no payment of annual fees |