JP2789168B2 - Method for manufacturing insulated gate field effect semiconductor device for liquid crystal display panel - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an insulated gate field effect semiconductor device for a liquid crystal display panel used for a liquid crystal display panel or the like. 2. Description of the Related Art An insulated gate field effect semiconductor device using single crystal silicon is widely used in the field of semiconductors. A representative example is Japanese Patent Publication No. 50-1986 related to the applicant's invention.
There is a "semiconductor device and a method for manufacturing the same" disclosed in Japanese Patent Application Laid-Open Publication No. H10-209,878. However, instead of using a single crystal semiconductor for a channel formation region to which hydrogen is not added, an insulated gate field effect semiconductor provided by a non-single crystal semiconductor to which hydrogen or a halogen element is added at a concentration of 1 atomic% or more. The device is disclosed in Japanese Patent Application No.
“Semiconductor device and manufacturing method thereof” (filed on October 7, 1978) disclosed in Japanese Patent Publication No. 124021 is a typical example. Such a non-single-crystal semiconductor to which hydrogen or a halogen element is added, particularly an insulated gate field-effect semiconductor device in which a silicon semiconductor is used for a channel formation region, has a higher off-state current than a case where a conventionally known single-crystal semiconductor is used. 10 ³ -10
^{One fifth} is smaller. Therefore, it is considered effective to use the insulated gate field effect semiconductor device for controlling a liquid crystal display panel. [0003] This insulated gate field effect semiconductor device comprises:
As disclosed in Japanese Patent Application No. 53-124011, a lateral channel type insulated gate field effect semiconductor device in which a gate electrode is provided above a semiconductor in a channel formation region, Japanese Patent Application No. 56-001767 concerning the application
Patent Document “Insulated gate type field effect semiconductor device and method for manufacturing the same” (Jan. 9, 1981), a vertical channel type insulated gate type field effect semiconductor device, and a semiconductor in which a gate electrode forms a channel formation region There is known a so-called generally known thin-film insulated gate field effect semiconductor device provided below. However, the former structure, compared to the latter, has the same structure as the conventionally known insulated gate field effect semiconductor device using single crystal silicon, so that the already completed technology can be applied. It was a very excellent feature. As a conventional example, a field-effect transistor described in Japanese Patent Application Laid-Open No. 58-2073 discloses a polycrystalline region by selectively annealing a source region and a drain region, and forming a channel forming region into an amorphous region. And That is, in the field-effect transistor disclosed in the publication, a part of an amorphous region is selectively subjected to an annealing process to form a polycrystalline region. On the other hand, in such an insulated gate field effect semiconductor device, the source region and the drain region are formed by a CVD method (including a plasma CVD method).
Instead of depositing the thin film by ion implantation or the like, and adding the additive to an active donor or acceptor by annealing at a temperature in the range of 400 ° C. or less at which hydrogen or a halogen element is not degassed. There must be. In the case where a plurality of insulated gate field effect semiconductor devices are manufactured over one insulating substrate, such as a liquid crystal display panel, an impurity is selectively added to a desired region of a non-single-crystal semiconductor. , A non-single-crystal semiconductor region to which no impurity is added remains. In the region where the impurities are not added and which is not crystallized, the current flows in a ragged manner due to the high resistance and cannot respond to high frequency switching. Further, in the light annealing treatment of the impurity region, light energy heats the base material through the non-single-crystal semiconductor.
As a result, the impurity region is affected by the base material, and an insulated gate field effect semiconductor device having poor characteristics is manufactured. In order to solve the above problems, the present invention provides a method of manufacturing an insulated gate field effect semiconductor device for a liquid crystal display panel which has a small off-current and can perform on / off with a high speed response. The purpose is to provide. Another object of the present invention is to provide a method for manufacturing an insulated gate field effect semiconductor device for a liquid crystal display panel which is not affected by the material of a base material. In order to achieve the above object, a method for manufacturing an insulated gate type field effect semiconductor device for a liquid crystal display panel according to the present invention comprises the steps of: A step of forming a non-single-crystal thin-film semiconductor layer (2) to which a halogen element is added; and a step of forming a gate insulating film (3) on the non-single-crystal thin-film semiconductor layer (2).
A step of selectively forming a gate electrode (4) made of a semiconductor at a predetermined position on the gate insulating film (3); and adding an impurity to the gate electrode (4) and simultaneously masking the gate electrode (4). The presence of the region that becomes the source region (7) and the drain region (8) in the non-single-crystal thin-film semiconductor layer (2) through the gate insulating film (3) and the non-single-crystal thin-film semiconductor layer (2) Adding an impurity to a region not to be doped, and irradiating the entire surface of the substrate (1) with linear intense ultraviolet light by scanning from one end to the other end to raise the temperature of the substrate (1) to 400 ° C. in the C or lower, and promote the crystallization of the region to which the impurity is added, a gate electrode (4), said source region (7 comprises at least a step of forming a source region (7) and drain region (8), the ) Wherein the channel forming region is formed between the fine drain region (8). According to the method of manufacturing an insulated gate field effect semiconductor device for a liquid crystal display panel of the present invention, a plurality of non-single-crystal thin-film semiconductor layers (2) doped with hydrogen or a halogen element are provided on a substrate (1) having an insulating surface. ) In the form of islands;
Forming a gate insulating film (3) on the plurality of non-single-crystal thin-film semiconductor layers (2); and selectively forming a gate electrode (4) made of a semiconductor at a predetermined position on the gate insulating film (3). Forming a source region in the non-single-crystal thin-film semiconductor layer (2) through the gate insulating film (3) using the gate electrode (4) as a mask at the same time as adding an impurity to the gate electrode (4). (7) and adding an impurity to a nonexistent region of a region the drain region (8), and said non-single-crystal thin-film semiconductor layer (2), the substrate (1) linear intensity ultraviolet over the entire surface Irradiation by scanning light from one end to the other end,
By setting the temperature of the substrate (1) to 400 ° C. or lower , the crystallization of the region to which the impurity is added is promoted, and the gate electrode (4),
Forming a source region (7) and a drain region (8), wherein a channel forming region is formed between the source region (7) and the drain region (8). In the method for manufacturing an insulated gate field effect semiconductor device according to the present invention, the gate insulating film (3)
Is formed between the non-single-crystal thin-film semiconductor layer (2) and the gate electrode (4), and the non-single-crystal thin-film semiconductor layer (2)
, And a silicon nitride film is formed in contact therewith. The means for solving the problems of the present invention are specifically exemplified as follows. A gate insulator and a gate electrode are formed over a non-single-crystal semiconductor to which no or few impurities are added (hereinafter, a non-single-crystal semiconductor to which hydrogen or a halogen element is added is simply referred to as a semiconductor or a non-single-crystal semiconductor). Provided selectively. Further, using this gate electrode as a mask, the source
For example, in an N-channel insulated-gate field-effect semiconductor device to which an impurity for a drain is added, phosphorus or arsenic is used. In a P-channel-type insulated-gate field-effect semiconductor device, boron is added to the source and drain regions of a non-single-crystal semiconductor. Was added through the gate insulating film. Thereafter, the entire region including the region to which the inactive impurity is added, and the entire region of the substrate is irradiated with strong light at a temperature of 400 ° C. or less, so that a strong ultraviolet light annealing (hereinafter simply referred to as light annealing) is performed. -Called "). Thus, light irradiation is performed on all the non-single-crystal semiconductor regions except for the channel formation region which is shielded from light by the gate portion. Then, the non-single-crystal semiconductors forming the impurity regions for the source and the drain are all irradiated with light, and the crystallinity of those regions is promoted more than that of the channel formation region, particularly, a polycrystalline or single-crystal structure. Was transformed into a semiconductor. That is, according to the present invention, ions are implanted into a conventionally known single-crystal semiconductor to which hydrogen or a halogen element is not added, and high-temperature annealing is performed. In order to perform this optical annealing over the entire surface of the substrate, light is scanned from the minus end to the other end of the substrate surface to include crystal growth in the process, thereby promoting the crystallinity and forming impurity regions. [Operation] At least one non-single-crystal thin film to which hydrogen or a halogen element is added is provided on a substrate having an insulating surface.
A film semiconductor is formed. The non-single-crystal thin-film semiconductor layer
On this , a gate insulating film is formed. A gate electrode made of a semiconductor is selectively formed at a predetermined position on the gate insulating film. And the impurity in the gate electrode
At the same time as being added, using the gate electrode as a mask, through the gate insulating film, a non-single-crystal thin-film semiconductor layer where a source region and a drain region are formed, and a region where the non-single-crystal thin-film semiconductor layer does not exist, Impurities are added to form at least one set of impurity regions. The irradiation by scanning toward the other end of the condensed linear intensity ultraviolet <br/> outside light to the entire surface of the substrate from one end
Then , the temperature of the substrate is set to 400 ° C. or lower to promote crystallization.
Is done. Further, all the impurity regions are once melted and then recrystallized, whereby the crystal grain size can be made larger than in the case where the entire surface is simply heated uniformly. The high-resistance non-single crystal that remains without being crystallized around the impurity region thus formed
Since there is no thin-film semiconductor layer , current does not flow steadily. In addition, the impurity region is covered with the gate insulating film, and only part of the impurity region is crystallized from the surface toward the inside by the collected strong ultraviolet light, so that the impurity region is formed. At the same time as eliminating the influence of the base material, hydrogen and the like in the non-single-crystal thin film semiconductor are hardly degassed. [0012] Therefore, it is possible to obtain by the manufacturing method of the present invention.
The insulated gate type field effect semiconductor device for a liquid crystal display panel, when turned on or off, does not easily flow when the on-current rises, or, on the other hand, runs off when the current falls. Is gone. That is, in the insulated gate field effect semiconductor device for a liquid crystal display panel obtained by the manufacturing method of the present invention, the off current was small and the on / off operation could be performed with high speed. Furthermore, it focused linear strong ultraviolet light, upon annealing for scanning from one end to the other end and allowed to crystallize by heating only part toward the inside direction from the surface of the impurity region. The condensed linear intense ultraviolet light as described above has a large light absorption coefficient, and is sequentially heated from the surface of the impurity region through the gate insulating film to grow a crystal. As a result, the light annealing process using the concentrated linear strong ultraviolet light does not heat the base material on which at least one set of impurity regions is formed, and thus has an influence on the impurity region by the base material. And it is difficult to degas hydrogen etc.
The characteristics as an insulated gate field effect semiconductor device for a liquid crystal display panel are not deteriorated. Gate insulating film is non-single crystal thin
Since the silicon nitride film is formed in contact with the film semiconductor layer,
Removal of hydrogen or halogen elements in the non-single-crystal thin-film semiconductor layer
Moisture penetrates into the non-single crystal thin film semiconductor layer
Difficult to do. FIG. 1 is a longitudinal sectional view for explaining a manufacturing process of an insulated gate field effect semiconductor device according to an embodiment of the present invention. The substrate (1) was made of, for example, quartz glass and had a thickness of 1.1 mm and a size of 10 cm × 10 cm as shown in FIG. On the upper surface of this substrate (1), a light plasma CVD (a low-pressure mercury lamp including a wavelength of 2537 °, a substrate temperature of 21 ° C.) without using the mercury excitation method of disilane (Si ₂ H ₆ ) was used.
At 0 ° C., a non-single-crystal semiconductor (2) having an amorphous structure to which hydrogen was added at a concentration of 1 atomic% or more was formed to a thickness of, for example, 0.2 μm. Further, on the upper surface of the non-single-crystal semiconductor (2), a gate insulating film (3) made of, for example, a silicon nitride film is laminated on the upper surface of the non-single-crystal semiconductor in the same reactor without exposing the semiconductor surface to the atmosphere. Was. That is, the gate insulating film (3)
Mercury sensitization of Si ₃ N ₄ by reaction of disilane (Si ₂ H ₆ ) with ammonia (NH ₃ ) or hydrazine (N ₂ H ₄ ) (low-pressure mercury lamp including wavelength of 2537 °, substrate temperature 250 ° C) It was fabricated to a thickness of 1000 mm without using. Thereafter, a region for forming an insulated gate field effect semiconductor device is formed.
The portion excluding (5) was removed by a plasma etching method. The plasma etching reaction is CF ₄ + O ₂ (5%)
Was introduced at the same time, and a frequency of 13.56 MHz was applied to a parallel plate electrode (not shown) at room temperature. The gate insulating film (3) may be formed over the entire surface of the substrate (1). On the gate insulating film (3), a microcrystalline or polycrystalline semiconductor of N ⁺ conductivity type is laminated to a thickness of 0.3 μm. After removing undesired portions of the N ⁺ semiconductor film by a photoetching method using a resist film (6), a gate electrode (4) was formed. Then, this resist film (6),
Using the gate portion composed of the gate electrode (4) of the N ⁺ semiconductor and the gate insulating film (3) as a mask, a region of 1 × 10 ²⁰ cm ⁻³ is formed in the region serving as a source and a drain by ion implantation. As shown in FIG. 1B, an impurity of one conductivity type, for example, phosphorus was added to form a pair of impurity regions (7) and (8). Further, after the resist film (6) of the gate electrode (4) was removed from the entire substrate (1), the substrate (1) was subjected to a photo annealing treatment with strong ultraviolet light (10). That is, an ultra-high pressure mercury lamp (output 5KW, wavelength 250-600nm, light diameter 15mm,
On the back side, a parabolic reflector is used, and a quartz cylindrical lens (focal length 150
m, the condensing part width 2 mm, and the length 180 mm) to form a linear irradiation part. Then, the irradiation surface of the substrate (1) is scanned (scanned) at a speed of 5 to 50 cm / min in a direction orthogonal to the linear irradiation portion, and the intense light (10) is applied to the entire surface of the substrate 10 cm × 10 cm. Irradiated. In this way, the gate electrode (4) absorbs light sufficiently and is polycrystallized because a large amount of phosphorus is added to the gate electrode (4) side. The impurity regions (7) and (8)
By melting and recrystallizing once, melting and recrystallization were shifted (moved) in the scanning direction, that is, the X direction.
As a result, as compared with simply heating the entire surface uniformly, a growth mechanism consisting of melting and recrystallization by scanning in the X direction was added, so that the crystal grain size could be made larger. A non-single-crystal semiconductor is selectively formed over an insulating substrate. Except for a channel formation region covered with a gate portion of the non-single-crystal semiconductor, the other non-single-crystal semiconductor functions as a source region or a drain region. Thus, crystallization of all the non-single-crystal semiconductors in the impurity region can be promoted. The region polycrystallized by the intense light annealing includes impurity regions (7),
(8) It is not necessary to extend to the whole area below. That is,
By crystallizing only the surfaces of the impurity regions (7) and (8), the influence of the base material on which the impurity regions (7) and (8) are formed can be prevented. In FIG. 1, as shown by broken lines (11) and (11 '), it is important that only the upper layer is crystallized at least and the impurity regions (7) and (8) are activated. Further, the end portions (15) and (15 ') of the source region and the drain region correspond to the end portions (16) and (1) of the gate electrode.
6 ') is provided so as to enter the channel region side. The channel forming region including the N-type impurity regions (7) and (8), the I-type non-single-crystal semiconductor region (2), the junction interface (17) and (17 ') is a non-single-crystal region in the I-type semiconductor region. It has a hybrid structure composed of a semiconductor and a crystallized semiconductor entering from an impurity region. The degree of the crystallized semiconductor in the I-type semiconductor region is determined by the scanning speed and intensity (illuminance) of the optical annealing. After the step of FIG. 1B, the polyimide resin is coated on the entire surface to a thickness of 2 μm. Then, after the electrode holes (13) and (13 ') are formed in the polyimide resin,
Aluminum ohmic contacts and their leads (1)
4) and (14 ') are formed. This second layer leads (14), (1
4 ′) may be connected to the gate electrode (4) when formed. The result of this light annealing is that the sheet resistance is 4 × 10 ⁻³ (ohm cm) ⁻¹ to 1 × 10 ⁺² (ohm cm) before light irradiation.
It became ^-1 , and the electric conductivity characteristics were improved compared to before the light annealing. In the case where the lengths of the channel forming regions are 3 μm and 10 μm, as shown by reference numerals (21) and (22) in FIG.
A current of 1 × 10 ⁻⁵ A and 2 × 10 ⁻⁵ A was obtained at _th = + 2 V and V _DD = 10 V. Note that the off current is (V _GG = 0V)
10 ⁻¹⁰ to 10 ⁻¹¹ (A), which is smaller by 1 of 10 ⁴ than 10 ⁻⁶ (A) of the single crystal semiconductor. In this embodiment, since the light condensed linearly is irradiated so as to scan over the entire surface of the substrate, large-area large-scale integration can be performed. Therefore, it is possible to manufacture even 500 × 500 insulated gate field effect semiconductor devices in a large area, for example, a 30 cm × 30 cm panel, and as an insulated gate field effect semiconductor device for controlling a liquid crystal display element. Could be applied. Light ani
Because of the low-temperature treatment of 400 ° C. or less by a single process, a polycrystallized or single-crystallized semiconductor could be formed containing hydrogen or a halogen element therein. Also,
The optical annealing was not performed simultaneously on the entire surface of the substrate, but was scanned from one end to the other end. For this reason, the light emitted from the cylindrical ultra-high pressure mercury lamp was condensed by the parabolic mirror and the quartz lens and became linear. Then, the light condensed in the form of a line could scan the substrate in a direction perpendicular to the linear direction, thereby optically annealing the surface of the non-single-crystal semiconductor. Since this photo annealing is performed with ultraviolet rays,
The crystallization from the surface of the non-single-crystal semiconductor to the inside was promoted. For this reason, in the impurity region near the surface that has been sufficiently polycrystallized or monocrystallized, it is possible to control the current flowing very close to the gate insulating film in the channel formation region without any trouble. Light irradiation annealing - Upon le step, hydrogen or a halogen element added to the channel formation region is not affected at all, since it is possible to hold the non-single-crystal semiconductor state, 1/10 ³ to the off-current single-crystal semiconductor 1/10
Can be ⁵ . Since the source region and the drain region are formed by photo annealing after forming the gate electrode and the gate insulating film, the characteristics are stabilized without contamination adhered to the gate insulator interface. Further, as compared with conventionally known methods, not only quartz glass but also soda glass and a heat-resistant organic film which are optional substrates can be used as the substrate material. The formation of the non-single-crystal semiconductor, the gate insulating film, and the gate electrode constituting the channel formation region, which is an interface between different materials, can be made without exposure to the atmosphere by a process in the same reaction furnace. It has the feature that the generation of the position is small. Note that in this embodiment, it is important that all of oxygen, carbon, and nitrogen in the non-single-crystal semiconductor in the channel formation region have an impurity concentration of 5 × 10 ¹⁸ cm ⁻³ or less. That is, in a conventionally known insulated gate type field effect semiconductor device, 1 to 3
It was mixed to a concentration of × 10 ²⁰ cm ^-3 . In the case of using an amorphous silicon semiconductor, the lifetime of a carrier, particularly a hole important for a P-channel insulated gate field effect semiconductor device, is shortened, and the characteristics of the insulated gate field effect semiconductor device of this embodiment are reduced. 1 /
Only less than 3 currents flow. In addition, a hysteresis characteristic was observed when a drain electric field of 2 × 10 ⁶ V / cm or more was added to the I _DD ─V _GG characteristic. On the other hand, oxygen is 5 ×
At 10 ¹⁸ cm ^-3 or less, no hysteresis was observed even at a voltage of 3 × 10 ⁶ V / cm. According to the present invention, the addition of impurities and the Since crystallization is not selectively promoted by optical annealing, there is no need for alignment. According to the present invention, an impurity is added to the gate electrode and all the non-single-crystal thin-film semiconductor regions other than the portion masked by the gate electrode through the gate insulating film, and thereafter, the entire surface of the substrate is covered with impurities .
A non-single crystal with high resistance without being crystallized because it performs a light annealing process that scans from one end to the other end in a direction substantially perpendicular to the longitudinal direction of the linear strong ultraviolet light Thin
The film semiconductor region disappeared, and good switching characteristics at high frequencies without hysteresis in the gate voltage-drain current characteristics of the insulated gate field effect semiconductor device were obtained. According to the present invention, a focused linear field effect semiconductor device is manufactured without selecting and manufacturing the insulated gate type field effect semiconductor devices one by one .
By scanning light from one end to the other end in a direction substantially perpendicular to the longitudinal direction of the strong ultraviolet light, the temperature of the substrate is reduced by 40 degrees.
0 ° C or less to promote crystallization
Or halogen source added to the crystalline thin film semiconductor layer
The element can be hardly degassed. According to the present invention, since the channel formation region is activated by adding hydrogen or a halogen element, the switching characteristics at a high frequency in the insulated gate field effect semiconductor device are improved. According to the present invention,
A line of strong ultraviolet light was applied to a temperature of 400 ° C or less.
Channel annealing due to the
Hydrogen or halogen elements in the gas formation region are difficult to degas
No. According to the present invention, since addition of impurities or optical annealing is not selectively performed through the gate insulating film, a large number of, for example, 500 × 50
Zero insulated gate field effect semiconductor devices for a liquid crystal display panel can be provided. According to the present invention, the condensed linear intense ultraviolet light passes through the gate insulating film, and extends inward from the surface of at least one set of the impurity regions to the longitudinal direction of the condensed linear intense ultraviolet light. When irradiation is performed by scanning from one end to the other end in a direction substantially perpendicular to the direction, the surface of the non-single-crystal thin film semiconductor layer is heated and crystallized, so that the base material on which the impurity region is formed is formed. Can be eliminated. According to the present invention, the source region and the drain region are formed from the gate insulating film and the semiconductor.
After making a gate electrode made, since it is annealed at focused linear intensity ultraviolet light, the resistance of the gate electrode is increased
This also stabilizes the characteristics of the insulated gate field effect semiconductor device. According to the present invention, since the addition and annealing of impurities can be performed through the gate insulating film without selecting the entire substrate having a non-single-crystal thin film semiconductor region and other insulating surfaces, productivity is excellent. I have. According to the present invention, since the annealing is performed through the gate insulating film, the interface between the channel formation region and the source and drain regions is protected. According to the present invention, a non-single-crystal thin film
Gate isolation where a silicon nitride film is formed in contact with the semiconductor layer
The edge film is made of hydrogen or halogen in the non-single-crystal thin-film semiconductor layer.
It is difficult for the elements to be degassed and for moisture to hardly enter.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a longitudinal sectional view for explaining a manufacturing process of an insulated gate field effect semiconductor device according to one embodiment of the present invention. FIG. 2 is a graph showing characteristics of drain current─gate voltage. [Description of Signs] 1 ... Substrate 3 ... Gate insulating film 2 ... Non-single-crystal semiconductor 4 ... Gate electrode 5 ... Area 6 for forming an insulated gate field effect semiconductor device ... Resist films 7, 8 Impurity region 10 Strong light 11 Broken lines 13, 13 'Electrode holes 14, 14' Leads 15, 15 'Source region and drain region Ends 16, 16 'of gate electrode 17, 17' of junction electrode

Continuation of front page       (56) References JP-A-59-75670 (JP, A)                 JP-A-56-108231 (JP, A)                 JP-A-55-50663 (JP, A)                 JP-A-58-2073 (JP, A)                 JP-A-59-35423 (JP, A)                 JP-A-58-28867 (JP, A)                 JP-A-57-91517 (JP, A)                 JP-A-58-127382 (JP, A)

Claims (1)

(57) [Claims] A step of forming a non-single-crystal thin film semiconductor layer to which hydrogen or a halogen element is added on a substrate having an insulating surface; a step of forming a gate insulating film on the non-single-crystal thin film semiconductor layer; Selectively forming a gate electrode made of a semiconductor at a predetermined position, and simultaneously adding an impurity to the gate electrode, using the gate electrode as a mask, and passing the source in the non-single-crystal thin film semiconductor layer through the gate insulating film. Adding an impurity to a region serving as a region and a drain region, and a region where the non-single-crystal thin-film semiconductor layer does not exist; and scanning the entire surface of the substrate with linear intense ultraviolet light from one end to the other end. The temperature of the substrate is set to 400 ° C. or lower to promote crystallization of the region to which the impurity is added, and the gate electrode, the source region, and the Forming a channel forming region between the source region and the drain region, the method comprising: forming a channel forming region between the source region and the drain region. 2. Forming a plurality of non-single-crystal thin-film semiconductor layers to which hydrogen or a halogen element is added in an island shape on a substrate having an insulating surface; and forming a gate insulating film over the plurality of non-single-crystal thin-film semiconductor layers Selectively forming a gate electrode made of a semiconductor at a predetermined position on the gate insulating film; and adding the impurity to the gate electrode and simultaneously using the gate electrode as a mask and passing the non-conductive layer through the gate insulating film. region becomes a source region and a drain region in the single-crystal thin-film semiconductor layer, and said adding an impurity to a nonexistent region of the non-single-crystal thin-film semiconductor layer, from one end of the linear intensity ultraviolet light to the entire surface of the substrate Irradiation is performed by scanning toward the other end, the temperature of the substrate is set to 400 ° C. or less , and crystallization of the region to which the impurity is added is promoted. Forming an electrode, a source region and a drain region, wherein a channel forming region is formed between the source region and the drain region. Production method. 3. 2. The gate insulating film is formed between the non-single-crystal thin-film semiconductor layer and the gate electrode, and a silicon nitride film is formed in contact with the non-single-crystal thin-film semiconductor layer. 3. Of manufacturing an insulated gate type field effect semiconductor device for a liquid crystal display panel.