JP2769048B2 - Read / write amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a read / write amplifier for amplifying a read signal from a magnetic head and a write signal to a magnetic head used in a magnetic storage device or the like.

[0002]

2. Description of the Related Art FIG. 2 illustrates a conventional read / write amplifier .
FIG. 4 is a diagram for explaining a circuit configuration of the read signal amplifying unit.
It shows the result. In the figure, reference numeral 4 denotes a magnetic head ,
The read / write amplifier reads data from the magnetic head during reading.
A read signal amplifying unit for amplifying a read signal;
Increase write signal to amplify write signal to magnetic head
And a width portion (not shown). Read signal increase
The width portion is connected to the power supply voltage terminal 5, and from the magnetic head 4
Preamplifier 8 which receives the read signal of
And receives the output of the preamplifier 8 via a buffer,
A post-amplifier 9 that amplifies the signal and outputs it to output terminals 2 and 3
have. The preceding amplifier 8 is a circuit component.
Transistors Q11 to Q16 and resistors R1 and R2,
Is constituted by a constant voltage source V _B2, also, the subsequent
The amplifier 9 includes transistors Q6 to Q6 as circuit constituent elements.
10 and resistors R3 and R4. further
The buffer includes a transistor Q1 as a circuit component.
And 7, Q18, is constituted by a constant current source I _B3, I _B4
I have. Here, the first-stage amplifier 8, the second-stage amplifier 9, and the
The operating current is supplied from the power supply voltage terminal 5
Is supplied. In addition, the preceding stage amplifier 8
Then, when reading, current is supplied to each transistor.
When writing, the current supply to each transistor is cut off.
It is supposed to be. In addition, such a front-stage amplifier
The supply and cutoff of the current to the transistor are controlled by the preamplifier 8
Performed by switch 2 connected to constant current source _IB2
The switch 2 is connected to the switch signal input terminal 1
, The transistor Q11,
Q12 is connected to the constant current source _IB2 , and the write
Njisuta Q11, Q12 is disconnected from the constant current source I _B2
Is switched to

Next, the operation will be described. In the read / write amplifier , at the time of reading, the switch S2 is connected to the a side by the signal input to the switching signal input terminal 1, and the signal from the magnetic head 4 is read by the read signal amplifier.
Amplified by That is, the switch S2 is connected to the a side.
It is, when the current to each transistor Q11~Q16 the preamplifier 8 of the read signal amplifier is Ru is supplied, the signal from the magnetic head 4 is Ru is first amplified by the preamplifier 8. Further
The output of the preamplifier 8 is connected to transistors Q17 and Q17.
18 and through the buffer composed of a constant current source I _B3 and I _B4, read signal amplifier, transistor Q6~Q1
It is input to the configured rear stage amplifier 9 at 0 and the resistor R3 and R4 and the constant current source I _B1. Then, the output of the preceding amplifier 8 is output.
Force is outputted to the output terminals 2 and 3 are amplified by the rear-stage amplifier 9.

At the time of writing , the signal to the magnetic head 4 is
The signal is amplified by the write signal amplifier. At this time , the switch S is turned on by a signal input to the switching signal input terminal 1.
2 Ru is connected to the b side. Thus the supply of current from the constant current source I _B2 to the transistor Q11, Q12 constituting the preamplifier 8 is cut off, the preamplifier 8 and the non-operating state
Becomes, so that the signal from the magnetic head 4 or the amplified signal, does not appear in the output terminals 2 and 3.

[0005]

However, since the conventional read / write amplifier is configured as described above, the signal from the magnetic head 4 which should not leak to the output terminals 2 and 3 during writing should be transmitted to the transistor Q13. And Q1
4 slightly leaks through the collector-base capacitance, which is amplified by the latter-stage amplifier 9, and there is a problem that a signal may appear at the output terminals 2 and 3 even during writing.

In view of this problem, a method is also conceivable in which the transistors Q6 to Q9 of the post-amplifier 9 are turned off during writing so that the post-amplifier 9 does not amplify the leakage signal from the magnetic head 4. In this case, a new problem arises for the following reason, which is not preferable.

That is, as shown in FIG.
In general is connected to a subsequent circuit 7 through the coupling capacitor 6, as described above, the light in the drawing of the line during slot when the transistor Q6~Q9 subsequent stage amplifier 9 and the non-operating state when A, DC point B The potential becomes equal to the power supply voltage. On the other hand, the DC potentials at points A and B at the time of reading are lowered by the voltage drop generated in the resistors R3 _and R4 due to the power supply voltage because the latter-stage amplifier is in operation. Therefore, the DC potentials at points A and B are different between the time of writing and the time of reading, and the waveforms at points A and B at the time of switching between reading and writing are as shown in FIG. The following circuit 7
In this case, a normal signal was not input, and such a waveform also caused noise.

[0008] As described above, in the conventional read-write amplifier, there is a problem that the leakage signal appears at the output terminal of the magnetic head during a write, also, non-operating state line bets during subsequent amplifiers in order to prevent this In this case, a normal signal is not input to the subsequent circuit connected to the output terminal, and noise is caused.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and there is little leakage of a signal from a magnetic head to an output terminal at the time of writing, and adversely affects a subsequent circuit connected to the output terminal. It is an object of the present invention to obtain a read / write amplifier that does not reach the limit.

[0010]

According to the present invention, there is provided a read / write amplifier for amplifying a read signal from a magnetic head during reading, and a write signal amplifying unit for amplifying a write signal to the magnetic head during writing. An operation state in which the read signal amplifying unit has a transistor and a load resistor as constituent elements, and an operating current flows through each constituent element during reading, and the read signal from the magnetic head is amplified by these constituent elements. In a write operation, the transistor has a pre-amplifier in which the operating current flowing through the transistor and the load resistor is interrupted during the read operation and becomes inactive, and a transistor and a load resistor are included as constituent elements.
At the time of reading, an operating current flows through each component, and these components cause an operation state in which the output signal of the preceding amplifier is amplified. At the time of writing, the current flowing through the transistor is interrupted at the time of reading, and the latter amplifier becomes inoperative. When writing, the operating current flows, and the current that flows to the load resistor of the subsequent amplifier in the non-operating state and the current equal to the operating state flows
The configuration includes an adjustment circuit and a switch circuit for controlling on / off of an operation current flowing through the current adjustment circuit, the post-amplifier and the pre-amplifier.

[0011]

According to the present invention, the write signal amplifying unit is used.
Write to amplify the write signal to the magnetic head
Occasionally, the post-amplifier of the read signal amplifying unit is set to the non- operating state, so that the signal from the magnetic head slightly leaking from the pre-amplifier is amplified by the post-amplifier.
Not so that things are output to the output terminal Te. Further, at the time of writing, a current equal to that in the operation state of the latter-stage amplifier is used.
Because There is provided a circuit to flow to the load resistance of the post-stage amplifier, the output DC level of the post-stage amplifier and the read
It becomes the same at the time of writing.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram for explaining a read / write amplifier according to an embodiment of the present invention, and a read signal amplifying unit thereof is shown.
The circuit configuration of FIG. In the figure, the same reference numerals as in FIG.
Indicates the same as the conventional one. That is, the magnetic head 4, Q 6~Q18 transistors, R1 to R4 are resistance, I _B1 ~I _B4 is a constant current source, V _B1, V _B2 is Ah in the constant-voltage source
You. Preamplifier 8 is configuration in the transistor Q11~Q16 resistors R1 and R2 and a constant voltage source V _B2, subsequent amplifier
9 is configuration with the transistor Q6~Q10 resistor R3 and R4 and the constant current source I _B1. In addition , 2 and 3 are output terminals, 5 is a power supply voltage terminal, 1 is a switching signal input terminal for writing and reading, and S2 is a switch for cutting off the current of each transistor of the pre-amplifier 8 at the time of writing . And
In this embodiment, the read signal amplifying unit is in a non-operating state.
A current equal to its operating state to the load resistance of the
Flow , composed of transistors Q1 to Q5 and constant voltage source _VB1
A current adjustment circuit which is, at the time of read after the constant current source I _B1
A current is supplied to the stage amplifier 9 and the constant current source I
Constant current so that current is supplied from _B1 to the current adjustment circuit
A switch S1 for switching the supply of current from the source _IB1
The switch S1 is the same as the switch S2.
Switching control by the signal from the switching signal input terminal 1
It is supposed to be.

Next, the operation will be described. Ru exactly as Der the conventional example for amplification action and flow of signals from the magnetic head 4 to the output terminal 2 and 3 at the time of reading. Toes
The switch S2 and the switch S1 are both connected to the a side by a signal input to the switching signal input terminal 1 at the time of reading, and the transistors Q11 to Q16 of the pre-amplifier 8 are connected.
Is supplied with a current , first, a signal from the magnetic head 4
Are amplified by the preceding-stage amplifier 8 . The output of the preceding amplifier 8
A constant current source and the transistor Q17 and Q18 I _B3 and I _B4
Is supplied to the post-amplifier 9 through the buffer composed of
You. Further, the output of the pre-amplifier 8 is a transistor Q
And 6~Q10 resistor R3 and R4 are amplified at a later stage amplifier 9 constituted by a constant current source I _B1, Ru is output to the output terminal 2,3 <br/>.

On the other hand, at the time of writing, the magnetic head 4
Is amplified by the write signal amplifier. this
When the switching signal input terminal 1 to the input signal Thus the switches S1 to S2 is Ru are both connected to the b side. This allows
Rutotomoni preamplifier 8 is a non-operation state, the subsequent amplifier supply is cut off the current from the constant current source I _B1 to each transistor Q6~Q10 constituting the subsequent stage amplifier 9 to an inactive state. In this state, the leakage signal from the previous amplifier
Is not amplified by the subsequent amplifier 9 .

Here, the current adjusting circuit composed of the transistors Q1 to Q5 and the constant current source V _B1 is capable of controlling the load resistance R of the latter-stage amplifier 9 even if the latter-stage amplifier 9 is inactive during writing.
A circuit for allowing a current to flow through R3 and R4. The transistors Q1 and Q2 have the same characteristics as the transistors Q6 and Q7, and the transistors Q3 to Q5 have the same characteristics as the transistors Q8 to Q10. The load resistors R3 and R4 have a DC
The same level of current flows, and the DC level of the output terminal is kept constant between read and write.

According to this embodiment, the post-amplifier is set to the non-operating state at the time of writing, and in addition, the same DC current as that at the time of reading is applied to the load resistor R3 of the post-amplifier 9 at the time of writing. , R4, so that the output DC level becomes constant between write and read,
As a result, it is possible to obtain a high-performance and highly reliable read / write amplifier that has no signal leakage from the magnetic head, can always input a normal signal to the subsequent circuit connected to the output terminal, and does not generate noise. Can be.

[0017]

As described above, according to the present invention, the post-amplifier is made inoperative at the time of writing, and the same DC current as that at the time of reading is applied to the post-amplifier at the time of writing. Since the current flows through the resistor, the output DC level of the post-amplifier can be kept constant between writing and reading, and there is no signal leakage from the magnetic head and no adverse effect on the post-stage circuit. Thus, there is an effect that a highly reliable read / write amplifier can be obtained.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a read / write amplifier circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing a circuit configuration of a conventional read / write amplifier.

FIG. 3 is a diagram for explaining a problem of a conventional read / write amplifier.

FIG. 4 is a diagram showing signal waveforms for explaining a problem of a conventional read / write amplifier.

[Explanation of symbols]

Q1~Q18 transistor R1~R4 resistance I _B1 ~I _B4 constant current source V _B1, V _B2 constant voltage source 1 switching signal input terminal 2 output terminal 3 output terminal 4 the magnetic head 5 the supply voltage terminal 6 coupling capacitor 7 subsequent circuit 8 pre-stage Amplifier 9 Rear-stage amplifier S1 switch S2 switch

Claims (1)

(57) [Claims] 1. A read / write amplifier comprising: a read signal amplifier for amplifying a read signal from a magnetic head during read; and a write signal amplifying unit for amplifying a write signal to the magnetic head during write. The unit has a transistor and a load resistor as constituent elements, an operating current flows through each constituent element at the time of reading, and an operating state in which a read signal from the magnetic head is amplified by these constituent elements. A pre-amplifier in which the operating current flowing through the transistor and the load resistor is cut off to be in an inactive state; and a transistor and a load resistor as constituent elements, and when reading, an operating current flows through each constituent element. The amplifier enters an operating state in which the output signal of the amplifier is amplified. A post-amplifier in which the operating current flowing through the transistor is cut off to be in an inactive state; and a current adjusting circuit in which, when writing, an operating current flows, and a current equal to the operating state is supplied to the load resistor of the post-amplifier in the inactive state. A read / write amplifier comprising: a current adjusting circuit; and a switch circuit for controlling on / off of an operating current flowing through each of the second-stage amplifier and the first-stage amplifier.