JP2621819B2 - Semiconductor device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to components of digital logic circuits and high-sensitivity sensors. The present invention relates to a semiconductor device capable of facilitating integration by reducing mutual capacitance between electrodes and a method of manufacturing the same, and is particularly suitable for use in a single-electron tunneling device.

[0002]

2. Description of the Related Art First, the single-electron tunneling effect of a semiconductor device in which an electrode pair having a semiconductor junction including a tunnel barrier is formed will be described using a simple circuit. FIG.
(A) is a diagram showing a state where one tunnel junction is biased by a voltage source. Since one electron (single electron) is an inseparable element having an elementary charge e, when an electron tunnels through a tunnel junction, it does not pass through the tunnel junction continuously, but is microscopic. As can be seen, each electron individually tunnels through the tunnel junction. When a single electron tunnels through a microjunction, the energy before and after the tunneling is the charge energy of a single electron (Ec = e ² /
2C, C: the capacitance of the junction). Since tunneling occurs when the energy change before and after the tunnel becomes positive, when the electrons before tunneling have energy higher than the charging energy, that is, when the applied voltage V exceeds e / 2C. Tunnel happens.

On the other hand, when electrons before tunneling do not have energy corresponding to charging energy, tunneling is suppressed. Therefore, the voltage-current characteristics in the circuit of FIG. 4A are as shown in FIG. The single-electron tunneling effect is an effect in which the charging energy of a single electron affects electric conduction. In particular, the effect of suppressing tunneling is called Coulomb blockage (single-charge tunneling Coulomb blockade phenomena inn). Nanostructure: Single Charge Tunnel
ing Coulomb Blockade Phenomena p. 324, Herman Grabert, Michel H. Devole: Hermann
Edited by Grabert and Michel H. Devoret, Pranum Publishing Corp .: Plenum Publishing Corp
oration).

In order for the single-electron tunneling effect to appear, it is necessary for the single-electron charging energy to exceed the thermal perturbation energy. Therefore, the charging energy can be increased by reducing the capacitance of the tunnel junction. In order to reduce the capacitance, it is necessary to reduce the junction area of the tunnel junction as much as possible.

Next, a case where the tunnel junction and the capacitor are connected in series to a voltage source as shown in FIG. 5A will be described. An electrically independent island can be formed by the tunnel junction and the capacitor. When the voltage of the voltage source is increased, the Coulomb blockage is released at a certain voltage, and one electron tunnels. At this time, one electron is supplied to the island, and the number of electrons changes. Therefore, as shown in FIG. 5B, the number of electrons accumulated in the island becomes stepwise with respect to the voltage of the voltage source. When no voltage is applied, the island is electrically neutral, and electrons are only tunneled to the island by one.
They are put in and out one by one. Here, the number of electrons indicates the number of excess electrons charged by the external circuit, and does not indicate the number of all free electrons. FIG. 6A shows FIG.
A tunnel junction is further added to the circuit shown in (a), and two tunnel junctions are connected in series. In the tunnel junction, Coulomb blockage occurs in different voltage regions, and there are regions where two types of electrons are allowed to accumulate in the island with respect to the voltage of the voltage source. For example, when V = V ₁ in FIG.
One or two electrons can be stably stored in the island. When two tunnel junctions are used as described above, the existence of a bistable region in the number of electrons can be confirmed by a simple calculation.

Next, a transistor using the single electron tunneling effect will be described. In this case, as shown in FIG. 7A, a capacitor is provided on an island surrounded by two tunnel junctions, and a transistor is operated by applying a voltage to the capacitor. When a voltage is applied to the capacitor, the charge distribution in the island changes, and in the IV characteristics shown in FIG. 7B, the threshold voltage due to Coulomb blockage changes. Further, by switching the point A where the Coulomb blockage has occurred and the point B where the Coulomb blockage has occurred with the voltage Vg, the current can be switched.

In a single electron tunneling effect element, when the capacitance of the junction is small in a small tunnel junction, the charging energy when electrons tunnel is increased.
It is an element that utilizes the effect on conduction. And charging energy capacitance of the junction and C is Ec = e ^2/2
C, and this energy is the energy fluctuation kT due to temperature or the quantum mechanical energy fluctuation h
The effect becomes remarkable when it is larger than / CR. For that purpose, it is necessary to make a small tunnel junction and reduce the value of C. In order to enable operation at room temperature, it is necessary to realize a junction capacitance of about 1 aF. At the same time, the mutual capacitance between the electrodes without passing through the junction also affects the operation of the single electron tunneling effect element. Since such a capacitance effectively adds to the junction capacitance, the mutual capacitance between the electrodes must be suppressed to about the same as or less than the junction capacitance itself.

At present, research on single-electron tunneling effect devices is still at the laboratory level, and its operating temperature is less than 1 K in experiments using artificial structures. Two methods described below are mainly used as a method for manufacturing a tunnel junction. One uses a metal as an electrode and an oxide film thereof as a tunnel barrier as shown in the sectional view of FIG. Aluminum (Al) is mainly used as a material because of ease of forming an oxide film barrier. In order to form a micro tunnel junction, a bridge-type floating polymethyl methacrylate (PMMA) resist film 81 is formed on a substrate using a multilayer resist and electron beam exposure, and metal deposition is performed diagonally on the resist. After oxidizing the surface to form a barrier,
Vapor deposition is performed from another angle so that the first vapor deposited film 82 and the second vapor deposited film 83 overlap under the bridge so as to have a small junction. The electrode is made of a metal film, and the tunnel barrier 84
Is made of a metal oxide film which is an insulator.

Another method is a two-dimensional electron gas 9 in a semiconductor generated at a GaAs / AlGaAs heterojunction interface or a Si MOS inversion layer, as shown in FIG.
In this method, a depletion layer 93 is formed by depletion of a Schottky gate 92 deposited on the surface of the substrate to form a depletion layer 93, thereby confining the depletion layer in a narrow region and utilizing tunneling between the regions. The width of the depletion layer 93 is on the order of about 100 nm, and it is difficult to control the shape of the confined region having a size smaller than 100 nm. The characteristic that the characteristics of the tunnel barrier 94 can be changed by the voltage applied to the gate is very sensitive to the gate voltage, and it is difficult to operate many elements in practical use. This requires a large number of wirings, which is disadvantageous. In addition, since the gate terminal is disposed near the electrode, the stray capacitance increases and it is difficult to reduce the capacitance.

[0010] In either method, since the element is formed on a thick substrate, it is inevitable that the mutual capacitance between the electrodes becomes large due to the large dielectric constant of the substrate.

The above-mentioned semiconductor devices in which an electrode pair having a semiconductor junction including a tunnel barrier is formed are disclosed in Japanese Patent Application Nos. Hei 6-23619 and Hei 6-60437 (both not disclosed at the time of filing the present application). There is a prior application of the applicant.

[0012]

In the single electron tunneling effect element, the mutual capacitance between the electrodes as well as the capacitance of the tunnel junction greatly affects the operation. If the distance between the electrodes is shortened in an attempt to integrate the elements, the mutual capacitance will increase steadily, which not only lowers the operating temperature of the elements, but also causes interaction between the elements, making the design of integrated circuits difficult. I do. In the conventional single electron tunneling effect device, since the device is formed on a thick substrate, the mutual capacitance between the electrodes via the substrate increases, and there is a problem in integration.

An object of the present invention is to provide a semiconductor device with reduced interelectrode capacitance. It is another object of the present invention to provide a semiconductor device which operates in a low temperature state.
An object of the present invention is to improve the characteristics of a single electron tunneling effect element. An object of the present invention is to provide a method for rationally manufacturing a semiconductor device having a small interelectrode capacitance.

[0014]

SUMMARY OF THE INVENTION The present invention is characterized in that the mutual capacitance between electrodes is reduced to facilitate the integration of elements.

That is, a first aspect of the present invention is a semiconductor device including a frame formed of a semiconductor material, and an insulating film formed on one surface of the frame, and a semiconductor junction formed on a surface of the insulating film. Characterized in that an electrode pair is formed.

Preferably, the semiconductor material is an intrinsic semiconductor, the semiconductor junction includes a tunnel barrier, the tunnel barrier exhibits a single electron tunneling effect depending on temperature conditions, and the semiconductor material is intrinsic silicon. Preferably, the insulating film is made of silicon nitride, and the metal electrode is made of aluminum.

According to a second aspect of the present invention, in a method of manufacturing a semiconductor device, a first step of forming an insulating film on a semiconductor substrate, and removing a portion of the semiconductor substrate from the backside while leaving the insulating film. The method includes a second step of obtaining an insulating film supported by a frame of a material, and a third step of forming an electrode pair having a semiconductor junction on a surface of the insulating film. The order of the steps of the second step and the third step can be interchanged.

[0018]

An extremely thin insulating film is formed on one surface of a frame made of a semiconductor material, and an electrode pair having a semiconductor junction is formed on the surface of the insulating film.

An intrinsic semiconductor (for example, intrinsic silicon) is used as a semiconductor material, a tunnel barrier which exhibits a single electron tunneling effect depending on temperature conditions is included in a semiconductor junction, an insulating film is formed of silicon nitride, and a metal electrode is aluminum. Can be used.

In the semiconductor device thus constructed, since there is no intervening substrate having a large thickness and a large dielectric constant, the mutual capacitance between the electrodes can be reduced, and the mutual influence between the devices is reduced to facilitate the integration. And can be operated in a low temperature state.

In the semiconductor device according to the present invention, an insulating film is formed on a semiconductor substrate in a first step, and a part of the semiconductor substrate is removed from the back side while leaving the insulating film in a second step, and the semiconductor element is supported on a frame of semiconductor material. It is manufactured by forming an insulating film thus formed, and forming an electrode pair having a semiconductor junction on the surface of the insulating film in a third step. By providing a cover for protecting the previously formed semiconductor junction from the etching agent, the order of the second step and the third step can be changed.

[0022]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing the configuration of the embodiment of the present invention. The embodiment of the present invention includes a frame 11 formed of a semiconductor material,
An insulating film 12 is formed on one side of the frame 11, and an electrode pair 13 having a semiconductor junction is formed on the surface of the insulating film 12. In the present embodiment, the insulating property of the substrate is required depending on the temperature at which the electrode pair 13 is operated. Therefore, an intrinsic semiconductor is used as the semiconductor material. However, when operating at a low temperature, carriers in the semiconductor cannot move and are insulated. It is not necessarily true. The semiconductor junction includes a tunnel barrier. It is effective that the tunnel barrier exhibits a single-electron tunneling effect depending on the temperature condition. However, even if the tunnel barrier is applied to a general semiconductor device, the capacitance between the electrodes can be reduced. Preferably, the semiconductor material is intrinsic silicon, the insulating film is silicon nitride, and the metal electrode is aluminum.

In the example shown in FIG. 1, the frame 11 is formed of an intrinsic semiconductor substrate, and this intrinsic semiconductor substrate is etched from the back, leaving only the insulating film 12 and the membrane 14.
Are formed. The thickness of the substrate is about 0.3 mm, and the thickness of the insulating film 12 is about 50 nm. The area of the membrane 14 varies depending on the scale of integration of the electrode pairs 13. Electrode pair 1
The fine portion 3 is formed on the membrane 14.

Here, referring to FIG. 2, how the magnitude of the mutual capacitance between the electrodes 22 is affected by the thickness of the substrate 21 will be described. The effective dielectric constant between the electrodes 22 is (1 + ε) / 2 when the dielectric constant of the substrate 21 is ε. However, when the substrate is thin, the dielectric constant gradually approaches a vacuum dielectric constant of 1, so that the mutual capacitance between the electrodes becomes large. It is desirable to reduce the thickness of the substrate 21 in order to reduce the thickness.

FIG. 2A shows a conventional thick substrate 21.
(B) shows a semiconductor device formed on a thin membrane according to the embodiment of the present invention. Comparing this, it can be seen that in the example of the present invention, the mutual capacitance between the electrodes was reduced.

Next, a method of manufacturing a semiconductor device according to an embodiment of the present invention will be described. The semiconductor device according to the present invention has a frame 11
A first step of forming an insulating film 12 on a semiconductor substrate to be formed, and a second step of removing a part of the semiconductor substrate from the back side while leaving the insulating film 12 to obtain an insulating film 12 supported by a frame 11 of a semiconductor material. It is manufactured by a process and a third process of forming an electrode pair 13 having a semiconductor junction on the surface of the insulating film 12. The order of the second step and the third step may be changed.

Here, the manufacturing method will be specifically described with reference to FIG. First, as shown in FIG. 1A, a SiN film 31 is formed on an intrinsic semiconductor i-type Si substrate 32 by CVD.
With a thickness of 50 nm. Next, a positive photoresist 33 is applied to the back surface of the i-type Si substrate 32 with a thickness of 2 μm, and is developed after being exposed to ultraviolet rays. Photoresist 3
3 washes away with acetone. Next, the Si substrate is etched in nitric acid. Since the etching rate of Si is higher than that of SiN, it is possible to form the membrane 14 as shown in FIG. Next, a single-electron tunneling effect element composed of a small tunnel junction of Al / AlOx / Al is formed on the membrane 14 from the front side using the method described in the conventional example.

That is, using a multilayer resist and electron beam exposure, a bridge-type floating polymethyl methacrylate (PMMA) resist film 34 is formed on the SiN film 31 on the surface of the i-type Si substrate 32, and metal is deposited. Is performed obliquely, the surface thereof is oxidized to form a tunnel barrier 38, and then vapor deposition is performed from another angle, so that the first electrode 35 and the second electrode 36 overlap under the bridge to form a small junction. So that This single electron tunneling effect element can be formed by another method described with reference to FIG. 9 in the conventional example.

After the formation of the first electrode 35 and the second electrode 36, as shown in FIG. 3D, the PMMA resist film 34 and excess vapor-deposited film are lifted off with acetone and removed.

Although there is no practical problem if a part of the substrate remains on the back surface of the membrane 14 in the above-mentioned step of hollowing out the substrate, it is more effective to completely remove the substrate.
The hollowing step may be performed after the electrodes are attached. However, it is preferable to perform the hollowing step in a later step in order to prevent the acid from damaging the surface electrodes when etching the back surface of the substrate.

[0031]

As described above, according to the present invention, after an insulating film is formed on a substrate, only an element region is etched from the back of the substrate to form an insulating membrane, and metal deposition is performed thereon. By sandwiching the electrode composed of the film and the surface oxide film as a tunnel barrier and forming the electrode composed of the opposed metal vapor-deposited film, a single electron tunneling effect element having a small mutual capacitance between the electrodes can be manufactured.
There is an effect that the integration can be facilitated.

[Brief description of the drawings]

FIG. 1 is a sectional view showing the configuration of an embodiment of the present invention.

FIG. 2A is a schematic diagram illustrating the operation of a semiconductor device formed on a thick substrate in a conventional example, and FIG. 2B illustrates the operation of a semiconductor device formed on a thin membrane in an embodiment of the present invention. FIG.

FIGS. 3A to 3D are cross-sectional views illustrating a manufacturing method according to an embodiment of the present invention.

FIG. 4A is a diagram showing a state in which one tunnel junction in a conventional example is biased by a voltage source;
(B) is a current-voltage characteristic diagram.

5A is a diagram showing a state in which a tunnel junction and a capacitor in a conventional example are connected in series and biased by a voltage source, and FIG. 5B is a diagram showing an independent electrode surrounded by the tunnel junction and the capacitor. The figure which showed the number of stored electrons with respect to applied voltage.

FIG. 6 (a) is a diagram showing a state in which two serially connected tunnel junctions and a capacitor in a conventional example are biased by a voltage source, and FIG. 6 (b) is an independent electrode surrounded by the tunnel junction and the capacitor. FIG. 3 is a diagram showing the number of electrons stored in the memory with respect to an applied voltage.

7A is a diagram showing a configuration of a single electron transistor proposed by Rikarev et al. In a conventional example, and FIG. 7B is a diagram showing a change in current-voltage characteristics with respect to a gate voltage.

FIG. 8 is a cross-sectional view showing a state of a minute tunnel junction using a metal deposition film in a conventional example.

FIG. 9 is a plan view showing a state of a minute tunnel junction using a semiconductor two-dimensional electron gas and a Schottky gate in a conventional example.

[Explanation of symbols]

 Reference Signs List 11 frame (intrinsic semiconductor substrate) 12 insulating film 13 electrode pair 14 membrane 21 substrate 22 electrode 23 tunnel junction 31 SiN film 32 i-type Si substrate 33 photoresist 34, 81 PMMA resist film 35 first electrode 36 second electrode 37 , 85 aluminum oxide film 38, 84, 94 tunnel barrier 82 first deposited film 83 second deposited film 86 Si substrate 91 two-dimensional electron gas 92 Schottky gate 93 depletion layer

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical display location H01L 49/00 H01L 29/88 Z

Claims (6)

(57) [Claims] 1. A semiconductor comprising: a frame formed of a semiconductor material; and an insulating film formed on one surface of the frame, wherein an electrode pair having a semiconductor junction is formed on a surface of the insulating film. element. 2. The semiconductor device according to claim 1, wherein said semiconductor material is an intrinsic semiconductor. 3. The semiconductor device according to claim 1, wherein said semiconductor junction includes a tunnel barrier. 4. The semiconductor device according to claim 3, wherein the tunnel barrier exhibits a single electron tunneling effect depending on a temperature condition. 5. The semiconductor material is intrinsic silicon,
5. The semiconductor device according to claim 3, wherein said insulating film is silicon nitride, and said metal electrode is aluminum. 5. A first step of forming an insulating film on a semiconductor substrate, and a second step of removing a part of the semiconductor substrate from the back side while leaving the insulating film to obtain an insulating film supported by a frame of a semiconductor material. And a third step of forming an electrode pair having a semiconductor junction on the surface of the insulating film. 6. The method according to claim 5, wherein the order of the second step and the third step is changed.