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JP2614190B2 - Prepreg for multilayer board, laminated board, multilayer printed circuit board and method of manufacturing the same - Google Patents

Prepreg for multilayer board, laminated board, multilayer printed circuit board and method of manufacturing the same

Info

Publication number
JP2614190B2
JP2614190B2 JP6143848A JP14384894A JP2614190B2 JP 2614190 B2 JP2614190 B2 JP 2614190B2 JP 6143848 A JP6143848 A JP 6143848A JP 14384894 A JP14384894 A JP 14384894A JP 2614190 B2 JP2614190 B2 JP 2614190B2
Authority
JP
Japan
Prior art keywords
prepreg
ptfe
layer
resin
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP6143848A
Other languages
Japanese (ja)
Other versions
JPH07323501A (en
Inventor
仁 神崎
常盛 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Pillar Packing Co Ltd
Original Assignee
Nippon Pillar Packing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Pillar Packing Co Ltd filed Critical Nippon Pillar Packing Co Ltd
Priority to JP6143848A priority Critical patent/JP2614190B2/en
Publication of JPH07323501A publication Critical patent/JPH07323501A/en
Application granted granted Critical
Publication of JP2614190B2 publication Critical patent/JP2614190B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

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  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】 この発明は、例えば高周波プ
リント配線基板として用いられる低誘電率積層板を構成
するところの多層板用プリプレグ、積層板、多層プリン
ト回路基板およびその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a prepreg for a multi-layer board, a multi-layer board, a multi-layer printed circuit board, and a method of manufacturing the same, which constitute a low-k laminate used as, for example, a high-frequency printed circuit board.

【0002】[0002]

【従来の技術】従来、上述例のプリプレグとしては、例
えば特開昭63−47127号、特開平5−69442
号および特開平2−261830号公報に記載のものが
あり、何れもガラスクロス等の基材にPTFE樹脂を含
浸保持させた点を、その基本構成としている。
2. Description of the Related Art Conventionally, prepregs of the above-mentioned example are disclosed in, for example, JP-A-63-47127 and JP-A-5-69442.
And Japanese Patent Application Laid-Open No. 2-261830, both of which have a basic structure in which a base material such as a glass cloth is impregnated and held with a PTFE resin.

【0003】上述のPTFE(ポリテトラフルオロエチ
レン、四フッ化エチレン樹脂)は溶融した状態において
も、その粘性が極めて高く(例えば380℃で1011
アズ)、他のフッ素樹脂(例えばPFAの粘性は380
℃で104 〜105 ポアズ)と比較しても、その溶融粘
度が大である。このため、高温高圧の条件下で長時間プ
レス成型を行なわないと上述のガラスクロス基材に対す
る充分な密着性が確保できない。
The above-mentioned PTFE (polytetrafluoroethylene, tetrafluoroethylene resin) has a very high viscosity (for example, 10 11 poise at 380 ° C.) even in a molten state, and the viscosity of another fluorine resin (for example, PFA) is low. 380
℃ even compared to 10 4 to 10 5 poises) at its melt viscosity is large. For this reason, if the press molding is not performed for a long time under the condition of high temperature and high pressure, sufficient adhesion to the above-mentioned glass cloth base material cannot be ensured.

【0004】一方、上述のプリプレグを備えた多層板の
二次成型時に、高温高圧の条件下で長時間プレス成型を
行なうと、予め形成されたCu箔製の配線回路のズレ
や、完成された多層板の寸法変化、反りが発生して、高
周波を作用させる配線板(高周波プリント配線基板)と
しての使用が困難となる。因に、回路配線の加工上の寸
法許容誤差は周波数が10GHz(10×109 Hz)
で50μm以下である。
On the other hand, during the secondary molding of the multilayer board provided with the above-mentioned prepreg, if the press molding is performed for a long time under the condition of high temperature and high pressure, the displacement of the wiring circuit made of the Cu foil formed beforehand and the completion of the completed circuit are completed. The multilayer board undergoes dimensional changes and warpage, making it difficult to use it as a wiring board (high-frequency printed wiring board) for applying high frequency. The dimensional tolerance in the processing of the circuit wiring is 10 GHz (10 × 10 9 Hz)
Is 50 μm or less.

【0005】また、上述の配線回路のズレや配線板の寸
法変化を回避するために、低温低圧の条件下でプレス成
型を行なった場合には、PTFEの粘性が他のフッ素樹
脂と比較して極めて高いので、ガラスクロス基材との充
分な密着性が得られず、しかもプリプレグに保持された
PTFE樹脂中に空隙が残存する場合もあり、これらの
現象はガラスクロス基材とPTFE樹脂との隙間や樹脂
中の多孔質状態の部分にメッキ液や水分が侵入する要因
となり、ハンダ耐熱性の低下および絶縁抵抗の不均一を
招来し、かつ上述の隙間および多孔質状態は誘電率の不
均一化が発生する原因となり、高周波プリント配線基板
としては致命的な欠陥となる。
Further, when press molding is performed under low-temperature and low-pressure conditions in order to avoid the above-described displacement of the wiring circuit and dimensional change of the wiring board, the viscosity of PTFE is lower than that of other fluororesins. Since it is extremely high, sufficient adhesion to the glass cloth base material cannot be obtained, and voids may remain in the PTFE resin held by the prepreg, and these phenomena are caused by the glass cloth base material and the PTFE resin. The plating solution and moisture may enter the gaps and the porous portion of the resin, leading to a decrease in solder heat resistance and non-uniform insulation resistance. And a fatal defect as a high-frequency printed wiring board.

【0006】[0006]

【発明が解決しようとする課題】この発明の請求項1記
載の発明は、ガラスクロス等の基材に未焼結のPTFE
樹脂をプリプレグ全体の60〜96vol %含浸保持さ
せ、PTFE樹脂の空隙率を3〜15vol %とすること
で、PTFE樹脂がその溶融温度において、ゲル化した
状態での移動距離を可及的小とすることができて、プレ
ス成型時の加熱加圧状態を短時間に押えることができ、
低温低圧状態でのプレス条件で良好な寸法精度の確保が
でき、積層板や多層プリント回路基板に適用した場合の
配線回路のズレをなくすことができる多層板用プリプレ
グの提供を目的とする。
SUMMARY OF THE INVENTION The invention according to claim 1 of the present invention relates to an unsintered PTFE on a substrate such as a glass cloth.
The PTFE resin is impregnated with 60 to 96 vol% of the entire prepreg and the porosity of the PTFE resin is 3 to 15 vol%, so that the moving distance of the PTFE resin in a gelled state at the melting temperature is as small as possible. It is possible to hold down the heating and pressurizing state during press molding in a short time,
An object of the present invention is to provide a prepreg for a multilayer board which can ensure good dimensional accuracy under pressing conditions in a low-temperature and low-pressure state and can eliminate a deviation of a wiring circuit when applied to a laminated board or a multilayer printed circuit board.

【0007】この発明の請求項2記載の発明は、上記請
求項1記載の少なくとも1層の多層板用プリプレグの片
面もしくは両面に金属箔を配置することで、低い誘電率
を確保するために上述の多量の未焼結のPTFE樹脂
含浸保持させるにもかかわらず、同樹脂の効果にて金属
箔の良好な接着性を確保することができ、回路基板とし
て適切な絶縁抵抗や一様な誘電特性を確保することがで
きる積層板の提供を目的とする。
According to a second aspect of the present invention, a low dielectric constant is achieved by disposing a metal foil on one or both sides of at least one layer of the prepreg for a multilayer board according to the first aspect.
A large amount of unsintered PTFE resin described above in order to ensure
Despite impregnated held, Ki out to ensure good adhesion of the metal foil at the same resin effect, the circuit board
Proper insulation resistance and uniform dielectric properties.
The purpose is to provide a laminated board that can be cut .

【0008】この発明の請求項3記載の発明は、上記請
求項2記載の積層板すなわち金属箔直下に位置する樹脂
層がPTFEのみの上記積層板を内層板として用いて多
層プリント回路基板を構成することで、二次成型中の配
線回路のスイミング現象(移動)を防止し、寸法変化の
低減を図ることができ、精度の高い多層プリント回路基
板の提供を目的とする。
According to a third aspect of the present invention, there is provided a multilayer printed circuit board using the laminated board according to the second aspect, that is, the laminated board in which the resin layer located immediately below the metal foil is only PTFE as an inner layer board. By doing so, it is possible to prevent a swimming phenomenon (movement) of the wiring circuit during the secondary molding, reduce a dimensional change, and provide a highly accurate multilayer printed circuit board.

【0009】この発明の請求項4記載の発明は、上記請
求項1記載のプリプレグの製造に際して、ガラスクロス
等の基板に平均粒径0.2〜0.5μmのPTFE粒子
を用いて構成したPTFE樹脂ディスパージョンを含有
し、このPTFE樹脂の融点(327℃)に対して低温
条件下で乾燥処理し、このような含浸および乾燥を繰返
して60〜96vol %という多量の樹脂保持量とするこ
とで、空隙率を3〜10vol %に留めることができて、
積層板、多層プリント回路基板に適用した場合に、厚さ
精度が高く、厚さ方向の線膨脹係数が小さく、かつハン
ダ耐熱性に優れると共に、異物混入が少なく、さらには
マッドクラックが仮に生じても次の含浸時に該マッドク
ラックを埋めることができ、クラックの影響をなくすこ
とができ、必要樹脂量の確保により、低誘電率化を達成
することができる多層板用プリプレグの製造方法の提供
を目的とする。
According to a fourth aspect of the present invention, there is provided a prepreg according to the first aspect, wherein a PTFE particle having an average particle size of 0.2 to 0.5 μm is formed on a substrate such as a glass cloth.
And dried under a low temperature condition with respect to the melting point (327 ° C.) of the PTFE resin. Such impregnation and drying are repeated to obtain a large amount of 60-96 vol% resin. By setting the holding amount, the porosity can be kept at 3 to 10 vol%,
When applied to laminated boards and multilayer printed circuit boards, the thickness accuracy is high, the coefficient of linear expansion in the thickness direction is small, the solder heat resistance is excellent, foreign matter is less mixed, and mud cracks are temporarily generated. It is also possible to provide a method for manufacturing a prepreg for a multilayer board, which can fill the mud cracks at the next impregnation, eliminate the influence of the cracks, and achieve a low dielectric constant by securing a necessary resin amount. Aim.

【0010】この発明の請求項5記載の発明は、上記内
層板の上下に配置されるプリプレグの製造に際して、こ
のプリプレグをPTFEの第1層と、PTFEの第2層
と、PFAの第3層との3層構造にし、PTFE第2層
は焼結することなく低温条件下で乾燥処理して、PFA
第3層の保持を良好とし、かつPFA第3層はフィルム
介設構造ではなくディスパージョン含浸、乾燥、焼成に
より形成することで、積層板、多層プリント回路基板に
適用する場合に、高温高圧プレスを可能とし、積層プレ
ス時にPTFE、PFAの融点より高温かつ高圧条件下
で加圧することにより、厚さ精度が高く、厚さのばらつ
きが小で、厚さ方向の線膨張係数が小さく、また金属箔
とプリプレグとの接着力が強く、ハンダ耐熱性および熱
衝撃の耐性が共に高く、さらには薬液の浸込みがなく、
低誘電率化を達成することができるプリプレグの製造方
法の提供を目的とする。
According to a fifth aspect of the present invention, in the production of a prepreg disposed above and below the inner layer plate, the prepreg is formed of a first layer of PTFE, a second layer of PTFE, and a third layer of PFA. And the PTFE second layer is dried under a low temperature condition without sintering to obtain a PFA
By maintaining the third layer in good condition and forming the PFA third layer not by a film interposed structure but by dispersion impregnation, drying and baking, it can be applied to a laminated board or a multilayer printed circuit board. By applying pressure under the conditions of high temperature and higher than the melting points of PTFE and PFA at the time of laminating press, thickness accuracy is high, thickness variation is small, linear expansion coefficient in the thickness direction is small, and metal Strong adhesion between foil and prepreg, high solder heat resistance and high resistance to thermal shock, and no penetration of chemicals
An object of the present invention is to provide a method for producing a prepreg that can achieve a low dielectric constant.

【0011】この発明の請求項6記載の発明は、上記請
求項4記載の製造方法で製造された多量の樹脂保持量を
もったプリプレグを内層板とし、この内層板の上下に、
PFAもしくはFEP等のフッ素樹脂フィルムまたは上
記請求項5の製造方法で製造されたプリプレグを配置
し、さらに最外層に金属箔を配置した後に、PTFEの
融点より高温かつ高圧状態でプレス成型することで基材
との密着性が高く、かつ均一な物性値を有し、さらに吸
水率、寸法変化率、ハンダ耐熱性の諸特性に優れた多層
プリント回路基板の製造方法の提供を目的とする。
According to a sixth aspect of the present invention, a large amount of resin held by the manufacturing method according to the fourth aspect is reduced.
The prepreg with the inner layer plate, above and below this inner layer plate,
After arranging a fluororesin film such as PFA or FEP or a prepreg manufactured by the manufacturing method of claim 5 and further arranging a metal foil on the outermost layer, press molding at a temperature higher than the melting point of PTFE and in a high pressure state. It is an object of the present invention to provide a method for manufacturing a multilayer printed circuit board having high adhesion to a substrate, having uniform physical properties, and further having excellent properties of water absorption, dimensional change, and solder heat resistance.

【0012】[0012]

【課題を解決するための手段】この発明の請求項1記載
の発明は、ガラスクロス等の基材に未焼結のPTFE樹
脂をプリプレグ全体の60〜96vol %含浸保持させ、
上記PTFE樹脂の空隙率を3〜10vol %とした多層
板用プリプレグであることを特徴とする。
According to the first aspect of the present invention, a base material such as a glass cloth is impregnated with an unsintered PTFE resin in an amount of 60 to 96 vol% of the entire prepreg .
It is a prepreg for a multilayer board in which the porosity of the PTFE resin is 3 to 10 vol%.

【0013】この発明の請求項2記載の発明は、上記請
求項1記載の少なくとも1層の多層板用プリプレグの片
面もしくは両面に金属箔を配置した積層板であることを
特徴とする。
According to a second aspect of the present invention, there is provided a laminated plate in which a metal foil is disposed on one or both sides of the prepreg for a multilayer board of at least one layer according to the first aspect.

【0014】この発明の請求項3記載の発明は、上記請
求項2記載の積層板を内層板とし、上記内層板の上下
に、PFAもしくはFEP等のフッ素樹脂フィルム、ま
たは、基材にPTFE樹脂を含浸保持させその両外層に
PFAもしくはFEPが含浸保持されたプリプレグを配
置し、最外層に金属箔が配置された多層プリント回路基
板であることを特徴とする。
According to a third aspect of the present invention, there is provided the laminated board according to the second aspect as an inner layer plate, and a fluororesin film such as PFA or FEP, or a PTFE resin as a base material, above and below the inner layer plate. And a prepreg impregnated and held with PFA or FEP on both outer layers, and a multi-layer printed circuit board on which a metal foil is arranged on the outermost layer.

【0015】この発明の請求項4記載の発明は、上記請
求項1記載の多層板用プリプレグの製造方法であって、
ガラスクロス等の基材に平均粒径0.2〜0.5μmの
PTFE粒子を用いて構成したPTFE樹脂ディスパー
ジョンを含浸し、上記PTFE樹脂の融点に対して低温
条件下で乾燥処理し、上記含浸および乾燥を繰返して6
0〜96vol %の樹脂保持量とする多層板用プリプレグ
の製造方法であることを特徴とする。
According to a fourth aspect of the present invention, there is provided a method for producing a prepreg for a multilayer board according to the first aspect,
Substrate such as glass cloth has an average particle size of 0.2 to 0.5 μm
Impregnated with a PTFE resin dispersion composed of PTFE particles , dried under a low-temperature condition with respect to the melting point of the PTFE resin, and the above-described impregnation and drying were repeated.
It is a method for producing a prepreg for a multilayer board having a resin holding amount of 0 to 96 vol%.

【0016】この発明の請求項5記載の発明は、上記請
求項3記載のプリプレグの製造方法であって、基材にP
TFEディスパージョンを含浸して乾燥させた後、PT
FEの融点より高温条件下で焼成し、上記含浸、乾燥お
よび焼成を繰返して必要樹脂保持量の第1層を形成する
第1工程と、上記第1層の表面にPTFEディスパージ
ョンを含浸した後、PTFEの融点より低温条件下で乾
燥させ、上記含浸および乾燥を繰返して必要樹脂保持量
の第2層を形成する第2工程と、上記第2層の表面にP
FAディスパージョンを含浸して乾燥させた後、該PF
Aおよび上記PTFEの融点より高温条件下で焼成し、
上記含浸、乾燥および焼成を繰返して必要樹脂保持量の
第3層を形成すると共に、プリプレグを形成する第3工
程とを備えたプリプレグの製造方法であることを特徴と
する。
According to a fifth aspect of the present invention, there is provided the method for producing a prepreg according to the third aspect, wherein
After impregnated with TFE dispersion and dried, PT
Baking under a condition higher than the melting point of FE, repeating the above-described impregnation, drying and baking to form a first layer having a required resin holding amount; and impregnating the surface of the first layer with a PTFE dispersion. A second step of drying under a condition lower than the melting point of PTFE and repeating the above-described impregnation and drying to form a second layer having a required resin holding amount;
After impregnated with the FA dispersion and dried, the PF
A and baked under the condition of higher temperature than the melting point of PTFE,
A method for producing a prepreg, comprising the steps of: forming a third layer having a required resin holding amount by repeating the above-described impregnation, drying, and firing, and a third step of forming a prepreg.

【0017】この発明の請求項6記載の発明は、上記請
求項4記載の製造方法で製造されたプリプレグを内層板
とし、この内層板の上下に、PFAもしくはFEP等の
フッ素樹脂フィルムまたは上記請求項5の製造方法で製
造されたプリプレグを配置し、さらに最外層に金属箔を
配置した後に、PTFEの融点より高温かつ高圧状態で
プレス成型することを特徴とする多層プリント回路基板
の製造方法であることを特徴とする。
According to a sixth aspect of the present invention, there is provided a prepreg produced by the production method according to the fourth aspect as an inner layer plate, and a fluororesin film such as PFA or FEP or a fluororesin film formed on the upper and lower sides of the inner layer plate. Item 5. A method for manufacturing a multilayer printed circuit board, comprising: arranging a prepreg manufactured by the manufacturing method of Item 5, further arranging a metal foil on an outermost layer, and press-molding at a temperature higher than the melting point of PTFE and at a high pressure. There is a feature.

【0018】[0018]

【発明の作用及び効果】この発明の請求項1記載の発明
によれば、ガラスクロス等の基材にプリプレグ全体の6
0〜96vol %の割合で含浸保持させる未焼結のPTF
E樹脂の空隙率を3〜10vol %としたので、PTFE
樹脂がその溶融温度においてゲル化(約330℃でゲル
化)した状態での移動距離を可及的小とすることがで
き、このためプレス成型時の加熱加圧状態を短時間に押
えることができると共に、PTFEが溶融する最低温度
付近(つまり低温加熱状態)でも基材の隙間や初期のP
TFE粒子間の隙間にPTFEゲルを侵入させることが
でき、成型時に基材との隙間を埋めて、吸水率の低下を
図ることができる。因に基材に対して吸水が発生する
と、基材の空隙に沿ってメッキ液等の浸み込みによる回
路の短絡や、空隙の気体がハンダ温度において急激に膨
張することにより基材内部の破壊が起こり断線や電気特
性の劣化を招来するが、本発明では、これらを防止する
ことができる。
According to the first aspect of the present invention, the base material such as a glass cloth or the like is coated with 6 parts of the entire prepreg.
Unsintered PTF impregnated and held at a rate of 0 to 96 vol%
Since the porosity of the E resin is 3 to 10 vol%,
The moving distance in a state where the resin is gelled at its melting temperature (gelled at about 330 ° C.) can be made as small as possible, so that the heating and pressurizing state during press molding can be suppressed in a short time. In addition to being able to do so, the gap between the base material and the initial P
The PTFE gel can penetrate into the gaps between the TFE particles, filling the gaps with the base material during molding, and reducing the water absorption. If water is absorbed into the base material, the circuit will be short-circuited due to the infiltration of the plating solution etc. along the space in the base material, and the gas inside the space will expand rapidly at the solder temperature, causing destruction inside the base material. This causes disconnection and deterioration of electrical characteristics, but the present invention can prevent them.

【0019】このように上述の空隙率の設定によりPT
FE樹脂がその溶融温度においてゲル化した状態での移
動距離を可及的小とすることで、低温低圧状態でのプレ
ス成型においても従来品と同等の寸法精度が確保でき、
積層板や多層プリント回路基板に適用した場合の配線回
路のズレがなく、加えて、該多層板用プリプレグを用い
て多層プリント回路基板を構成する際、高温高圧状態で
プレス成型を行なうことにより、基材との密着性が高
く、かつ均一な物性値の多層プリント回路基板を得るこ
とができる効果がある。
As described above, by setting the above porosity, PT
By minimizing the travel distance of the FE resin in the gelled state at its melting temperature, the same dimensional accuracy as conventional products can be ensured even in press molding under low-temperature and low-pressure conditions.
There is no deviation of the wiring circuit when applied to a laminated board or a multilayer printed circuit board, and in addition, when forming a multilayer printed circuit board using the prepreg for the multilayer board, by performing press molding in a high temperature and high pressure state, There is an effect that a multilayer printed circuit board having high adhesion to a base material and uniform physical property values can be obtained.

【0020】因に上述の空隙率が10vol %を超える場
合には、ゲル化したPTFEの移動距離が大となり、基
板の製造時において空隙部分を完全になくすることが困
難となって、均一な物性値を有する基板の製造が不可能
となり、逆に上述の空隙率が3vol %未満の場合にはP
TFE粒子同志が過度に密着し、PTFEディスパージ
ョンに配合される表面活性剤等の分散剤を、乾燥行程で
その深部においても充分に抜き取ることが困難となり、
この分散剤は300℃を超えるプレス条件下において直
ちに炭化して、基板が炭素分を豊富に含有する状態とな
り、絶縁抵抗の低下を招来し、絶縁板として必要不可欠
な抵抗値の確保が不能となるのみならず、誘電率も上昇
し、高周波回路基板として適用不能となる。
If the porosity exceeds 10 vol%, the moving distance of the gelled PTFE becomes large, making it difficult to completely eliminate the voids during the manufacture of the substrate. When the porosity is less than 3 vol%, it becomes impossible to manufacture a substrate having various physical properties.
The TFE particles are excessively adhered to each other, and it is difficult to sufficiently remove a dispersant such as a surfactant incorporated in the PTFE dispersion even in a deep part in a drying process.
This dispersant is immediately carbonized under pressing conditions exceeding 300 ° C., and the substrate becomes rich in carbon content, leading to a decrease in insulation resistance, making it impossible to secure an indispensable resistance value as an insulating plate. Not only that, the dielectric constant also increases, making it unusable as a high-frequency circuit board.

【0021】この発明の請求項2記載の発明によれば、
上記請求項1記載の少なくとも1層の多層板用プリプレ
グの片面もしくは両面に金属箔を配置して積層板を構成
したので、低い誘電率を確保するために、上述の多量の
未焼結のPTFE樹脂を含浸保持させるにもかかわら
ず、同樹脂の効果により金属箔の良好な接着性を確保す
ることができ、回路基板として適切な絶縁抵抗や一様な
誘電特性を確保することができる効果がある。
According to the second aspect of the present invention,
Since the laminated plate is formed by arranging metal foil on one or both surfaces of the prepreg for at least one layer according to claim 1 , a large amount of the prepreg is required to secure a low dielectric constant. Despite impregnating and holding sintered PTFE resin
It not, by the effect of the resin can be ensured good adhesion of the metal foil, a suitable insulation resistance and uniform as a circuit board
There is an effect that the dielectric properties can be secured .

【0022】この発明の請求項3記載の発明によれば、
上記請求項2記載の積層板すなわち金属箔直下に位置す
る樹脂層がPTFEのみの上記積層板を内層板として用
いて多層プリント回路基板を構成するので、二次成型中
(プレス時)の配線回路のスイミング現象(移動)を防
止することができると共に、完成した多層プリント回路
基板の寸法変化の低減を図って精度の高い多層プリント
回路基板を得ることができる効果がある。
According to the third aspect of the present invention,
The multilayer board according to claim 2, that is, the resin layer located immediately below the metal foil constitutes a multilayer printed circuit board by using the laminate having only PTFE as an inner layer board. High-precision multi-layer printing by preventing the swimming phenomenon (movement) of the printed circuit board and reducing the dimensional change of the completed multi-layer printed circuit board
There is an effect that a circuit board can be obtained .

【0023】この発明の請求項4記載の発明によれば、
上記請求項1記載のプリプレグの製造に際して、ガラス
クロス等の基材に平均粒径0.2〜0.5μmのPTF
E粒子を用いて構成したPTFE樹脂ディスパージョン
を含浸し、このPTFE樹脂の融点327℃に対して低
温条件下で乾燥処理し、上記含浸および乾燥を繰返して
60〜96vol %という多量の樹脂保持量とする方法で
あるから、空隙率を3〜10vol %に留めることができ
て、このプリプレグを積層板、多層プリント回路基板に
適用した場合には、厚さ精度が高く、厚さ方向の線膨張
係数が小さく、かつハンダ耐熱性に優れると共に、異物
混入が少なく、さらにはマッドクラックが仮りに生じて
も次の含浸時に該マッドクラックを埋めることができ、
クラックの影響をなくすことができて、樹脂保持量が6
0〜96vol %と多く、低誘電率化を達成することがで
きる効果がある。また、プリプレグの造工程に焼結工程
を有さないので、基材の波打ち状の変形もありえない。
According to the invention described in claim 4 of the present invention,
2. A PTF having an average particle size of 0.2 to 0.5 .mu.m on a substrate such as a glass cloth when producing the prepreg according to claim 1.
Impregnated with a PTFE resin dispersion composed of E particles , dried under a low temperature condition with respect to the melting point of the PTFE resin of 327 ° C., and the above impregnation and drying were repeated to obtain a large amount of resin retention of 60 to 96 vol%. , The porosity can be kept at 3 to 10 vol%.
Therefore , when this prepreg is applied to a laminated board or a multilayer printed circuit board, the thickness accuracy is high, the coefficient of linear expansion in the thickness direction is small, and the solder heat resistance is excellent, and there is little foreign matter contamination. Even if mud cracks occur, the mud cracks can be filled during the next impregnation,
The effect of cracks can be eliminated, and the resin holding amount is 6
As large as 0 to 96 vol%, there is an effect that a low dielectric constant can be achieved. In addition, since the prepreg manufacturing process does not include a sintering process, it is unlikely that the substrate has wavy deformation.

【0024】この発明の請求項5記載の発明によれば、
上述の内層板の上下に配置されるプリプレグの製造に際
して、上述のプリプレグをPTFEの第1層と、PTF
Eの第2層と、PFAの第3層との3層構造にし、PT
FE第2層は焼結することなくPTFEの融点より低温
条件下で乾燥処理して、PFA第3層の保持を良好と
し、かつPFA第3層はフィルム介設手段ではなくPF
Aディスパージョンの含浸、乾燥、焼成により形成する
ので、このプリプレグを積層板、多層プリント回路基板
に適用する場合に、積層時の高温高圧プレスが可能とな
る。
According to the invention described in claim 5 of the present invention,
In manufacturing a prepreg arranged above and below the inner layer plate, the prepreg is combined with a first layer of PTFE and a PTF.
E has a three-layer structure of a second layer of P and a third layer of PFA,
The FE second layer is dried under a condition lower than the melting point of PTFE without sintering to improve the holding of the PFA third layer, and the PFA third layer is not a film interposition means but a PF.
Since the prepreg is formed by impregnation, drying and baking of the A dispersion, high-temperature and high-pressure pressing at the time of lamination is possible when the prepreg is applied to a laminate or a multilayer printed circuit board.

【0025】また、積層プレス時にはPTFEおよびP
FAの各融点より高温かつ高圧条件下で加圧すること
で、厚さ精度が高く、厚さのばらつきが小で、厚さ方向
の線膨張係数が小さく、また金属箔とプリプレグとの接
着力が強く、ハンダ耐熱性および熱衝撃の耐性が共に高
く、さらには薬液の浸込みがなく、低誘電率化を達成す
ることができる効果がある。
In addition, PTFE and P
By applying pressure under high temperature and higher temperature than the melting point of FA, the thickness accuracy is high, the thickness variation is small, the coefficient of linear expansion in the thickness direction is small, and the adhesive force between the metal foil and the prepreg is low. It is strong, has high solder heat resistance and high resistance to thermal shock, has no effect of infiltration of a chemical solution, and has the effect of achieving a low dielectric constant.

【0026】さらに上述のように高温高圧プレスにより
積層板、多層プリント回路基板を製造すると、層間のボ
イド(小孔)がなく、層間の接合が充分で、プリプレグ
それ自体の樹脂むらも生じないうえ、ハンダ接着時等の
金属箔の膨れ、層間クラック、層間剥離を防止すること
ができる効果がある。
Further, when a laminated board and a multilayer printed circuit board are manufactured by the high-temperature and high-pressure press as described above, there is no void (small hole) between the layers, sufficient bonding between the layers, and no resin unevenness of the prepreg itself. This has the effect of preventing swelling of the metal foil during solder bonding, interlayer cracking and interlayer delamination.

【0027】この発明の請求項6記載の発明によれば、
上記請求項4記載の製造方法で製造された多量の樹脂保
持量をもったプリプレグを内層板とし、この内層板の上
下に、PFAもしくはFEP等のフッ素樹脂フィルムま
たは上記請求項5の製造方法で製造されたプリプレグを
配置し、さらに最外層に金属箔を配置した後に、PTF
Eの融点より高温かつ高圧状態でプレス成型して多層プ
リント回路基板を製造するので、完成した多層プリント
回路基板においてガラスクロス基材とPTFE樹脂との
密着性が高く、かつ均一な物性値を有し、さらに吸水
率、寸法変化率、ハンダ耐熱性の諸特性に優れた多層プ
リント回路基板を得ることができる効果がある。
According to the invention described in claim 6 of the present invention,
A large amount of resin preservative produced by the production method according to claim 4.
A prepreg having a holding capacity is used as an inner layer plate, and a fluororesin film such as PFA or FEP or a prepreg manufactured by the manufacturing method according to claim 5 is arranged above and below the inner layer plate, and a metal foil is further formed on the outermost layer. After placing, PTF
Since the multilayer printed circuit board is manufactured by press molding at a temperature higher than the melting point of E and at a high pressure, the adhesiveness between the glass cloth base material and the PTFE resin is high and the uniform physical property values are obtained in the completed multilayer printed circuit board. In addition, there is an effect that a multilayer printed circuit board excellent in various characteristics of water absorption, dimensional change, and solder heat resistance can be obtained.

【0028】[0028]

【実施例】この発明の実施例を以下図面に基づいて詳述
する。 (第1実施例) 図1乃至図4は本発明の多層板用プリプレグおよび積層
板とその製造方法を示し、図1に示すように、平均粒径
0.2〜0.5μmのPTFE粒子1…を用いて、濃度
60%のPTFE樹脂ディスパージョンを構成し、図
1、図2に示す目付48g/ m2 のガラスクロス基材2に
上述のPTFE樹脂ディスパーションを含浸し、このP
TFE樹脂3の融点327℃に対して低温の305℃の
条件下で乾燥処理して、未焼結樹脂を上述のガラスクロ
ス基材2に保持させる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings. First Embodiment FIGS. 1 to 4 show a prepreg for a multilayer board and a laminated board according to the present invention and a method for manufacturing the same. As shown in FIG. 1, as shown in FIG. A PTFE resin dispersion having a concentration of 60% is formed using..., And the above-mentioned PTFE resin dispersion is impregnated into a glass cloth substrate 2 having a basis weight of 48 g / m 2 shown in FIGS.
Drying is performed under a condition of 305 ° C., which is lower than the melting point of 327 ° C. of the TFE resin 3, and the unsintered resin is held on the glass cloth substrate 2.

【0029】このような含浸および低温条件下での乾燥
処理を繰返して樹脂保持量が60〜96vol %の範囲
内、例えば76vol %のプリプレグ4(以下、説明の便
宜上、このプリプレグ4を第1プリプレグと称す)を形
成した。このようにして形成された第1プリプレグ4の
樹脂層の空隙率は3〜10vol %であった。
By repeating such impregnation and drying under low-temperature conditions, the prepreg 4 having a resin holding amount in the range of 60 to 96 vol%, for example, 76 vol% (hereinafter, for convenience of explanation, this prepreg 4 is used as the first prepreg 4 ). Leg). The porosity of the resin layer of the first prepreg 4 thus formed was 3 to 10 vol%.

【0030】次に図3に示すように上述のプリプレグ4
を複数層、例えば4層重ね合わせ、図4に示す如くこの
上下外層に金属箔としての厚さ約35μmの電解Cu箔
5,5を配置したものに対して、上記PTFE樹脂2の
融点327℃より高温の380℃の条件下で、かつ、面
圧50kgf/cm2 、加圧時間約60分の積層成形条件下で
積層成形して、積層板6を構成した。
Next, as shown in FIG.
Are laminated in a plurality of layers, for example, four layers, and as shown in FIG. 4, the melting point of the PTFE resin 2 is 327 ° C. The laminate 6 was formed by laminating under a higher temperature condition of 380 ° C., under a laminating condition of 50 kgf / cm 2 and a pressing time of about 60 minutes.

【0031】この第1実施例の第1プリプレグ4(図2
参照)および積層板6に対して諸特性を比較する目的
で、平均粒径が0.1〜0.5μmのPTFE粒子を用
い、他の全ての条件を第1実施例と同一に設定した比較
例1の積層板50(図5参照)と、平均粒径が0.3〜
0.7μmのPTFE粒子を用い、他の全ての条件を第
1実施例と同一に設定した比較例2の積層板60(図6
参照)とを製造し、プリプレグの空隙率、積層板の誘電
率、PCT(プレッシャクッカテスト)後の吸水率(wt
%)PCT後のハンダ耐熱性を測定比較した結果を次の
[表1]に示す。
The first prepreg 4 of the first embodiment (FIG. 2)
And PTFE particles having an average particle size of 0.1 to 0.5 μm, and all other conditions were set to be the same as those of the first example for the purpose of comparing various characteristics with the laminated plate 6. With the laminate 50 of Example 1 (see FIG. 5), the average particle size is 0.3 to
The laminated plate 60 of Comparative Example 2 (FIG. 6) in which 0.7 μm PTFE particles were used and all other conditions were set to be the same as in the first embodiment.
), The porosity of the prepreg, the dielectric constant of the laminate, and the water absorption after the PCT (pressure cooker test) (wt.
%) The results of measuring and comparing the solder heat resistance after PCT are shown in the following [Table 1].

【0032】[0032]

【表1】 [Table 1]

【0033】ここでPCT(プレッシャクッカテスト)
後の吸水率は121℃、1.8気圧の水中に30分間浸
した後の吸水率測定結果であり、PCT後のハンダ耐熱
性は260℃の溶融ハンダ槽に60秒間浸漬し、引上げ
後に表面を観察しながら白点を目視で数え、白点が0個
のものを優とし、白点が1〜5個のものを良とし、白点
が6〜10個のものを可とし、白点が11個以上または
膨れがあるものを不可とした。
Here, PCT (pressure cooker test)
The water absorption rate after the measurement is a result of measuring the water absorption rate after immersion in water at 121 ° C. and 1.8 atm for 30 minutes. The solder heat resistance after PCT is immersed in a molten solder bath at 260 ° C. for 60 seconds, and the surface is pulled up. While observing the white spots, the white spots were visually counted, those with zero white spots were regarded as excellent, those with 1 to 5 white spots as good, those with 6 to 10 white spots as acceptable, 11 or more or those with blisters were not allowed.

【0034】上述の[表1]から明らかなように上記第
1実施例のものは各比較例1,2比較して、吸水率およ
びハンダ耐熱性の何れにおいても良好な結果を得ること
ができた。特に比較例1のものではPTFEの平均粒径
が0.1〜0.5μm過度微少であるため、塊が発生
し、良好な分散が得られず空隙率が10〜15vol %と
所定範囲外になった。
As is clear from Table 1 above, the first embodiment can obtain better results in both water absorption and solder heat resistance as compared with Comparative Examples 1 and 2. Was. In particular, in the case of Comparative Example 1, since the average particle size of PTFE is excessively small in the range of 0.1 to 0.5 μm, lumps are generated, good dispersion cannot be obtained, and the porosity is 10 to 15 vol%, which is out of the predetermined range. Became.

【0035】(第2実施例) 図7は本発明の多層プリント回路基板およびその製造方
法を示し、第1実施例で得られた積層板6を内層板と
し、この内層板6の上下に厚さ25μmのPFAフィル
ム7,7を配置し、さらに上述のPFAフィルム7,7
上下には外層板8,8を配置し、PTFE樹脂2の融点
327℃より高温の350℃の条件下で、かつ面圧15
kgf/cm2 で10分間加熱加圧して、多層プリント回路基
板を製造した。ここで、上述の外層板8は図4に示す積
層板6から図7に示す内層板側の電解Cu箔5をエッチ
ング手段により除去したものである。
(Second Embodiment) FIG. 7 shows a multilayer printed circuit board and a method of manufacturing the same according to the present invention. The laminated plate 6 obtained in the first embodiment is used as an inner layer plate, and the thicknesses above and below this inner layer plate 6 are shown. The PFA films 7, 7 having a thickness of 25 μm are arranged, and the above-mentioned PFA films 7, 7 are further arranged.
The upper and lower outer plates 8, 8 are arranged at 350 ° C., which is higher than the melting point of 327 ° C. of the PTFE resin 2, and have a surface pressure of 15 ° C.
A multilayer printed circuit board was manufactured by heating and pressing at kgf / cm 2 for 10 minutes. Here, the above-mentioned outer layer plate 8 is obtained by removing the electrolytic Cu foil 5 on the inner layer plate side shown in FIG. 7 from the laminated plate 6 shown in FIG. 4 by etching means.

【0036】(第3実施例) 図8は本発明の多層プリント回路基板およびその製造方
法を示し、第1実施例で得られた積層板6を内層板と
し、この内層板6の上下両側に後述する第2プリプレグ
9をそれぞれ3枚づつ重ね、上下の最外層に厚さ18μ
mの電解Cu箔10,10を配置して積層し、PTFE
樹脂2の融点327℃より高温の350℃の条件下で、
かつ面圧15kgf/cm2 で10分間加熱加圧して、多層プ
リント回路基板を製造した。ここで、上述の第2プリプ
レグ9の構成および製造方法は次の通りである。
(Third Embodiment) FIG. 8 shows a multilayer printed circuit board and a method of manufacturing the same according to the present invention. The laminated plate 6 obtained in the first embodiment is used as an inner layer plate, The second prepregs 9 described later are stacked three by three, and the upper and lower outermost layers have a thickness of 18 μm.
m electrolytic Cu foils 10, 10 are arranged and laminated, and PTFE
Under the condition of 350 ° C. higher than the melting point of 327 ° C. of the resin 2,
Heating and pressurizing was performed at a surface pressure of 15 kgf / cm 2 for 10 minutes to produce a multilayer printed circuit board. Here, the configuration and manufacturing method of the above-described second prepreg 9 are as follows.

【0037】すなわち、図9に示す第1工程S1で、目
付48g/m 2 のガラス布基材11(図10参照)にPT
FEディスパージョンを含浸して乾燥させた後に、PT
FEの融点327℃より高温の380℃で焼成(焼結)
し、必要樹脂保持量としての樹脂含有率70vol %にな
るまで上述の含浸、乾燥および焼結を繰返してPTFE
第1層12を形成する。
That is, in the first step S1 shown in FIG. 9, PT is applied to the glass cloth base material 11 (see FIG. 10) having a basis weight of 48 g / m 2 .
After impregnated with FE dispersion and dried, PT
Baking (sintering) at 380 ° C, which is higher than the melting point of FE, 327 ° C
The above-mentioned impregnation, drying and sintering are repeated until the resin content of 70 vol% as the required resin holding amount is reached, and the PTFE is repeated.
The first layer 12 is formed.

【0038】次に図9に示す第2工程S2で、上述のP
TFE第1層12の上下両表面にPTFEディスパージ
ョンを含浸した後に、PTFEの融点327℃より低温
の305℃で乾燥させ、必要樹脂保持量としての樹脂含
有率76vol %になるまで上述の含浸および乾燥を繰返
してPTFE第2層13を形成する。
Next, in the second step S2 shown in FIG.
After the upper and lower surfaces of the TFE first layer 12 are impregnated with the PTFE dispersion, the PTFE is dried at 305 ° C., which is lower than the melting point of 327 ° C., until the resin content becomes 76 vol% as a required resin holding amount. The drying is repeated to form the PTFE second layer 13.

【0039】次に図9に示す第3工程S3で、上述のP
TFE第2層13,13の上下両表面にPFAディスパ
ージョンを含浸して乾燥させた後、このPFAの融点3
10℃および上述のPTFEの融点327℃より高温の
380℃で焼成(焼結)し、必要樹脂保持量としての樹
脂含有率80vol %になるまで上述の含浸、乾燥および
焼結を繰返してPFA第3層14を形成して、上述の第
2プリプレグ9を形成したものである。なお、図10以
外の他図においては図示の便宜上、PTFE第2層1
3,13の図示を省略している。この第2プリプレグ9
は接着のためのフィルム等を必要としないため、ハンド
リングが容易で、絶縁層の誘電率の変動がなく、加えて
接着層がコーティング層で形成されていて、樹脂に方向
性がないため、二次成型による寸法変化が小となる。
Next, in the third step S3 shown in FIG.
After the upper and lower surfaces of the TFE second layers 13 and 13 are impregnated with the PFA dispersion and dried, the melting point of PFA 3
It is fired (sintered) at 10 ° C. and 380 ° C., which is higher than the above-mentioned melting point of PTFE of 327 ° C., and the above-mentioned impregnation, drying and sintering are repeated until the resin content of 80 vol% as a required resin holding amount is reached. The third layer 14 is formed to form the second prepreg 9 described above. In the drawings other than FIG. 10, for convenience of illustration, the PTFE second layer 1 is used.
Illustration of 3 and 13 is omitted. This second prepreg 9
Does not require a film or the like for bonding, it is easy to handle, there is no change in the dielectric constant of the insulating layer, and in addition, the adhesive layer is formed of a coating layer and the resin has no directionality. Dimensional change due to subsequent molding is small.

【0040】(第4実施例) 図11は本発明の多層プリント回路基板およびその製造
方法を示し、第1実施例で得られた積層板6を内層板と
し、この内層板6の上下に上述の第2プリプレグ9を各
1枚配置し、これら第2プリプレグ9,9の上下には図
7と同一構成の外層板8,8を配置し、PTFE樹脂2
の融点327℃より高温の350℃の条件下で、かつ面
圧15kgf/cm2 で10分間加熱加圧して、多層プリント
回路基板を製造した。
(Fourth Embodiment) FIG. 11 shows a multilayer printed circuit board and a method of manufacturing the same according to the present invention. The laminated board 6 obtained in the first embodiment is used as an inner board, and The second prepregs 9 are arranged one by one, and outer layer plates 8, 8 having the same configuration as in FIG. 7 are arranged above and below the second prepregs 9, 9.
Under a condition of 350 ° C. higher than the melting point of 327 ° C. and a surface pressure of 15 kgf / cm 2 for 10 minutes to produce a multilayer printed circuit board.

【0041】(第5実施例) 図12は本発明の多層プリント回路基板およびその製造
方法を示し、第1実施例で得られた積層板6を内層板と
して用いる。一方、内側に1枚の第2プリプレグ9を、
外側に2枚の第1プリプレグ4,4を、最外層に厚さ1
8μmの電解Cu箔15をそれぞれ配置して、380
℃、15kgf/cm2 で60分間加熱加圧した後に、第2プ
リプレグ9側の電解Cu箔15のみをエッチング手段で
除去した外層板16を形成する。
(Fifth Embodiment) FIG. 12 shows a multilayer printed circuit board according to the present invention and a method of manufacturing the same. The laminated board 6 obtained in the first embodiment is used as an inner board. On the other hand, one second prepreg 9 inside,
Two first prepregs 4 and 4 on the outside, and a thickness of 1
8 μm electrolytic Cu foils 15 are arranged, and 380
After heating and pressing at 15 ° C. and 15 kgf / cm 2 for 60 minutes, an outer layer plate 16 is formed by removing only the electrolytic Cu foil 15 on the second prepreg 9 side by etching means.

【0042】そして、上述の内層板6に対して第2プリ
プレグ9側が対向するように、この内層板6の上下に外
層板16,16を配置して、PTFE樹脂2の融点32
7℃より高温の350℃の条件下で、かつ面圧15kgf/
cm2 で10分間加熱加圧して、多層プリント回路基板を
製造した。
Then, outer plates 16, 16 are arranged above and below the inner layer plate 6 so that the second prepreg 9 side faces the inner layer plate 6, and the melting point 32 of the PTFE resin 2 is reduced.
Under conditions of 350 ° C higher than 7 ° C and surface pressure of 15kgf /
The substrate was heated and pressed at 10 cm 2 for 10 minutes to produce a multilayer printed circuit board.

【0043】(比較例3) 図13は本発明の第2,第3,第4および第5実施例に
対して諸特性を比較するために製造された比較例を示
し、第1実施例で得られた積層板6を内層板として用い
る。一方、基材61にPTFE樹脂62を含浸させ、こ
のPTFE樹脂62の融点327℃よりも高温で加熱加
圧した焼成プリプレグ63を設ける。
Comparative Example 3 FIG. 13 shows a comparative example manufactured for comparing various characteristics with the second, third, fourth and fifth embodiments of the present invention. The obtained laminated plate 6 is used as an inner layer plate. On the other hand, a base material 61 is impregnated with a PTFE resin 62, and a fired prepreg 63 heated and pressed at a temperature higher than a melting point of 327 ° C. of the PTFE resin 62 is provided.

【0044】そして、上述の積層板6の上下に厚さ25
μmのPFAフィルム7、焼成プリプレグ63、PFA
フィルム7、焼成プリプレグ63、PFAフィルム7厚
さ18μmの電解Cu箔64をこの順に配置し、PTF
E樹脂の融点327℃より高温の350℃の条件下で、
かつ面圧15kgf/cm2 で10分間加熱加圧して、比較例
としての多層プリント回路基板を製造した。
A thickness of 25 is formed above and below the laminated plate 6.
μm PFA film 7, fired prepreg 63, PFA
A film 7, a fired prepreg 63, a PFA film 7 and an electrolytic Cu foil 64 having a thickness of 18 μm are arranged in this order, and PTF
Under the condition of 350 ° C. higher than the melting point of 327 ° C. of the E resin,
Further, heating and pressing were performed at a surface pressure of 15 kgf / cm 2 for 10 minutes to produce a multilayer printed circuit board as a comparative example.

【0045】(比較例4) 図14は本発明の第2,第3,第4および第5実施例に
対して諸特性を比較するために製造された比較例を示
し、第1実施例で得られた1枚の第1プリプレグ4の両
側にそれぞれ上述の第2プリプレグ9,9を配置し、最
外層に厚さ35μmの電解Cu箔71,71を配置し、
PTFE樹脂の融点327℃より高温の380℃の条件
下で、かつ面圧50kgf/cm2 で60分間加圧成形して積
層板を構成し、この積層板を内層板72とする。また第
1プリプレグ4の内層板72側の電解Cu箔をエッチン
グ手段で除去し、外層のみに電解Cu箔73を有する積
層板を構成し、この積層板を外層板74とする。
Comparative Example 4 FIG. 14 shows a comparative example manufactured to compare various characteristics with the second, third, fourth and fifth embodiments of the present invention. The above-mentioned second prepregs 9 and 9 are respectively arranged on both sides of the obtained one prepreg 4, and electrolytic Cu foils 71 and 71 having a thickness of 35 μm are arranged on the outermost layer.
A laminated plate is formed by pressure molding at a temperature of 380 ° C., which is higher than the melting point of PTFE of 327 ° C., and a surface pressure of 50 kgf / cm 2 for 60 minutes. Further, the electrolytic Cu foil on the inner layer plate 72 side of the first prepreg 4 is removed by etching means, and a laminated plate having the electrolytic Cu foil 73 only in the outer layer is formed.

【0046】そして上述の内層板72の上下に各1枚の
第2プリプレグ9を介して外層板74を配置しPTFE
樹脂の融点327℃より高温の350℃の条件下で、か
つ面圧15kgf/cm2 で10分間加熱加圧して、比較例と
しての多層プリント回路基板を製造した。
Then, an outer layer plate 74 is arranged above and below the inner layer plate 72 with one second prepreg 9 interposed therebetween to form a PTFE.
A multilayer printed circuit board as a comparative example was manufactured by heating and pressing under a condition of 350 ° C. higher than the melting point of the resin at 327 ° C. and a surface pressure of 15 kgf / cm 2 for 10 minutes.

【0047】上述の第2,第3、第4および第5実施例
と比較例3,4との多層プリント回路基板に対して吸水
率(wt%)、寸法変化率(%)、ハンダ耐熱性をそれぞ
れ測定比較した結果を、次の[表2]に示す。
The water absorption (wt%), the dimensional change (%), and the solder heat resistance of the multilayer printed circuit boards of the second, third, fourth and fifth embodiments and Comparative Examples 3 and 4 are described. Are shown in the following [Table 2].

【0048】[0048]

【表2】 [Table 2]

【0049】ここで、上述の吸水率、ハンダ耐熱性の測
定条件は前述と同様であり、寸法変化率については、内
層に書かれたマーク間の距離の変化率を測定したもので
ある。すなわち、タテ340×ヨコ340mmの板の四隅
間の距離を3次元測定器によって測定した結果を示す。
Here, the conditions for measuring the water absorption rate and the solder heat resistance are the same as those described above. The dimensional change rate is obtained by measuring the change rate of the distance between the marks written on the inner layer. That is, the result of measuring the distance between the four corners of a plate having a length of 340 × width 340 mm using a three-dimensional measuring device is shown.

【0050】上述の[表2]から明らかなように第2,
第3、第4および第5実施例のものは比較例3,4と比
較して、吸水率、寸法変化率、ハンダ耐熱性の総合的な
諸特性が優れていることが明白である。特に比較例3の
ものではハンダ耐熱性が不可であり、比較例4のもので
は寸法変化率が大となった。また比較例4のものは内層
板72の電解Cu箔71の直下にPFAの層を有するた
め、PFAの融点310℃以上の350℃でプレスされ
る時、電解Cu箔71にて形成された回路パターンがず
れ、スイミング現象が生じた。
As is clear from Table 2 above,
It is apparent that the third, fourth and fifth examples are superior to the comparative examples 3 and 4 in the overall properties of water absorption, dimensional change and solder heat resistance. In particular, in the case of Comparative Example 3, solder heat resistance was not possible, and in the case of Comparative Example 4, the dimensional change rate was large. In addition, the circuit of Comparative Example 4 has a PFA layer immediately below the electrolytic Cu foil 71 of the inner layer plate 72, so that the circuit formed by the electrolytic Cu foil 71 when pressed at 350 ° C. with a melting point of 310 ° C. or more of PFA is used. The pattern shifted and a swimming phenomenon occurred.

【0051】以上要するに、この発明の請求項1記載の
発明によれば、ガラスクロス等の基材2にプリプレグ全
体の60〜96vol %の割合で含浸保持させる未焼結の
PTFE樹脂3の空隙率を3〜10vol %としたので、
PTFE樹脂3がその溶融温度においてゲル化した状態
での移動距離を可及的小とすることができ、このためプ
レス成型時の加熱加圧状態を短時間に押えることができ
ると共に、PTFEが溶融する最低温度付近(つまり低
温加熱状態)でも基材2の隙間や初期のPTFE粒子1
間の隙間にPTFEゲルを侵入させることができる。
In short, according to the first aspect of the present invention, the entire prepreg is applied to the substrate 2 such as a glass cloth.
Since the porosity of the unsintered PTFE resin 3 to be impregnated and held at a rate of 60 to 96 vol% of the body was set to 3 to 10 vol%,
The moving distance in a state where the PTFE resin 3 is gelled at the melting temperature can be made as small as possible, so that the heating and pressurizing state at the time of press molding can be suppressed in a short time and the PTFE can be melted. Even when the temperature is near the lowest temperature (that is, in the low-temperature heating state), the gap between the
The PTFE gel can penetrate into the gaps between them.

【0052】このように上述の空隙率の設定によりPT
FE樹脂2がその溶融温度においてゲル化した状態での
移動距離を可及的小とすることで、低温低圧状態でのプ
レス成型においても従来品と同等の寸法精度が確保で
き、積層板や多層プリント回路基板に適用した場合の配
線回路のズレがなく、加えて、該多層板用プリプレグ4
を用いて多層プリント回路基板を構成する際、高温高圧
状態でプレス成型を行なうことにより、基材2との密着
性が高く、かつ均一な物性値の多層プリント回路基板を
得ることができる効果がある。
As described above, by setting the above porosity, PT
By minimizing the movement distance of the FE resin 2 in the gelled state at its melting temperature, the same dimensional accuracy as that of the conventional product can be ensured even in press molding under low-temperature and low-pressure conditions. There is no deviation of the wiring circuit when applied to a printed circuit board.
When a multi-layer printed circuit board is formed by using, by performing press molding in a high temperature and high pressure state, it is possible to obtain a multi-layer printed circuit board having high adhesion to the base material 2 and uniform physical property values. is there.

【0053】因に上述の空隙率が10vol %を超える場
合には、ゲル化したPTFEの移動距離が大となり、基
板の製造時において空隙部分を完全になくすることが困
難となって、均一な物性値を有する基板の製造が不可能
となり、逆に上述の空隙率が3vol %未満の場合にはP
TFE粒子同志が過度に密着し、PTFEディスパージ
ョンに配合される表面活性剤等の分散剤を、乾燥行程で
その深部においても充分に抜き取ることが困難となり、
この分散剤は300℃を超えるプレス条件下において直
ちに炭化して、基板が炭素分を豊富に含有する状態とな
り、絶縁抵抗の低下を招来し、絶縁板として必要不可欠
な抵抗値の確保が不能となるのみならず、誘電率も上昇
し、高周波回路基板として適用不能となる。
If the above porosity exceeds 10 vol%, the moving distance of the gelled PTFE becomes large, making it difficult to completely eliminate the void portion during the production of the substrate. It becomes impossible to manufacture a substrate having physical properties. Conversely, if the porosity is less than 3 vol%, P
The TFE particles are excessively adhered to each other, and it is difficult to sufficiently remove a dispersant such as a surfactant incorporated in the PTFE dispersion even in a deep part in a drying process.
This dispersant is immediately carbonized under pressing conditions exceeding 300 ° C., and the substrate becomes rich in carbon content, leading to a decrease in insulation resistance, making it impossible to secure an indispensable resistance value as an insulating plate. Not only that, the dielectric constant also increases, making it unusable as a high-frequency circuit board.

【0054】この発明の請求項2記載の発明によれば、
上記請求項1記載の少なくとも1層の第1プリプレグ4
(上記各実施例ではそれぞれ3層構造)の片面もしくは
両面に金属箔(電解Cu箔5参照)を配置して積層板6
を構成したので、低い誘電率を確保するために、上述の
ような多量の未焼結のPTFE樹脂含浸保持させるにも
かかわらず、同樹脂の効果により金属箔の良好な接着性
を確保することができる効果があり、回路基板として適
切な絶縁抵抗や一様な誘電特性を確保することができ
According to the second aspect of the present invention,
2. The at least one layer of the first prepreg according to claim 1.
A metal foil (see electrolytic Cu foil 5) is disposed on one or both sides of each of
As described above, in order to secure a low dielectric constant ,
For holding such a large amount of unsintered PTFE resin
Regardless, Ri effect there can be secured a good adhesion of the metal foil by the effect of the resin, suitable as a circuit board
High insulation resistance and uniform dielectric properties
You .

【0055】この発明の請求項3記載の発明によれば、
上記請求項2記載の積層板6すなわち金属箔直下に位置
する樹脂層がPTFEのみの上記積層板を内層板として
用いて多層プリント回路基板を構成するので、二次成型
中(プレス時)の配線回路のスイミング現象(移動)を
防止することができると共に、上述の[表2]からも明
らかなように、完成した多層プリント回路基板の寸法変
化の低減を図って精度の高い多層プリント回路基板を得
ることができる効果がある。
According to the third aspect of the present invention,
The multilayer board according to claim 2, that is, the resin layer located immediately below the metal foil constitutes a multilayer printed circuit board by using the above-described laminate of only PTFE as an inner layer board, so that wiring during secondary molding (during pressing) is performed. A swimming phenomenon (movement) of the circuit can be prevented, and as is clear from the above-mentioned [Table 2], a dimensional change of the completed multilayer printed circuit board is reduced to achieve a highly accurate multilayer printed circuit board. There is an effect that can be obtained .

【0056】この発明の請求項4記載の発明によれば、
上記請求項1記載の第1プリプレグ4の製造に際して、
ガラスクロス等の基材2に平均粒径0.2〜0.5μm
のPTFE粒子を用いて構成したPTFE樹脂ディスパ
ージョンを含浸し、このPTFE樹脂3の融点327℃
に対して低温条件下で乾燥処理し、上記含浸および乾燥
を繰返して60〜96vol %の樹脂保持量とする方法で
あるから、空隙率を3〜10vol %に留めることができ
て、この第1プリプレグ4を積層板、多層プリント回路
基板に適用した場合には、厚さ精度が高く、厚さ方向の
線膨張係数が小さく、かつハンダ耐熱性に優れると共
に、異物混入が少なく、さらにはマッドクラックが仮り
に生じても次の含浸時に該マッドクラックを埋めること
ができ、クラックの影響をなくすことができて、樹脂保
持量が60〜96vol %と多く、低誘電率化を達成する
ことができる効果がある。また、第1プリプレグ4の製
造工程に焼結工程を有さないので、基材2の波打ち状の
変形もありえない。
According to the invention described in claim 4 of the present invention,
In producing the first prepreg 4 according to claim 1,
Substrate 2 such as glass cloth has an average particle size of 0.2 to 0.5 μm
Impregnated with a PTFE resin dispersion composed of the PTFE particles described above, and the melting point of the PTFE resin 3 is 327 ° C.
In this method, the resin is dried under a low temperature condition, and the above impregnation and drying are repeated to obtain a resin holding amount of 60 to 96 vol%, so that the porosity can be kept at 3 to 10 vol%.
When the first prepreg 4 is applied to a laminated board or a multilayer printed circuit board, the thickness accuracy is high, the linear expansion coefficient in the thickness direction is small, the solder heat resistance is excellent, and the foreign matter is less mixed. Further, even if a mud crack is generated, the mud crack can be filled in the next impregnation, the influence of the crack can be eliminated, the resin holding amount is as large as 60 to 96 vol%, and the dielectric constant can be reduced. There are effects that can be achieved. Further, since the manufacturing process of the first prepreg 4 does not include the sintering process, the substrate 2 cannot be deformed in a wavy shape.

【0057】この発明の請求項5記載の発明によれば、
上述の内層板6の上下に配置される第2プリプレグ9の
製造に際して、この第2プリプレグ9をPTFEの第1
層12と、PTFEの第2層13と、PFAの第3層1
4との3層構造にし、PTFE第2層13は焼結するこ
となくPTFEの融点より低温条件下で乾燥処理して、
PFA第3層14の保持を良好とし、かつPFA第3層
14はフィルム介設手段ではなくPFAディスパージョ
ンの含浸、乾燥、焼成により形成するので、この第2プ
リプレグ9を積層板、多層プリント回路基板に適用する
場合に、積層時の高温高圧プレスが可能となる。
According to the fifth aspect of the present invention,
When manufacturing the second prepreg 9 disposed above and below the inner layer plate 6, the second prepreg 9 is replaced with the first PTFE
Layer 12, a second layer 13 of PTFE, and a third layer 1 of PFA
4, the PTFE second layer 13 is dried without being sintered at a temperature lower than the melting point of PTFE,
Since the holding of the PFA third layer 14 is good and the PFA third layer 14 is formed by impregnation, drying, and baking of the PFA dispersion instead of the film interposing means, the second prepreg 9 is used as a laminate, a multilayer printed circuit. When applied to a substrate, high-temperature and high-pressure pressing during lamination is possible.

【0058】また、積層プレス時にはPTFEおよびP
FAの各融点より高温かつ高圧条件下で加圧すること
で、厚さ精度が高く、厚さのばらつきが小で、厚さ方向
の線膨張係数が小さく、また金属箔(電解Cu箔参照)
と第2プリプレグ9との接着力が強く、ハンダ耐熱性お
よび熱衝撃の耐性が共に高く、さらには薬液の浸込みが
なく、低誘電率化を達成することができる効果がある。
In addition, PTFE and P
Pressing under the conditions of higher temperature and higher pressure than the melting point of FA provides high thickness accuracy, small thickness variation, small coefficient of linear expansion in the thickness direction, and metal foil (see electrolytic Cu foil)
And the second prepreg 9 have a strong adhesive force, high solder heat resistance and high resistance to thermal shock, and further have no effect of infiltration of a chemical solution and have an effect of achieving a low dielectric constant.

【0059】さらに上述のように高温高圧プレスにより
積層板、多層プリント回路基板を製造すると、層間のボ
イド(小孔)がなく、層間の接合が充分で、第2プリプ
レグ9それ自体の樹脂むらも生じないうえ、ハンダ接着
時等の金属箔の膨れ、層間クラック、層間剥離を防止す
ることができる効果がある。
Further, when the laminated board and the multilayer printed circuit board are manufactured by the high-temperature and high-pressure press as described above, there are no voids (small holes) between the layers, the bonding between the layers is sufficient, and the resin unevenness of the second prepreg 9 itself is also reduced. In addition to this, there is an effect that swelling of the metal foil, cracks between layers, and delamination between the layers at the time of solder bonding or the like can be prevented.

【0060】この発明の請求項6記載の発明によれば、
上記請求項4記載の製造方法で製造された多量の樹脂保
持量(60〜96vol %)をもった第1プリプレグ4を
内層板6とし、この内層板6の上下に、PFAもしくは
FEP等のフッ素樹脂フィルム7または上記請求項5の
製造方法で製造された第2プリプレグ9を配置し、さら
に最外層に金属箔を配置した後に、PTFEの融点より
高温かつ高圧状態でプレス成型して多層プリント回路基
板を製造するので、完成した多層プリント回路基板にお
いてガラスクロス基材とPTFE樹脂との密着性が高
く、かつ均一な物性値を有し、さらに吸水率、寸法変化
率、ハンダ耐熱性の諸特性に優れた多層プリント回路基
板を得ることができる効果がある。
According to the invention of claim 6 of the present invention,
A large amount of resin preservative produced by the production method according to claim 4.
The first prepreg 4 having a holding capacity (60 to 96 vol%) is used as an inner layer plate 6, and a fluororesin film 7 such as PFA or FEP is formed on the upper and lower sides of the inner layer plate 6 or the manufacturing method according to claim 5 above. After arranging the second prepreg 9 and further arranging the metal foil on the outermost layer, the multi-layer printed circuit board is manufactured by press molding at a temperature higher than the melting point of PTFE and at a high pressure. There is an effect that a multilayer printed circuit board having high adhesion between the base material and the PTFE resin, having uniform physical property values, and further having excellent properties of water absorption, dimensional change, and solder heat resistance can be obtained. .

【図面の簡単な説明】[Brief description of the drawings]

【図1】ガラスクロス基材とPTFE粒子の関係を示す
説明図。
FIG. 1 is an explanatory diagram showing a relationship between a glass cloth substrate and PTFE particles.

【図2】本発明の多層板用プリプレグの単層構造を示す
断面図。
FIG. 2 is a sectional view showing a single-layer structure of a prepreg for a multilayer board of the present invention.

【図3】本発明の多層板用プリプレグの3層構造を示す
断面図。
FIG. 3 is a sectional view showing a three-layer structure of a prepreg for a multilayer board of the present invention.

【図4】本発明の積層板を示す断面図。FIG. 4 is a cross-sectional view showing a laminate of the present invention.

【図5】比較例1の積層板を示す断面図。FIG. 5 is a cross-sectional view showing a laminate of Comparative Example 1.

【図6】比較例2の積層板を示す断面図。FIG. 6 is a cross-sectional view showing a laminate of Comparative Example 2.

【図7】本発明の多層プリント回路基板を示す分解断面
図。
FIG. 7 is an exploded sectional view showing the multilayer printed circuit board of the present invention.

【図8】本発明の多層プリント回路基板の他の実施例を
示す分解断面図。
FIG. 8 is an exploded sectional view showing another embodiment of the multilayer printed circuit board of the present invention.

【図9】第2プリプレグの製造方法を示す工程図。FIG. 9 is a process chart showing a method for producing a second prepreg.

【図10】第2プリプレグの断面図。FIG. 10 is a sectional view of a second prepreg.

【図11】本発明の多層プリント回路基板のさらに他の
実施例を示す分解断面図。
FIG. 11 is an exploded sectional view showing still another embodiment of the multilayer printed circuit board of the present invention.

【図12】本発明の多層プリント回路基板のさらに他の
実施例を示す分解断面図。
FIG. 12 is an exploded sectional view showing still another embodiment of the multilayer printed circuit board of the present invention.

【図13】比較例3の多層プリント回路基板を示す分解
断面図。
FIG. 13 is an exploded cross-sectional view illustrating a multilayer printed circuit board of Comparative Example 3.

【図14】比較例4の多層プリント回路基板を示す分解
断面図。
FIG. 14 is an exploded cross-sectional view illustrating a multilayer printed circuit board of Comparative Example 4.

【符号の説明】[Explanation of symbols]

2…ガラスクロス基材 3…PTFE
樹脂 4…第1プリプレグ 5…電解Cu
箔 6…積層板(内層板) 7…PFAフ
ィルム 9…第2プリプレグ 10,15…
電解Cu箔 11…基材 12…PTF
E第1層 13…PTFE第2層 14…PTF
E第3層
2 ... Glass cloth base material 3 ... PTFE
Resin 4: First prepreg 5: Electrolytic Cu
Foil 6 Laminated plate (inner layer plate) 7 PFA film 9 Second prepreg 10, 15
Electrolytic Cu foil 11: Base material 12: PTF
E first layer 13: PTFE second layer 14: PTF
E third layer

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H05K 3/46 H05K 3/46 T ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 6 Identification code Agency reference number FI Technical display location H05K 3/46 H05K 3/46 T

Claims (6)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】ガラスクロス等の基材に未焼結のPTFE
樹脂をプリプレグ全体の60〜96vol %含浸保持さ
せ、 上記PTFE樹脂の空隙率を3〜10vol %とした多層
板用プリプレグ。
An unsintered PTFE is applied to a substrate such as a glass cloth.
A prepreg for a multilayer board in which a resin is impregnated and held at 60 to 96 vol% of the entire prepreg, and the porosity of the PTFE resin is 3 to 10 vol%.
【請求項2】上記請求項1記載の少なくとも1層の多層
板用プリプレグの片面もしくは両面に金属箔を配置した
積層板。
2. A laminate in which a metal foil is disposed on one or both sides of the prepreg for a multilayer board of at least one layer according to claim 1.
【請求項3】上記請求項2記載の積層板を内層板とし、 上記内層板の上下に、PFAもしくはFEP等のフッ素
樹脂フィルム、または、基材にPTFE樹脂を含浸保持
させその両外層にPFAもしくはFEPが含浸保持され
たプリプレグを配置し、 最外層に金属箔が配置された多層プリント回路基板。
3. A laminate according to claim 2, wherein the laminate is an inner plate, and a fluororesin film such as PFA or FEP, or a PTFE resin is impregnated and held on a base material on the upper and lower sides of the inner plate, and PFA is formed on both outer layers. Alternatively, a multi-layer printed circuit board in which a prepreg impregnated with FEP is disposed and a metal foil is disposed on the outermost layer.
【請求項4】上記請求項1記載の多層板用プリプレグの
製造方法であって、 ガラスクロス等の基材に平均粒径0.2〜0.5μmの
PTFE粒子を用いて構成したPTFE樹脂ディスパー
ジョンを含浸し、上記PTFE樹脂の融点に対して低温
条件下で乾燥処理し、上記含浸および乾燥を繰返して6
0〜96vol %の樹脂保持量とする多層板用プリプレグ
の製造方法。
4. The method for producing a prepreg for a multilayer board according to claim 1, wherein the base material such as glass cloth has an average particle size of 0.2 to 0.5 μm.
Impregnated with a PTFE resin dispersion composed of PTFE particles , dried under a low-temperature condition with respect to the melting point of the PTFE resin, and the above-described impregnation and drying were repeated.
A method for producing a prepreg for a multilayer board having a resin holding amount of 0 to 96 vol%.
【請求項5】上記請求項3記載のプリプレグの製造方法
であって、 基材にPTFEディスパージョンを含浸して乾燥させた
後、PTFEの融点より高温条件下で焼成し、上記含
浸、乾燥および焼成を繰返して必要樹脂保持量の第1層
を形成する第1工程と、 上記第1層の表面にPTFEディスパージョンを含浸し
た後、PTFEの融点より低温条件下で乾燥させ、上記
含浸および乾燥を繰返して必要樹脂保持量の第2層を形
成する第2工程と、 上記第2層の表面にPFAディスパージョンを含浸して
乾燥させた後、該PFAおよび上記PTFEの融点より
高温条件下で焼成し、上記含浸、乾燥および焼成を繰返
して必要樹脂保持量の第3層を形成すると共に、プリプ
レグを形成する第3工程とを備えたプリプレグの製造方
法。
5. The method for producing a prepreg according to claim 3, wherein the substrate is impregnated with a PTFE dispersion and dried, and then calcined under a condition higher than the melting point of PTFE. A first step of forming a first layer having a required resin holding amount by repeating baking; and impregnating the surface of the first layer with a PTFE dispersion, followed by drying at a temperature lower than the melting point of the PTFE, and performing the impregnation and drying. A second step of forming a second layer having a required resin holding amount by repeating the above, and after impregnating the surface of the second layer with a PFA dispersion and drying, under a condition higher than the melting points of the PFA and the PTFE, Baking, repeating the above-described impregnation, drying and baking to form a third layer having a required resin holding amount, and a third step of forming a prepreg.
【請求項6】上記請求項4記載の製造方法で製造された
プリプレグを内層板とし、 この内層板の上下に、PFAもしくはFEP等のフッ素
樹脂フィルムまたは上記請求項5の製造方法で製造され
たプリプレグを配置し、さらに最外層に金属箔を配置し
た後に、PTFEの融点より高温かつ高圧状態でプレス
成型することを特徴とする多層プリント回路基板の製造
方法。
6. A prepreg manufactured by the manufacturing method according to claim 4 is used as an inner layer plate, and a fluororesin film such as PFA or FEP or a manufacturing method according to claim 5 is formed above and below the inner layer plate. A method for manufacturing a multilayer printed circuit board, comprising: arranging a prepreg, further arranging a metal foil on the outermost layer, and press-molding the prepreg at a temperature higher than the melting point of PTFE and at a high pressure.
JP6143848A 1994-06-01 1994-06-01 Prepreg for multilayer board, laminated board, multilayer printed circuit board and method of manufacturing the same Expired - Fee Related JP2614190B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6143848A JP2614190B2 (en) 1994-06-01 1994-06-01 Prepreg for multilayer board, laminated board, multilayer printed circuit board and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6143848A JP2614190B2 (en) 1994-06-01 1994-06-01 Prepreg for multilayer board, laminated board, multilayer printed circuit board and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH07323501A JPH07323501A (en) 1995-12-12
JP2614190B2 true JP2614190B2 (en) 1997-05-28

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ID=15348370

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Country Status (1)

Country Link
JP (1) JP2614190B2 (en)

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