JP2601151B2 - Frame data multiplexing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplexing system for transmitting data between a host device and a plurality of terminal devices by using an HDLC procedure frame, and more particularly, to a method for transmitting frame data of a plurality of terminal devices using one transmission line. And a data frame multiplexing method for multiplex transmission.

[0002]

2. Description of the Related Art In a conventional frame data multiplexing method, a frame termination is performed by terminating HDLC information of a plurality of terminal devices by processing such as flag addition / deletion, 0 insertion / deletion, and FCS inspection / attachment for each terminal device line. A circuit for multiplexing frames at a data link level by replacing frame address information, which is head information of a frame, with frame address information to which a terminal device line number is added, and a terminal device and a host device at a network level. In this method, a logical connection is set between packets, and packets are multiplexed.

Japanese Patent Laid-Open Publication No. 3-70221 discloses a broadband TDMA (Time Division Multiplexing System) system for land mobile communication, which selects a branch having the maximum level from baseband signals received by a plurality of branches. The AGC gains of a plurality of branches are determined based on the level of the selected branch, and a frame synchronization resistant to fading is performed.

However, there is no disclosure of a technique for transmitting and receiving data by connecting a host device and a plurality of terminal devices via a single transmission line.

[0005]

However, since the conventional frame data multiplexing method requires a frame termination circuit for each terminal line, (A) if the number of terminal devices accommodated in the frame multiplexing device increases, (B) software for performing frame address information replacement processing in the case of a multiplexing method at the data link level and packet multiplexing protocol processing in the case of a multiplexing method at the network level; There is a problem that the load increases.

The present invention solves such a problem. A frame data multiplexing apparatus detects the end of a frame and transmits the frame data to a single transmission line before transmitting the frame data.
An object of the present invention is to enable transmission with a host device through a single transmission line by transmitting line identification fixed data.

[0007]

A frame data multiplexing system according to the present invention is provided with a frame data multiplexing device connected to a plurality of terminal devices via terminal device lines and connected to a host device via a single transmission line. This frame data multiplexing device has a function of detecting a flag for identifying the presence or absence of an HDLC frame for each terminal device line, and temporarily stores frame data extracted by detection of the flag for each terminal device line in a frame buffer memory. It has a function of storing in a circuit, and a function of transmitting line identification fixed frame data including a line identification address corresponding to the frame data before transmitting the frame data when detecting the end of the frame. is there. Also, frame data
Multiplexers are connected to a plurality of terminal
Time division multiplexing to connect to a host device via a single transmission path.
A heavy separation circuit and a microprogram
A frame that performs frame data processing that multiplexes frames
Digital signal processor and the
Frame buffer memory for temporarily storing frame data
And a circuit.

[0008]

According to the present invention, the cost of a transmission line between a host device and a plurality of terminal devices can be reduced, and hardware can be economically constructed without imposing a load on software.

[0009]

FIG. 1 is a block diagram showing an embodiment of a frame data multiplexing method according to the present invention. In the figure, 1
Reference numerals a, 1b, to 1n denote terminal devices, respectively. As an example, the terminal devices 1a and 1b output frame data 3a and 3b to terminal device lines 2a and 2b, respectively.

Reference numeral 4 denotes a time division multiplexing / demultiplexing circuit. The time division multiplexing / demultiplexing circuit 4 includes a plurality of terminal device lines 2a, 2b,
２2n is converted into one highway interface.
Reference numeral 5 denotes a digital signal processor, which performs frame data processing for multiplexing frames of a plurality of terminal devices 1a, 1b,...

Reference numeral 6 denotes a frame buffer memory circuit,
This frame buffer memory circuit 6 is connected to the terminal device line 2a.
２2n are temporarily stored. Reference numeral 7 denotes a frame data multiplexing device. The frame data multiplexing device 7 comprises the above-described time division multiplexing / demultiplexing circuit 4, digital signal processor 5, and frame buffer memory circuit 6, and includes line identification fixed frame data 8a and frame data 9a. , Line identification fixed frame data 8
b and the frame data 9b in this order.

Reference numeral 10 denotes one transmission line, and 11 denotes a host device. The host device 11 is connected to the frame data multiplexing device 7 by the one transmission line 10, and a plurality of terminal devices 1a, 1b,. Data communication is performed between 1n using the HDLC procedure frame.

Next, with respect to the operation of the frame data multiplexing system having the above configuration, for example, the frame data 3a of the terminal device 1a and the frame data 3b of the terminal device 1b are multiplexed by the frame data multiplexing device 7, and
The operation of transmitting data to the host device 11 via the.

First, the terminal device 1a and the terminal device 1b
Output the frame data 3a and 3b to the time division demultiplexing circuit 4 of the frame data multiplexer 7.
Therefore, the digital signal processor 5 controls the time division multiplexing / demultiplexing circuit 4 by the periodic program processing, and the frame data 3a and 3b input on the time division highway
Flag is detected to identify the presence or absence of

When the start of the frame is detected, 0 is deleted or the FC
The S test is not performed, and the data is successively stored in an area of the frame buffer memory circuit 6 which is allocated to each terminal device line.

When the digital signal processor 5 detects the end of the frame, the digital signal processor 5 sends out the line identification fixed frame data 8a including the line identification address assigned to each terminal device line, and then sends the frame buffer memory circuit 6 Frame data 9 stored in
a to the transmission line 10. Then, similarly, the line identification fixed data 10b and the frame data 11b are transmitted to the transmission line 10.

As described above, the transmission of the frame sent to the host device 11 is performed in the order of the frames in which the digital signal processor 5 detects the end of the frame. And
The host device 11 can recognize from the transmitted line identification fixed frame data 8a that the frame data 9a is the frame data of the terminal device 1a.

Similarly, the line identification fixed frame data 8b
Thus, it can be recognized that the frame data 9b is the frame data of the terminal device 1b. When transmitting frame data of each of the terminal devices 1a, 1b, to 1n from the host device 11, similarly, after transmitting the line identification fixed frame data, the frame data is transmitted.

For this reason, the digital signal processor 5 temporarily stores the data in the frame buffer memory circuit 6 for each terminal device line, separates the frames, and stores each terminal device 1
a, 1b,... 1n.

[0020]

As described in detail above, according to the frame data multiplexing method of the present invention, a plurality of terminal devices are connected to each other via a terminal device line, and connected to a host device via a single transmission line. Since the frame data multiplexing device is provided, the transmission path cost between the host device and the terminal device can be reduced. Moreover, the HDLC on the host device side
Since the number of termination circuits can be reduced, economical hardware
There is an effect that the software can be constructed without putting a load on the software.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a frame data multiplexing method according to the present invention.

[Explanation of symbols]

 1a, 1b, ~ 1n Terminal device 4 Time division multiplexing / demultiplexing circuit 5 Digital signal processor 6 Frame buffer memory circuit 7 Frame data multiplexing device 10 One transmission line 11 Host device

Claims (2)

(57) [Claims] An HD between a host device and a plurality of terminal devices.
In a frame data multiplexing method for performing data transmission by an LC procedure frame, each of the plurality of terminal devices is connected to a terminal device line,
A frame data multiplexing device connected to the host device through a single transmission line; the frame data multiplexing device has a function of detecting a flag for identifying the presence or absence of an HDLC frame for each terminal device line; And a function for temporarily storing the extracted frame data in a frame buffer memory circuit for each terminal device line, and for detecting a line end corresponding to the frame data before transmitting the frame data when detecting the end of the frame. A function of transmitting line identification fixed frame data including an address. 2. The apparatus according to claim 1, wherein said frame data multiplexing device is provided to a plurality of terminal devices.
Each is connected by a terminal device line, and one transmission line is connected to the host device.
Time division demultiplexing circuit connected by
Frame data that multiplexes the frames of each terminal device
Digital signal processor for data processing and terminal
Frame that temporarily stores frame data for each device line
A frame buffer memory circuit.
Frame data multiplexing method.