JP2698507B2 - AFC circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a A FC circuit for correcting the frequency offset of the local carrier in the quasi-synchronous detection circuit applied directly to spread spectrum (DS / SS) communication receiver.

[0002]

2. Description of the Related Art In recent years, in the field of mobile communication, a code division multiple access (CDMA) system using direct spread spectrum spread (DS / SS) communication has attracted attention. And
In mobile communication, facing is inevitably caused by the traveling of the mobile body. Therefore, DS /
When applying SS communication, from performing carrier recovery at a receiver, who performs quasi same dangerous wave it is considered to signal processing is facilitated.

[0003] When performing quasi-synchronous detection on DS / SS signal, the frequency offset is present in the local carrier, the signal energy of the despread is reduced, degradation in bit erroneous <br/> Ri rate characteristics Occurs. Therefore, an AFC circuit that eliminates the influence of the frequency offset by controlling the frequency of the local carrier is required.

Here, a schematic configuration of a DS / SS communication receiver that performs quasi-synchronous detection will be described with reference to FIG. The received SS signal is divided into two frequency mixers 10a, 10
b, where it is mixed with the local carrier supplied from the local oscillator 12. Since a π / 2 phase shifter is provided in the local carrier wave introduction path to the frequency mixer 10b, the π / 2 phase shifter is input to the two frequency mixers 10a and 10b.
Local carriers are orthogonal (ie, have a phase difference of π / 2).
) . The oscillation frequency of the local oscillator 12 is
It is set to the carrier frequency of the received SS signal .

[0005] image frequency component output of the frequency mixer 10a, 10 b is a low-pass filter 16a, the 16b
Is removed to leave only the baseband component, and the A / D
If the signal is a digital signal by the converters 18a and 18b,
The real and imaginary parts of the complex baseband signal
You. This complex baseband signal is output by the complex correlator 20.
PN signal used for spread spectrum at the transmitting station
Is performed to obtain a complex correlation signal. Performs demodulation processing corresponding to primary modulation scheme for this complex correlation signal
Thereby , demodulated data is obtained.

The influence of the frequency offset of the local carrier in a DS / SS communication receiver that performs such quasi-synchronous detection will be described. Here, the primary modulation in this communication uses BPSK (actually, QPS
K etc. are also used). In addition, P used for spectrum spreading
The repetition period of the N signal is M chips, the chip period is _Tc, and the value of the m (m = 1,..., M) th PN signal is u
_m (composed of -1 or 1). Furthermore, the symbol period of the data (i.e., repetition period of the PN signal) as a T _d (= MT _c), (n is an integer) times nT _d (composed of -1 or 1) the value of the transmission data in a _n And the frequency of the transmission carrier is ω _c .

[0007] In such conditions, the receiver, the time _{nT d + mT c, a n} u m cos [ω c (nT d + m
T _c )]. This reception S
The S signal is quasi-synchronously detected by the frequency mixers 10a and 10b and the low-pass filters 16a and 16b, and the A / D converter 1
A / D conversion is performed in 8a and 18b to obtain a complex baseband signal. For simplicity, the A / D converter 18a,
The sampling period of 18b is assumed to be equal to the chip period _Tc, and there is no quantization error.

[0008] Here, the angular frequency of the local carrier used in the quasi-synchronous detection, frequency by Δω is assumed to have been offset with respect to the angular frequency omega _c of the transmitted carrier. It is also assumed that the initial phase is φ. Under this condition, time nT
The value r _{nM + m} complex baseband signals at _{d + mT c = (nM +} m) T c is given by the following equation.

[0009] _{r nM + m = a n u} m exp [-j {Δω (nM + m) T c + φ}] (1-1) When you enter the complex baseband signal to the complex correlator 20, a complex base A complex correlation signal that is a correlation coefficient between the band signal and the PN signal is obtained. The value c _n of this complex correlation signal
Corresponds to the transmission data a _n, is expressed by the following equation.

[0010] _{M c n = Σ u m r} nM + m m = 1 = a n exp [-j {Δω (nM + 1) T c + φ}] {1- exp [-jΔωM T c]} / { _{1- exp [-jΔωT c]} =} a n exp [-j {Δω [(2n + 1) M + 1] T c / 2 + φ}] sin [ΔωM T c / 2] / sin [ΔωT c / 2] (1-2) From this, the amount of phase rotation of the complex correlation signal caused by the frequency offset Δω becomes Δω within one symbol (during _Td ).
It can be seen that MT _c (= ΔωT _d ).

Here, when there is no frequency offset (ie, Δω = 0), the value c _n0 of the complex correlation signal is c _n0 = a _n M exp [−jφ] (1-3). Therefore, due to the frequency offset Δω, the energy of the complex correlation signal decreases by ρ times given by the following equation.

[0012] _{ρ = | c n / c n0} | a _{^{2 = {sin [ΔωM T c}} / 2] / (M sin [ΔωT c / 2])} 2 (1-4) 11, the case of M = 127 Frequency offset Δω
Phase rotation amount between caused by one symbol | showing the relationship between the energy reduction rate ρ | Δ ωT _d. From FIG. 11 , | ΔωT _d
It can be seen that when | ≧ 2π, the energy of the correlation signal is almost lost. Therefore, in the DS / SS communication system, it is necessary to compensate for a frequency offset, and for this purpose, an AFC circuit is applied.

FIG. 12 shows a quasi-synchronous detection circuit provided with an AFC circuit. In this example, the local oscillator 12 that outputs a local carrier is constituted by a voltage controlled oscillator ( VCO ) , which is controlled by an error signal generated by an error signal generation circuit 30. A multiplier 32 for multiplying the gain α, an integrator 34 for integrating the output, and an output of the integrator
The frequency control according to the error signal is enabled by the D / A converter 36 that converts the signal into a voltage signal.

[0014] That is, erroneous difference signal generating circuit 30 of the counter in the received SS signal of a local carrier wave output from the local oscillator 12
Output an error signal with a value corresponding to the frequency offset
You. This error signal is multiplied by an appropriate gain to more averaging to the integrator 34, it is further converted to a more Ana <br/> log voltage signal to the D / A converter 36. Station oscillator 12 VC O
In which is configured, by the electrodeposition pressure corresponding to the error signal
The oscillation frequency is corrected. Therefore, the frequency of the local carrier can be made to match the carrier frequency of the received SS signal.

Here, the configuration of the error signal generation circuit 30 will be described with reference to FIG. The complex baseband signal output from the quasi-synchronous detection circuit is output from a complex multiplier 40a,
40b, where exp (−jω ₀ t) and exp (jω ₀ t) are multiplied, respectively, to give a positive frequency deviation ω ₀ (ω ₀ > 0) and a negative frequency deviation −ω _0. Thus, a positive deviation baseband signal and a negative deviation baseband signal are obtained . Here, the time (nM + m T _c), respectively the value of the positive deviations and negative deviations baseband signal in r _{pnm + m}
And r _{nnM + m} , the following relational expression holds.

[0016] _{r pnM + m = a n u} m exp [-j {(Δω + ω o) T c + φ}] r nnM + m = a n u m exp [-j {(Δω- ω o) T _c + φ}] (1-5) The positive deviation and negative deviation baseband signals are input to complex correlators 44a and 44b, respectively, and a correlation operation is performed with the PN signal to obtain a positive deviation correlation signal and a negative deviation correlation signal. obtain. Positive deviation and the value of each c _pn negative deviation correlation signals for the transmission data a _n obtained for each symbol period T _d, When c _nn, the following relationship is satisfied as for formula (1-2).

[0017] _{c pn = a n exp [-j} {(Δω + ω o) B n T c / 2 + φ}] · sin [(Δω + ω o) M T c / 2] / sin [(Δω + _{ω o) T c / 2]} c nn = a n exp [-j {(Δω- ω o) B n T c / 2 + φ}] · sin [(Δω- ω o) M T c / 2] / sin [([Delta] [omega]-[omega] _o ) _Tc / 2] _Bn = (2n + 1) M + 1 (1-6) Further, the positive and negative deviation correlation signals are sent to complex absolute value square calculators 46a and 46b. Then, the absolute values of these signals are squared to obtain a positive deviation error signal and a negative deviation error signal. The values of the positive error signal and the negative error signal are equal when there is no frequency offset Δω,
If ω exists, a difference occurs between the two values. Therefore, the difference between the positive deviation error signal and the negative deviation error signal is obtained by the subtractor 48, and the value is latched by the latch circuit 50 every symbol period _Td to obtain an error signal. That is, the error signal e _n to the transmission data a _n is given by the following equation.

[0018] ^{_{e n = | c pn | 2}} - | c nn | 2 = {sin [(Δω + ω o) MT c / 2] / (sin [(Δω + ω o) T c / 2])} 2 _{- {sin [(Δω- ω o} ) MT c / 2] / (sin [(Δω- ω o) T c / 2])} 2 (1-7) the error signal e _n is as shown in FIG. 15 Frequency offset
It shows the cut characteristics. Here, this figure shows that M = 127, ω ₀
FIG. 4 is a diagram when = π / _Td . According to FIG.
No. e _n is that indicates a value corresponding to the frequency offset Δω
I understand. Generally, the value of the frequency deviation ω ₀ is 0 <ω ₀ ≦ 2π /
It is set in the range of T _d, the error signal e _n indicates a value corresponding to the frequency deviation [Delta] [omega. Therefore, by correcting the frequency of the local carrier according to such an error signal, the frequency of the local carrier can be matched with the carrier frequency of the received SS signal. As described above, the conventional AFC circuit can perform feedback control so that the frequency of the local carrier in the quasi-synchronous detection circuit matches the carrier frequency of the received SS signal, and can obtain a suitable complex baseband signal. As shown in FIG. 11, the frequency offset, but the correlation signal energy decreases, by providing the AFC circuit as described above, it corrects the frequency offset, it is possible to reduce the energy loss of the correlation signal, and more Accurate signal demodulation can be performed.

[0019]

As described above, the frequency offset can be corrected by the conventional AFC circuit. However, in the conventional circuit, most of the operations are complex operations. In a practical circuit, an arithmetic unit for performing this complex operation needs to be constituted by a real number arithmetic element. For this reason, in the conventional AFC circuit, a very large number of real number computing elements are required, and there is a problem that the hardware of the error signal generation circuit becomes complicated and large-scale. That is, FIG. 14 shows a configuration in which the above-described error signal generation circuit 30 is configured by a real number operation element. Figure 1
As is apparent from 4, the complex multiplier 40a, 40b, multiple
Since the prime absolute value square arithmetic units 46a and 46b must perform arithmetic operations on both the real part Re and the imaginary part Im, a large number of real multipliers and real adders are required. That is, in the complex multiplier 40a, a multiplier 52a, a multiplier 54a for multiplying -sin (ω ₀ T), the imaginary of the complex baseband signal is multiplied by a cos (ω ₀ T) with respect to the real part of the complex baseband signal For the department,
multiplier 56a that multiplies cos ( ω ₀ T ) by -sin
( Ω ₀ T ) , an adder 60a,
62a is required. Moreover, the complex absolute value 2 No演 adder 4
6a requires multipliers 64a and 66a for calculating the square of the real part and the imaginary part, and an adder 68a. Further, the complex multiplier 40b, is the same for the complex absolute value 2 No演 adder 46b. Note that the complex correlator 44a
Is the phase for performing the correlation operation between the real part of the input signal and the PN signal.
A phase for performing a correlation operation between the PN signal and the functor 70a and the imaginary part.
And a function 70b. Similarly, complex correlator 44
b is also composed of two real number correlators.

The present invention has been made in view of the above problems, and has as its object to provide an AFC circuit for a quasi-synchronous detection circuit whose circuit is simplified.

[0021]

SUMMARY OF THE INVENTION The present invention provides a quasi-synchronous detection circuit for obtaining a complex baseband signal by mixing a local carrier with a received SS signal spread spectrum by a PN signal. of offset
An AFC circuit for a quasi-synchronous detection circuit for compensating an effect ,
A first multiplier for multiplying the real and given cosine signal of the complex baseband signal, outputs and P of the first multiplier
A first correlator for performing a correlation operation between the N signal, a second multiplier for multiplying the imaginary part with a predetermined cosine signal of the complex baseband signal, and outputs the PN signal of the second multiplier a second correlator for performing correlation operation, the correlation calculation of a third multiplier for multiplying the real and given sine signal of the complex baseband signal, and outputs the PN signal of the third multiplier To
A third correlator for performing a fourth performing a fourth multiplier for multiplying the imaginary part with a predetermined sinusoidal signal of the complex baseband signal, the correlation calculation between the output and the PN signal of the fourth multiplier and <br/> correlator, a sixth multiplier for multiplying a fifth multiplier for multiplying the output of the correlator of the first and fourth, the output of the second and third correlators , above the output of the fifth multiplier
Serial and sixth subtracter for subtracting the output of the multiplier, in response to the output signal of the subtracter <br/>, the local carrier frequency offset
Correction means for correcting the influence .

Further, the line correlation calculation between the PN signal obtained by multiplying the real and given cosine signal of the complex baseband signal
Line cormorants a first correlator, a correlation operation between PN signal obtained by multiplying the imaginary part with a predetermined cosine signal of the complex baseband signal
Cormorant a second correlator, a third for performing an operation of the PN signal obtained by multiplying the real part and a predetermined sine signal of the complex baseband signal
And correlator, a fourth <br/> correlator for performing correlation operation of the PN signal obtained by multiplying the imaginary part with a predetermined sinusoidal signal of the complex baseband signal, the first and fourth correlator output a first multiplier for multiplying a second multiplier for multiplying an output of said second and third correlators, above the output of the first multiplier
A subtracter for subtracting an output of the serial second multiplier, in accordance with the output signal of the subtracter, the local carrier frequency offset
Correction means for correcting the influence .

In addition, for the complex baseband signal,
Phase shift means for sequentially and alternately multiplying a pair of phase factors having a conjugate relationship with each other in synchronization with the repetition period of the PN signal, thereby sequentially and alternately shifting the phase of the complex baseband signal in the positive and negative directions; and Positive or negative output from
Sequentially and the complex baseband signal after the position phase shifted alternately toward, a correlator sequentially performing correlation operation between PN signal, which is phase-shifted in the positive direction it is sequentially outputted from the correlator complex
Correlation signal for baseband signal and negative phase
A subtractor that takes a difference from a correlation signal for the shifted complex baseband signal, and a correction unit that corrects an influence of a frequency offset of a local carrier according to an output signal of the subtractor, I do.

Further, a first multiplier for multiplying the sequential exchange predetermined cosine and sine signals to the real part of the complex baseband signal, a predetermined sine and cosine signals to the imaginary part of the complex baseband signal sequence A second multiplier for alternating multiplication,
A first correlator for performing a correlation operation between the output and the PN signal of the first multiplier, a second correlator for performing a correlation operation between the output and the PN signal of the second multiplier, said first a third multiplier for multiplying the output of the first and second correlator, a first for latching the output of the third multiplier latch and the output of the upper Symbol third multiplier the first a second latch for latching at different timings the latch, a subtracter for subtracting an output from the output of said first latch of said second latch in response to the output signal of the subtracter, the local carrier frequency offset Correction means for correcting the effect of

Further, the first multiplying a predetermined cosine signals sequentially alternating real and imaginary parts of the complex baseband signal
And a second multiplier for sequentially and alternately multiplying the imaginary part and the real part of the complex baseband signal by a predetermined sine signal.
Vessel and, a first correlator for performing a correlation operation between the output and the PN signal of the first multiplier, the output of the second multiplier PN
First latch for latching a second correlator for performing a correlation operation between the signal, a third multiplier for multiplying an output of said first and second correlator, the output of the third multiplier When a subtracter for subtracting an output of said second latch for latching the third multiplier output timing different from the first latch, the first from the output of the latch the second latch, This
And correction means for correcting the influence of the frequency offset of the local carrier according to the output signal of the subtractor.

A first correlator for sequentially and alternately performing a correlation operation between a PN signal multiplied by a predetermined cosine signal and a real part and an imaginary part of the complex baseband signal, and a PN multiplied by a predetermined sine signal. signal and the correlation calculation and the sequential second correlator for performing alternately, multiply you multiply the outputs of the first and second correlator <br/> calculated the imaginary part and the real part of the complex baseband signal vessel and, a first latch for latching the output of this multiplier, the output of the multiplier and a second latch for latching at different timing from the first latch, the output of the first latch a subtracter for subtracting the output of the second latch in response to the output signal of the subtractor, and having a correction means for correcting the influence of the frequency offset of the local carrier.

[0027]

As described above, according to the present invention, in the conventional example, multiple
Correlation calculation equivalent to the calculation of the phase shift and subsequent PN signal to double Motobe band signal which has been performed under calculation
Are achieved only by real number operations . That is, a first
More stone fourth multiplier multiplies the predetermined cosine and sine signal to complex baseband signals, these multiplication results and PN
Performs a correlation operation with the signal . Further, the obtained correlation signal is multiplied by fifth and sixth multipliers, and the result of the multiplication is calculated .
An error signal is obtained by taking the difference . Therefore, the number of multipliers and adders is significantly reduced as compared with the conventional example that performs a complex operation.

Further, in the correlator, instead of performing a phase Seki演 calculation of the PN signal and the input signal, correlation calculation between the input signal and multiplied by the predetermined cosine and sine signals to the PN signal
Do. This makes it possible to reduce the number of multipliers for multiplying the predetermined cosine and sine signals.

Further, by using the correlator in a time-sharing manner, the number of correlators can be reduced .

[0030]

Embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1-1 FIG. 1 is a block diagram showing an overall configuration of an embodiment 1-1, which is orthogonal to a received SS signal (that is, the phase is π / 2).
Frequency mixer 1 for mixing different) local carriers
02a and 102b and a VCO that oscillates a local carrier.
A local oscillator 104 was made, leaving the local oscillator 104
The force is the local carrier phase and the phase shifter 106 is shifted by [pi / 2, the output of the frequency mixer 102a, 102 b
Low-pass filter 108a for removing pressurized et image frequency components, and 108b, the low pass filter 108
a, converts the output of 108b to de I digital signal A / D
It has converters 110a and 110b, whereby a complex baseband signal is obtained as in the conventional example.

In this embodiment, an error signal generation circuit 120 is provided. That is, the error signal generation cycle
The path 120 is provided with multipliers 132 and 134 to which the real part of the complex baseband signal is inputted and multipliers 136 and 138 to which the imaginary part of the complex baseband signal is inputted,
The cos (ω ₀ t) is supplied to the multipliers 132 and 136.
Multiplication with the input signal is performed, and sin (ω ₀ t) is supplied to the multipliers 134 and 138 to perform multiplication with the input signal . Then, the outputs of the multipliers 132 and 138 are input to the correlators 140 and 142, respectively, and
A correlation operation is performed, and both of the obtained correlation signals are
44. On the other hand, the output of the multiplier 136, 134 is, PN signals are respectively input to correlators 146 and 148
The correlation operation with the signal is performed, and both of the obtained correlation signals are input to the multiplier 150. Then, the output of the multiplier 144 and the output of the multiplier 150 are input to a subtracter 152, where the output of the multiplier 144 is converted to the output of the multiplier 150.
There is subtracted, the result is input to the latch circuit 154. The latch circuit 154 converts the input signal into a symbol cycle
(That is, the repetition period of the PN signal), and the result is incorrect.
Output as a difference signal. As described above, in this embodiment, the input complex baseband signal is converted into a real part and an imaginary part using the cosine and sine signals for frequency shift of cos ( ω ₀ t ) and sin ( ω ₀ t ). They are calculated separately. And this reduces the number of real multipliers compared to the conventional example.
And an error signal equivalent to the conventional example is obtained by the real adder.
You .

That is, the error signal of the conventional example shown in FIG.
Although the signal generation circuit requires 12 real number multipliers and 7 real number adders, the error signal generation circuit 120 of this embodiment requires only 6 real number multipliers and 1 real number adder. And
The error signal thus obtained passes through a multiplier 156, an integrator 158, and a D / A converter 160 as in the conventional example.
The Ru is supplied to the local oscillator 104 configured by VCO
Then, the frequency of the local carrier is corrected by the voltage signal corresponding to the error signal. Therefore, in this embodiment, it is possible to remove the influence of the frequency offset as in the conventional example.

Next, the error signal generation circuit 120 of the present embodiment
, An error signal equivalent to the conventional example can be generated . First, a positive deviation correlation signal c _pn and negative deviations correlation signal c _nn, when decomposed into real and imaginary components, respectively, the error signal e _n in the prior art is represented by the following formula.

[0035] ^{_{e n = | c pn | 2}} - | c nn | 2 = (Re [c pn] + Re [c nn]) (Re [c pn] -Re [c nn]) + (Im [c pn ] + Im [c _nn ]) (Im [c _pn ] -Im [c _nn ]) (2-1) where Re [•] and Im [•] are real and complex numbers, respectively.
And imaginary components. On the other hand, c _pn and c _nn are represented by the following equations.

[0036] _{M c pn = Σ u m r} nM + m exp [-j (nM + m) ω o T c] m = 1 M c nn = Σ u m r nM + m exp [j (nM + m) ω _o T _c ] (2-2) ^{m = 1 The} following equation is obtained from equations (1-1) and (2-2).

[0037] _{M Re [c pn] = a} n Σ cos [(Δω + ω o) (nM + m) T c + φ] m = 1 M Im [c pn] = -a n Σ sin [(Δω + _{ω o) (nM + m)} T c + φ] m = 1 M Re [c nn] = a n Σ cos [(Δω- ω o) (nM + m) T c + φ] m = 1 M Im [ c _nn ] = − a _n Σ sin [(Δω−ω _o ) (nM + m) T _c + φ] ^{m = 1} (2-3) Further, from the equations (1-1) and (2-3), An expression is obtained.

[0038] _{Re [c pn] + Re [} c nn] M = 2a n Σ cos [Δω (nM + m) T c + φ] cos [ω o (nM + m) T c] m = 1 M = 2Σ _{u m Re [r nM + m} ] cos [ω o (nM + m) T c] m = 1 Re [c pn] -Re [c nn] M = -2a n Σ sin [Δω (nM + m) T _{c + φ] sin [ω o} (nM + m) T c] m = 1 M = 2Σ u m Im [r nM + m] sin [ω o (nM + m) T c] m = 1 Im [c pn _{] + Im [c nn] M} = -2a n Σ sin [Δω (nM + m) T c + φ] cos [ω o (nM + m) T c] m = 1 M = 2Σ u m Im [r nM _{+ m] cos [ω o (} nM + m) T c] m = 1 Im [c pn] -Im [c nn] M = -2a n Σ cos [Δω (nM + m) T c + φ] sin [ _{ω o (nM + m) T} c] m = 1 M = -2Σ u m Re [r nM + m] sin [ω o (nM + m) T c] m = 1 (2-4) the equation (2 From -4), Re [c _pn ] + Re [c _nn ] is cos (ω) in the real component of the complex baseband signal (ie, the in-phase component of the quasi-synchronous detection output ).
_o ) is equal to twice the correlation value between the signal multiplied by t) and the PN signal.

Re [c _pn ] -Re [c _nn ] is the correlation between the PN signal and the signal obtained by multiplying the imaginary component of the complex baseband signal (ie, the quadrature component of the quasi-synchronous detection output ) by sin (ω _ot ). Equal to twice the value.

Im [c _pn ] + Im [c _nn ] is equal to twice the correlation value between the signal obtained by multiplying the imaginary component of the complex baseband signal by cos (ω _ot ) and the PN signal.

[0041] _{Im [c pn] -Im [c} nn] is equal to -2 times the correlation value between the signal and the PN signal obtained by multiplying sin (ω _o t) to a real component of the complex baseband signal.

It can be seen that:

Accordingly, the error signal of the present embodiment shown in FIG.
According to the generation circuit 120, in the correlator 140, Re
1/2 of [c _pn ] + Re [c _nn ] is obtained, and 1/2 of Re [c _pn ] −Re [c _nn ] is obtained in the correlator 142.
In the multiplier 144, (Re [c _pn ] + Re [c _nn ]) (Re
[c _pn ] -Re [c _nn ]) is obtained.

On the other hand, in the correlator 146, Im [c _pn ] +
[Of Im [c _nn ] is obtained.
Since −1/2 of m [c _pn ] −Im [c _nn ] is obtained, the multiplier 150 obtains (Im [c _pn ] + Im [c _nn ]) (Im [c _pn ] −
Im [c _nn ]) is obtained.

Accordingly , the multiplier 14
By subtracting the output of the multiplier 150 from the fourth output, the error signal of 1/4 of the value of the error signal e _n in the conventional example
It is clear from the above equation (2-1) that the signal is obtained.
You .

Embodiment 1-2 In the embodiment 1-1 shown in FIG. 1, the frequency of the local carrier is
Compensate for frequency offset effects by controlling number
Although it has to, the frequency of the local carrier remains fixed, the influence of frequency <br/> number offset also me by the applying phase rotation in the complex baseband signal can be compensated. When using this method
FIG. 2 shows an example of such a case. In the present embodiment, the output of the multiplier 156 that multiplies the gain α is input to the adder 162. The output of this adder 162 is
Again adder via a delay element 164 is equal to Le period T _d
162 and the adder 166 at the same time.
It is. The output of this adder 166 is the delay time
Adder 16 again through delay element 168 equal to period _Tc
6, the phase rotation signal generation circuit 166
Is also entered. The phase rotation signal generation circuit 166 receives the input
A complex number with an absolute value of 1 having a phase angle of a value obtained by multiplying a signal by -1 is
Output. On the other hand, the complex baseband signal is
72, the output of the phase rotation signal generation circuit 166 and
Is performed. Therefore, from complex multiplier 172
The output signal is added to the complex baseband signal by the adder 1
Phase rotated clockwise by the value output from 66
It will be .

Next, the frequency offset according to this embodiment is
The process of compensating the influence will be described using mathematical expressions. In FIG.
, After multiplied by the gain α more error signal e _n to the multiplier 156, by the adder 162及beauty delay circuit 164 to thus cyclic addition for each thin <br/> Bol period T _d (integration)
The compensation (angular) frequency Ω _n at the time nT _d is obtained.

[0048] That _{is, Ω n = αe n + Ω} n-1 (3-1) Furthermore, depending on the adder 166及beauty delay circuit 168, 2 [pi this compensation (angular) frequency Omega _n for each chip period T _c The law
By cyclic addition (integration) as the time nT _d +
Obtain the compensation phase θ _{nM + m} at mT _c = (nM + m) T _c .

That is, θ _{nM + m} = Ω _n + θ _{nM + m-1} (mod 2π) (3-2) This compensation phase θ _{nM + m} is input to the phase rotation signal generation circuit 166.
Phase angle which is a complex number with absolute value 1 and declination -θ _{nM + m}
Obtain a turn signal. In complex multiplier 172, this phase
By multiplying the rolling signal to complex baseband signal, -
theta _{nM + m} becomes phase rotation into force, the influence of the frequency offset
There a complex baseband signal z _{nM + m,} which is compensated for.

That is, z _{nM + m} = r _{nM + m} exp [−jθ _{nM + m} ] (3-3) This compensated complex base which is the output of the complex multiplier 172
Sband signal as input to error signal generation circuit 120
Compensation (angular) frequency by configuring AFC loop
Ω _n converges to a value ΔωT _c . Because of this, it is compensated
The complex baseband signal is the complex baseband signal in the embodiment 1-1.
As with baseband signals, the effects of frequency offset
It has been completely removed. In this embodiment, the AFC
Since all the loops are constituted by digital circuits, adjustment is easy.

[0051] Examples 1-3 By the way, in conventional apparatus of FIG. 13, a signal that gives a positive and negative frequency deviation exp [-jω _o t] and exp [j [omega]
_o t]. An arbitrary stationary phase ψ _x
And ψ _y exist, that is, exp [−j (ω _o t−
ψ _x )] and exp [j (ω _o t + ψ _y )]
It is clear that the same error signal e _n is obtained.

More specifically, time nT _d <t ≦ (n
+1) If the value of [psi _x and [psi _y between the T _d is constant, it does not affect the value of the error signal e _n the values of [psi _x and [psi _y for each symbol interval T _d is changed. At this time, time nT _d <
When the value of [psi _x and [psi _y between t ≦ (n + 1) T d is assumed to be respectively nMω _o T _c and -nMω _o T _c, the formula (2-2) _M c _pn = _Σ u _m r _{nM + m exp [- jmω o} T c] m = 1 M c nn = Σ u m r nM + m exp [jmω o T c] m = 1 (4-1) become.

[0053] From this, equation (2-4) is _{Re [c pn] + Re [} c nn] M = 2Σ u m cos [ω o m T c] Re [r nM + m] m = 1 Re [c _{pn] -Re [c nn] M} = 2Σ u m sin [ω o m T c] Im [r nM + m] m = 1 Im [c pn] + Im [c nn] M = 2Σ u m cos [ω _{o m T c] Im [r} nM + m] m = 1 Im [c pn] -Im [c nn] M = -2Σ u m sin [ω o m T c] Re [r nM + m] m = 1 (4-2)

Then, this equation (4-2) indicates that Re [c _pn ] + Re [c _nn ] is a real number component of the signal obtained by multiplying the PN signal by cos (ω _ot ) and the complex baseband signal (ie, (Corresponding to the in-phase component of the quasi-synchronous detection output ).

Re [c _pn ] -Re [c _nn ] is obtained by adding sin to the PN signal.
It is equal to twice the correlation value between the signal multiplied by (ω _ot ) and the imaginary component of the complex baseband signal (ie, the quadrature component of the quasi-synchronous detection output ).

Im [c _pn ] + Im [c _nn ] is cos
It is equal to twice the correlation value between the signal multiplied by (ω _ot ) and the imaginary component of the complex baseband signal.

Im [c _pn ] -Im [c _nn ] is obtained by adding sine to the PN signal.
It is equal to -2 times the correlation value between the signal multiplied by (ω _ot ) and the real component of the complex baseband signal.

This indicates that: Therefore, equation (4-2)
Into the equation (2-1), the complex baseband
The real and imaginary components and the PN signal of the de signal cos (ω _o t)及
And sin (ω _ot ) multiplied by
That four correlation signal can be generated an error signal from the shown
Have been .

Therefore, as shown in FIG.In oneIn
Provided cos (ω_ot) and sin (ω_ot)
Multiplier 13 that multiplies the real and imaginary components of the baseband signal
2, 134, 136 and 138 are omitted.Also, in FIG.
P as a reference sequence for performing a correlation operation with the input signal
N signal (u _m } (m = 1,..., M)
Correlator 1 instead of 140, 142, 148, 146
80, 182, 184 , 186 are provided. And reference
As a series, the correlators 180 and 186 have (u _m cos (ω
_o t)}, and {u} in the correlators 182 and 184. _m sin
(ω _o t)} is stored. Also, the correlator 180,
184 represents the real component of the complex baseband signal,
Imaginary components are input to the correlators 182 and 186, respectively.
You. With such a configuration, these correlators
At 180, 182, 184, 186, PN signal
cos (ω_ot) and sin (ω_ot) and the complex base
Correlation calculation with real and imaginary components of sband signalIs done
You. Therefore, the correlators 180, 182, 184, 186
The signal processing represented by the equation (2-1), that is,
That is, the correlators 140, 142, 148, and 14 in FIG.
6 by performing the same signal processing as each output of FIG.
Obtain an equivalent error signal. Thus, cos (ω
_o t) and sin (ω _o t) is multiplied by the phase of the input signal.
By storing in the correlator as a reference sequence for performing the
In comparison with the embodiment 1-1 of FIG.
Can be further reduced by four..

[0060]Example 1-4 As in FIG. 3, cos (ω _o t) and sin (ω
_o t) is stored in the correlator as a reference sequence,
And, as in FIG. 2, phase rotation is performed on the complex baseband signal.
Configuration to remove the effect of frequency offset by applying
Is shown in FIG. Similar to FIG. 3 for FIG.
In comparison, in the present embodiment of FIG.
Has been further reduced by four .

Embodiment 2-1 The error signal generation circuit shown in FIGS .
Since the number of multipliers and adders is greatly reduced,
Always simple. However, FIG. 14 is compared with FIG.
As is clear, the correlator in the error signal generation circuit
Are also four in FIGS. 1 to 4, which is the same as the conventional example in FIG. On the other hand, if used in time division correlator can halve the number of correlators in the erroneous <br/> difference signal generating circuit.

FIG. 5 shows a configuration in which a time-division use of a correlator is applied to a conventional error signal generation circuit.

[0063] Thus, in this embodiment, a complex multiplier 300 for multiplying the complex baseband signal and exp [-jω _o t] or exp [jω _o t], exp to the complex multiplier 300
[-jω _o t] or exp [jω _o t] a selector 302 supplies by switching, exp [jω _o t] of Conjugate number exp [-jω
a complex conjugate calculator 304 to obtain a _o t], the complex multiplier 30
A complex correlator 306 calculates the complex correlation between the 0 output and the PN signal, and the absolute value squaring circuit 308 for calculating the square of the absolute value of the input complex signal, the absolute value 2 Nomawa an odd symbol (odd) Timing first latch for latching the output of the road 308
Chi 3 10 and even symbols (even) and a second latch 3 12 for latching at the timing, the subtracter 314 from the output of the first latch 3 10 subtracts the output of the second latch 3 12
Consists of

Next, the operation of this circuit will be described.
The input complex baseband signal is applied to a complex multiplier 300
, The signal F that switches every symbol interval _Td
(T)

(Equation 1) And then input to complex correlator 306 and
A complex correlation operation with the signal is performed.

The complex correlation signal output from the complex correlator 306 has its absolute value squared in a complex absolute value squaring circuit 308, is further branched into two, and the first latch 31
0 and input to the second latch 312. The first latch 310 latches the input signal in time 2kT _d, the second latch 312 latches the input signal in time (2k + 1) T _d.

According to such signal processing, the first latch 310 outputs a complex base value multiplied by exp [-jω _o t].
The square of the absolute value of the complex correlation value between the
The positive deviation error signal is output from the second latch 3
Exp is from 12 [jω _o t] is multiplied by the complex baseband
Is the square of the absolute value of the complex correlation value between the PN signal and the PN signal.
However, a negative deviation error signal is output. Therefore, by subtracting the output of the second latch 312 from the output of the first latch 310 by the subtractor 314, the conventional example of FIG.
Similar error signal e _n is obtained.

Next, FIG. 6 shows an example in which the error signal generation circuit of FIG. 5 is constituted by real number operation elements.

As described above, the signal processing is executed by dividing the complex baseband signal into the real part and the imaginary part. That is,
_{exp [-jω o t], exp} [jω o t] to switch to each symbol period _{operation, cos (ω o t) +} jsin (ω o t) and co
_{s (ω o t) -jsin (} ω o t) the Ru <br/> sort cut for each symbol period operation to become. Then, the output of the complex correlator 300
Correlation calculation between real part (Re) and imaginary part (Im) and PN signal
Are performed in the correlators 306a and 306b, respectively.
You. Output from these correlators 306a and 306b
By adding the correlation value after squaring each Ru obtain the square of the absolute value of the complex correlation signal.

[0069] Example 2-2 FIG. 7 shows an example of the error signal generating circuit in the case of applying the split use when the correlator in FIG. In this example, the multiplier 32
0 for the real part of the complex baseband signal, cos (ω
_ot ) and sin (ω _ot ) are alternately multiplied every symbol period. On the other hand, the multiplier 322 performs sin (ω
_ot ) and cos (ω _ot ) are alternately multiplied every symbol period.

That is, in this embodiment, the multiplier 320,
The 322, the actual number part and imaginary number <br/> part of the complex baseband signal, cos (ω _o t) and sin a (ω _o t) the selector
The signals X (t) and Y (t) obtained by alternately switching the symbols 400 and 402 at every symbol interval _Td are multiplied respectively.

(Equation 2) Then, the correlators 324 and 328, performs correlation calculation between their respective multipliers 320,32 second output and the PN signal.
To the correlator 324, the output of 328, respectively it multipliers 328
Is input is multiplied. By this signal processing, the multiplier 32
8 will be performed alternately in one symbol period the multiplication performed by the multiplier 144 and 150 in FIG. 1. Therefore, as in the embodiment 2-1, the output of the multiplier 328 is latched every two symbol periods by the first and second latches 330 and 332 at a timing shifted from each other by one symbol period, and is subtracted by the subtractor 334. particular result from the output of the first latch 330 subtracts the output of the second latch 332,
It is possible to obtain the same error signal and Fig.

Embodiment 2-3 FIG. 8 shows another embodiment of the error signal generation circuit when the time division use of the correlator is applied to FIG. In this example, the multiplier 320 converts the real part and the imaginary part of the complex baseband signal into the following signal P (t) obtained by alternately switching the real part and the imaginary part by the selector 404 every symbol interval _Td.
(Ω ₀ t). Similarly, multiplier 322 provides the imaginary and real parts of the complex baseband signal to selector 406.
The following signal Q (t) obtained by switching alternately at every symbol interval _Td is multiplied by sin (ω ₀ t).

[0072]

(Equation 3) By the same as FIG. 7 the subsequent signal processing, the multiplier 328 will be performed alternately multiplication performed by the multiplier 144 and 150 in FIG. 1 for each symbol period. Thus, output of multiplier 328 is quite become the same as in FIG. 7, also the error signal output from the subtracter 334 7
And the same.

Embodiment 2-4 FIG. 9 shows an embodiment of the error signal generating circuit in the case where the time division use of the correlator is applied to FIG. In this embodiment ,
As a reference sequence for performing correlation calculation between the input signal {u _m cos
(ω ₀ mT _c)} inputs the signal P (t) to the correlator 340 which stores, {u _m cos (ω ₀ as well as reference sequences
mT _c )} is stored in the correlator 342 in which the signal Q (t) is stored.
Enter The output of the correlators 340 and 342 is the multiplier 3
44. By this signal processing , the multiplier 3
Reference numeral 44 means that the multiplication performed by the multipliers 144 and 150 in FIG. 3 is alternately performed every symbol period. Therefore, similarly to the embodiment 2-2, the output of the multiplier 344 is latched every two symbol periods by the first and second latches 346 and 348 at a timing shifted from each other by one symbol period, and the output is subtracted by the subtractor 350. 1 latch 34
Thus the output of 6 to <br/> subtracting the output of the second latch 348, it is possible to obtain the same error signal and Fig.

[0074]

As described above, according to the present invention, Ru engages the present invention A F
According to C circuit, for which is adapted to generate an error signal by real number operation, the number of the conventional example apparatus multipliers and adders
You to reduce, it is possible to greatly simplify the circuit configuration.
Moreover, the correlation Starring of the correlators, the PN signal and the input signal multiplied by the predetermined cosine and sine signals for phase shift
By performing the calculation , the number of multipliers can be further reduced . Further, more that time division using a correlator, the correlator
Can also be reduced .

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an overall configuration of an embodiment 1-1.

FIG. 2 is a block diagram illustrating an entire configuration of an example 1-2.

FIG. 3 is a block diagram illustrating an overall configuration of a first embodiment.

FIG. 4 is a block diagram illustrating an overall configuration of an example 1-4.

FIG. 5 is a block diagram illustrating a configuration of an error signal generation circuit according to Example 2-1.

FIG. 6 is a block diagram illustrating a configuration of an error signal generation circuit according to Example 2-1 using a real number operation element;

FIG. 7 is a block diagram illustrating a configuration of an error signal generation circuit according to Example 2-2.

FIG. 8 is a block diagram illustrating a configuration of an error signal generation circuit according to Example 2-3.

FIG. 9 is a block diagram illustrating a configuration of an error signal generation circuit according to Example 2-4.

FIG. 10 is a block diagram illustrating an example of the overall configuration of a conventional DS / SS communication receiver that performs quasi-synchronous detection.

FIG. 11 is a characteristic diagram illustrating a decrease in correlation signal energy due to a frequency offset.

FIG. 12 is a block diagram illustrating an example of the overall configuration of an AFC circuit.

FIG. 13 is a block diagram showing the principle of an error signal generation circuit in a conventional AFC circuit .

FIG. 14 is a block diagram showing an example in which the circuit of FIG. 13 is constituted by real number operation elements.

FIG. 15 is a characteristic diagram showing a frequency offset characteristic of an AFC error signal.

[Explanation of symbols]

140, 142, 146, 148, 180, 182, 1
84, 184, 306, 324, 326 correlator

Claims (6)

(57) [Claims] 1. A frequency of a received SS signal and a local carrier in a quasi-synchronous detection circuit for obtaining a complex baseband signal by mixing a local carrier with a received spread spectrum (SS) signal spread by a pseudo noise (PN) signal. a AFC circuit for correcting the influence of the offset, the correlation calculation of a first multiplier for multiplying a predetermined cosine signal to the real part of the complex baseband signal, and outputs the PN signal of the first multiplier correlation of the <br/> first correlator for performing a second multiplier for multiplying the predetermined cosine signal to the imaginary part of the complex baseband signal, and outputs the PN signal of the second multiplier and <br/> second correlator for performing computation, a third multiplier for multiplying a predetermined sinusoidal signal to the real part of the complex baseband signal, the output and the PN signal of the third multiplier <br/> third correlation performing correlation calculation When, the fourth multiplier for multiplying a predetermined sinusoidal signal to the imaginary part of the complex baseband signal, the fourth multiplier and the output of the correlation calculation correlation <br/> fourth performing the PN signal vessels and, above a fifth multiplier for multiplying the outputs of the first and fourth correlators, a sixth multiplier for multiplying an output of said second and third correlators, the fifth multiplication have vessels a subtractor for the output of the sixth multiplier from the output <br/> subtracting the, according to the output signal of the subtracter, a correction means for correcting the influence of the frequency offset of the local carrier, the AFC circuit characterized by the above. 2. An AFC circuit for correcting the influence of a frequency offset between a received SS signal and a local carrier in a quasi-synchronous detection circuit for obtaining a complex baseband signal by mixing a local carrier with a received SS signal spread spectrum by a PN signal. a is a first <br/> correlator which performs correlation calculation between the PN signal obtained by multiplying the real and given cosine signal of the complex baseband signal, the imaginary part with a predetermined of said complex baseband signal a second correlator for performing a correlation operation between PN signal obtained by multiplying the cosine signal, a third correlator for performing correlation operation of the PN signal obtained by multiplying the real part and a predetermined sine signal of the complex baseband signal, a fourth correlator for performing correlation operation of the PN signal obtained by multiplying the imaginary part with a predetermined sinusoidal signal of the complex baseband signal, a first multiplier for multiplying the output of the correlator of the first and fourth , A second multiplier for multiplying the output of the serial second and third correlators, a subtractor for <br/> subtracts the output of the second multiplier from the output of the first multiplier, the A correction means for correcting the influence of the frequency offset of the local carrier in accordance with the output signal of the subtractor. 3. An AFC circuit for correcting the effect of a frequency offset between a received SS signal and a local carrier in a quasi-synchronous detection circuit for obtaining a complex baseband signal by mixing a local carrier with a received SS signal spread spectrum by a PN signal. And have a conjugate relationship with respect to the complex baseband signal.
A pair of phase factors are synchronized with the repetition period of the PN signal.
Phase shift means for sequentially and alternately multiplying the complex baseband signal in the positive and negative directions, and in the positive and negative directions outputted from the phase shift means in turn.
A two-position phase shifted complex baseband signal, a correlator sequentially performing correlation operation between PN signal is phase-shifted in the positive direction is sequentially outputted from the correlator
A correlation signal for the complex baseband signal, a negative direction
A subtractor for taking a difference from a correlation signal for a complex baseband signal phase-shifted to: and a correction unit for correcting an influence of a frequency offset of a local carrier in accordance with an output signal of the subtractor. Characteristic AFC circuit. 4. An AFC circuit for correcting the influence of a frequency offset between a received SS signal and a local carrier in a quasi-synchronous detection circuit that obtains a complex baseband signal by mixing a local carrier with a received SS signal spread by a PN signal. A first multiplier for sequentially and alternately multiplying a real part of the complex baseband signal by a predetermined cosine and sine signal; and a sequential sine and cosine signal sequentially and alternately to an imaginary part of the complex baseband signal. A first multiplier for performing a correlation operation between the output of the first multiplier and the PN signal, and a correlation operation between the output of the second multiplier and the PN signal. A second correlator that performs an operation; a third multiplier that multiplies an output of the first and second correlators; a first latch that latches an output of the third multiplier; The output of the multiplier is A second latch that latches at a timing different from that of the first latch; a subtractor that subtracts the output of the second latch from the output of the first latch; and a frequency of the local carrier according to an output signal of the subtractor. An AFC circuit comprising: a correction unit configured to correct an influence of an offset. 5. An AFC circuit for correcting the influence of a frequency offset between a received SS signal and a local carrier in a quasi-synchronous detection circuit for obtaining a complex baseband signal by mixing a local carrier with a received SS signal spread spectrum by a PN signal. A first multiplier for sequentially and alternately multiplying a real part and an imaginary part of the complex baseband signal by a predetermined cosine signal, and a predetermined sine signal to the imaginary part and the real part of the complex baseband signal. a second multiplier for multiplying successively alternating, correlation between the first correlator and the output the PN signal of the second multiplier which performs correlation calculation between the output and the PN signal of the first multiplier A second correlator that performs an operation, a third multiplier that multiplies the outputs of the first and second correlators, a first latch that latches the output of the third multiplier, Increase the output of the multiplier of 3 A second latch that latches at a different timing from the first latch; a subtractor that subtracts the output of the second latch from the output of the first latch; a local carrier corresponding to an output signal of the subtractor An AFC circuit comprising: a correction unit configured to correct an influence of a frequency offset of the AFC circuit. 6. An AFC circuit for correcting the influence of a frequency offset between a received SS signal and a local carrier in a quasi-synchronous detection circuit for obtaining a complex baseband signal by mixing a local carrier with a received SS signal spread spectrum by a PN signal. A first correlator for sequentially and alternately performing a correlation operation between a PN signal multiplied by a predetermined cosine signal and a real part and an imaginary part of the complex baseband signal; and a PN signal multiplied by a predetermined sine signal. And the imaginary part and real part of the complex baseband signal
A second correlator for performing, the first and second correlator outputs to the power you multiplier adder, a first latch for latching the output of this multipliers, the upper Kino adder A second latch that latches an output at a different timing from the first latch; a subtractor that subtracts the output of the second latch from the output of the first latch; A correction means for correcting the influence of the frequency offset of the local carrier.