JP2538633B2 - Adaptive filter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] Regarding a transversal type adaptive filter, the tap coefficient updating unit appropriately updates the coefficient of each stage for the purpose of realizing a stable and highly accurate filter with a relatively small bit length. In an adaptive filter having a transversal type filter unit, the DC component of the output of the filter unit is integrated in each stage of the adaptive filter, and the integrated value is a certain value or more. A rounding process is performed on the lower bit by the rounding process unit, and when the value is less than the certain value, a rounding process is performed by the rounding process unit on the least significant bit, and the process result is applied to the tap coefficient updating unit, and the tap coefficient of the filter unit is applied. To be updated.

[Industrial applications]

The present invention relates to an adaptive filter, and more specifically, it makes a truss-versal adaptive filter with a finite word length, which is used for an echo canceller, an equalizer, etc. in a communication system, stable and highly accurate with a smaller word length. Regarding adaptive filters.

FIG. 6 shows a transversal type adaptive filter adapted to an echo canceller. In the transversal filter 1, unit delay elements 11 ₁ , 11 ₂ , 11 ₃ ... Are connected in a predetermined number of stages series, and multipliers 12 ₁ , 12 that multiply the output of each unit delay element by filter coefficients α ₁ , α ₂ ... ₂ ... The addition result is formed by the addition unit 13. When configured as an adaptive filter, a tap coefficient updating unit 2 ′ that appropriately changes the filter coefficients α ₁ , α _2, ... Of each stage is further provided. When used as an echo canceller, an unknown system 91 to be canceled is provided in parallel with the transversal filter 1, and the output of the unknown system 91 is subtracted from the output of the adder 13 by the subtractor 92 to extract the error ε. . The tap coefficient updating unit 2 ′ determines the error ε
The input signal D _IN is input so that the value becomes zero, and the filter coefficients α ₁ , α ₂ ... Of each stage are appropriately determined and given to the multiplication units 12 ₁ , 12 ₂ .

On the other hand, when used in the equalizer, as shown in FIG. 7, the output of the adder 13 is compared with the reference value REF in the judging section 93 and the judgment error ε ′ is given to the tap coefficient updating section 2 ″. .
The tap coefficient updating unit 2 ″ determines the filter coefficients α ₁ , α _2, ... Of each stage so that the determination error ε ′ becomes zero, and the multiplication units 12 ₁ ,
Give to 12 ₂ ...

When designing a filter, it is not easy to design a filter that does not change the filter coefficient so as not to cause a limit cycle and to obtain a desired filter characteristic. Furthermore, in an adaptive filter that appropriately determines and updates the filter coefficient appropriately, it is difficult to design the system stably and obtain the desired filter characteristic. In particular, the adaptive filter must be realized with a finite word length, and the truncation or rounding of the least significant bit may deteriorate the characteristics of the adaptive filter. Especially, in the transversal type adaptive filter having a large number of taps (stages), if the update of the filter (tap) coefficient is processed by truncation or the like, it becomes equivalent to the addition of the DC offset and the operation becomes unstable. become. In addition, an adaptive filter is generally designed for signal components including the entire frequency band, but in reality, narrow band signals such as sine wave signals are sometimes handled, and adaptive control falls into a locally stable state and the characteristics are It may deteriorate.

[Prior art and problems to be solved by the invention]

In order to solve the above problems, attempts have been made to increase the bit length of filter processing and to perform floating point arithmetic to improve the arithmetic precision. However, this method
There are problems that the price of hardware is high and that the processing speed becomes slow.

Also, attempts have been made to prevent deterioration of calculation accuracy by devising the order of calculation processing. However, even with this method, the above-mentioned problems cannot be essentially solved.

Therefore, it is desired to realize a stable adaptive filter with a relatively small bit length and without deterioration of characteristics.

[Means for solving the problem and operation]

The basic concept of the present invention is that, when performing an operation with a finite bit length and performing adaptive control, the processing is not normally performed because an operation error enters the feedback loop due to the adaptive control,
In other words, the least significant bit truncation process causes a DC offset to prevent adaptive control, while the least significant bit rounding process does not cause any DC interference but is less affected by the least significant bit operation error. On the assumption that the bit length deteriorates the filter characteristics, in order to deal with them, rounding or truncation is appropriately and selectively applied to the least significant bit.

The first form of the adaptive filter of the present invention is shown in FIG.
The adaptive filter shown in FIG. 1 includes a transversal filter unit 1, a tap coefficient updating unit 2, a DC monitoring unit 3, a switching unit 4,
The rounding processing unit 5 and the rounding processing unit 6 are connected as illustrated.

In FIG. 1, the DC monitoring unit 3 DC-integrates the output signal of the filter unit 1, and if the integrated value is larger than a predetermined threshold value, that is, if the value seen as the DC offset is larger than the threshold value, the least significant bit is set. The switching unit 4 is connected to the rounding processing unit 5 to the tap coefficient updating unit 2 so that the rounding processing is performed. In the opposite case, the cutoff processing unit 6 is connected to the tap coefficient updating unit 2. Here, the "rounding process" means that "1" is added to the next lower bit of the LSB and the value up to the LSB is used. Therefore, if the next lower bit of LSB is “1”, L
Carry occurs on SB. On the other hand, "truncation processing" means LSB
The value is truncated regardless of the value of the next lower bit of. By performing the processing as described above, the tap coefficient updating unit 2 can update the tap coefficient without being affected by the DC offset. Thereby, the stability of the system is improved and the characteristics are not deteriorated. Even if the bit length is relatively small, the stability is improved and the characteristics are not deteriorated.

The second form of the adaptive filter of the present invention is shown in FIG.
In FIG. 2, a switching control unit 7 is provided in place of the DC monitoring unit 3 of FIG.

The switching control unit 7 performs the rounding process and the truncation process at a constant rate. That is, since the equivalent of the DC offset appears at a certain ratio,
The rounding processing unit 5 and the truncation processing unit 6 are selectively operated at a predetermined constant rate without monitoring the output of the adaptive filter 1.

〔Example〕

A block diagram of an adaptive filter as a first embodiment of the present invention is shown in FIG. FIG. 3 shows one stage, i-th stage, of the adaptive filter. Therefore, as the actual adaptive filter, the required number of stages and the configuration shown in FIG. 3 are used.

In FIG. 3, the unit delay element 11i functioning as a tap delay line and the multiplication unit 12i form a part of the transversal filter unit 1. The output of the multiplication unit 12i is the subtraction unit 2
The reference value REF is reduced by 5i to obtain the error ΔE. Error Δ
E is multiplied by the control coefficient βi in the multiplication unit 24i. Multiplier 24i
Is multiplied by the output of the unit delay element 11i in the multiplication unit 23i and applied to the addition unit 22i. The addition unit 22i adds the value delayed by the delay unit 21i that delays the output and the output of the multiplication unit 23i. The output of the delay unit 21i is output to the multiplication unit 12i as the tap coefficient i. The elements 21i to 25i form the tap coefficient updating unit 2.

The error ΔE from the subtraction unit 25i is integrated by the integration unit (or low-pass filter unit) 31i, and the one corresponding to the DC offset is calculated. The one corresponding to this DC offset is compared with the threshold value VL _{TH in the} comparison unit 32i. Integrator 31i and comparator 32
The i and the direct current monitoring unit 3 are configured. The output of the comparison unit 32i is "1"
, That is, the value corresponding to the DC offset is the threshold VL
_When it is larger than _TH , the rounding process is performed in the adding unit 32i, and when the output of the comparing unit 32i is "0", the rounding process is performed. From the above, the comparison unit 32i and the addition unit 22i also have the functions of the switching unit 4, the rounding processing unit 5, and the rounding processing unit 6.

The characteristics when the above processing is performed with 12 bits are shown in FIGS. 4 (a) and 4 (b). The vertical axis represents power and the horizontal axis represents frequency. The solid line in FIG. 4A shows the characteristics when only the rounding process is applied, and the alternate long and short dash line shows the characteristics when only the truncation process is applied. The solid line in FIG. 4 (b) shows the characteristic obtained by the embodiment of the present invention described above, and is the characteristic obtained by combining the solid line and the broken line in FIG. 4 (a). The broken lines in FIGS. 4A and 4B show the characteristics that should be obtained.

As described above, according to the first embodiment of the present invention, good characteristics can be obtained with a small bit length. The system is stable and does not fall into a locally stable state.

FIG. 5 shows a block diagram of the adaptive filter of the second embodiment of the present invention. Instead of the DC monitoring unit 3 in FIG. 3, a switching control unit 7
The counter 71 is used to perform the rounding process and the truncation process at constant time intervals (constant ratio). Others are the same as those described with reference to FIG.

〔The invention's effect〕

As described above, according to the present invention, an adaptive filter having a stable system and good characteristics can be obtained even with a relatively small bit length.

Further, according to the present invention, even when it is used in a narrow band, it does not fall into local stability.

[Brief description of drawings]

1 and 2 are block diagrams of the principle of the adaptive filter of the present invention, FIG. 3 is a block diagram of the adaptive filter of the first embodiment of the present invention, and FIGS. 4 (a) and 4 (b) are the implementation of the present invention. FIG. 5 is a characteristic diagram of an example, FIG. 5 is a configuration diagram of an adaptive filter of the second embodiment of the present invention, and FIGS. 6 and 7 are diagrams showing an example to which the adaptive filter of the present invention is applied. (Description of symbols) 1 ... Transversal type adaptive filter, 2 ... Tap coefficient updating unit, 3 ... DC monitoring unit, 4 ... Switching unit, 5 ...
Rounding processing unit, 6 ... Truncation processing unit, 7 ... Switching control unit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-63-204810 (JP, A) JP-A-53-3759 (JP, A) JP-B 1-336726 (JP, B2) JP-B 2- 24410 (JP, B2) IEICE Transactions Vol. J63-A No. 10 "Rounding noise suppression method for digital signal processing circuits in the time domain" pp. 657-664 The Institute of Electronics and Communication Engineers Transactions 80/12 Vol. J 63-A No. 12 “State-equation-based synthesis of limit-cycle sequence digital filters”, pages 870-876

Claims (2)

(57) [Claims] 1. A transversal type filter unit (1) in which a coefficient of each stage is appropriately updated by a tap coefficient updating unit (2).
In the adaptive filter having, the DC component of the output of the filter unit (1) is integrated in the DC monitoring unit (3) for each stage of the adaptive filter, and when the integrated value is equal to or greater than a certain value, taps of the adaptive filter The least significant bit generated during the arithmetic operation for updating the coefficient is rounded by the rounding processing unit (5), and when the value is less than the certain value, the least significant bit is rounded down by the rounding processing unit (6). An adaptive filter characterized in that the processing result is applied to a tap coefficient updating unit (2) to update the tap coefficient of the filter unit (1). 2. A transversal filter unit (1) in which the coefficient of each stage is appropriately updated by a tap coefficient updating unit (2).
In the adaptive filter having, the rounding process to the least significant bit generated during the arithmetic operation for updating the tap coefficient of the adaptive filter, which is connected to the tap coefficient updating unit (2) of the adaptive filter, so as to selectively operate. The rounding processing unit (5) for performing or the truncation processing unit (6) for performing the truncation processing on the least significant bit is fixedly operated by the switching control unit (7) at a fixed ratio and applied, and the filter unit (1 ), The adaptive filter configured to update the tap coefficient of.