JP2500873B2 - Micro computer system - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer system having a power saving function while waiting for a key input.

[0002]

2. Description of the Related Art In recent years, due to advances in semiconductor technology, it is possible to construct a high-performance computer system and easily design a system simply by combining a microprocessor and its peripheral control LSI.

By the way, many microprocessors used in personal computers and the like are composed of N-channel MOS circuits. This N channel MO
In the method using the S circuit, no consideration is given to the power saving function (power saving), and when the computer system is constructed, the power consumption tends to be relatively increased. In a computer system, key input data is input from a keyboard, but a state of waiting for key input from this keyboard may occur. If there is no power saving function, so to speak, useless power consumption increases when waiting for a key input. In particular, in a battery-driven microcomputer system, the power saving function is one of the important functions because it is necessary to make the battery power source last longer.

On the other hand, recently, a microprocessor composed of a CMOS circuit has been developed, and a CMOS
Some have come to have a power saving function utilizing the low power consumption characteristics of the circuit.

Such a microprocessor has a CP
When U executes a HALT (halt) instruction to stop the execution of the application program, the power consumption is reduced as compared with the normal operation, and there is a power saving to about 1/10. When executing this HALT command,
Since the number of accesses to the memory is also reduced, the power consumption of the memory is also reduced.

By the way, in a normal microcomputer system, as shown in FIG. 3, key input control is executed by a key input routine of a BIOS (basic input / output system). The key input routine is composed of a one-character input routine shown in FIG. 9A and a buffer check routine shown in FIG.

The one-character input routine is a control routine for fetching one character's worth of key input data (step S11) when the key-in data is stored in the key-in buffer (YES in step S10). is there. On the other hand, the buffer check routine is a routine for checking whether or not the key input data is stored in the key-in buffer (step S12).

[0008]

In the conventional microcomputer system, a HALT command is inserted during the key input control by the key input routine (step S13 shown in FIG. 3A) to save power in the key input waiting state. It is possible to plan.

Here, normally, when executing an application program, the buffer check routine is executed first, and then the one-character check routine is executed.
When executing this buffer check routine, if it is determined that there is no key input data in the key-in buffer, the BIOS does not execute the one-character check routine. Therefore, conventionally, the CPU does not always execute the HALT instruction even if the HALT instruction is inserted in the one-character check routine in the key input waiting state. Therefore, the power save function may not be surely realized in the key input waiting state.

An object of the present invention is to provide a microcomputer system which can surely realize a power saving function in a key input waiting state by utilizing execution of a HALT instruction during key input control by a key input routine. It is in.

[0011]

According to the present invention, there is provided a judging means for judging whether or not key input data is stored in the key-in buffer means as a microprocessor executes an application program, and a key input waiting state. The microcomputer system is provided with a halting means for executing a halting operation and a canceling means for canceling the halting operation of the halting means when an interrupt is generated by the interrupt generating means.

[0012]

In the present invention, the buffer check routine for determining whether or not the key input data is stored in the key-in buffer means is executed, and the HALT instruction is executed in the key input waiting state. The halt operation by the HALT instruction is canceled by the interrupt from the interrupt generating means. As a result, the power saving of the microprocessor in the key input waiting state is made to function.

[0013]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a main part of a microcomputer system according to the embodiment. The system comprises a keyboard unit 3 connected to a CPU board 1 via a serial interface transfer path 2.

On the CPU board 1, a microprocessor (CPU) 11, a memory unit 12, a timer 13 and a serial / parallel conversion circuit 14 are mounted. CPU11
Is composed of a CMOS circuit and has a power saving function by executing a HALT instruction. The memory unit 12 has a key-in buffer 121, and stores key-in data (key-in data) input from the keyboard unit 3 in the key-in buffer 121.

The serial-parallel conversion circuit 14 is connected to the keyboard unit 3 through the serial interface transfer path 2 and converts serial key input data into parallel data and transfers it to the key-in buffer 121. Further, the serial-parallel conversion circuit 14 is connected to the CPU 11 through the interrupt line INT2, and transfers an interrupt signal by a key input from the keyboard unit 3 to the CPU 11.

The timer 13 is, for example, HAL of the CPU 11.
The LSI counts a predetermined timer time from the execution of the T instruction and outputs a timer-out interrupt signal to the CPU 11 through the interrupt line INT1. Next, the operation of the embodiment will be described.

First, when key input data is input in response to a key operation of the keyboard unit 3, it is transferred to the serial / parallel conversion circuit 14 through the serial interface transfer path 2. When the serial-parallel conversion circuit 14 receives, for example, one byte of key input data, it outputs an interrupt signal to the CPU 11 through the interrupt line INT2. CPU11
Responds to the interrupt signal with 1 byte of key input data DATA from the serial / parallel conversion circuit 14 by the memory unit 12
Control to store the data in the key-in buffer 121. The CPU 11 uses the key input data stored in the key-in buffer 121 along with the execution of the application program to perform various types of data processing.

By the way, the CPU 11 executes key input control by a BIOS key input routine. The key input routine of the embodiment comprises a one-character input routine shown in FIG. 2A and a buffer check routine shown in FIG.

When the CPU 11 executes the application program, the buffer check routine is first executed to check whether or not the key input data is stored in the key-in buffer 121 (step S4). If the key input data is stored in the key-in buffer 121 (YES in step S1), the one-character input process for fetching the key input data for one character is executed (step S2).

That is, when one character of key input data is input from the keyboard unit 3, the CPU 11 takes in one character of key input data stored in the key-in buffer 121. The CPU 11 executes various data processing by using the obtained key input data for one character as the application program is executed.

Here, after the checking process of the buffer check routine, the CPU 11 inserts the H into the routine.
The ALT instruction is executed (step S5). This allows
The CPU 11 enters the HALT state in which the execution of the program is stopped. This HALT state is released by an interrupt signal from the serial / parallel conversion circuit 14 or the timer 13.

In this manner, the CPU 11 executes the HALT instruction to enter the HALT state even when the buffer check routine is executed first in association with the execution of the application program. When this HALT state is released by, for example, an interrupt signal from the timer 13, the one character input routine is started. In this one-character input routine, when there is no key input data in the key-in buffer, that is, when the key input is waiting, the CPU 11 causes the HAL
Execute the T instruction to enter the HALT state (step S
3).

Therefore, in the key input waiting state, the CPU 11 always executes the HALT instruction to enter the HALT state. This HALT state is released by an interrupt signal from the serial / parallel conversion circuit 14 or the timer 13, and HAL
The T state and the release will be repeatedly executed. As a result, in the key input waiting state, the HALT state is always brought about, so that the power saving function can be surely realized and useless power consumption can be reduced.

[0025]

As described in detail above, according to the present invention, the HALT instruction is always executed in the key input waiting state where there is no key input data, and the power saving function in the key input waiting state is surely realized. can do. Therefore, it is possible to reduce wasteful power consumption and reduce power consumption of the system.

[Brief description of drawings]

FIG. 1 is a block diagram showing a main part of a microcomputer system according to an embodiment of the present invention.

FIG. 2 is a flowchart for explaining the operation of the embodiment.

FIG. 3 is a flowchart for explaining a conventional method.

[Explanation of symbols]

3 ... Keyboard unit, 11 ... CPU, 121 ... Key-in buffer, 13 ... Timer, 14 ... Serial-parallel conversion circuit.

Claims (1)

(57) [Claims] 1. A microprocessor for executing an application program, keyboard means for inputting key input data, key-in buffer means for storing the key input data input by the keyboard means, and the microprocessor. Is executed by executing the application program, and it is determined whether or not the key input data is stored in the input routine for extracting the key input data input by the keyboard means from the key in buffer means. Input control means for executing a buffer check routine, and the microprocessor executes the application program, so that the buffer check routine is executed prior to the execution of the input routine. The determination result during execution of the case and the input routine of the key input waiting state when a key input waiting state either
Even in the case, it is provided with a halting means for performing a halting operation to stop the execution of the microprocessor, and a halting releasing means for canceling the halting operation of the microprocessor in response to the generation of a predetermined interrupt to the microprocessor. Characteristic microcomputer system.