JP2599146B2 - Clock signal generation circuit in optical disk device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a clock signal generating circuit in an optical disk device that reproduces clock pits recorded in advance on an optical disk and generates a clock signal serving as a reference for recording and reproducing information based on the reproduced signal. The purpose of the present invention is to generate a clock signal more quickly than before the optical disk reaches a steady rotation speed, and to generate a clock signal synchronized with the clock pit reproduction signal over a wide frequency range. A servo zone is alternately formed with a data zone by rotating a previously provided optical disk at a constant cycle by a motor, and recording and recording of data in the data zone using an optical head.
In an optical disc apparatus for reproduction, a rotary encoder that outputs a rotation detection pulse having a cycle corresponding to the number of rotations of the motor, and the unique distance is detected based on a reproduction signal and a clock signal from the optical head to reproduce the clock pit. A unique distance detector that outputs a pulse synchronized with a signal phase; a variable frequency oscillator that oscillates and outputs the clock signal; first and second frequency dividers that divide the clock signal; A first phase comparator for comparing the phase of the output signal of the frequency divider with the output signal of the unique distance detector, and a phase comparison between the output signal of the second frequency divider and the output rotation detection pulse of the rotary encoder A second phase comparator, and the first and second
And an adder for adding both output signals of the phase comparator and supplying the control signal to the variable frequency oscillator.

[Industrial applications]

The present invention relates to a clock signal generating circuit in an optical disk device, and more particularly to a clock signal in an optical disk device that reproduces clock pits recorded in advance on an optical disk and generates a clock signal serving as a reference for recording and reproducing information based on the reproduced signal. The present invention relates to a signal generation circuit.

Optical discs include write-once or rewritable discs in addition to read-only discs. The track servo system of an optical disk device that performs recording and reproduction on a write-once or rewritable optical disk is roughly classified into a continuous servo system using a pull group medium and a sample servo system using a pre-wobbled pit medium.

The present invention relates to the latter sample servo type optical disk apparatus. In this sample servo type, one beam spot scans an optical disk having a recording track as shown in FIG.

In FIG. 3, dashed lines t ₁ , t ₂ , and t ₃ indicate the optical disk 1
The track center lines of the tracks per revolution, 1376 Segment 1 Segment is a total consisting of servo zones S ₁ and 16-byte data zone D ₁ Metropolitan of each track for example 2 bytes (i.e., one sector in 43 segments Then, 32 sectors are formed in time series, and the optical disk is, for example, 1800 rpm
Rotated by

The servo zone S ₁ is shifted inward and outward relative to the track center lines t ₁ , t ₂ , and t ₃ , and a pair of wobbled pits 1 for tracking control recorded in advance in a disc manufacturing stage; A non-recording section (unique distance) 2 having a specific length that does not exist in all pit intervals of data recorded and reproduced in the data zone D ₁ , and one clock pit 3 pre-recorded immediately thereafter. Become.

In this sample servo method, the first pit immediately after detecting the unique distance 2 is recognized as a clock pit 3, and a clock signal is generated by a clock signal generation circuit based on a reproduction signal of the clock pit 3, and this clock signal is generated. The countdown is used to recognize the position of the wobbled pit 1 and to be used as a reference for data recording and reproduction. Therefore, the configuration of the clock signal generation circuit is important.

[Conventional technology]

FIG. 4 is a block diagram showing an example of a clock signal generating circuit in a conventional optical disk device of a sample servo system. 5, reference numeral 5 denotes an optical disk having the recording tracks shown in FIG. 3, reference numeral 6 denotes a spindle motor for rotating the optical disk 5, reference numeral 7 rotates integrally with the motor shaft of the spindle motor 6, and alternates at equal angular intervals. A disk having a hole and a portion where no hole is formed on the circumference, 8 is a photointerrupter whose optical path is intermittently interrupted by the disk 7, and the disk 7 and the photointerrupter 8 constitute a rotary encoder. ing.

The signal of the frequency fe taken out from the rotary encoder is supplied to the phase comparator 9 where it is compared in phase with the oscillation signal of the frequency fe by the oscillator 10 and converted into an error voltage corresponding to the phase difference between the signals.・ Drive amplifier
11 is applied to the spindle motor 6. Thus, the spindle motor 6 is rotated at a constant speed of, for example, 1800 rpm.

On the other hand, an optical head for irradiating the optical disk 5 with a light beam, receiving the reflected light obtained thereby, and performing photoelectric conversion
The reproduction signal extracted from 12 is supplied to a unique distance detector 13, where a unique distance 2 is detected.

The output detection signal of the unique distance detector 13 or the signal from the oscillator 15 is selectively output by the switch 14 and supplied to the phase comparator 16. A loop consisting of a phase comparator 16, a voltage controlled oscillator (VCO) 17, and a 1 / n counter 18 constitutes a well-known phase locked loop (PLL) circuit. VCO17
The output signal while being supplied to the unique distance detector 13, is output to the output terminal 19 as a clock signal f _C.

Here, the unique distance detector 13 is configured as shown in FIG. The input terminal 21 receives a reproduction signal from the optical head 21, and the input terminal 22 receives an output clock signal of the VCO 17. Counter 23 counts the clock signal, the reproduced signal from the optical head 21 are configured to be cleared, shorter than the length of the unique distance 2, and longer than a pit interval of the data of the data zone D ₁ A high-level signal is output only when the clock signal is counted without being cleared during the distance scanning period. Therefore, the counter 23 always outputs a low-level signal during the data zone scanning period, becomes high during the scanning of the unique distance 2, and
A signal which becomes low level immediately after the reproduction of the clock pit 3 is output.

The AND circuit 24 outputs the output signal of the counter 23 and the input terminal 2
A reproduction signal from the optical head 21 is supplied from 1 and a narrow positive pulse is output at the time of reproduction of the clock pit 3. This positive polarity pulse is used as a unique distance detection pulse (or clock pit detection pulse) at the output terminal 25.
Taken out.

Here, in order for the unique distance detector 13 to perform the above-described detection operation normally, the optical disk 5 rotates at a steady rotation speed or a rotation speed near the steady rotation speed, and the phase comparator 16 and the VCO 1
It is necessary that the PLL including the 7 and the 1 / n counter 18 perform the pull-in operation.

For this reason, in the prior art, the switch 14 shown in FIG.
As a result, an oscillation pulse having a repetition frequency f _CP (= f _C / n) equal to the unique distance detection pulse in the normal state from the oscillator 15 is selectively output and supplied to the phase comparator 16, and the PLL is pulled in immediately after startup, The unique distance detector 13 detects the unique distance 2 based on the output clock signal of the VCO 17 at this time, and the switch 14 is switched from the terminal 14b to the terminal 14a by the output of the detection pulse.

Thus, the clock signal is obtained immediately after the optical disk 5 is started. Further, the clock signal is obtained not only when the beam spot is on track, but also when the track servo is turned off.

[Problems to be solved by the invention]

In the above-described conventional circuit, the rotation speed of the optical disk 5 is at a predetermined steady rotation speed or a rotation speed close thereto,
Only when the actual clock pit 3 exists near the clock pit position calculated by the ideal clock signal, the unique distance detector 13 can detect the unique distance and identify the clock pit 3.

For this reason, the rotation accuracy of the optical disk 5 is strictly required, and at the time of startup, the unique distance cannot be detected until the rotation speed of the optical disk 5 reaches the vicinity of the steady rotation speed. Has a problem that a clock signal synchronized in phase with a reproduction signal of the clock pit 3 reproduced from the optical disk 5 cannot be obtained.

The present invention has been made in view of the above points, and generates a clock signal more quickly than before the optical disk reaches a steady rotation speed, and generates a clock signal phase-synchronized with the clock pit reproduction signal over a wide frequency range. It is an object of the present invention to provide a clock signal generation circuit in an optical disk device that can generate the clock signal.

[Means for solving the problem]

FIG. 1 is a block diagram showing the principle of the present invention. 4, the same components as those in FIG. 4 are denoted by the same reference numerals, and the description thereof will be omitted. The present invention relates to an optical disc apparatus, comprising: a rotary encoder 28 for outputting a rotation detection pulse having a cycle corresponding to the number of rotations of a motor 6; and a unique distance detector 1 for outputting a pulse synchronized with a reproduction signal phase of a clock pit.
3, variable frequency oscillator 32, first and second frequency dividers 33 and 3,
4. It comprises first and second phase comparators 29 and 30, and an adder 31 for supplying a control signal to the variable frequency oscillator 32.

The first phase comparator 29 compares the output signal of the first frequency divider 33 with the output signal of the unique distance detector 13.
The second phase comparator 30 compares the phase of the output signal of the second frequency divider 34 with the output rotation detection pulse of the rotary encoder 28.

[Action]

The output signal of the first phase comparator 29 is supplied to a variable frequency oscillator 32 through an adder 31, and variably controls the output oscillation frequency (clock signal). This clock signal is the first
Is supplied to the first phase comparator 29 through the frequency divider 33.
Accordingly, a loop circuit consisting of the first phase comparator → the adder 31 → the variable frequency oscillator 32 → the first frequency divider 33 → the first phase comparator 29 constitutes a first PLL.

Similarly, the loop circuit consisting of the second phase comparator 30 → the adder 31 → the variable frequency oscillator 32 → the second frequency divider 34 → the second phase comparator 30 constitutes a second PLL.

By the way, in the conventional circuit shown in FIG. 4, the rotary encoder is provided in the PLL for constant speed rotation of the motor 6, and is completely independent of the PLL for generating the clock signal.
In principle, the clock signal frequency f _C , the clock pit detection signal frequency f _CP (= f _C / n), and the rotation detection pulse frequency fe from the rotary encoder 28 are all proportional to the number of rotations of the optical disk 5. Are in a constant frequency ratio relationship. Therefore, fe = f _C / N (where N is a positive integer)
By choosing to the relationship, so that able to produce with the f _C share a clock signal creation PLL from fe.

However, in such a configuration, the gate timing cannot be obtained in principle, and the control band of the PLL cannot be obtained because N≫n in practice. Therefore, the jitter amount of the clock signal cannot be kept within an allowable range.

Therefore, in the present invention, the first P which generates f _C from f _CP
LL and the second PLL for producing f _C from fe are provided.
An output oscillation frequency of one variable frequency oscillator 32 is variably controlled by a signal obtained by combining output signals of two phase comparators 29 and 30 by an adder 31.

As a result, of the jitter of the clock signal caused by the rotation unevenness and the eccentricity of the optical disk 5, the low-frequency component follows the second PLL, and the high-frequency component of the jitter that cannot be completely followed by the second PLL. The components can be followed by the first PLL.

When the optical disk 5 has not yet reached the vicinity of the normal rotation speed immediately after startup, the rotary encoder 28 having a cycle corresponding to the low rotation speed of the optical disk 5 at that time.
The second PLL, to which the output rotation detection pulse is supplied as an input signal, can generate and output a clock signal having a cycle corresponding to a low rotation speed.

〔Example〕

FIG. 2 shows a block diagram of one embodiment of the present invention. In the figure, the same components as those of FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In FIG. 2, a rotary encoder
The rotation detection pulse of the repetition frequency fe from the photointerrupter 8 constituting 28 is supplied to the phase comparator 30, where the repetition frequency f _C /
After the phase comparison with the pulse of (m · n · l) (= fe),
This is supplied to the adder 31.

The adder 31 is also supplied with the output signal of the phase comparator 29, where it adds the output signal of the phase comparator 30 and applies the added composite signal to the VCO 35 as a control voltage. VCO
35 constitutes a variable frequency oscillator 32 outputs a clock signal of a repetition frequency f _C.

The output clock signal of the VCO 35 is supplied to the unique distance detector 13, while the 1 / n counter 36 and the 1 / m counter
The signal is supplied to the phase comparator 30 through a 37 and a 1 / l counter 38 in order. Further, the pulse of the repetition frequency f _C / n which is branched and taken out from the 1 / n counter 36 is supplied to the phase comparator 29.

Here, the 1 / n counter 36 constitutes the first frequency divider 33, and includes a 1 / n counter 36, a 1 / m counter 37, and a 1 / l counter 38.
Constitutes the second frequency divider 34. That is, 1 / n
The counter 36 is shared by the first and second frequency dividers 33 and 34.

On the other hand, the phase comparator 9 has a constant frequency from the reference oscillator 39.
The frequency f _c / (n) obtained by dividing the frequency of the reference signal of f _R and the clock signal extracted from the 1 / m counter 37 by 1 / (nm).
( _M ) (= f _R ), and an error signal corresponding to the phase difference is applied to the spindle motor 6 via the motor drive amplifier 11.

Since the output signal of the 1 / m counter 37 is phase-synchronized with the output rotation detection pulse of the rotary encoder 28, the spindle motor 6
The constant speed rotation control is performed so that both phases of the output signal 7 become the set phase.

In order to increase the rotational accuracy of the spindle motor 6, conventionally, it was necessary to change the configuration of the rotary encoder 28 so that a high-frequency rotation detection pulse was output. However, according to the present embodiment, the unique distance Once the detection is performed, the first PLL enters the pull-in operation, and a signal synchronized with the unique distance detection signal (frequency f _CP ) is extracted from the 1 / m counter 37. Is effectively f
_This is the same as _CP (= f _C / n), and the rotation accuracy can be increased even if the frequency fe (= f _C / m · n · l) of the output rotation detection pulse of the rotary encoder 28 is low.

For this reason, if a brushless motor that detects the magnetic pole position with a Hall sensor and switches the excitation phase is used as the spindle motor 6, the Hall sensor can be used as fe even if the output of the Hall sensor is about 10 pulses or less per rotation. It becomes unnecessary.

In the present embodiment, during a certain period immediately after the start-up in which the rotation speed of the optical disk 5 does not reach the vicinity of the steady rotation speed, the second PLL is driven by the V PLL.
The CO35 generates a clock signal with a frequency f _C corresponding to the rotation speed, while the optical head 12 provides a clock pit reproduction signal at a frequency corresponding to the rotation speed, so that unique distance detection can be performed more quickly than before. Will be.

When the optical disk 5 is rotating stably at a steady rotation speed, the second PLL follows the low-frequency component of jitter caused by uneven rotation or disk eccentricity, and the first PLL follows the high-frequency component. Since it follows, high follow-up performance is obtained as a whole.

The constant speed rotation control of the spindle motor 6 is performed by using the output rotation detection pulse of the rotary encoder 28 as a 1 / m counter 3
7 can be used instead of the output signal.

〔The invention's effect〕

As described above, according to the present invention, among the jitters of the clock signal caused by the rotation unevenness and the eccentricity of the optical disk, the first PLL follows the high frequency component, and the low frequency component Since the second PLL follows, high follow-up performance can be obtained as a whole, and the second PLL can cope with a low rotation speed even during a certain period immediately after startup when the optical disk has not reached near the steady rotation speed. It is possible to obtain a clock signal with a fixed period, and it is possible to detect a unique distance, and to generate a clock signal synchronized in phase with the reproduced signal of the clock pit more quickly than before. is there.

[Brief description of the drawings]

1 is a block diagram of the principle of the present invention, FIG. 2 is a block diagram of one embodiment of the present invention, FIG. 3 is a diagram showing recording tracks of an optical disk to which the present invention is applied, and FIG. FIG. 5 is a block diagram of an example of a unique distance detector. In the figure, 5 is an optical disk, 6 is a spindle motor, 12 is an optical head, 13 is a unique distance detector, 28 is a rotary encoder, 29 is a first phase comparator, 30 is a second phase comparator, and 31 is an addition. 32, a variable frequency oscillator, 33, a first frequency divider, 34, a second frequency divider, and 35, a voltage controlled oscillator (VCO).

Claims (1)

(57) [Claims] A servo zone comprising at least a unique distance and a clock pit is rotated alternately with a data zone by a motor (6) on an optical disk (5) provided at a constant period and using an optical head (12). An optical disk device for recording / reproducing data in / from the data zone, comprising: a rotary encoder (28) for outputting a rotation detection pulse having a cycle corresponding to the number of rotations of the motor (6); A unique distance detector (13) for detecting the unique distance based on a reproduction signal and a clock signal and outputting a pulse synchronized with a reproduction signal phase of the clock pit; and a variable frequency oscillator (3) for oscillating and outputting the clock signal.
2) and first and second frequency dividers (33, 3) for dividing the clock signal.
4); a first phase comparator (29) for comparing the output signal of the first frequency divider (33) with the output signal of the unique distance detector (13); A second phase comparison between the output signal of the frequency divider (34) and the output rotation detection pulse of the rotary encoder (28);
A phase comparator (30), and an adder (31) that adds the two output signals of the first and second phase comparators (29, 30) and supplies the sum as a control signal to the variable frequency oscillator (32). A clock signal generating circuit in an optical disk device, comprising: