JP2573067B2 - Information conversion device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information conversion device, and more specifically, to a signal suitable for a recording system or a transmission system when recording or transmitting a digital signal. And an information converter for converting the digital signal.

[Prior Art] Conventionally, as an information conversion method using a modulation method enabling high-density recording in PCM audio of a VTR or a digital audio tape recorder, for example, Japanese Patent Application Laid-Open No. 61-1964
There are those using the 8-14 modulation method disclosed in Japanese Patent Application Laid-Open No. 69-48646 and those using the 8-10 modulation method disclosed in Japanese Patent Application Laid-Open No. 60-48646.

Here, the former 8-14 modulation scheme is one of the modulation schemes of PCM signals that divides information to be converted into 8-bit units and converts this into a 14-bit code (code). By the way, in general, in a system recorded via a rotary transformer, it is difficult to process low frequency components. Therefore, a modulation system with as small a power spectrum component of a low harmonic as possible, that is, a DC-free modulation system is desirable. Tmin (However, Tw is when the time axis of the reproduced signal fluctuates due to jitter,
It is desirable that the detection window width, Tmin, which indicates the degree of margin in which no code error occurs, has a large (minimum magnetization reversal interval corresponding to the resolution of the recording mechanism), and high-density recording is possible. Furthermore, in order to minimize the peak shift due to intersymbol interference and improve the overwrite characteristics due to signal overwriting,
It is desirable that Tmax / Tmin (where Tmax is the maximum magnetization reversal interval) is small. It is desired that Tmin be large in order to minimize high frequency components.

FIG. 8 shows Tmin, Tmax, Tmax / Tmin, T of the 8-14 modulation method.
w, Tw ・ Tmin, DSVmax (DSV is Digital Sum Va
This is an abbreviation of riation, and is defined as +1 [positive polarity] when the waveform after the NRZI conversion of the modulation code sequence is high level and −1 [negative polarity] when the waveform is low level, and each code [code] of the modulation code sequence. (Indicating a value obtained by integrating the above). Note that a CDS (Codeword Digital Sum) indicates a DSV in one of the conversion codes (however, NRZI conversion starts from a low level).

On the other hand, the 8-10 modulation scheme is one of the modulation schemes of PCM signals in which information to be converted is divided into 8-bit units and converted into a 10-bit code (code). FIG. 8 shows the values of Tmin, Tmax, Tmax / Tmin, Tw, Tw · Tmin, and DSVmax.

[Problem to be Solved by the Invention] Since the conventional information conversion system is configured as described above, in the above 8-14 modulation system, since Tmax / Tmin is as large as 4.5, peak shift due to intersymbol interference is reduced. This is likely to occur, and the overwrite characteristics due to the overwriting of the signal will deteriorate. Also, in the 8-10 modulation method, Tmin is 0.
Since it is as small as 8T (where T is the data clock frequency), intersymbol interference becomes large, and Tw · Tmin is a little as small as 0.64.

In addition, since Tmax and Tmin are adjacent to each other, the worst peak shift due to intersymbol interference (“Digital magnetic recording”: see Shokodo, pp. 120-125) occurs, and the error rate becomes worse. there were.

The present invention has been made in order to solve the above-mentioned problems, and has a good overwrite characteristic, a peak shift due to intersymbol interference does not easily occur because there is no adjacent Tmax and Tmin, and high-density recording is possible. It is an object of the present invention to provide an information conversion device that becomes:

[Means for Solving the Problems] An information conversion apparatus according to the present invention converts an 8-bit information into a 14-bit NR whose code string has a “0” run length of 1 or more and 7 or less.
What is claimed is: 1. An information conversion apparatus for converting information into a ZI-based codeword, wherein a codeword in which a bit string having a "0" run-length of 1 and a bit string having a "0" run-length of 7 in a codeword are adjacent is removed.
The first codeword group in which the MSB side “0” run length is 0 or more and 0, and two CDS values in which the CDS の 0 is the positive / negative CDS value and the MSB side “0” run length is 2 or more. And a third group of codewords paired with two codewords whose MSB-side “0” run-length is 1,
By the “DSV” value and “polarity” at the end of the already converted codeword string, and “the LSB of the codeword converted immediately before”, the selection of the codeword in the current encoding and the
It is provided with means for selecting the MSB bit.

[Operation] The present invention excludes a code word in which a bit string having a “0” run length of 1 and a bit string having a “0” run length of 7 in a code word are adjacent, and “0” run length on the MSB side with CDS = 0. Is a first codeword group in which is greater than or equal to 2 and a second codeword in which the CDS ≠ 0 is the CDS value of which the sign is reversed and the “0” run length on the MSB side is 2 or more. A codeword group and a third codeword group in which two codewords each having a “0” run length of 1 on the MSB side are 1, and a “DSV” value at the end of the already converted codeword string Based on the "polarity" and the "LSB of the code word converted immediately before," a code word is selected in the current encoding and the MSB bit of the code word is selected.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

First, the characteristics of a code string converted by the information conversion method employed in one embodiment of the present invention will be described. The information conversion method in this embodiment converts 8-bit binary data into 14-bit encoded data.

Now, it is assumed that a code having a data word length = 8, a code length m = 14, and Tmax / Tmin = 4.0 is configured. At this time, d
(Ie, the smallest “0” between any “1” and the next “1”
) = 1, k (that is, the maximum number of “0” between any “1” and the next “1”) = 7. Where the sign is
The NRZI (F) rule is used.

In order to satisfy d = 1, the MSB (most significant bit) of the code word is always set to “0”. To satisfy k = 7, the maximum number of consecutive code words “0” is 3 bits on the MSB side. Within, LSB
If the number of bits is less than 4 on the (least significant bit) side, the number of code words shown in FIG. 1 is obtained.

Here, in order to construct a code that is DC-free, CDS
The number of code words satisfying> 0 and the number of code words satisfying CDS <0 may be the same.

Thus, 85 and +2 of those having a CDS of -2
85, -4 of 44 and 44 of +4, 13 of -6 and 13 of +6
And -8 and +8 each as two codewords,
In addition, a code word where CDS ≠ 0 is used as a pair of codewords of CDS> 0 and CDS <0. The codewords obtained in this way are divided into A group and B group, and these groups are switched and used so that DSV is reduced when forming a code sequence. However, those for which CDS = 0 are used for both group A and group B.

With the above configuration, the total codeword pair is 107 + 85 + 4
4 + 13 + 2 = 251 = 251 sets, 8 bit data (256
) Are insufficient for 5 sets. Therefore, a code word that does not satisfy the above-mentioned condition, that is, a code word in which the 4 bits on the MSB side are “0” is used. Then, in order to satisfy the “0” run-length constraint also at the joint of the codewords, when the LSB of the codeword converted immediately before is “0”, the MSB of the codeword to be converted this time is converted to “1”. On the other hand, when the LSB of the code word converted immediately before is “1”, the code word in which the MSB side 4 bits of the code word to be converted this time is “0” is used as it is.

In the case of the above configuration, the number of code words shown in FIG. 2 is obtained.

Further, among the above codewords, a pair of codewords in which two or more bits on the MSB side are “0” is paired with the MSB when the LSB of the codeword converted immediately before is “0”. Convert to "1". In this way, the number of “1”, that is, the magnetization reversal interval increases, the extremely low frequency component decreases, and the power can be concentrated. Further, adjacent to Tmax and Tmin, that is, "... 10100000001 ..." or "... 10000000101"
The following restrictions are added so that "..." does not occur.

(1) Do not use codewords that are adjacent to Tmax and Tmin in the codeword.

(2) Since “0” is present up to the LSB side 4 bits of the codeword, so that Tmax does not exist at the connection part of the codeword, when the MSB side 3 or more bits are “0”, as described above, If the LSB of the code word converted immediately before is “0”, the MSB is converted to “1”.

(3) Since there is a code word whose LSB is “1”, “0”
100000001... Are not used.

(4) Even if the LSB of the code word converted immediately before is “001”, the MSB is not converted to “1”.

In order to realize the above, codewords (codes) are divided into the following four groups.

(I) CDS = 0 and MSB can be converted to “1” (ii) CDS = 0 and MSB cannot be converted to “1” (iii) CDSC0 and MSB can be converted to “1” (iv) CDS ≠ 0 and MSB is not converted to “1” And in the case of (i) and (iii) groups,
If the LSB of the code word converted immediately before is “0”, the MSB of the code word converted this time is converted to “1”. Conversely, the LSB of the code word converted immediately before is “1”. In this case, the MSB of the codeword converted this time is not converted to “1”. (Ii) and (i
v) In the case of a group, the LSB of the codeword just converted
Regardless, the MSB of the codeword converted this time is not converted to “1”.

Codewords that meet the above condition (2) are put into the group (i) or (iii), and codewords that meet the condition (4) are put into the group (iv).

FIG. 3 shows a method of selecting a codeword described above, and FIGS. 4A to 4H show conversion tables used for conversion into a codeword and the above selection.

Here, the code words of the above groups (i) to (iv) are (i)... 02 to 25 and E5 to FF (ii)... 26 to 41 and D0 in FIG. 4A to FIG. ~ E4 (iii) ... 72 ~ AB (iv) ... 00,01, and 42-71.

In FIG. 3, the polarity is information indicating the level after NRZI modulation at the end of the converted code string, and the state terminated at the high level is positive, and the state terminated at the low level is negative. Define.

By the combination of the above conversion codes, “0” between any “1” in the converted encoded data and the next “1”
The minimum value of the number is 1, the maximum value is 7, that is, Tmax / Tmin is
4.0, and it is possible to realize encoding in which Tmax and Tmin are not adjacent to each other. Tw · Tmin is 8-14
This is 0.653 which is the same as the modulation method, which is larger than 0.64 of the 8-10 modulation method, and enables high-density recording. Moreover, the divergence range of DSV (the width between the maximum and minimum values of DSV) is ± 9, and D
C free.

FIG. 5 is a diagram showing a case in which conversion is performed in the information conversion method according to one embodiment of the present invention. As the coding condition, the LSB of the code word converted immediately before is "0".
It is assumed that the signal ends at "L" level after NRZI modulation and DSV = 0. FIG. 11A shows the original data before conversion, and FIG. The coded data after the conversion when the original data is converted by the information conversion method in one embodiment of the present invention is shown.

FIG. 6 is a block diagram showing a configuration of an information conversion apparatus according to an embodiment of the present invention which realizes the above-described information conversion method. In the figure, this information conversion apparatus has input terminals 1 and 2 and , A latch circuit 3, an encoder 4, an arithmetic unit 5, an OR gate 6, a latch circuit 7, a parallel / serial converter 8, an input terminal 9, and an output terminal 10. The input terminal 1 inputs 8-bit parallel data (denoted as DATA IN in the figure). The input terminal 2 is connected to a latch clock (LATCH C in the figure) for defining the timing for latching 8-bit input data from the input terminal 1.
LK). The latch circuit 3 latches 8-bit input data from the input terminal 1 in synchronization with the latch clock. The encoder 4 stores a conversion table for encoding as shown in FIGS. 4A to 4H,
The 8-bit input data latched by the latch circuit 3 is
Based on this conversion table, it is converted into a corresponding 14-bit code word and output. At this time, based on the 1-bit group select signal supplied from the arithmetic unit 5, the latch circuit 3 converts the codeword of one of the groups A and B corresponding to the 8-bit input data in the conversion table. Select and output. Encoder 4
Outputs the CDS information corresponding to the output code word as 3-bit data. Furthermore, the encoder 4 outputs the codeword polarity of the codeword to be output (information indicating the level at the end of the codeword when the codeword is NRZI-modulated from the low level, and “1” when terminated at the high level; When terminating at a low level, “0”) is output as 1-bit data. Further, the encoder 4 outputs MSB conversion availability information indicating whether or not the output codeword is a codeword capable of converting the MSB to “1” by 1-bit data (“1” is available, “0” is No). The arithmetic unit 5 receives the 3-bit CDS information input from the encoder 4, 1-bit codeword polarity information, 1-bit MSB conversion availability information,
M which receives the LSB of the code word converted immediately before by the encoder 4 and controls the MSB of the code word to be converted this time
It outputs an SB control signal and a group select signal ("1" for group A, "0" for group B) that determines the group of codewords output by the encoder 4. OR gate 6
This is for converting the MSB of the codeword output from the encoder 4 to “1” based on the MSB control signal output from the arithmetic unit 5. The latch circuit 7 latches the 14-bit parallel code word converted by the encoder 4 in synchronization with a latch clock from the input terminal 2. The parallel / serial converter 8 is latched by the latch circuit 7.
The 14-bit parallel codeword is converted to serial and output. The input terminal 9 is connected to a channel clock (CHANNE
L CLK). The parallel / serial converter 8 is controlled by the channel clock, and sequentially outputs the 14-bit parallel codeword read from the latch circuit 7 serially from its MSB.
The output terminal 10 outputs the converted serial code string output from the parallel / serial converter 8.

As shown in FIG. 3, the MSB conversion availability information is “1” when the input data is 02 to 25, 72 to AB, and E5 to FF, and is “0” in other cases.

FIG. 7 is a timing chart showing the data after conversion and the timing of each clock in the embodiment of FIG. That is, FIG. 7A shows a latch clock, FIG. 7B shows a channel clock, and FIG. 7C shows converted data. Next, the operation of the embodiment shown in FIG. 6 will be described with reference to the timing chart of FIG.

The 8-bit input data input from the input terminal 1 is
Latch clock from input terminal 2 (see FIG. 7 (a))
Is latched by the latch circuit 3 in synchronization with the rising edge of. The 8-bit data output from the latch circuit 3 is input to the encoder 4. The encoder 4 selects a codeword group corresponding to the input data from the conversion tables shown in FIGS. 4A to 4H, and, based on the group select signal output from the arithmetic unit 5, selects the selected codeword group. And selects and outputs the codewords of either the A or B group. Further, the encoder 4 outputs the CDS information corresponding to the currently output codeword as 3-bit data, the codeword polarity information as 1-bit data, and the MSB conversion availability information as 1-bit data. The CDS information, codeword polarity information, and MSB conversion availability information are input to the arithmetic unit 5 together with the LSB signal of the previously converted codeword held in the latch circuit 7. First, the arithmetic unit 5 converts the 8-bit data to be converted this time based on the MSB conversion availability information and the LSB signal of the code word converted immediately before, in order to satisfy the “0” run-length constraint at the joint of the code words. Is one of 02 to 25, 72 to AB and E5 to FF, and if it is determined that the LSB of the code word converted immediately before is "0", "1" is output as the MSB control signal. Then, the MSB of the code word to be converted this time is converted to “1” via the OR gate 6. By this operation, even if the continuation of "0" is applied to the MSB side 4 bits and the LSB side 4 bits as the code word, the "0" run length constraint 1 to 7 is secured. Further, the arithmetic unit 5 accumulatively adds the CDS information output from the encoder 4 and detects the DSV up to the end of the code word converted immediately before, and the polarity in the code word output from the encoder 4 And exclusive-OR with the polarity up to the previously converted codeword to detect the polarity at the end of the current code string. Further, the arithmetic unit 5 associates the detected DSV with the polarity with the term of DSV, polarity in FIG. 3, and determines whether the CDS information output from the encoder 4 matches the condition shown in FIG. Check if. As a result of the check, if they match, the arithmetic unit 5 holds the group select signal output to the encoder 4 as it is. On the other hand, if they do not match, the group select signal is inverted, and the group of codewords output from the encoder 4 is switched. If the previous DSV is ± 0, DSV
In order to suppress the fluctuation as much as possible, the code word to be converted this time is selected from the A group in which the absolute value of the CDS is smaller than or equal to the B group. Furthermore, in the case of a code word of CDS = 0, DSV is obtained regardless of which of the groups A and B is selected.
In this embodiment, the group select signal is controlled so as to select the A group. As a result, at the joint between codewords, DSV
Are selected as 0, ± 2, ± 4. The 14-bit code word selected in this way is input terminal 2
7 is latched by the latch circuit 7 in synchronization with the rising of the latch clock (see FIG. 7 (a)). The CDS information output from the encoder 4 in synchronization with the rise of the latch clock is added to the immediately preceding DSV in the arithmetic unit 5, and the polarity information in the code word is the polarity already detected in the arithmetic unit 5. XORed with information. The result becomes DSV and polarity information when the next information is converted. Note that M
If the SB control signal is encoded with “1”,
The arithmetic unit 5 converts the CDS information output from the encoder 4 into-
The value obtained by multiplying 1 is added to the DSV, and the result obtained by inverting the polarity information in the code word output from the encoder 4 is exclusive-ORed with the polarity information detected until the previous encoding.

The 14-bit code word converted as described above is input from the latch circuit 7 to the parallel / serial converter 8, and is synchronized with the channel clock (see FIG. 7 (b)).
The data is sequentially output serially from the MBS (see FIG. 7 (c)), further subjected to NRZI modulation processing, and then output to a recording amplifier (not shown).

In the above embodiment, the polarity in the code word, the CDS
Although the information and the MSB conversion availability information are output from the encoder 4, the information is not output, and information is obtained by calculation from the code converted by the 14-bit parallel / serial converter 8. Good.

[Effects of the Invention] As described above, according to the present invention, the “DSV value” and “polarity” at the end of the already converted codeword string, and the “LSB of the codeword converted immediately before”, Since the selection of the code word and the selection of the MSB bit of the code word in the encoding of the above can be converted to a code form suitable for digital recording, peak shift due to intersymbol interference is unlikely to occur, and In addition, the overwriting characteristics by overwriting are good, and an extremely excellent effect that high-density recording is possible is achieved.

[Brief description of the drawings]

FIG. 1 is a diagram showing the number of code words used in one embodiment of the present invention. FIG. 2 is a diagram showing the number of codeword pairs. FIG. 3 is a diagram showing a method of selecting a codeword in one embodiment of the present invention. FIGS. 4A to 4H are diagrams showing conversion tables used for converting input information into codewords in one embodiment of the present invention. FIG. 5 is a timing chart showing an example of data conversion by the information conversion method in one embodiment of the present invention. FIG. 6 is a block diagram showing a configuration of an information conversion device according to one embodiment of the present invention. FIG. 7 is a timing chart for explaining the operation of the embodiment shown in FIG. FIG. 8 is a diagram comparing and showing respective parameters of the conventional 8-14 modulation method, 8-10 modulation method and the information conversion method in one embodiment of the present invention. In the figure, 3 and 7 are latch circuits, 4 is an encoder, 5
Denotes an arithmetic unit, and 8 denotes a parallel / serial converter.

Claims (1)

(57) [Claims] 1. An information conversion apparatus for converting 8-bit information into a 14-bit NRZI-based codeword having a code string having a run length of “0” of 1 or more and 7 or less, wherein “0” is included in the codeword. Bit string with run length of 1 and "0"
Excluding codewords adjacent to a bit string having a run length of 7 and a first codeword group having "0" runlength on the MSB side with CDS = 0 and 2 or more, and CDS ≠ 0 with the opposite CDS value Yes, MS
A second codeword group in which two codewords each having a B-side “0” run length of 2 or more are paired, and two codewords each having a MSB-side “0” runlength of 1 are paired. And a third codeword group, and the “DSV” value and the “polarity” at the end of the already converted codeword string, and the “LSB of the codeword that was converted immediately before”, and the code in the current encoding. Word selection and codeword
An information conversion device comprising means for selecting an MSB bit.