JP2024039516A - Semiconductor device and switching circuit - Google Patents

Abstract

To provide a semiconductor device capable of suppressing excessive voltage breakdown.SOLUTION: A switching transistor M1 is a Gallium Nitride High Electron Mobility Transistor (GaN-HEMT) formed on a GaN chip. A resistor R1, which is an impedance component, is connected between a first gate terminal G1 and a gate of the switching transistor M1. A first rectifying element D1 is connected in parallel to the resistor R1 between the first gate terminal G1 and the gate of the switching transistor M1, in a direction that an anode is on a side of the gate of the switching transistor M1. A second rectifying element D2 is connected in parallel to the resistor R1 between the first gate terminal G1 and the gate of the switching transistor M1, in a direction that a cathode is on a side of the gate of the switching transistor M1.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to a semiconductor device.

Switching circuits such as half-bridge circuits and full-bridge circuits are used in the field of power electronics, including DC/DC converters, AC/DC converters, and inverters.

In the field of power electronics, a transition from conventional Si devices to GaN devices is underway as switching devices used in switching circuits. Since GaN devices have a lower on-resistance than Si devices, they can operate with high efficiency. Further, since the switching loss is small, the switching frequency can be increased, which brings about the advantage that the size of the accompanying inductor etc. can be reduced, and the device can be made smaller.

US Patent Application Publication No. 2020/0044554

As described above, GaN-HEMTs have superior characteristics compared to Si-MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), but they have a problem of low gate breakdown voltage. Specifically, a Si-MOSFET has a gate-source threshold voltage of 2 to 4V, but a gate breakdown voltage of about ±20V. On the other hand, GaN-HEMTs have a threshold voltage of about 0.6 to 2.5V, but a gate breakdown voltage of 2 to 10V, which is low.

If a parasitic inductor exists on the transmission path of the gate signal of the GaN-HEMT, the gate voltage may jump due to ringing and may exceed the withstand voltage.

The present disclosure has been made in view of the above problems, and one exemplary objective of a certain aspect thereof is to provide a semiconductor device that can suppress overvoltage breakdown.

A semiconductor device according to an embodiment of the present disclosure includes a GaN chip, a switching transistor that is a GaN-HEMT (High Electron Mobility Transistor) formed on the GaN chip, a drain terminal connected to the drain of the switching transistor, and a switching transistor. a source terminal connected to the source of the switching transistor, a first gate terminal, an impedance element connected between the first gate terminal and the gate of the switching transistor, and an impedance element between the first gate terminal and the gate of the switching transistor. A first rectifier element connected in parallel with the anode facing the gate side of the switching transistor, and an impedance element connected in parallel between the first gate terminal and the gate of the switching transistor, the cathode facing the gate side of the switching transistor. and a second rectifying element connected in the same direction.

Note that arbitrary combinations of the above components, and mutual substitution of components and expressions among methods, devices, systems, etc., are also effective as aspects of the present invention or the present disclosure. Furthermore, the description in this section (Means for Solving the Problems) does not describe all essential features of the present invention, and therefore, subcombinations of the described features may also constitute the present invention. .

According to an aspect of the present disclosure, it is possible to suppress the gate voltage from exceeding the breakdown voltage.

FIG. 1 is a block diagram of a switching circuit according to an embodiment. FIG. 2 is a waveform diagram illustrating the turn-on operation of the switching transistor M. FIG. 3 is a waveform diagram illustrating the turn-off operation of the switching transistor M. FIG. 4 is a circuit diagram of a switching circuit according to Modification 1. FIG. 5 is a circuit diagram of a switching circuit according to a second modification. FIG. 6 is a circuit diagram of a switching circuit according to modification example 3.

(Summary of embodiment)
1 provides an overview of some exemplary embodiments of the present disclosure. This Summary is intended to provide a simplified description of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments and as a prelude to the more detailed description that is presented later. It does not limit the size. This summary is not an exhaustive overview of all possible embodiments and is not intended to identify key elements of all embodiments or to delineate the scope of any or all aspects. For convenience, "one embodiment" may be used to refer to one embodiment (example or modification) or multiple embodiments (examples or modifications) disclosed in this specification.

A semiconductor device according to an embodiment includes a GaN chip, a switching transistor that is a GaN-HEMT (High Electron Mobility Transistor) formed on the GaN chip, a drain terminal connected to the drain of the switching transistor, and a switching transistor that is a GaN-HEMT (High Electron Mobility Transistor) formed on the GaN chip. A source terminal connected to the source, a first gate terminal, an impedance element connected between the first gate terminal and the gate of the switching transistor, and an impedance element connected in parallel between the first gate terminal and the gate of the switching transistor. A first rectifier element connected in a direction such that its anode is on the gate side of the switching transistor, and a first rectifier element connected in parallel with an impedance element between the first gate terminal and the gate of the switching transistor, and a cathode connected in a direction such that its cathode is on the gate side of the switching transistor. and a second rectifying element connected by.

According to this configuration, when the switching transistor is turned on and the high voltage _VH is applied to the first gate terminal, the gate capacitance of the switching transistor is charged via the first rectifying element, and the gate voltage is The voltage rises to V _H -V _F , and then rises to V _H through the resistance. V _F is the forward voltage of the first rectifying element. Ringing occurs during a period of several nanoseconds immediately after the high voltage _VH is applied, but during this time, the voltage clamping by the first rectifying element is not effective because current is flowing through the first rectifying element. Because of this, it is possible to suppress the jump in the gate voltage and prevent it from exceeding the gate withstand voltage.

In one embodiment, the semiconductor device may further include a second gate terminal directly connected to the gate of the GaN-HEMT. This allows high or low voltage to be applied directly to the gate of the switching transistor without going through the resistor, the first rectifying element, and the second rectifying element, making it possible to prevent self-turn-on. .

In one embodiment, each of the first rectifying element and the second rectifying element may be a GaN-HEMT whose gate and drain are shorted.

In one embodiment, the impedance element may be a resistor.

In one embodiment, the switching transistor impedance element may be a normally-on GaN-HEMT with a gate and source shorted.

A switching circuit according to an embodiment may include any of the semiconductor devices described above and a gate drive circuit that drives a switching transistor of the semiconductor device.

In one embodiment, the gate drive circuit may be monolithically integrated into one semiconductor substrate. "Integration" includes cases where all of the circuit components are formed on a semiconductor substrate, cases where the main components of the circuit are integrated, and some of the components are integrated to adjust the circuit constants. A resistor, a capacitor, etc. may be provided outside the semiconductor substrate. By integrating circuits on one chip, the circuit area can be reduced and the characteristics of circuit elements can be kept uniform.

(Embodiment)
Hereinafter, preferred embodiments will be described with reference to the drawings. Identical or equivalent components, members, and processes shown in each drawing are designated by the same reference numerals, and redundant explanations will be omitted as appropriate. Furthermore, the embodiments are illustrative rather than limiting the disclosure and invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the disclosure and invention.

In this specification, "a state in which member A is connected to member B" refers to not only a case where member A and member B are physically directly connected, but also a state in which member A and member B are electrically connected. This also includes cases in which they are indirectly connected via other members that do not substantially affect the connection state or impair the functions and effects achieved by their combination.

Similarly, "a state in which member C is connected (provided) between member A and member B" refers to a state in which member A and member C or member B and member C are directly connected. In addition, it also includes cases where they are indirectly connected via other members that do not substantially affect their electrical connection state or impair the functions and effects achieved by their combination.

In addition, in this specification, the symbols attached to electrical signals such as voltage signals and current signals, or circuit elements such as resistors, capacitors, and inductors are used as necessary to indicate the respective voltage value, current value, or circuit constant (resistance). value, capacitance value, inductance).

FIG. 1 is a block diagram of a switching circuit 100 according to an embodiment. The switching circuit 100 includes a semiconductor device 200 and a gate drive circuit 300. The semiconductor device 200 includes a GaN chip (GaN substrate) 202, a drain terminal D, a first gate terminal G1, and a source terminal S.

The switching transistor M1 is a GaN-HEMT (High Electron Mobility Transistor) formed on the GaN chip 202. The drain terminal D is connected to the drain of the switching transistor M1, and the source terminal S is connected to the source S of the switching transistor M1.

In addition to the switching transistor M1, the GaN chip 202 integrates a resistor R1, a first rectifying element D1, and a second rectifying element D2.

The resistor R1 is an impedance element connected between the first gate terminal G1 and the gate of the switching transistor M1.

The first rectifying element D1 is connected in parallel with the resistor R1 between the first gate terminal G1 and the gate of the switching transistor M1, with its anode facing toward the gate of the switching transistor M1.

The second rectifying element D2 is connected in parallel with the resistor R1 between the first gate terminal G1 and the gate of the switching transistor M1, with its cathode facing toward the gate of the switching transistor M1.

Gate drive circuit 300 drives switching transistor M1 of semiconductor device 200 in response to a control signal at input terminal IN. The gate drive circuit 300 is formed on a Si chip, and includes a pre-driver 302 provided at the final stage. Pre-driver 302 may include a PMOS transistor MP1 and an NMOS transistor MN1. A power supply voltage _VDD is applied as a high voltage to the source of the PMOS transistor MP1. Here, the reference for each voltage is assumed to be the source (source terminal S) of the switching transistor M1. Here, for ease of understanding and simplification of explanation, it is assumed that the voltage of the source terminal S is 0V. In addition to the predriver 302, a logic circuit and other circuit blocks are formed in the gate drive circuit 300.

The first output terminal OUT1 of the gate drive circuit 300 is connected to the first gate terminal G1 of the semiconductor device 200. The switching circuit 100 may be housed in one package, or the semiconductor device 200 and the gate drive circuit 300 may be housed in separate packages.

The above is the configuration of the switching circuit 100. Next, we will explain its operation.

FIG. 2 is a waveform diagram illustrating the turn-on operation of the switching transistor M1. Before time _t0 , the control signal IN is low, and the voltage VG1 of the first output terminal OUT1 of the gate drive circuit 300 and the first gate terminal G1 of the semiconductor device 200 is _0V . The gate voltage Vg of the switching transistor M1 is also zero, and the switching transistor M1 is in an off state.

When the control signal IN becomes high at time t ₀ , the voltage V _G1 at the first gate terminal G1 of the semiconductor device 200 increases toward the power supply voltage V _DD . In the turn-on operation of the switching transistor M1, the relationship V _G1 > Vg holds, so no current flows through the second rectifying element D2, and the gate capacitance of the switching transistor M1 increases through the first rectifying element D1 and resistor R1. It will be charged. Here, the impedance of the resistor R1 is higher than the impedance of the first rectifying element D1, and immediately after time _t0 , the gate capacitance of the switching transistor M1 is mainly charged through the path via the first rectifying element D1. The gate voltage Vg rises to V _DD −V _F (t ₁ ). _VF is the forward voltage of the first rectifying element D1. When the gate voltage Vg reaches V _DD -V _F , current no longer flows through the first rectifying element D1, the gate capacitance of the switching transistor M1 is charged via the resistor R1, and the gate voltage Vg reaches the power supply voltage V _DD. Rise.

The above is the turn-on operation of the switching circuit 100. Bonding wires, wiring, etc. exist on the path from the output of the pre-driver 302 to the gate of the switching transistor M1, and these have parasitic inductance. Since the parasitic inductor forms a resonant circuit, switching the gate voltage causes ringing in the resonant circuit.

This ringing occurs in a short time period (on the order of several ns) immediately after turn-on. When ringing occurs during the period t ₀ to t ₁ in which current flows through the first rectifying element D1, the voltage clamping by the first rectifying element D1 is effective, so the gate voltage Vg is clamped to below V _DD −V _F be done. Thereby, the gate voltage Vg can be suppressed from exceeding the gate breakdown voltage of the switching transistor M1.

FIG. 3 is a waveform diagram illustrating the turn-off operation of the switching transistor M1. Before time _t0 , the control signal IN is high, and the voltage VG1 of the first output terminal OUT1 of the gate drive circuit 300 and the first gate terminal _G1 of the semiconductor device 200 is the high voltage _VDD . The gate voltage Vg of the switching transistor M1 is also a high voltage _VDD , and the switching transistor M1 is in an on state.

When the control signal IN becomes low at time _t0 , the voltage _VG1 at the first gate terminal G1 of the semiconductor device 200 decreases toward 0V. In the turn-off operation of the switching transistor M1, since the relationship V _G1 <Vg holds, no current flows through the first rectifying element D1, and the gate capacitance of the switching transistor M1 increases through the second rectifying element D2 and the resistor R1. Discharged. Here, the impedance of the resistor R1 is higher than the impedance of the second rectifying element D2, and immediately after time _t0 , the gate capacitance of the switching transistor M1 is mainly discharged through the path via the second rectifying element D2. The gate voltage Vg decreases to 0+V _F (t ₁ ). _VF is the forward voltage of the second rectifying element D2. When the gate voltage Vg decreases to 0+ _VF , current no longer flows through the second rectifying element D2, the gate capacitance of the switching transistor M1 is discharged via the resistor R1, and the gate voltage Vg decreases to 0V.

The above is the turn-off operation of the switching circuit 100. Even at turn-off, ringing occurs in the resonant circuit due to gate voltage transitions. When ringing occurs during the period t ₀ to t ₁ during which current flows through the second rectifying element D2, the voltage clamping by the second rectifying element D2 is effective, so the gate voltage Vg is clamped to 0V+V _F or more. Thereby, the gate voltage Vg can be suppressed from exceeding the negative gate breakdown voltage of the switching transistor M1.

Next, a modification of the switching circuit 100 will be explained.

FIG. 4 is a circuit diagram of a switching circuit 100A according to modification 1. The semiconductor device 200A further includes a second gate terminal G2. The second gate terminal G2 is directly connected to the gate of the switching transistor M1.

The gate drive circuit 300A further includes a second output terminal OUT2 and a pre-driver 304. The second output terminal OUT2 is connected to the second gate terminal G2.

Predriver 304 includes a PMOS transistor MP2 and an NMOS transistor MN2. The PMOS transistor MP2 is turned on after the gate voltage Vg of the switching transistor M1 rises to around the power supply voltage _VDD , and fixes the gate voltage Vg of the switching transistor M1 to the power supply voltage _VDD . The NMOS transistor MN2 is turned on after the gate voltage Vg of the switching transistor M1 transitions to 0V, and fixes the gate voltage Vg of the switching transistor M1 to 0V.

FIG. 5 is a circuit diagram of a switching circuit 100B according to a second modification. In this modification, the first rectifying element D1 and the second rectifying element D2 are composed of GaN-HEMTs whose gates and drains are short-circuited. A GaN-HEMT has a non-insulated gate and exhibits diode characteristics when a voltage above a certain level is applied between the gate and source. This diode characteristic can be used as a rectifier.

FIG. 6 is a circuit diagram of a switching circuit 100C according to modification 3. In this modification, a normally-on GaN-HEMT (depression type transistor) MD1 whose gate and source are shorted is used as an impedance element between the gate of the switching transistor M1 and the first gate terminal G1. The depletion type transistor MD1 is turned on, and its on-resistance functions as an impedance element.

Although the present invention has been described using specific words based on the embodiments, the embodiments merely illustrate the principles and applications of the present invention, and the embodiments do not include the scope of the invention defined in the claims. Many modifications and changes in arrangement are permitted without departing from the spirit of the invention.

(Additional note)
The following technology is disclosed in this specification.

(Item 1)
GaN chip and
a switching transistor that is a GaN-HEMT (High Electron Mobility Transistor) formed on the GaN chip;
a drain terminal connected to the drain of the switching transistor;
a source terminal connected to the source of the switching transistor;
a first gate terminal;
an impedance element connected between the first gate terminal and the gate of the switching transistor;
a first rectifier element connected in parallel with the impedance element between the first gate terminal and the gate of the switching transistor with an anode thereof facing the gate side of the switching transistor;
a second rectifier element connected in parallel with the impedance element between the first gate terminal and the gate of the switching transistor, with its cathode facing the gate side of the switching transistor;
A semiconductor device comprising:

(Item 2)
The semiconductor device according to item 1, further comprising a second gate terminal directly connected to the gate of the GaN-HEMT.

(Item 3)
3. The semiconductor device according to item 1 or 2, wherein each of the first rectifying element and the second rectifying element is a GaN-HEMT whose gate and drain are short-circuited.

(Item 4)
4. The semiconductor device according to claim 1, wherein the impedance element is a resistor.

(Item 5)
Switching Transistor The semiconductor device according to any one of items 1 to 4, wherein the impedance element is a normally-on GaN-HEMT with a gate and source shorted.

(Item 6)
The semiconductor device according to any one of items 1 to 5,
a gate drive circuit that drives the switching transistor of the semiconductor device;
A switching circuit comprising:

100 Switching circuit 200 Semiconductor device 202 GaN chip M1 Switching transistor G1 First gate terminal G2 Second gate terminal R1 Resistor D1 First rectifier D2 Second rectifier 300 Gate drive circuit 302, 304 Predriver

Claims (6)

GaN chip and
a switching transistor that is a GaN-HEMT (High Electron Mobility Transistor) formed on the GaN chip;
a drain terminal connected to the drain of the switching transistor;
a source terminal connected to the source of the switching transistor;
a first gate terminal;
an impedance element connected between the first gate terminal and the gate of the switching transistor;
a first rectifying element connected in parallel with the impedance element between the first gate terminal and the gate of the switching transistor, with its anode facing the gate side of the switching transistor;
a second rectifier element connected in parallel with the impedance element between the first gate terminal and the gate of the switching transistor with its cathode facing the gate side of the switching transistor;
A semiconductor device comprising: The semiconductor device according to claim 1, further comprising a second gate terminal directly connected to the gate of the GaN-HEMT. 3. The semiconductor device according to claim 1, wherein each of the first rectifying element and the second rectifying element is a GaN-HEMT whose gate and drain are shorted. 3. The semiconductor device according to claim 1, wherein the impedance element is a resistor. 3. The semiconductor device according to claim 1, wherein the impedance element is a normally-on GaN-HEMT with a gate and source shorted. A semiconductor device according to claim 1 or 2,
a gate drive circuit that drives the switching transistor of the semiconductor device;
A switching circuit comprising:

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