JP2022020802A - Liquid crystal display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve a high-definition liquid crystal display with a reduced pixel size.

SOLUTION: A liquid crystal display comprises: a TFT substrate in which scanning lines 10 extend in a first direction and are arranged in a second direction, video signal lines 20 extend in the second direction and are arranged in the first direction, pixel electrodes are formed in areas surrounded by the scanning lines 10 and the video signal lines 20, and common electrodes are formed with respect to the pixel electrodes with insulating films therebetween; an opposing substrate that is arranged opposite to the TFT substrate; and liquid crystal that is sandwiched between the TFT substrate and the opposing substrate. The first common electrode 109 extends in the first direction between the first scanning line and the second scanning line. The second common electrode 109 extends in the first direction between the second scanning line and the third scanning line. The first common electrode 109 and the second common electrode 109 are electrically connected with each other by a bridge 1091. The bridge 1091 covers the first video signal line 20 when seen in plan view. The bridge does not cover the second video signal line 20 when seen in plan view.

SELECTED DRAWING: Figure 6

COPYRIGHT: (C)2022,JPO&INPIT

Description

The present invention relates to a display device, and more particularly to a high-definition liquid crystal display device.

In a liquid crystal display device, a TFT substrate in which pixels having pixel electrodes and thin film transistors (TFTs) are formed in a matrix, and a facing substrate are arranged facing the TFT substrate, and the liquid crystal is sandwiched between the TFT substrate and the facing substrate. Has been done. Then, the image is formed by controlling the transmittance of light by the liquid crystal molecules for each pixel.

The viewing angle characteristic of the liquid crystal display device is a problem. The IPS (In Plane Switching) type liquid crystal display device controls the light transmittance of the liquid crystal by rotating the liquid crystal molecules by an electric field in a direction parallel to the substrate, and has excellent viewing angle characteristics. On the other hand, liquid crystal display devices, especially small and medium-sized liquid crystal display devices, are becoming higher in definition.

As the definition becomes higher, the ratio of the area of the diameter of the through hole formed on the TFT substrate side for contacting the pixel electrode and the source electrode of the TFT in the pixel increases. Patent Document 1 describes a configuration of a through hole in an IPS type liquid crystal display device.

Japanese Unexamined Patent Publication No. 2014-146039

Liquid crystal display panels used in smartphones, tablet types, etc. are required to have high definition. In such a product, the horizontal pitch per pixel is 30 μm or less. Note that one pixel may refer to a set of red pixels, green pixels, blue pixels, etc., but in the present specification, each of the red pixels, green pixels, blue pixels, and the like is referred to as a pixel.

On the other hand, in order to improve the viewing angle characteristic, an IPS type liquid crystal display device is used. In the IPS system, a structure in which an insulating film is sandwiched between a common electrode formed in a plane and a striped or comb-shaped pixel electrode is arranged is most often used. In such an IPS, in order to connect the TFT and the pixel electrode for each pixel, it is necessary to form a through hole in an insulating film having a large film thickness, so that the diameter of the through hole becomes large.

On the other hand, it is necessary to apply a potential common to each pixel to the common electrode formed in a planar shape. As the pixel pitch becomes smaller, the proportion of through holes in each pixel increases. On the other hand, the common electrode needs to be formed so as to avoid through holes, and the common electrode has a bridge shape between horizontally adjacent through holes. Due to the existence of these bridges and through holes, there is a limit to the reduction of the pixel pitch. Further, the common electrode is formed by ITO (Indium Tin Oxide), but since ITO has a relatively large specific resistance, the resistance of the common electrode becomes a problem as the screen becomes larger.

An object of the present invention is to realize a liquid crystal display device capable of supporting a high-definition pixel pitch in a liquid crystal display device having a large screen and suppressing an increase in resistance of a common electrode.

(1) The scanning lines extend in the first direction and are arranged in the second direction, and the video signal lines extend in the second direction and are arranged in the first direction, and the scanning lines and the image are arranged. A TFT substrate in which a pixel electrode is formed in a region surrounded by a signal line and a common electrode is formed with respect to the pixel electrode via an insulating film, and a facing substrate facing the TFT substrate are arranged, and the TFT is arranged. In a liquid crystal display device in which a liquid crystal display is sandwiched between a substrate and the facing substrate, a first common electrode extends in the first direction between the first scanning line and the second scanning line. The second common electrode extends in the first direction between the second scanning line and the third scanning line, and the first common electrode and the second common electrode are electrically connected by a bridge. A liquid crystal display device connected, wherein the bridge covers the first video-signal line when viewed in a plane, and the bridge does not cover the second video-signal line when viewed in a plane. ..

(2) The liquid crystal display device according to (1), wherein the bridge is formed of metal wiring.

(3) A first pixel is formed between the first video signal line and the second video signal line, and a second pixel is formed between the first video signal line and the first video signal line. The liquid crystal display device according to (1), wherein the pixels are formed, and the width of the first pixel in the first direction is larger than the width of the second pixel in the first direction. ..

(4) The liquid crystal display device according to (1), wherein the columnar spacer is formed on the facing substrate, and the columnar spacer is in contact with the TFT substrate side above the second video signal line.

(5) The scanning lines extend in the first direction and are arranged in the second direction, the video signal lines extend in the second direction and are arranged in the first direction, and the scanning lines and the image are arranged. A TFT substrate in which a pixel electrode is formed in a region surrounded by a signal line and a common electrode is formed with respect to the pixel electrode via a second insulating film, and a facing surface having a columnar spacer facing the TFT substrate. A liquid crystal display device in which a substrate is arranged and a liquid crystal display is sandwiched between the TFT substrate and the facing substrate, wherein the first common electrode is located between the first scanning line and the second scanning line. The second common electrode extends in the first direction between the second scanning line and the third scanning line, and the first common electrode and the second common electrode extend in the above direction. Is electrically connected by a bridge, the bridge is viewed in a plane and covers the first video signal line, and the bridge is viewed in a plane and does not cover the second video signal line. The common electrode is formed on the first insulating film, the first electrode is formed under the first insulating film, and the first insulating film is formed on the first electrode. A first through hole is formed in the corresponding portion, and the connection ITO formed at the same time as the common electrode covers the first through hole and is formed so as to be insulated from the common electrode, corresponding to the connection ITO. A second through hole is formed in the second insulating film, the pixel electrode is electrically connected to the first electrode, and the connecting ITO has a width in the first direction. The center of the connection ITO in the first direction is closer to the second video signal line than the center of the distance between the first video signal line and the second video signal line. A characteristic liquid crystal display device.

(6) The liquid crystal display device according to (5), wherein the bridge is formed of metal wiring.

(7) A first pixel is formed between the first video signal line and the second video signal line, and a second pixel is formed between the first video signal line and the first video signal line. The liquid crystal display device according to claim 9, wherein the pixels are formed, and the width of the first pixel in the first direction is larger than the width of the second pixel in the first direction. ..

It is a top view of the liquid crystal display device to which this invention is applied. FIG. 1 is a cross-sectional view taken along the line AA of FIG. It is a top view near the through hole part of FIG. It is a top view of the liquid crystal display device of Example 1. FIG. FIG. 4 is a cross-sectional view taken along the line BB of FIG. It is a top view which shows the feature of Example 1. FIG. It is sectional drawing which shows the other embodiment of Example 1. FIG. It is a top view which shows the feature of Example 2. FIG. FIG. 8 is a sectional view taken along the line CC of FIG. It is a top view which shows the feature of Example 2. FIG. It is a top view which shows the feature of Example 3. FIG. It is sectional drawing of Example 4. FIG. It is a schematic cross-sectional view which shows the example of the cause of occurrence of alignment film scraping. It is a top view which shows the feature of Example 4. FIG.

The present invention will be described in detail below with reference to examples.

FIG. 1 is a plan view showing a pixel structure of an IPS type liquid crystal display device used in the present invention. There are various IPS methods, but a common electrode is formed in a planar shape, a comb-shaped pixel electrode is placed on it with an insulating film sandwiched between them, and a liquid crystal molecule is generated by an electric field generated between the pixel electrode and the common electrode. The method of rotating the is currently the mainstream because it can increase the transmittance relatively.

In FIG. 1, the scanning lines 10 extend in the horizontal direction and are arranged in the vertical direction at a predetermined pitch. The vertical pitch of the scanning lines 10 is the size of the pixels in the vertical direction. Further, the video signal lines 20 extend in the vertical direction and are arranged in the horizontal direction at a predetermined pitch. The horizontal pitch of the video signal line 20 is the size in the horizontal direction of the pixels.

Striped pixel electrodes 111 extend in the vertical direction in the pixels. In FIG. 1, since the pixel pitch is as small as 30 μm or less, the pixels have a single stripe shape, but when the pixel pitch is large, the pixel electrode becomes a comb-shaped electrode having a slit.

A video signal is supplied from the video signal line 20 to the pixel electrode 111 via a through hole and a TFT. In FIG. 1, the video signal line and the semiconductor layer 103 are connected to each other via a through hole 120. The semiconductor layer 103 extends under the video signal line 20 and passes under the scanning line 10, bends, passes under the scanning line 10 again, and is connected to the contact electrode 107 via the through hole 140. .. The contact electrode 107 is connected to the pixel electrode via through holes 130 and 131. A TFT is formed when the semiconductor layer 103 passes under the scanning line 10. In this case, the scanning line 10 also serves as a gate electrode. Therefore, in FIG. 1, two TFTs are formed from the video signal line 20 to the pixel electrode 11, which is a so-called double gate system.

In FIG. 1, the direction of the alignment axis 115 formed on the alignment film forms an angle θ with the extending direction of the pixel electrode 111. The reason for forming the angle θ is to define the direction of rotation of the liquid crystal molecules when an electric field is applied to the pixel electrode 111. θ is about 5 to 15 degrees, preferably 7 to 10 degrees. In some cases, the direction of the orientation axis 114 is the vertical direction in FIG. 1, and the extending direction of the pixel electrode 111 is tilted by θ. FIG. 1 shows a case where the dielectric anisotropy of the liquid crystal molecule is positive. When the dielectric anisotropy of the liquid crystal is negative, the angle of the orientation axis is the direction rotated by 90 degrees from FIG.

In FIG. 1, the common electrode is formed on the entire surface except the periphery of the through hole. In FIG. 1, the common electrodes 109 in the upward and downward directions across the scanning line are connected via a common electrode bridge 1091. When trying to increase the definition and reduce the pixel pitch, the existence of the common electrode bridge 1091 becomes a problem.

FIG. 2 is a cross-sectional view taken along the line AA of FIG. The TFT in FIG. 2 is a so-called top gate type TFT, and LTPS (Low Temperature Poly-Si) is used as the semiconductor used. On the other hand, when an a-Si semiconductor is used, a so-called bottom gate type TFT is often used. In the following description, a case where a top gate type TFT is used will be described as an example, but the present invention can also be applied to a case where a bottom gate type TFT is used.

In FIG. 2, a first base film 101 made of SiN and a second base film 102 made of SiO ₂ are formed on a glass substrate 100 by CVD (Chemical Vapor Deposition). The role of the first base film 101 and the second base film 102 is to prevent impurities from the glass substrate 100 from contaminating the semiconductor layer 103.

A semiconductor layer 103 is formed on the second base film 102. The semiconductor layer 103 is formed by forming an a—Si film on the second base film 102 by CVD and converting it into a poly—Si film by laser annealing. This poly-Si film is patterned by photolithography.

A gate insulating film 104 is formed on the semiconductor film 103. The gate insulating film 104 is a SiO ₂ film made of TEOS (tetraethoxysilane). This film is also formed by CVD. A gate electrode 105 is formed on the gate electrode 105. The gate electrode 105 also serves as a scanning line 10. The gate electrode 105 is formed by, for example, a MoW film. When it is necessary to reduce the resistance of the gate electrode 105 or the scanning line 10, an Al alloy is used.

After that, the interlayer insulating film 106 is formed by SiO ₂ or SiN so as to cover the gate electrode 105. This is because the interlayer insulating film 106 insulates the gate wiring 105 and the contact electrode 107. The semiconductor layer 103 is connected to the video signal line 20 via a through hole 120 formed in the gate insulating film 104 and the interlayer insulating film 106. Further, a contact hole 140 for connecting the source portion S of the TFT to the contact electrode 107 is formed in the interlayer insulating film 106 and the gate insulating film 104. The contact holes 120 and the contact holes 140 formed in the interlayer insulating film 106 and the gate insulating film 104 are formed at the same time.

The contact electrode 107 is formed on the interlayer insulating film 106. The semiconductor layer 103 extends under the video signal line 20 and passes under the scanning line 10 or the gate electrode 105 twice, as shown in FIGS. 1 and 2. At this time, the TFT is formed. That is, when viewed in a plane, the source S and drain D of the TFT are formed with the gate electrode 105 interposed therebetween. The contact electrode 107 is connected to the semiconductor layer 103 via a through hole 140 formed in the interlayer insulating film 106 and the gate insulating film 104.

The contact electrode 107 and the video signal line 20 are formed in the same layer at the same time. For the contact electrode 107 and the video signal line 20, for example, an AlSi alloy is used in order to reduce the resistance. Since the AlSi alloy generates hillocks and Al diffuses into other layers, for example, a barrier layer made of MoW and a cap layer sandwich AlSi.

The organic passivation film 108 is formed so as to cover the contact electrode 107, the video signal line 20, and the interlayer insulating film 106. The organic passivation film 108 is formed of a photosensitive acrylic resin. The organic passivation film 108 can be formed of a silicone resin, an epoxy resin, a polyimide resin, or the like, in addition to the acrylic resin. Since the organic passivation film 108 has a role as a flattening film, it is formed thick. The film thickness of the organic passivation film 108 is 1 to 4 μm, but in most cases it is about 2 to 3 μm.

In order to establish continuity between the pixel electrode 111 and the contact electrode 107, a contact hole 130 is formed in the organic passivation film 108, and a contact hole 131 is formed in the capacitive insulating film 110 described later. The organic passivation film 108 uses a photosensitive resin. When the photosensitive resin is applied and then exposed to the resin, only the portion exposed to the light is dissolved in the specific developer. That is, by using the photosensitive resin, the formation of the photoresist can be omitted. After forming the contact hole 130 in the organic passivation film 108, the organic passivation film 108 is completed by firing at about 230 ° C.

After that, a transparent conductive film to be a common electrode 109, for example, ITO (Indium Tin Oxide) is formed by sputtering and patterned so as to remove ITO from the contact hole 130 and its periphery. The common electrode 109 can be formed in a plane shape common to each pixel. However, since it is necessary to avoid the through holes 130, the common electrode bridge 1091 in FIG. 1 becomes a problem when the pixel pitch is reduced.

In the second embodiment of the present invention, at the same time as the formation of the common electrode 109, the connected ITO 40 is formed by covering the through hole 130 as shown in FIG. This is to allow a margin for contacting the contact electrode 107 and the pixel electrode. In this case, the connection ITO40 and the common electrode 109 need to be insulated.

Returning to FIG. 2, SiN to be the capacitive insulating film 110 is formed on the entire surface by CVD. After that, in the contact hole 130, a contact hole 131 for making the contact electrode 107 and the pixel electrode 111 conductive is formed in the capacitive insulating film 110.

After that, ITO is formed by sputtering and patterned to form the pixel electrode 111. FIG. 1 shows an example of the planar shape of the pixel electrode 111. The alignment film material is applied onto the pixel electrode 111 by flexographic printing, inkjet, or the like, and fired to form the alignment film 112. In addition to the rubbing method, photo-alignment with polarized ultraviolet rays is used for the alignment treatment of the alignment film 112.

When a voltage is applied between the pixel electrode 111 and the common electrode 109, electric lines of force as shown in FIG. 2 are generated. The liquid crystal molecule 301 is rotated by this electric field, and an image is formed by controlling the amount of light passing through the liquid crystal layer 300 for each pixel.

In FIG. 2, the facing substrate 200 is arranged with the liquid crystal layer 300 interposed therebetween. A color filter 201 is formed inside the facing substrate 200. The color filter 201 is formed with red, green, and blue color filters for each pixel, whereby a color image is formed. A black matrix 202 is formed between the color filter 201 and the color filter 201 to improve the contrast of the image. The black matrix 202 also serves as a light-shielding film for the TFT, and prevents photocurrent from flowing through the TFT.

The overcoat film 203 is formed so as to cover the color filter 201 and the black matrix 202. Since the surfaces of the color filter 201 and the black matrix 202 are uneven, the surfaces are flattened by the overcoat film 203. An alignment film 112 for determining the initial orientation of the liquid crystal is formed on the overcoat film 203. As for the alignment treatment of the alignment film 112, a rubbing method or a photoalignment method is used as in the alignment film 112 on the TFT substrate 100 side.

The above configuration is an example. For example, depending on the product type, an inorganic passivation film made of SiN or the like may be formed between the TFT substrate 100 and the contact electrode 107 or the video signal line 20.

FIG. 3 is an enlarged plan view of the vicinity of the through hole 130 of FIG. In FIG. 3, the pixel electrodes are omitted. In FIG. 3, a region in which the common electrode 109 is not formed exists around the through hole 130 in the shape of a square hole, and as a result, the upper common electrode 109 and the lower common electrode 109 sandwich the through hole 130. It is connected by a common electrode bridge 1091. When trying to reduce the pixel pitch, the existence of this common electrode bridge 1091 becomes a problem. That is, since the ITO constituting the common electrode 109 has a large resistivity, the width of the common electrode bridge 1091 needs to be larger than the width of the video signal line 20 and the semiconductor layer 103, so that the pixel pitch in the horizontal direction is particularly high. It becomes a problem when trying to make it smaller.

FIG. 4 is a plan view of pixels when this embodiment is applied. The difference between FIG. 4 and FIG. 1 is the connection method between the upper common electrode 109 and the lower common electrode 109 in FIG. In FIG. 4, the common electrode 109 extends laterally in a stripe shape on the upper side and the lower side of the through hole 130. On the common electrode 109, a common metal wiring 20 extends in the vertical direction so as to cover the video signal line 20. The common metal wiring 30 is used to reduce the resistance of the common electrode 109.

In FIG. 4, the upper common electrode 109 and the lower common electrode 109 are electrically connected by a common metal wiring 30. That is, the common metal wiring 30 is a bridge 1091 between the upper common electrode 109 and the lower common electrode 109. Since the common metal wiring 40 is made of a metal such as MoCr, MoW, or an Al alloy, the resistance is smaller than that of ITO, so that the wiring width can be reduced. That is, the upper common electrode 109 and the lower common connection 109 can be connected by a common metal wiring 30 having a small width. An even greater feature in FIG. 4 is that the common metal wiring 30 for the bridge 1091 is formed every other line with respect to the video signal line 20. This makes it possible to further reduce the horizontal pitch of the pixels. Since the other configurations of FIG. 4 are the same as those of FIG. 1, the description thereof will be omitted.

FIG. 5 is a cross-sectional view taken along the line BB of FIG. 4, which includes a cross-sectional view of a portion where the common metal wiring 30 serves as a bridge 1091 between the common electrodes 109. The difference between FIG. 5 and FIG. 2 is that the common metal wiring 30 extends on the left organic passivation film 108 and covers the video signal line 20, and is connected to the common electrode 109. Since the other points of FIG. 5 are the same as those of FIG. 2, the description thereof will be omitted.

FIG. 6 is an enlarged plan view of the vicinity of the through hole 130 of FIG. In FIG. 6, the pixel electrode is omitted. In FIG. 6, the common electrode 109 on the upper side of the through hole 130 and the common electrode 109 on the lower side of the through hole 130 are connected by a common metal wiring 30. Further, the common metal wiring 30 is formed so as to cover every other video signal line 20. As a result, the pixel pitch d2 in FIG. 6 is smaller than the pixel pitch d1 in FIG. That is, the configuration of FIG. 6 can correspond to a higher definition screen.

FIG. 7 is a cross-sectional view showing another aspect of the present invention. FIG. 7 is a cross-sectional view corresponding to the BB cross section of FIG. FIG. 7 differs from FIG. 5 in that the bridge 1091 connecting the common electrodes 109 in the portion covering the video signal line 20 has a laminated structure of ITO 109 forming the common electrode and the common metal wiring 30. be. Due to the stacking, the resistance of the bridge 1091 can be made slightly smaller than that in the case of FIG. Further, the laminated structure can improve the margin for disconnection of the bridge 1091. Since the patterning of the common electrode 109 is performed by photolithography, it does not impose a process load.

In the above embodiment, the bridge 1091 of the common electrode 109 is connected by the common metal wiring 30 and is formed corresponding to every other video signal line 20. However, in a product type in which the resistance of the common electrode 109 does not become a big problem, the bridge 1091 is formed by ITO that forms the common electrode 109 every other video signal line 20 without using the common metal wiring 30. May be good. In this case as well, the pixel pitch can be reduced due to the existence of the portion without the bridge 1091.

FIG. 8 is a plan view of the vicinity of the through hole 130 of the pixel to which the present invention is applied. In FIG. 8, the pixel electrode is omitted. The plan view of the entire pixel of this embodiment is the same as that of FIG. 1, and the cross-sectional view is the same as that of FIG. FIG. 8 is different from FIG. 3 in that the connecting ITO 40 is formed in the portion of the through hole 130 and the diameter and position of the through hole 131 formed in the capacitive insulating film 110.

If it is attempted to form the through hole 131 of the capacitive insulating film 110 only at the bottom of the through hole 130 formed in the organic passivation film 108, it is necessary to increase the diameter of the through hole 130, which is disadvantageous for reducing the pixel pitch. be. In this embodiment, by using the connection ITO40 formed at the same time as the common electrode 109, the position and shape of the through hole 131 formed in the capacitive electrode 110 are given a degree of freedom, whereby the organic passivation film 108 is formed. The diameter of the through hole 130 to be formed can be reduced.

In FIG. 8, the connection ITO40 is formed by covering the through hole 130. The connection ITO40 is formed at the same time as the common electrode 109. Therefore, no process load is generated. However, the connection ITO40 must be insulated from the common electrode 109. This is because the connection ITO40 is connected to the pixel electrode. A capacitive insulating film 110 made of SiN is formed over the connection ITO 40 and the common electrode 109, and a through hole 131 is formed in the capacitive insulating film 110. In FIG. 8, the through hole 131 is formed not only on the bottom of the through hole 130 but also on a part of the side surface and the peripheral upper surface of the through hole 130. Therefore, even when the through hole 130 is small, the through hole 131 can be easily formed.

FIG. 9 is a sectional view taken along the line CC of FIG. In FIG. 8, the connecting ITO 40 is formed so as to cover the through hole 130 of the organic passivation film 108. A capacitive insulating film 110 is formed over the connection ITO40, and a through hole 131 is formed in the capacitive insulating film 110. In this through hole 131, the connection ITO40 is exposed and is connected to the pixel electrode. As shown in FIG. 9, in this embodiment, even if the through hole 130 formed in the organic passivation film 108 is small, the through hole 131 of the capacitive insulating film 110 can be formed large, so that the connection reliability Can be raised.

However, the connecting ITO40 must be insulated from the common electrode 109. Since the connecting ITO 40 and the common electrode 109 are formed in the same layer, when the bridge 1091 connecting the upper common electrode 109 and the lower common electrode 109 shown in FIG. 8 is formed by the same ITO as the common electrode 109, the connecting ITO 40 and the connecting ITO 40 are formed. Since it is necessary to have a sufficient distance g1 from the common electrode 109, there is a limit to reducing the pixel pitch.

In this embodiment, as shown in FIG. 10, the upper common electrode 109 and the lower common electrode 109 are connected by the common metal wiring 30. Then, the common metal wiring 30 is formed every other line with respect to the video signal line. On the side where the common metal wiring 30 does not exist, there is no problem in insulating the connection ITO 40 from the common electrode 109 or the common metal wiring 30. Therefore, in FIG. 10, attention should be paid only to the interval g2 on this side.

On the other hand, in FIG. 10, on the side where the common metal wiring 30 exists, it is necessary to secure a distance g1 between the connection ITO 40 and the common metal wiring 30. Therefore, by shifting the horizontal center position of the connection ITO 40 to the side where the common metal wiring 30 is not present with respect to the center position of the pixel, the lateral diameter of the pixel can be reduced, and therefore the pixel pitch can be reduced. ..

That is, in this embodiment, in addition to being able to reduce the diameter of the through hole 130 formed in the organic passivation film 108, the center of the connecting ITO 40 is shifted from the center of the pixel, that is, the center between the video signal lines 20. Thereby, the pixel pitch can be further reduced.

The bridge 1091 between the upper common electrode 109 and the lower common electrode 109 is configured to be a laminate of ITO forming the common electrode 109 and the common metal wiring 30, or only ITO forming the common electrode 109. It is the same as described in Example 1.

FIG. 11 is a plan view of the vicinity of the through hole 130 of the pixel showing the third embodiment. The basic configuration and cross section of the pixel conform to the configurations of FIGS. 1 and 2. The feature of FIG. 11 is that the horizontal diameter of one of the red pixel, the green pixel, and the blue pixel is larger than the diameter of the other pixel. This is to cope with the difference in the color tone of the white screen required by the customer. In FIG. 11, the diameter of the blue pixel is larger than that of the other pixels. That is, in FIG. 11, B> R = G. However, in some cases, the red pixel or the green pixel may be large.

In FIG. 11, the common electrode 109 extends in the horizontal direction in a stripe shape on the upper side and the lower side of the through hole 130. The bridge 1091 of the upper common electrode 109 and the lower common electrode 109 is connected by the common metal wiring 30, but the common metal wiring 30 for the bridge 1091 is mainly performed only in the blue pixel having a wide pixel width. There is. The configuration of the through hole 130 of FIG. 11 is the same as that described with reference to FIGS. 8 to 10. In FIG. 11, in the through holes 130 arranged on both sides of the common metal wiring 30, the horizontal center of the connection ITO 40 exists in the direction away from the common electrode wiring 30. The reason is the same as described in Example 2.

According to the configuration of FIG. 11, the common metal wiring 30 of the bridge 1091 is formed in the portion corresponding to the pixel having a large pixel width, and the bridge 1091 is not formed and the connection ITO40 is formed in the other portion. Since the diameter of the through hole 130 can be reduced, the pixel pitch can be reduced.

Further, in FIG. 11, the bridge 1091 formed in the wide portion of the pixel may be a laminate of not only the common metal wiring 30 but also the common metal wiring 30 and the ITO forming the common electrode 109, or the common electrode 109 may be formed. It is the same as described in Example 1 that it may be formed only by ITO.

In FIG. 11, the bridge electrode is formed only in the portion corresponding to the pixel having a large pixel width. Common metal wiring 30 for bridge connection may be formed. Also in this case, by forming the center of the connection ITO40 away from the bridge 1091, the effect of reducing the pixel pitch can be further enhanced.

In the above embodiment, the configuration in the case where the connection ITO40 is formed in the through hole 130 portion has been described. However, in this embodiment, even in the configuration in which the connection ITO40 is not used, the bridge 1091 is mainly provided for the wide pixel. By forming it, the pixel pitch can be reduced as a whole.

In the liquid crystal display device, it is necessary to specify the distance between the TFT substrate and the counter electrode. Generally, the distance between the TFT substrate 100 and the facing substrate 200 is defined by a columnar spacer. FIG. 12 is an example in which the distance between the TFT substrate 100 and the facing substrate 200 is defined by the columnar spacer 50 in this embodiment, and the columnar spacer 50 formed on the facing substrate 200 determines the distance between the TFT substrate 100 and the facing substrate 200. It stipulates. The columnar spacer 50 is formed on the facing substrate 200 at the same time as the overcoat film 203. The other point that FIG. 12 differs from FIG. 2 is that the common electrode 109 or the bridge 1091 does not exist at the portion where the columnar spacer 50 contacts on the TFT substrate 100 side. Other configurations of FIG. 12 are the same as those of FIG.

The tip of the columnar spacer 50 comes into contact with the alignment film 112 formed on the TFT substrate 100, and when the alignment film 112 is scraped by this contact, the shavings cause bright spots. As shown in FIG. 13, such scraping is particularly likely to occur when the facing surfaces in contact with the tips of the columnar spacers 50 are non-uniform. FIG. 13 shows a case where the tip of the columnar spacer 50 is in contact with the end of the bridge 1091, and the alignment film 112 is likely to be scraped in the region where the step of the bridge 1091 exists, that is, the region A of FIG. .. The bridge 1091 may be an ITO formed at the same time as the common electrode 90, or may be a common metal wiring 30.

FIG. 14 is a plan view of the vicinity of the through hole 130 showing the features of this embodiment. In FIG. 14, the pixel electrode is omitted. In FIG. 14, the columnar spacer 50 is the portion where the common metal wiring 30 as the bridge 1091 connecting the upper common electrode 109 and the lower common electrode 109 or the ITO formed at the same time as the common electrode 109 does not exist and is on the TFT substrate 100 side. Are in contact. With such a configuration, it is possible to eliminate a step as shown in FIG. 13 at the tip of the columnar spacer 50, so that it is possible to prevent the alignment film 112 from being scraped. Since the other configurations of FIG. 14 are the same as those of FIG. 6, the description thereof will be omitted.

The configuration of this embodiment can also be applied to the configuration of FIG. 10 of the second embodiment, the configuration of FIG. 11 of the third embodiment, and the like. That is, the tip of the columnar spacer 50 may be on the video signal line 20 on the TFT substrate 100 side and may come into contact with the portion where the ITO or common metal wiring 30 formed at the same time as the common electrode 50 is not formed.

10 ... Scanning line 10, 20 ... Video signal line, 30 ... Common metal wiring, 40 ... Connection ITO, 50 ... Columnar spacer, 100 ... TFT substrate, 101 ... First base film, 102 ... Second base film, 103 ... Semiconductor Layer, 104 ... gate insulating film, 105 ... gate electrode, 106 ... interlayer insulating film, 107 ... contact electrode, 108 ... organic passivation film, 109 ... common electrode, 110 ... capacitive insulating film, 111 ... pixel electrode, 112 ... alignment film , 115 ... Orientation axis, 120 ... Through hole, 130 ... Organic passive film through hole, 131 ... Capacitive insulating film through hole, 140 ... Through hole, 200 ... Opposite substrate, 201 ... Color filter, 202 ... Black matrix, 203 ... Overcoat film, 300 ... Liquid crystal layer, 301 ... Liquid crystal molecule, 1091 ... Common electrode bridge, D ... Drain part, S ... Source part

Claims (5)

The first video signal line and
A second video signal line adjacent to the first video signal line in the first direction,
The second video signal line, the third video signal line adjacent to the first video signal line, and the third video signal line.
An organic insulating film covering the first video signal line, the second video signal line, and the third video signal line.
An inorganic insulating film that covers the organic insulating film and
A common electrode provided between the organic insulating film and the inorganic insulating film,
A first metal wiring provided between the organic insulating film and the inorganic insulating film is provided.
The organic insulating film has a first through hole and a second through hole.
The first through hole is located between the first video signal line and the second video signal line in the first direction.
The second through hole is located between the second video signal line and the third video signal line in the first direction.
The common electrode has a first end and a second end facing the first end in a second direction intersecting the first direction.
The area between the first end portion and the second end portion of the common electrode is a non-formed region of the common electrode.
In the second direction, each of the first through hole and the second through hole is located between the first end portion and the second end portion.
The first metal wiring is connected to the common electrode and is connected to the common electrode.
The first metal wiring intersects each of the first end and the second end.
A liquid crystal display device in which the first metal wiring is in contact with the organic insulating film in the non-formed region of the common electrode. The first metal wiring extends in parallel with any one of the first video signal line, the second video signal line, and the third video signal line.
The liquid crystal display device according to claim 1, wherein the first metal wiring overlaps with any one of the first video signal line, the second video signal line, and the third video signal line. The first metal wiring extends in parallel with the second video signal line and overlaps with the second video signal line.
The liquid crystal display device according to claim 1, wherein the first metal wiring and the second video signal line are provided between the first through hole and the second through hole in the first direction. Each of the first end and the second end intersects the second video signal line and
The liquid crystal display device according to claim 3, wherein in the non-formed region of the common electrode, the first metal wiring is sandwiched between the inorganic insulating film and the organic insulating film. The liquid crystal display device according to claim 4, wherein the line width of the first metal wiring is thicker than the line width of the second video signal line.

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