JP2022013670A - Ceramic electronic component - Google Patents

Abstract

To provide a ceramic electronic component that can be improved in reliability.SOLUTION: With TSDC for a dielectric layer under conditions of a polarization temperature of 150°C, a polarization electric field of 15-20 V/μm, a polarization time of 60 min., and a temperature raising rate of 10°C/min., IA/IB>0.30 holds for a low temperature-side peak current value IA of ≥160°C and <230°C and a high temperature-side peak current value IB of 230-350°C, and IB is 100 pA/mm2 or less.SELECTED DRAWING: Figure 3

Description

The present invention relates to ceramic electronic components.

In ceramic electronic components such as multilayer ceramic capacitors, the insulation degradation mechanism occurs when oxygen defects in the dielectric layer are deposited on the cathode by an electric field, reducing the electrical resistance at the interface between the cathode and the dielectric layer, until this deposition. There is a report to the effect that the life of the capacitor is determined (see, for example, Non-Patent Document 1).

According to this model, it is known that reliability such as life and withstand voltage can be improved by reducing the amount of oxygen defects (see, for example, Patent Documents 1 and 2). In Patent Documents 1 and 2, a heat-stimulated depolarization current (TSDC) is used to quantify the oxygen defect concentration.

Japanese Unexamined Patent Publication No. 2004-356305 Japanese Unexamined Patent Publication No. 2014-165447

"Dc-Electrical Degradation of the BT-Based Material for Multilayer Ceramic Capacitor with Ni internal Electrode: Impedance Analysis and Microstructure", Jpn J Appl Phys, 40 (2001) pp.5624-5629

In Patent Documents 1 and 2, the amount of oxygen defects is estimated from the integrated value of the current of the TSDC data. However, in the TSDC data, the part that greatly affects the life of the ceramic electronic component is the portion corresponding to the oxygen defect that moves to the cathode across the crystal grain boundaries of the dielectric layer. Patent Documents 1 and 2 do not disclose this.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a ceramic electronic component capable of improving reliability.

The ceramic electronic component according to the present invention has a laminated structure in which a dielectric layer containing ceramic as a main component and an internal electrode layer are alternately laminated, and the polarization temperature of the dielectric layer is set to 150 ° C. In TSDC with a polarization electric field of 15 V / μm to 20 V / μm, a polarization time of 60 min, and a temperature rise rate of 10 ° C / min, the low temperature side peak current value of 160 ° C or higher and lower than 230 ° C is _IA , 230. When the peak current value on the high temperature _side of ° C. or higher and 350 ° C. or lower is set to IB, the relationship of _IA / _IB > 0.30 is established, and IB is 100 _pA / mm ² or less. do.

In the ceramic electronic component, _IA / _IB ≧ 0.50 may be satisfied.

In the ceramic electronic component, _IA / _IB ≧ 0.70 may be satisfied.

In the ceramic electronic component, _IA / _IB ≧ 2.00 may be satisfied.

In the ceramic electronic component, the IB may be 95 _pA / mm ² or less.

In the ceramic electronic component, the IB may be 90 _pA / mm ² or less.

In the ceramic electronic component, the IB may be 80 _pA / mm ² or less.

The other ceramic electronic component according to the present invention has a laminated structure in which a dielectric layer containing ceramic as a main component and an internal electrode layer are alternately laminated, and has a polarization time of 60 min with respect to the dielectric layer. In TSDC where the polarization current is 10 V / μm, the polarization temperature is changed in the range of 150 ° C to 210 ° C to polarize, the temperature is cooled to 130 ° C, and the temperature rise rate is 10 ° C / min, the temperature rises to 350 ° C. Regarding the peak current value of the peak that occurs on the lowest temperature side among the peak currents when warmed, the peak current value when polarized at 150 ° C. is J150, and the peak current value when polarized at 170 ° C. is J170. In addition, it is characterized in that the relationship of (J170-J150) / J150 ≧ 0 is established.

In the ceramic electronic component, the average thickness of the dielectric layer may be 1 μm or more.

In the ceramic electronic component, the average thickness of the dielectric layer may be 3.5 μm or more.

In the ceramic electronic component, the average number of crystal grains in the thickness direction of the dielectric layer may be 3 or more.

In the ceramic electronic component, the number of laminated dielectric layers may be 1000 or more.

In the ceramic electronic component, the main component of the dielectric layer may be BaTiO ₃ .

In the ceramic electronic component, the number of TSDC peaks generated in the temperature range of 130 ° C. or higher and 350 ° C. or lower may be two or more.

In the ceramic electronic component, the number of TSDC peaks generated in the temperature range of 130 ° C. or higher and 350 ° C. or lower may be three or more.

According to the present invention, it is possible to provide a ceramic electronic component capable of improving reliability.

It is a partial cross-sectional perspective view of a monolithic ceramic capacitor. (A) to (e) are diagrams illustrating a procedure for estimating the amount of oxygen defect transfer using TSDC. (A) is a diagram illustrating the movement of oxygen defects, and (b) is a diagram illustrating the relationship between temperature and thermal stimulation current value. It is a figure which illustrates the flow of the manufacturing method of a multilayer ceramic capacitor. It is a figure which exemplifies the relationship between the temperature and the thermal stimulation current value. It is a figure which shows the result of Examples 6-10 and Comparative Examples 4 and 5.

Hereinafter, embodiments will be described with reference to the drawings.

(First Embodiment)
First, the outline of the monolithic ceramic capacitor will be described. FIG. 1 is a partial cross-sectional perspective view of the multilayer ceramic capacitor 100 according to the first embodiment. As illustrated in FIG. 1, the multilayer ceramic capacitor 100 includes a laminated chip 10 having a rectangular parallelepiped shape and external electrodes 20a and 20b provided on two facing end faces of any one of the laminated chips 10. Of the four surfaces of the laminated chip 10 other than the two end surfaces, two surfaces other than the upper surface and the lower surface in the stacking direction are referred to as side surfaces. The external electrodes 20a and 20b extend to the upper surface, the lower surface, and the two side surfaces of the laminated chip 10 in the stacking direction. However, the external electrodes 20a and 20b are separated from each other.

The laminated chip 10 has a structure in which a dielectric layer 11 containing a ceramic material that functions as a dielectric and an internal electrode layer 12 containing a base metal material are alternately laminated. The end edges of each internal electrode layer 12 are alternately exposed on the end face of the laminated chip 10 provided with the external electrode 20a and the end face provided with the external electrode 20b. As a result, each internal electrode layer 12 is alternately conducted to the external electrode 20a and the external electrode 20b. As a result, the laminated ceramic capacitor 100 has a structure in which a plurality of dielectric layers 11 are laminated via an internal electrode layer 12. Further, in the laminated body of the dielectric layer 11 and the internal electrode layer 12, the internal electrode layer 12 is arranged on the outermost layer in the stacking direction, and the upper surface and the lower surface of the laminated body are covered with the cover layer 13. The cover layer 13 is mainly composed of a ceramic material. For example, the material of the cover layer 13 has the same main components as the dielectric layer 11 and the ceramic material.

The size of the monolithic ceramic capacitor 100 is, for example, 0.25 mm in length, 0.125 mm in width, 0.125 mm in height, or 0.4 mm in length, 0.2 mm in width, 0.2 mm in height, or length. 0.6 mm, width 0.3 mm, height 0.3 mm, or length 1.0 mm, width 0.5 mm, height 0.5 mm, or length 1.6 mm, width 0.8 mm, height 0.8 mm long, or 3.2 mm long, 1.6 mm wide, 1.6 mm high, or 4.5 mm long, 3.2 mm wide, 2.5 mm high, but these It is not limited to size.

The internal electrode layer 12 contains a base metal such as Ni (nickel), Cu (copper), Sn (tin) as a main component. As the internal electrode layer 12, a noble metal such as Pt (platinum), Pd (palladium), Ag (silver), Au (gold) or an alloy containing these may be used.

The dielectric layer 11 contains, for example, a ceramic material having a perovskite structure represented by the general formula ABO ₃ as a main phase as a main component. The perovskite structure contains ABO _3-α , which deviates from the stoichiometric composition. For example, as the ceramic material, BaTIO ₃ (barium titanate), CaZrO ₃ (calcium zirconate), CaTIO ₃ (calcium titanate), SrTiO ₃ (strontium titanate), Ba1 _-xy forming a perovskite structure. Ca _x Sry Ti _{1-z Zr z} O ₃ (0 ≦ x ≦ 1, 0 ≦ y ≦ 1,0 ≦ z ≦ 1) or the like can be used. The dielectric layer 11 is obtained, for example, by firing a ceramic raw material powder containing a ceramic material having a perovskite structure as a main component.

In such a multilayer ceramic capacitor 100, in the insulation deterioration mechanism, oxygen defects in the dielectric layer 11 are deposited on the internal electrode layer 12 acting as a cathode by an electric field at the interface between the internal electrode layer 12 and the dielectric layer 11. However, there is a report that it occurs by lowering the electrical resistance at the interface and the time until this deposition determines the life, and it is widely accepted. According to this model, it is known that reliability such as life and withstand voltage can be improved by reducing the amount of oxygen defects. For example, the amount of oxygen defect transfer can be estimated by the heat-stimulated depolarization current (TSDC).

For example, FIGS. 2A to 2E are diagrams illustrating a procedure for estimating the amount of oxygen defect transfer using TSDC. FIG. 2A is a cross-sectional view illustrating the dielectric layer 11 sandwiched between the internal electrode layer 12 connected to one external electrode and the internal electrode layer 12 connected to the other external electrode. As illustrated in FIG. 2A, oxygen defects 14 are present in the dielectric layer 11, and are distributed substantially evenly in, for example, the dielectric layer 11.

FIG. 2B partially shows a state in which the multilayer ceramic capacitor 100 is placed under a heated predetermined temperature and a DC voltage is applied between two adjacent internal electrode layers 12. When the monolithic ceramic capacitor 100 in the no-load state is heated and a DC voltage is applied between the two adjacent internal electrode layers 12, the oxygen defects 14 distributed in the dielectric layer 11 are on one electrode side (here,-). It is unevenly distributed on the polar side). In this case, the temperature is, for example, 200 ° C. The electric field strength applied to the dielectric layer 11 is, for example, 10 V / μm.

FIG. 2C shows a state when the monolithic ceramic capacitor 100 in a high temperature load state is returned to a no-load state at room temperature (25 ° C.). Even if the voltage is released after the temperature is returned to room temperature (25 ° C.), the oxygen defect 14 remains unevenly distributed toward one of the internal electrode layers 12 (-pole side).

From this state, as illustrated in FIG. 2D, when an ammeter is attached to the laminated ceramic capacitor 100 and the laminated ceramic capacitor 100 is heated again, one of the internal electrode layers 12 side (here, here) in the dielectric layer 11 is obtained. The oxygen defects 14 unevenly distributed on the −pole side) gradually move to the opposite internal electrode layer 12 side. The oxygen defect 14 becomes a carrier and a current flows. This current is called a thermal stimulation current. The heating temperature is about 300 ° C. Since the thermal stimulation current is generated until the polarization due to the oxygen defect 14 is released as illustrated in FIG. 2 (e), the time integral value of the current value until the polarization is released is the carrier in the dielectric layer 11. It becomes the total amount Q of the electric charge of.

Since the charge Q obtained by the above measurement is expressed as the charge per oxygen defect 14 (2 × 1.6 × ^10-19 coulombs: V ₀ ^{+ 2} as a negative fixed charge, the absolute value is the elementary charge. The concentration of oxygen defects present in the laminated ceramic capacitor 100 is obtained by dividing by the volume of the dielectric layer 11 and the concentration of oxygen defects present in the laminated ceramic capacitor 100. In this way, the amount of oxygen defects can be estimated from the integrated value of the current value.

Here, the movement of oxygen defects when a thermal stimulation current is generated will be described. FIG. 3A is a diagram illustrating the movement of oxygen defects. As illustrated in FIG. 3A, the dielectric layer 11 contains a plurality of crystal grains 15. A crystal grain boundary 16 is formed between the two crystal grains 15. As illustrated in the upper part of FIG. 3A, the oxygen defect 14 moves in the crystal grain 15. Further, as illustrated in the middle stage of FIG. 3A, the oxygen defect 14 moves across the crystal grain boundaries 16. It is the oxygen defect 14 that moves across the crystal grain boundaries 16 in the dielectric layer 11 that has a great influence on the life of the multilayer ceramic capacitor 100.

Therefore, in TSDC where the polarization temperature is 150 ° C., the polarization electric field is 15 V / μm to 20 V / μm, the polarization time is 60 min, and the temperature rise rate is 10 ° C./min, the temperature when the temperature is raised to about 350 ° C. The relationship with the thermal stimulation current value is illustrated in FIG. 3 (b). As illustrated in FIG. 3 (b), a plurality of peaks appear in the TSDC data. Broadly speaking, two typical peaks appear above 160 ° C. These peaks are a low temperature side peak (peak A) of 160 ° C. or higher and lower than 230 ° C. and a high temperature side peak (peak B) of 230 ° C. or higher and 350 ° C. or lower. In the procedure of FIGS. 2A to 2E, the amount of oxygen defects is estimated from the integrated value of these current peaks. Here, the polarization temperature refers to the temperature at which the dielectric layer 11 is polarized. The polarization electric field refers to the strength of the electric field that polarizes the dielectric layer 11. The polarization time refers to the time for polarizing the dielectric layer 11. Further, the peak refers to the maximum value (the inflection point that is convex upward) when the current value is represented by a graph.

In FIG. 3B, the difference between the solid line and the dotted line appears due to the oxygen defect in the dielectric layer 11. In both the solid line and the dotted line, a low temperature side peak (peak A) of 160 ° C. or higher and lower than 230 ° C. and a high temperature side peak (peak B) of 230 ° C. or higher and 350 ° C. or lower appear. Further, in the temperature range of 130 ° C. or higher and 350 ° C. or lower, two or more TSDC peaks appear, and three or more TSDC peaks may appear.

This integral value alone is not sufficient to link the actual reliability of the monolithic ceramic capacitor 100 with the TSDC data. As described above, the reason why the reliability of the multilayer ceramic capacitor 100 is greatly affected is that the oxygen defect 14 moves across the crystal grain boundaries 16 in the dielectric layer 11. The movement of the oxygen defect 14 is the current represented by the peak B. On the other hand, the current represented by the peak A is the movement of oxygen defects in the crystal grains 15 without straddling the crystal grain boundaries 16. The effect of peak A on the life of the monolithic ceramic capacitor is smaller than that of peak B. Therefore, in order to improve the reliability, it is required to reduce the peak B.

The present inventor has found through diligent research that the ratio of the peak current value IA of peak _A to the peak current value IB of peak _B ( _IA / _IB ) is important for controlling reliability. Specifically, the present inventor has an _IA / in a TSDC having a polarization temperature of 150 ° C., a polarization electric field of 15 V / μm to 20 V / μm, a polarization time of 60 min, and a heating rate of 10 ° C./min. It has been found that when the relationship of _IB > 0.30 is established and the peak current IB is 100 _pA / mm ² or less, a long life can be obtained even when a relatively high electric field is applied. Further, by using this method, the reliability of the monolithic ceramic capacitor 100 can be estimated in a short time.

In the multilayer ceramic capacitor 100 according to the present embodiment, the dielectric layer 11 of at least one of the plurality of dielectric layers 11 has an I _A / I _B exceeding 0.30 and an _IB ≤ 100 pA /. It has a configuration of mm ² . It is preferable that all the dielectric layers 11 included in the multilayer ceramic capacitor 100 have a configuration in which _IA / _IB exceeds 0.30 and _IB ≤ 100 pA / mm ² .

For example, by adjusting parameters such as the composition of the dielectric layer 11, the crystal grain size, and the firing conditions, a configuration in which I _A / _IB exceeds 0.30 and _IB ≤ 100 pA / mm ² can be obtained. From the viewpoint of improving reliability, the _IA / _IB is preferably 0.50 or more, preferably more than 0.5, preferably 0.70 or more, and more than 1.0. It is preferably 2.00 or more. _IB is preferably 95 pA / mm ² or less, preferably 90 pA / mm ² or less, preferably 85 pA / mm ² or less, preferably 80 pA / mm ² or less, and preferably 50 pA / mm 2. It is preferably mm ² or less. The unit of the current value is A / mm ² , which indicates the current value per unit area. This value can be obtained by dividing the current value measured by the laminated ceramic capacitor 100 by the total area of the regions where the internal electrodes included in the laminated ceramic capacitor 100 face each other with the dielectric layer interposed therebetween.

For example, _IA / _IB can be increased by increasing the number of grain boundaries across the electric field or by thickening the grain boundaries. Further, the smaller the _IB , the higher the reliability of the product, which is preferable. When the value of _IB approaches 0, the value of _IA / _IB can be very large.

When a plurality of crystal grains are contained in the dielectric layer 11 in the thickness direction, peaks A and B appear prominently. Therefore, it is preferable that the dielectric layer 11 contains a plurality of crystal grains in the thickness direction. For example, the average number of crystal grains per layer of the dielectric layer 11 is preferably 3 to 8. The average value of the crystal grains per layer of the dielectric layer 11 is the number of crystal grains crossed by an arbitrary straight line drawn parallel to the stacking direction by observing the cut surface parallel to the stacking direction with an electron microscope. Can be obtained with one dielectric layer, this can be performed with 20 arbitrarily selected dielectric layers, and can be obtained as the average value of the obtained 20 data.

The average thickness of the dielectric layer 11 is, for example, 1 μm or more, and 3.5 μm or more. This is because it is preferable that a plurality of crystal grains are contained in the thickness direction of the dielectric layer 11. The average thickness of the dielectric layer 11 can be obtained as, for example, an average value of the thicknesses of 20 arbitrarily selected points by observing the cut surfaces parallel to the stacking direction with an electron microscope.

The values of I _A , _IB , and ( _IA + _IB ) themselves vary depending on the size of the monolithic ceramic capacitor 100, the electrode configuration, the dielectric layer thickness, the polarization conditions, and other conditions. It is difficult to control the life by individual values alone. Based on this viewpoint, in this embodiment, attention is paid to the ratio of _IA and _IB .

Subsequently, a method for manufacturing the monolithic ceramic capacitor 100 will be described. FIG. 4 is a diagram illustrating a flow of a manufacturing method of the monolithic ceramic capacitor 100.

(Raw material powder preparation process)
First, a dielectric material for forming the dielectric layer 11 is prepared. The A-site element and the B-site element contained in the dielectric layer 11 are usually contained in the dielectric layer 11 in the form of a sintered body of particles of ABO ₃ . For example, BaTiO ₃ is a tetragonal compound having a perovskite structure and exhibits a high dielectric constant. This BaTIO ₃ can be generally obtained by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate to synthesize barium titanate. As a method for synthesizing the main component ceramic of the dielectric layer 11, various methods are conventionally known, and for example, a solid phase method, a sol-gel method, a hydrothermal method and the like are known. In this embodiment, any of these can be adopted.

A predetermined additive compound is added to the obtained ceramic powder according to the purpose. Additive compounds include Mg (magnesium), Mn (manganese), V (vanadium), Cr (chromium), rare earth elements (Y (yttrium), Sm (samarium), Eu (europium), Gd (gadrinium), Tb ( Oxides of terbium), Dy (dysprosium), Ho (holmium), Er (erbium), Tm (thulium) and Yb (yttrium)), as well as Co (cobalt), Ni, Li (lithium), B (boron). , Na (sodium), K (potassium) and Si (silicon) oxides or glass.

For example, a compound containing an additive compound is wet-mixed with a ceramic raw material powder, dried and pulverized to prepare a ceramic material. For example, the ceramic material obtained as described above may be pulverized to adjust the particle size, or may be combined with a classification process to adjust the particle size, if necessary. By the above steps, a dielectric material can be obtained.

(Laminating process)
Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol and toluene, and a plasticizer are added to the obtained dielectric material and wet-mixed. Using the obtained slurry, for example, a strip-shaped dielectric green sheet having a thickness of 1 μm or more is applied onto a substrate by, for example, a die coater method or a doctor blade method, and dried.

Next, by printing a metal conductive paste containing an organic binder for forming an internal electrode on the surface of the dielectric green sheet by screen printing, gravure printing, etc., the internal electrodes are alternately drawn out to a pair of external electrodes having different polarities. Place a layer pattern. Ceramic particles are added as a co-material to the metal conductive paste. The main component of the ceramic particles is not particularly limited, but is preferably the same as the main component ceramic of the dielectric layer 11. For example, BaTiO ₃ having an average particle diameter of 50 nm or less may be uniformly dispersed.

After that, the dielectric green sheet on which the internal electrode layer pattern is printed is punched out to a predetermined size, and the punched out dielectric green sheet is formed into the internal electrode layer 12 and the dielectric layer 11 in a state where the base material is peeled off. The internal electrode layers 12 are alternately exposed on both end faces in the length direction of the dielectric layer 11 and are alternately drawn out to a pair of external electrodes 20a and 20b having different polarities. Only a predetermined number of layers (for example, 100 to 1000 layers) are laminated. A cover sheet for forming the cover layer 13 is crimped on the top and bottom of the laminated dielectric green sheet, and cut to a predetermined chip size (for example, 1.0 mm × 0.5 mm).

After removing the binder from the obtained ceramic laminate in an _N2 atmosphere, a metal filler containing the main component metal of the external electrodes 20a and 20b, a co-material, a binder, a solvent and the like are applied from both end faces to the side surfaces of the ceramic laminate. A metal paste containing and serving as a base layer for the external electrodes 20a and 20b is applied and dried.

(Baking process)
The molded product thus obtained is subjected to a binder removal treatment in an _N2 atmosphere at 250 to 500 ° C., and then in a reducing atmosphere with an oxygen partial pressure of ^10-8 to ^10-13 atm at 1100-1300 ° C. for 10 minutes. By firing for ~ 2 hours, each particle of the molded body is sintered. In this way, a ceramic laminate is obtained.

(Reoxidation process)
Then, the reoxidation treatment is performed at 600 ° C. to 1000 ° C. in an _N2 gas atmosphere. For example, 1 hr reoxidation treatment is performed at 950 ° C. Then, the atmosphere is cooled to 500 ° C. with the N ₂ gas atmosphere, the atmosphere is switched to the atmosphere, the temperature is maintained at 500 ° C. for 24 hours, and then the mixture is cooled to room temperature. By performing such a treatment, the oxygen concentration at the grain boundaries 16 of the dielectric layer 11 can be increased. As a result, the peak current value of the TSDC can be significantly reduced, and the oxygen defect 14 can be prevented from moving beyond the grain boundaries 16 or along the grain boundaries 16. As a result, IB can be _lowered relative to _IA . In addition, by holding at 500 ° C for a long time, it is possible to reoxidize large multi-layered multilayer ceramic capacitors with 1000 layers or more, such as 4532 size (length 4.5 mm, width 3.2 mm, height 2.5 mm). It will be possible enough.

(Plating process)
After that, a metal coating such as Cu, Ni, Sn is applied on the base layer of the external electrodes 20a and 20b by a plating treatment. Through the above steps, the monolithic ceramic capacitor 100 is completed.

According to the manufacturing method according to the present embodiment, the dielectric layer 11 of at least one of the plurality of dielectric layers 11 has an I _A / I _B exceeding 0.30 and an _IB ≤ 100 pA / mm ² . Will have the configuration. As a result, even when a relatively high electric field is applied, a long life is obtained and reliability is improved.

(Second Embodiment)
Subsequently, the second embodiment will be described. In the second embodiment, the TSDC conditions are changed in the monolithic ceramic capacitor 100 described with reference to FIG.

The present inventor has conducted diligent research to polarize the dielectric layer 11 by setting the polarization time to 60 min, the polarization electric field to 10 V / μm, and changing the polarization temperature in the range of 150 ° C to 210 ° C to achieve 130 ° C. In TSDC where the temperature rise rate is 10 ° C / min after cooling to about 350 ° C, the polarization temperature is set to the peak current value of the peak that occurs on the lowest temperature side (around 150 ° C) among the peak currents that occur when the temperature is raised to about 350 ° C. It was found that a high lifespan can be obtained by not showing a decreasing tendency with respect to the increase in the current.

The peak that occurs on the lowest temperature side (around 150 ° C.) is considered to be a peak derived from defective dipoles (clusters of oxygen defects, cationic defects, metal defects, etc.). The fact that this peak does not tend to decrease with increasing polarization temperature can be interpreted as the fact that this cluster does not dissociate and oxygen defects are difficult to migrate. Therefore, it is considered that the rise of the peak generated on the high temperature side, which is considered to have a great influence on the reliability of the monolithic ceramic capacitor, is suppressed.

Specifically, the peak current value of the TSDC peak that occurs near 150 ° C. when polarized at a polarization temperature of 150 ° C. is set to J150, and the peak current value of the TSDC peak that occurs near 150 ° C. when polarized at a polarization temperature of 170 ° C. is defined as J150. When J170 is set, a high life can be obtained by establishing the relationship of ΔJ = (J170-J150) / J150 ≧ 0. In a normal TSDC, it is required to raise the temperature to 350 ° C. or higher, but in the present embodiment, the temperature may be raised to about 350 ° C., so that the reliability of the monolithic ceramic capacitor 100 can be easily evaluated. ..

FIG. 5 is a diagram illustrating J170 and J150. In FIG. 5, the solid line represents the TSDC when polarized at 170 ° C., and the dotted line represents the TSDC when polarized at 150 ° C. As illustrated in FIG. 5, both J170 and J150 have a peak near 150 ° C. Also, J170 is larger than J150. The temperature at which the peaks of J170 and J150 are observed is observed in the range of, for example, 130 ° C to 160 ° C.

In the multilayer ceramic capacitor 100 according to the present embodiment, the dielectric layer 11 of at least one of the plurality of dielectric layers 11 has a configuration in which the relationship of ΔJ = (J170-J150) / J150 ≧ 0 is established. Have. It is preferable that all the dielectric layers 11 included in the multilayer ceramic capacitor 100 have a configuration in which the relationship of ΔJ = (J170-J150) / J150 ≧ 0 is established.

For example, by adjusting parameters such as the composition of the dielectric layer 11, the crystal grain size, and the firing conditions, the relationship of ΔJ = (J170-J150) / J150 ≧ 0 is established. From the viewpoint of improving reliability, it is preferable that the relationship of ΔJ = (J170-J150) / J150 ≧ 0.5 is established, and the relationship of ΔJ = (J170-J150) / J150 ≧ 1.0 is more likely to be established. preferable.

For example, ΔJ = (J170-J150) / J150 can be increased by increasing the number of crystal grain boundaries that cross the electric field or by thickening the crystal grain boundaries. However, if ΔJ = (J170-J150) / J150 is made too large, the capacitance of the product may decrease. Therefore, from the viewpoint of securing capacity and high reliability, it is preferable to set an upper limit on ΔJ = (J170-J150) / J150. For example, ΔJ = (J170-J150) / J150 is preferably 2.0 or less, more preferably 1.5 or less, and even more preferably 1.25 or less.

Regardless of which of the polarization temperatures from 150 ° C. to 210 ° C. is focused on in the above TSDC, the temperature rises to about 350 ° C. in the TSDC having a temperature rise rate of 10 ° C./min after cooling to 130 ° C. It is preferable that the peak current value of the peak generated on the lowest temperature side (around 150 ° C.) among the peak currents generated at the same time does not show a decreasing tendency with respect to the increase in the polarization temperature.

The monolithic ceramic capacitor 100 according to the present embodiment can be manufactured by the same manufacturing method as that of the first embodiment. According to the manufacturing method, at least one of the plurality of dielectric layers 11 has a relationship of ΔJ = (J170-J150) / J150 ≧ 0. As a result, even when used in a relatively high temperature environment, a long life is obtained and reliability is improved.

In each of the above embodiments, the multilayer ceramic capacitor has been described as an example of the ceramic electronic component, but the present invention is not limited thereto. For example, other electronic components such as varistor and thermistor may be used.

Hereinafter, the monolithic ceramic capacitor according to the embodiment was produced and its characteristics were investigated.

(Example 1)
Barium titanate powder was prepared as a dielectric material. The necessary additives were added to the barium titanate powder, and the mixture was sufficiently wet-mixed and pulverized with a ball mill to obtain a dielectric material. An organic binder and a solvent were added to the dielectric material to prepare a dielectric green sheet by the doctor blade method. Polyvinyl butyral (PVB) or the like was used as the organic binder, and ethanol, toluene or the like was added as the solvent. In addition, a plasticizer was added.

Next, a metal conductive paste for forming an internal electrode containing the main component metal of the internal electrode layer 12, the co-material, the binder (ethyl cellulose), the solvent, and other auxiliary agents as necessary is prepared by a planetary ball mill. did.

A metallic conductive paste for forming an internal electrode was screen-printed on a dielectric green sheet. 301 sheet members on which the metal conductive paste was printed were stacked on the dielectric green sheet, and cover sheets were laminated above and below the sheet members. Then, a laminated body was obtained by thermocompression bonding and cut into a predetermined shape.

After removing the binder from the obtained laminate in an _N2 atmosphere, a metal conductive paste containing a metal filler containing Ni as a main component, a co-material, a binder, a solvent, etc. is applied as a base layer from both end faces to each side surface of the laminate. Was applied and dried. Then, the metal conductive paste for the base layer was fired at the same time as the laminated body at 1100 ° C. to 1300 ° C. for 10 minutes to 2 hours in a reducing atmosphere to obtain a sintered body. The shape and dimensions of the obtained sintered body were 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height.

Then, a reoxidation treatment was performed. First, it was held at 950 ° C. for 1 hour in an _N2 gas atmosphere. Then, the atmosphere was cooled to 500 ° C. with the N ₂ gas atmosphere, the atmosphere was switched to the atmosphere, the temperature was maintained at 500 ° C. for 24 hours, and then the mixture was cooled to room temperature. Then, the plating treatment was performed to form a Cu plating layer, a Ni plating layer and a Sn plating layer on the surface of the base layer, and a laminated ceramic capacitor 100 was obtained. The thickness of the dielectric green sheet was adjusted so that the average thickness of the dielectric layer 11 confirmed from the cross section of the product was 1.2 μm.

(Example 2)
In Example 2, as compared with Example 1, the condition for maintaining the temperature after switching the atmosphere to the atmosphere was changed to maintain the temperature at 500 ° C. for 20 hours. Other conditions were the same as in Example 1.

(Example 3)
In Example 3, as compared with Example 1, the condition for maintaining the temperature after switching the atmosphere to the atmosphere was changed to maintain the temperature at 500 ° C. for 30 hours. Other conditions were the same as in Example 1.

(Example 4)
In Example 4, the number of laminated dielectric layers 11 was set to 1100 as compared with Example 1, and the average thickness of the dielectric layers 11 confirmed from the cross section of the product was changed to 0.7 μm. Other conditions were the same as in Example 1.

(Example 5)
In Example 5, the number of laminated dielectric layers 11 was set to 100 as compared with Example 1, and the average thickness of the dielectric layers 11 confirmed from the cross section of the product was changed to 3.6 μm. Other conditions were the same as in Example 1.

(Comparative Example 1)
In Comparative Example 1, in the reoxidation treatment, the temperature was maintained at 950 ° C. for 1 hr in the N ₂ gas atmosphere, then cooled to 500 ° C. in the N ₂ gas atmosphere, and the atmosphere was switched to the atmosphere to cool to room temperature. That is, it was not held at 500 ° C. Other conditions were the same as in Example 1.

(Comparative Example 2)
In Comparative Example 2, in the reoxidation treatment, the temperature was maintained at 950 ° C. for 1 hr in the N ₂ gas atmosphere, cooled to 500 ° C. in the N ₂ gas atmosphere, the atmosphere was switched to the atmosphere, and the atmosphere was maintained at 500 ° C. for 5 hr. Cooled to room temperature. That is, the holding time at 500 ° C. was shortened as compared with Example 1. Other conditions were the same as in Example 1.

(Comparative Example 3)
In Comparative Example 3, in the reoxidation treatment, the temperature was maintained at 950 ° C. for 1 hr in the N ₂ gas atmosphere, cooled to 500 ° C. in the N ₂ gas atmosphere, the atmosphere was switched to the atmosphere, the atmosphere was maintained at 500 ° C. for 15 hr, and then. Cooled to room temperature. That is, the holding time at 500 ° C. was shortened as compared with Example 1. Other conditions were the same as in Example 1.

(Analysis 1)
For Examples 1 to 5 and Comparative Examples 1 to 3, in a TSDC having a polarization temperature of 150 ° C., a polarization time of 60 min, a polarization electric field of 20 V / μm, and a heating rate of 10 ° C./min, _IA /. _IB was measured. In addition, an accelerated life test (HALT) was performed at a high temperature and high electric field of 150 ° C. and 40 V / μm. The results are shown in Table 1. MTTF (Mean Time To Failure) measured the time until conduction for each of 20 of Examples 1 to 5 and Comparative Examples 1 to 3, and the average value of the obtained life times was taken as MTTF.

In Examples 1 to 5 and Comparative Examples 1 to 3, the average number of crystal grains was 3 to 10 in the thickness direction of the dielectric layer.

As shown in Table 1, in Example 1, the _IA / _IB was 0.35 and the IB was 90 _pA / mm ² . In Example 2, the _IA / _IB was 0.70 and the IB was 95 _pA / mm ² . In Example 3, _IA / _IB was 2.00 and IB was 20 _pA / mm ² . In Example 4, the _IA / _IB was 0.50 and the IB was 80 _pA / mm ² . In Example 5, the _IA / _IB was 3.00 and the IB was 20 _pA / mm ² . In Comparative Example 1, _IA / _IB was 0.15 and IB was 500 _pA / mm ² . In Comparative Example 2, _IA / _IB was 0.35 and IB was 250 _pA / mm ² . In Example 3, the _IA / _IB was 1.50 and the IB was 105 _pA / mm ² .

In Examples 1 to 5, the MTTF exceeded 2000 min, and a high life was obtained. It is considered that this is because the relationship of _IA / _IB > _0.30 was established and the peak current IB generated at the maximum temperature was 100 pA / mm ² or less. On the other hand, in Comparative Example 1, the MTTF was as short as 100 min. It is considered that this is because the _IA / _IB was as low as _0.15 and the IB could not be made sufficiently small. In Comparative Example 2, the MTTF was as short as 500 min. It is considered that this is because the IB was as high as 250 _pA / mm ² and the _IB could not be made sufficiently small, although the _IA / _IB was as large as 0.35. In Comparative Example 3, the MTTF was as short as 2000 min. It is considered that this is because the IB was as high as 105 _pA / mm ² and the IB could not be made sufficiently small, although the _IA / _IB was as large as _1.50 .

(Example 6)
In Example 6, the same manufacturing method and specifications as those in Example 1 were used.

(Example 7)
In Example 7, the same manufacturing method and specifications as in Example 2 were used.

(Example 8)
In Example 8, the same manufacturing method and specifications as in Example 3 were used.

(Example 9)
In Example 9, the same manufacturing method and specifications as in Example 4 were used.

(Example 10)
In Example 10, the same manufacturing method and specifications as in Example 5 were used.

(Comparative Example 4)
In Comparative Example 4, in the reoxidation treatment, the temperature was maintained at 950 ° C. for 1 hr in the N ₂ gas atmosphere, then cooled to 500 ° C. in the N ₂ gas atmosphere, and the atmosphere was switched to the atmosphere to cool to room temperature. That is, it was not held at 500 ° C. Other conditions were the same as in Example 1.

(Comparative Example 5)
In Comparative Example 5, in the reoxidation treatment, the temperature was maintained at 950 ° C. for 1 hr in the N ₂ gas atmosphere, cooled to 500 ° C. in the N ₂ gas atmosphere, the atmosphere was switched to the atmosphere, and the atmosphere was maintained at 500 ° C. for 10 hr. Cooled to room temperature. That is, the holding time at 500 ° C. was shortened as compared with Example 1. Other conditions were the same as in Example 1.

(Analysis 2)
For Examples 6 to 10 and Comparative Examples 4 and 5, the polarization time was 60 min, the polarization electric field was 10 V / μm, the polarization temperature was changed in the range of 150 ° C. to 210 ° C. to polarize, and then cooled to 130 ° C. ΔJ = (J170-J150) / J150 was measured by measuring J150 and J170 in a TSDC having a heating rate of 10 ° C./min. In addition, an accelerated life test (HALT) was performed at a high temperature and high electric field of 150 ° C. and 40 V / μm. The results are shown in Table 1. MTTF (Mean Time To Failure) measured the time until conduction for each of 20 of Examples 6 to 10 and Comparative Examples 4 and 5, and the average value of the obtained life times was taken as MTTF.

In Examples 6 to 10 and Comparative Examples 4 and 5, the average number of crystal grains was 3 to 10 in the thickness direction of the dielectric layer.

As shown in FIG. 6, in Example 6, MTTF was 15000 min and ΔJ was 0.07. In Example 7, MTTF was 12500 min and ΔJ was 0.04. In Example 8, MTTF was 23000 and ΔJ was 0.18. In Example 9, MTTF was 12000 and ΔJ was 0.02. In Example 10, MTTF was 30,000 and ΔJ was 0.3. In Comparative Example 4, MTTF was 100 min and ΔJ was −0.2. In Comparative Example 5, MTTF was 1200 min and ΔJ was −0.05.

In Examples 6 to 10, the MTTF exceeded 2000 min, and a high life was obtained. It is considered that this is because ΔJ becomes 0 or more. On the other hand, in Comparative Examples 4 and 5, MTTF was less than 2000 min. It is considered that this is because ΔJ is less than 0.

Although the examples of the present invention have been described in detail above, the present invention is not limited to the specific examples thereof, and various modifications and variations are made within the scope of the gist of the present invention described in the claims. It can be changed.

10 Laminated chip 11 Dielectric layer 12 Internal electrode layer 13 Cover layer 14 Oxygen defect 15 Crystal grain 16 Grain boundary 20a, 20b External electrode 100 Multilayer ceramic capacitor

Claims (15)

It has a laminated structure in which a dielectric layer containing ceramic as a main component and an internal electrode layer are alternately laminated.
With respect to the dielectric layer, in a TSDC having a polarization temperature of 150 ° C., a polarization current of 15 V / μm to 20 V / μm, a polarization time of 60 min, and a temperature rise rate of 10 ° C./min, the temperature is 160 ° C. or higher and 230 ° C. When the peak current value on the low temperature side below ° _C is _IA and the peak current value on the high temperature side of 230 ° C or higher and 350 ° _C or lower is IB, the relationship of _IA / IB> 0.30 is established and _A ceramic electronic component characterized by an IB of 100 pA / mm ² or less. The ceramic electronic component according to claim 1, wherein the _IA / _IB ≥ _0.50 in the _IA and the IB. The ceramic electronic component according to claim 1, wherein the _IA / _IB ≥ _0.70 in the _IA and the IB. The ceramic electronic component according to claim 1, wherein the _IA / _IB ≥ _2.00 in the _IA and the IB. The ceramic electronic component according to claim 1, wherein the IB is 95 _pA / mm ² or less. The ceramic electronic component according to claim 1, wherein the IB is 90 _pA / mm ² or less. The ceramic electronic component according to claim 1, wherein the IB is 80 _pA / mm ² or less. It has a laminated structure in which a dielectric layer containing ceramic as a main component and an internal electrode layer are alternately laminated.
The dielectric layer is polarized with a polarization time of 60 min, a polarization electric field of 10 V / μm, a polarization temperature of 150 ° C. or 170 ° C., and cooled to 130 ° C., and then a temperature rise rate of 10 ° C./min. In TSDC, regarding the peak current value of the peak that occurs on the lowest temperature side among the peak currents when the temperature is raised to 350 ° C., the peak current value when polarized at 150 ° C. is set to J150, and the peak when polarized at 170 ° C. A ceramic electronic component characterized in that the relationship (J170-J150) / J150 ≧ 0 is established when the current value is J170. The ceramic electronic component according to any one of claims 1 to 8, wherein the average thickness of the dielectric layer is 1 μm or more. The ceramic electronic component according to any one of claims 1 to 9, wherein the dielectric layer has an average thickness of 3.5 μm or more. The ceramic electronic component according to any one of claims 1 to 10, wherein the average number of crystal grains is 3 or more in the thickness direction of the dielectric layer. The ceramic electronic component according to any one of claims 1 to 11, wherein the number of laminated dielectric layers is 1000 or more. The ceramic electronic component according to any one of claims 1 to 12, wherein the main component of the dielectric layer is BaTiO ₃ . The ceramic electronic component according to any one of claims 1 to 7, wherein the number of TSDC peaks generated in the temperature range of 130 ° C. or higher and 350 ° C. or lower is two or more. The ceramic electronic component according to any one of claims 1 to 7, wherein the number of TSDC peaks generated in the temperature range of 130 ° C. or higher and 350 ° C. or lower is three or more.

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