JP2022098322A - Deterioration determining device and control device - Google Patents

Abstract

To obtain a deterioration determining device capable of determining deterioration state of a logical circuit to be connected between a control object and a plurality of positive electrode side control lines to which a voltage is supplied from a control power source.SOLUTION: A deterioration determining device includes: switches 731, 732, and 733; current detection units 741, 742, and 743; and a processing unit 75. The switches 731, 732, and 733 are arranged between a negative electrode side control line 24 and at least one positive electrode side control line among a plurality of positive electrode side control lines 21, 22, and 23. The current detection units 741, 742, and 743 detect currents flowing in the switches 731, 732, and 733. The processing unit 75 determines deterioration states of logical circuits 51A1 to 51An and 51B1 to 51Bn on the basis of a difference in currents detected by the current detection units 741, 742, and 743 between before and after the logical circuits 51A1 to 51An and 51B1 to 51Bn operate when the switches 731, 732, and 733 are in on states.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to a deterioration determination device and a control device for determining a deterioration state of a logic circuit connected between a plurality of control lines to which a voltage is supplied from a control power supply and a control target.

Conventionally, a control device for controlling equipment installed in a facility such as a power plant or a substation needs to continue control without erroneous output even if a partial failure occurs. , A multiplexing architecture may be used.

For example, Patent Document 1 discloses a control device that has a logic circuit that receives control signals from each of the three systems and takes a majority vote of the received three control signals, and controls a control target by the output of the logic circuit. Has been done. Such a control device can detect an abnormality in a logic circuit based on the current difference between two control lines having different combinations.

Japanese Unexamined Patent Publication No. 2020-09603

However, the technique described in Patent Document 1 can detect an abnormality in a logic circuit connected between a plurality of control lines to which a voltage is supplied from a control power supply and a control target. It may be difficult to determine the deterioration state.

The present disclosure has been made in view of the above, and is a deterioration determination capable of determining a deterioration state of a logic circuit connected between a plurality of control lines to which a voltage is supplied from a control power supply and a control target. The purpose is to obtain the device.

In order to solve the above-mentioned problems and achieve the object, the deterioration determination device of the present disclosure is a deterioration of a logic circuit connected between a plurality of positive electrode side control lines to which a voltage is supplied from a control power supply and a control target. It is a deterioration determination device for determining a state, and includes a switch, a current detection unit, and a processing unit. The switch is provided between the positive electrode side control line and the negative electrode side control line of at least one of the plurality of positive electrode side control lines. The current detector detects the current flowing through the switch. The processing unit determines the deterioration state of the logic circuit based on the difference in current detected by the current detection unit before and after the logic circuit operates when the switch is on.

According to the present disclosure, it is possible to determine the deterioration state of the logic circuit connected between the plurality of control lines to which the voltage is supplied from the control power supply and the control target.

The figure which shows an example of the structure of the control apparatus which concerns on Embodiment 1. The figure which shows the structure of the logic circuit of the control device which concerns on Embodiment 1. The figure which shows an example of the circuit which represented the internal structure of the control device which concerns on Embodiment 1 by a resistor and a switch. The figure which shows the current flow when the logic circuit which concerns on Embodiment 1 is a non-operation state, and one of the switches of a deterioration determination part is an ON state. The figure which shows an example of the circuit which changed the position of a circuit element while maintaining the connection relation of the circuit shown in FIG. The figure which shows the value of the current when the logic circuit which concerns on Embodiment 1 is a non-operation state, and one of the switches of a deterioration determination part is an ON state. The figure which shows the path of the current which flows to the switch of an on state when one of the switches of the deterioration determination part which concerns on Embodiment 1 is an on state, and the logic circuit changes from a non-operating state to an operating state. The figure which shows an example of the circuit which changed the position of a circuit element while maintaining the connection relation of the circuit shown in FIG. The figure which shows the change of the current detected by the current detection part before and after the operation of the logic circuit which has not deteriorated when one of the switches of the deterioration determination part which concerns on Embodiment 1 is an on state. An example of a change in the current detected by the current detection unit before and after the operation of the logic circuit in which the output contact is deteriorated when one of the switches of the deterioration determination unit according to the first embodiment is in the ON state. Figure shown When one of the switches of the deterioration determination unit according to the first embodiment is in the ON state, the output contact is deteriorated. Other changes in the current detected by the current detection unit before and after the operation of the logic circuit. Diagram showing an example The figure which shows the relationship between the difference of the current detected by the current detection part, and the resistance value of an output contact before and after the logic circuit operates in the state where the switch which concerns on Embodiment 1 is on. The figure which shows the other example of the structure of the control apparatus which concerns on Embodiment 1. A flowchart showing an example of processing by the processing unit of the deterioration determination unit according to the first embodiment. The figure which shows an example of the hardware composition of the processing part of the deterioration determination part which concerns on Embodiment 1. The figure which shows an example of the structure of the control apparatus which concerns on Embodiment 2.

Hereinafter, the deterioration determination device and the control device according to the embodiment will be described in detail with reference to the drawings.

Embodiment 1.
FIG. 1 is a diagram showing an example of the configuration of the control device according to the first embodiment. As shown in FIG. 1, the control device 1 is provided between the control power supply 2 and the control target 3A ₁ to 3A _n , 3B ₁ to 3B _n , and controls the control target 3A ₁ to 3A _n and 3B ₁ to 3B _n . Control. n is an integer of 2 or more.

The control power supply 2 is, for example, a DC power supply that outputs a DC voltage or an AC power supply that outputs an AC voltage. Further, the controlled objects 3A ₁ to 3A _n and 3B ₁ to 3B _n are facilities or equipment provided in a facility such as a substation, a power plant, or a factory. In the following, when each of the control targets 3A ₁ to 3An is shown without being individually distinguished, it is described as the control target 3A, and when each of the control targets 3B ₁ to 3B _{n is} shown without being individually distinguished, it is described as a control target. It may be described as 3B. Further, when each of the control targets 3A and 3B is shown without distinction, it may be described as the control target 3.

The control device ₁ includes control units 11 ₁ , 112, 113 _, a positive electrode side control line 20, a negative electrode side control line 24, switch groups 30 ₁ , ₃₀₂ , a flow dividing resistance 31, 32, 33, and logic. It includes circuits 51A ₁ to 51A _n , 51B ₁ to 51B _n , and a deterioration determination unit 70. The logic circuits 51A ₁ to 51A _n and the logic circuits 51B ₁ to 51B _n are arranged on different switchboards, for example. In the following, when each of the logic circuits 51A ₁ to 51An is shown without distinction, it is described as logic circuit 51A, and when each of the logic circuits 51B ₁ to 51B _{n is} shown without distinction, it is a logic circuit. It may be described as 51B. Further, when each of the logic circuits 51A and 51B is shown without distinction, it may be described as the logic circuit 51.

In the example shown in FIG. 1, the control device 1 has a configuration in which one logic circuit 51 is provided for the control target 3, but a configuration in which two or more logic circuits 51 are provided for the control target 3. You may.

The control units _{11 1} , 112, and 113 are respectively configured by _, for example, a PLC (Programmable Logic Controller) and control logic circuits 51A ₁ to 51A _n and 51B ₁ to 51B _n . The control device 1 is _tripled by these _three control units 11 ₁ , 112, and 113. The control unit 11 ₁ is a control unit of the first system, the control unit 11 ₂ is a control unit of the second system, and the control unit 11 ₃ is a control unit of the third system.

The control units 11 _{1 , 112} , and 113 output the same control signal to the logic circuit 51 to be controlled. For example _, the control units 11 ₁ , ₁₁₂ , and 113 output the same control signal to the logic circuit 51A ₁ to be controlled. Hereinafter, when _each of the control units 11 ₁ , ₁₁₂ , and 113 is shown without distinction, they may be referred to as the control unit 11.

The positive electrode side control line 20 and the negative electrode side control line 24 are connected to the control power supply 2, and a voltage supplied from the control power supply 2 is applied between the positive electrode side control line 20 and the negative electrode side control line 24. For example, the positive electrode side control line 20 is connected to the positive electrode of the control power supply 2, and the negative electrode side control line 24 is connected to the negative electrode of the control power supply 2. The positive electrode side control line 20 is branched into positive electrode side control lines 21, 22, 23. Further, the positive electrode side control line 21 is branched into positive electrode _side control lines 21 ₁ and 212, the positive electrode side control line 22 is branched into positive electrode _side control lines 22 ₁ and 222, and the positive electrode side control line 23 is a positive electrode. It is branched into the side control lines 23 ₁ and 223 ₂ . The negative electrode side control line 24 is branched into the negative electrode side control lines 24 _{1 , 242} , and 243.

The switch group 30 ₁ includes a connection and disconnection between the positive electrode side control lines 21 and 22 and 23 and the positive electrode side control lines 21 ₁ , 22 ₁ and 23 ₁ , and a negative electrode side control line 24 and a negative electrode side control line 24 ₁ . Make connections and disconnections between. The switch group 30 ₂ includes a connection and disconnection between the positive electrode _side control lines 21 and 22 and 23 and the positive electrode _side control lines 211, 222 and ₂₃₂ , and a negative electrode side control line 24 and a negative electrode side control line ₂₄₂ . Make connections and disconnections between. The switch group 30 ₁ , 30 ₂ is controlled by, for example, the control unit 11 ₁ , _{112, 11 3 or} an external device.

The divergence resistance 31 is arranged in the middle of the positive electrode side control line 21, the divergence resistance 32 is arranged in the middle of the positive electrode side control line 22, and the divergence resistance 33 is arranged in the middle of the positive electrode side control line 23. To. The resistance values of the diversion resistors 31, 32, and 33 are set so that, for example, the currents flowing from each of the positive electrode side control lines 21, 22, and 23 to each control target 3 are equal.

The logic circuit 51A is connected between a plurality of positive electrode side control lines 21 ₁ , 22 ₁ , 23 ₁ to which a voltage is supplied from the control power supply 2 and a controlled object 3A. The logic circuit 51A is controlled by _three control units 11 ₁ , ₁₁₂ , and 113, and energizes the controlled object 3A.

For example, the logic circuit 51A ₁ is connected between a plurality of positive electrode side control lines 21 ₁ , 22 ₁ , 23 ₁ and a control target 3A ₁ , and is controlled by _three control units 11 ₁ , ₁₁₂ , 113. , Control target 3A ₁ is energized. Further, the logic circuit _51An is connected between the plurality of positive electrode side control lines 21 ₁ , 22 ₁ , 23 ₁ and the control target _3An , and is controlled by _three control units 11 ₁ , ₁₁₂ , 113. , The control target _3An is energized.

The logic circuit 51B is connected between the plurality of positive electrode side control lines ₂₁₁ , 222, ₂₃₂ and the controlled object 3B to which the voltage is supplied from the control power supply ₂ . The logic circuit 51B is controlled by _three control units 11 ₁ , 112, and 113, and energizes the controlled object _3B .

For example, the logic circuit 51B ₁ is connected between a plurality of positive electrode side control lines ₂₁₁ , 222, ₂₃₂ and the control target 3B ₁ , and is controlled by _three control units 11 ₁ , ₁₁₂ , ₁₁₃ . , Control target 3B ₁ is energized. Further, the logic circuit 51B _n is connected between the plurality of positive electrode side control lines 211, 222, ₂₃₂ and the control target _{3B n} , and is controlled by _three control units 11 ₁ , ₁₁₂ , ₁₁₃ . , The control target _3Bn is energized.

FIG. 2 is a diagram showing a configuration of a logic circuit of the control device according to the first embodiment. The logic circuit shown in FIG. 2 is a logic circuit 51A, but the logic circuit 51B has the same configuration as the logic circuit 51A. As shown in FIG. 2, the logic circuit 51A is connected between the positive electrode side control lines 21 ₁ , 22 ₁ , 23 ₁ and the positive electrode side control line 28. The positive electrode side control line 28 is connected to the control target 3A, and the control target 3A is controlled by the output from the logic circuit 51A to the positive electrode side control line 28. For example, the control target 3A has an electromagnetic relay for supplying electric power, and when a voltage is applied to the control coil of the electromagnetic relay from the positive electrode side control line 28, the electromagnetic relay is turned on and the control target is controlled. Power is supplied to 3A to operate the controlled target 3A.

As shown in FIG. 2, the logic circuit 51A includes switches 61 ₁ , 61 ₂ , 62 ₁ , 62 ₂ , 63 ₁ , 632 and connection lines 25 _{1 ,} 25 ₂ , 25 ₃ . The switches 61 ₁ and 62 ₁ are provided between the positive electrode side control line 21 ₁ and the control target 3A, and are connected in series by the connection line 25 ₁ . The switches 62 ₂ and 63 ₁ are provided between the positive electrode side control line 22 ₁ and the control target 3A, and are connected in series by the connection line ₂₅₂ . The switches 61 ₂ and 63 ₂ are provided between the positive electrode _side control line 231 and the control target 3A, and are connected in series by the connection line ₂₅₃ .

The switches 61 ₁ and 61 ₂ are controlled on and off by the control signal output from the control unit _{111, and the switches 62 1 and} 62 ₂ are controlled on and off by the control signal _output from the control unit 112. Will be done. Further, the switches 63 ₁ and 63 ₂ are controlled to be turned on and off by a control signal output from the control unit ₁₁₃ . In the following, switches 61 ₁ and 62 ₁ are collectively referred to as output contact A, switches 62 ₂ and 63 ₁ are collectively referred to as output contact B, and switches 61 ₂ and 63 ₂ are collectively referred to as output contact C. In some cases.

The switches 61 ₁ , 61 ₂ , 62 ₁ , 62 ₂ , 63 ₁ , 63 ₂ are, for example, electromagnetic relays such as latching relays, but may also be semiconductor relays. In the following, when _each of the switches 61 ₁ and 612 is shown without distinction, it is described as switch 61, and when each of switches 62 ₁ and 62 ₂ is shown without distinction, it is described as switch 62 and switch 63 ₁ , 63 When each of ₂ is shown without distinction, it may be described as switch 63.

The logic circuit 51 is a majority logic circuit that takes a majority vote of three control signals output from the three control units 11, but even if one of the plurality of control units 11 fails, the control target 3A is energized. Any configuration can be used. For example, the logic circuit 51 may be a logic circuit operated by four or more control signals output from four or more control units 11, and may be operated by two control signals output from two control units 11. It may be a logic circuit to do.

In the logic circuit 51, one of the _three control units 11 ₁ , ₁₁₂ , 113 may fail, or _one of the plurality of switches 61 ₁ , 612, 62 ₁ , 62 ₂ , 63 ₁ , 63 ₂ may be switched. Even if it breaks down, it works normally. Therefore, in this case, the problem does not become apparent, but if any one of the switches 61 ₁ , 61 ₂ , 62 ₁ , 62 ₂ , 63 ₁ , 63 ₂ fails further, the control of the control target 3 by the control device 1 suddenly occurs. It may not be possible.

In order to prevent the control target 3 from being suddenly lost by the control device 1, it is desirable to check the deterioration state of the contacts of the switches 61, 62, 63. In this case, it is possible to remove the switches 61, 62, and 63 to be checked one by one and check the deterioration state of the contacts of the removed switches, but it is necessary to stop the operation of the control device 1. In addition, it takes time and effort to remove the switch from the control device 1.

Therefore, the control device 1 includes a deterioration determination unit 70 for determining a deterioration state of the logic circuit 51. The deterioration determination unit 70 is an example of a deterioration determination device. As shown in FIG. 1, the deterioration determination unit 70 includes a plurality of auxiliary lines 71 ₁ , ₇₁₂ , 713 _, a plurality of limiting resistors 72 ₁ , ₇₂₂ , _{723 ,} and a plurality of switches 73 ₁ , 732, 73 ₃ , a plurality of current detection units 74 ₁ , 74 ₂ , 74 ₃ and a processing unit 75 are provided.

_The plurality of auxiliary lines 71 _{1 ,} 712, 713 are connected between the positive electrode side control lines 21, 22, 23 and the negative electrode side control line 24. Specifically, the auxiliary line 711 is connected between the positive electrode _side control line 21 and the negative electrode side control line _{243 ,} and the auxiliary line 712 is formed by the positive electrode side control line 22 and the negative electrode side control line ₂₄₃ . The auxiliary line ₇₁₃ is connected between the positive electrode side control line 23 and the negative electrode side control line ₂₄₃ .

The plurality of limiting resistors _{72 1} , 722, 723 are provided for the auxiliary lines 71 ₁ , ₇₁₂ , 713, which are different from each other _, among the plurality of auxiliary lines 71 ₁ , 712, 713. Specifically, the limiting resistor ₇₂₁ is provided in the middle of the auxiliary line ₇₁₁ and limits the current flowing through the auxiliary line ₇₁₁ . _The limiting resistor 722 is provided in the middle of the auxiliary line ₇₁₂ and limits the current flowing through the auxiliary line ₇₁₂ . The limiting resistor ₇₂₃ is provided in the middle of the auxiliary line ₇₁₃ and limits the current flowing through the auxiliary line ₇₁₃ .

_The plurality of switches 73 ₁ , 732, 733 are provided for the auxiliary lines 71 ₁ , ₇₁₂ , 713, which are different from each other _, among the plurality of auxiliary lines 71 ₁ , 712, 713. Specifically, the switch 73 ₁ is provided in the middle of the auxiliary line ₇₁₁ and is turned on to connect the positive electrode side control line 21 and the negative electrode side control line 24 and turned off. , The connection between the positive electrode side control line 21 and the negative electrode side control line 24 is released.

_The switch 732 is provided in the middle of the auxiliary line ₇₁₂ , and when it is turned on, it connects the positive electrode side control line 22 and the negative electrode side control line 24, and when it is turned off, the positive electrode side control line is connected. The connection between the 22 and the negative electrode side control line 24 is released. The switch 73 ₃ is provided in the middle of the auxiliary line 713 _, and when it is turned on, it connects the positive electrode side control line 23 and the negative electrode side control line 24, and when it is turned off, the positive electrode side control line is connected. The connection between the 23 and the negative electrode side control line 24 is released. Hereinafter, when _each of the switches 73 _{1 ,} 732, and 733 is shown without distinction, they may be referred to as the switch 73.

The plurality of current detectors 74 ₁ , _{742, 74 3 detect} the current flowing through the plurality of switches 73 _{1 ,} 732, ₇₃₃ . Specifically, the current detection unit 74 ₁ detects the current flowing through the switch 73 ₁ , the current detection unit 74 ₂ detects the current flowing through the switch 732 _, and the current detection unit 74 ₃ detects the current flowing through the switch 73 ₃ . Detect the flowing current. Hereinafter, when each of the current detection units 74 ₁ , 74 ₂ and 74 ₃ is shown without distinction, it may be referred to as a current detection unit 74.

The current detection unit 74 is, for example, a non-contact sensor and has a CT (Current Transformer), a Hall element, or the like. The current detection unit 74 is an analog type current detection unit that outputs a voltage of a magnitude corresponding to the current flowing through the switch 73, but includes the value of the current flowing through the switch 73 among a plurality of different current ranges. It may be a digital current detector that outputs a signal according to the current range.

For example, the current detection unit 74 outputs the first voltage when the value of the current flowing through the switch 73 is in the first range, and the second is when the value of the current flowing through the switch 73 is in the second range. When the value of the current flowing through the switch 73 is in the m-th range, the voltage may be output. m is an integer of 3 or more. The first range, the second range, and the mth range do not overlap each other. The current detection unit 74 may have m output terminals corresponding to each range, and a voltage indicating a detection result may be output from the output terminals corresponding to the value of the current flowing through the switch 73. ..

The processing unit 75 performs a process of determining the deterioration of the logic circuit 51 at a preset frequency or a frequency that changes according to the degree of deterioration of the logic circuit 51. The processing unit 75 includes a switch control unit 81 that controls a plurality of switches 73 _{1 ,} 732, and ₇₃₃ , and a determination unit 82 that determines a deterioration state of the logic circuit 51. The switch control unit 81 selectively turns _on a plurality of switches 73 _{1 ,} 732, and 733 during the period in which the determination unit 82 determines the deterioration state of the logic circuit 51.

The determination unit 82 is the difference between the currents detected by the current detection unit 74 before and after the logic circuit 51 operates when any _one of the plurality of switches 73 _{1 ,} 732, and 733 is in the ON state. Based on the above, the deterioration state of the logic circuit 51 is determined. The determination unit 82 outputs deterioration determination information indicating the deterioration state of the determined logic circuit 51. For example, the determination unit 82 can output the deterioration determination information to the external device or the control unit 11.

Hereinafter, a method for determining the deterioration state of the logic circuit 51 by the processing unit 75 will be specifically described. FIG. 3 is a diagram showing an example of a circuit in which the internal configuration of the control device according to the first embodiment is represented by a resistance and a switch. In the example shown in FIG. 3, the switch group 30 ₁ is in the on state, the switch group 30 ₂ is in the off state, and at least two logic circuits 51A ₁ , 51A _n among the logic circuits 51A ₁ to 51A _n are in the off state. Is an equivalent circuit in the state where is being driven.

In FIG. 3, the resistance values _RA0 , _RB0 , and _RC0 are the resistance values of the divergence resistances 31, 32, and 33, and the resistance values _RA1 , _RB1 , _RC1 to _RAN , _RBn , and _RCn are. The resistance values of the positive side control lines 21 ₁ , 22 ₁ and ₂₃₁ ; the resistance value _RN0 is the resistance value of the negative side control line 24, and the resistance values _{RN1 to RNn are} the negative side control lines 24 ₁ The resistance values R _AX , R _BX , and RC _{X are} the resistance values of the limiting resistances 72 ₁ , 72 ₂ , and 723.

Further, in FIG. 3, the resistance value R ₁ is the resistance value of the control target 3A ₁ , the resistance value R _n is the resistance value of the control target 3A _n , and the resistance value _RX is the negative electrode side control line 24 ₃ "P" is the positive electrode of the control power supply 2, and "N" is the negative electrode of the control power supply 2.

Further, in FIG. 3, the resistance value _RAA1 is the resistance value of the switches 61 ₁ and 621 in the state of being turned on in the logic circuit 51A ₁ , and the resistance value R _BB1 is the state of the switch 62 in the state of being turned _{on in the logic circuit 51A 1 .} The resistance value is ₂ , 63 ₁ , and the resistance value R _CC1 is the resistance value of the switches 61 ₂ , 63 ₂ in the turned-on state in the logic circuit 51A ₁ .

Further, in FIG. ₃ , the resistance value R _AAn is the combined resistance value of the switches 61 ₁ and _{621 in the state of being turned on in the logic circuit 51 An, and the resistance value R BBn is} the switch in the state of being turned on in the logic circuit 51 _An . It is the combined resistance value of 62 ₂ and 63 ₁ , and the resistance value R _{CCn is} the combined resistance value of the switches 61 ₂ and ₆₃₂ .

Here, the deterioration state determination processing of the logic circuit 51A ₁ by the deterioration determination unit 70 will be described. For the sake of clarity, it is assumed that all the logic circuits 51 other than the logic circuit 51A ₁ are in the non-operating state, and the currents flowing through the auxiliary lines 71 _{1 , 712} , 713 are passed through the currents _IA , _IB . , _IC .

First, the value of the current flowing through the control device ₁ when the logic circuit 51A ₁ is in the non-operating state and the switch 731 of the deterioration determination unit 70 is in the ON state will be described. FIG. 4 is a diagram showing a current flow when the logic circuit according to the first embodiment is in the non-operating state and one of the switches of the deterioration determination unit is in the ON state, and FIG. 5 is a diagram showing the current flow when the circuit shown in FIG. 4 is in the on state. It is a figure which shows an example of the circuit which changed the position of a circuit element while maintaining the connection relation.

As shown in FIGS. 4 and 5, when the logic circuit 51A ₁ is in a non-operating state and the switch 73 ₁ of the deterioration determination unit 70 is in the ON state, the control power supply 2 is transmitted from the positive electrode P of the control power supply 2 via the switch 73 ₁ . A current flows toward the negative electrode N of. In this case, the value of the current _IA is expressed by the following equation (1). The values of the _{currents IB} and IC are zero. In the following equation (1), "E" is the output voltage of the control power supply 2, for example, a DC voltage of 110V.

FIG. 6 is a diagram showing a current value when the logic circuit according to the first embodiment is in a non-operating state and one of the switches of the deterioration determination unit is in the on state. In FIG. 6, the vertical axis is the current value and the horizontal axis is the time. As shown in FIG. 6, the value of the current IA when the logic circuit 51A ₁ is in the non-operating state and the switch 731 of the deterioration determination unit ₇₀ is in the ON state is the current value _{IA T0} . The current value I _AT0 is the value of the current _IA represented by the above equation (1).

Further, when the logic circuit 51A ₁ is in the non _- operating state and the switch 732 of the deterioration determination unit 70 is in the ON state, the value of the current IB is represented by the following equation ( ₂ ). The values of the currents I _A and I _C are zero. In the following, the value of the current _{IB represented by the following equation (2) may be described as the current value BT0 .}

Further, when the logic circuit 51A ₁ is in the non _- operating state and the switch 733 of the deterioration determination unit 70 is in the ON state, the value of the current IC is expressed by the following equation ( ₃ ). The values of the currents I _A and _IB are zero. In the following, the value of the current _{IC represented by the following equation (3) may be referred to as the current value ICT0 .}

Next, the value of the current flowing through the control device 1 when the switch 73 ₁ of the deterioration determination unit 70 is on and the logic circuit 51A ₁ changes from the non-operating state to the operating state will be described. FIG. 7 is a diagram showing the path of the current flowing through the switch in the on state when one of the switches of the deterioration determination unit according to the first embodiment is in the on state and the logic circuit changes from the non-operating state to the operating state. FIG. 8 is a diagram showing an example of a circuit in which the positions of circuit elements are changed while maintaining the connection relationship of the circuits shown in FIG. 7.

In FIGS. 7 and 8, attention is paid to the path of the current flowing through the switch 731, and the current flowing from the positive electrode _{side control lines 21 1, 22 1, 23 1 to the controlled object 3A 1 via the logic circuit} 51A ₁ . The route is not shown. In the examples shown in FIGS. 7 and 8, in addition to the current _IA1 that flows directly from the control power supply ₂ to the switch 731 via the positive electrode side control line 21, the control power supply 2 to the positive electrode side control lines 22, 23, and the logic circuit. The current I _A2 flows to the switch 73 ₁ via the 51A ₁ and the positive electrode side control line 21.

In this case, assuming that the change in the current I _A1 is negligible with respect to the change in the voltage drop at the divergence resistance 31 between the case where the logic circuit 51A ₁ is in the non-operating state and the case where the logic circuit 51A 1 is in the operating state, the current is detected. The value of the current _IA detected by the part 74 ₁ is expressed by the following equation (4).

Further, assuming that the value of the current _IA detected by the current detection unit 741 in the states shown in FIGS. 7 and 8 is the current value _{I AT3} , before and after the logic circuit 51A ₁ operates while the switch 731 is _on . The difference _ΔIA of the current _IA detected by the current detection unit 74 ₁ is expressed by the following equation (5).

FIG. 9 shows a change in the current detected by the current detection unit before and after the operation of the non-deteriorated logic circuit when one of the switches of the deterioration determination unit according to the first embodiment is in the ON state. It is a figure. The example shown in FIG. 9 shows the change in the current _IA detected by the current detection unit ₇₄₁ before and after the logic circuit 51A ₁ operates when the switch 73 ₁ is on.

As shown in FIG. 9, the value of the current _IA detected by the current detection unit _{74 1 is} the current value IA _T0 until the time T1 when the logic circuit 51A ₁ operates in the on state of the switch 731. Then, at the time T1 when the logic circuit 51A ₁ operates, the value of the current _IA detected by the current detection unit 74 ₁ changes from the current value I _{AT 0} to the current value I AT 3.

Therefore, the difference _ΔIA of the current I _A detected by the current detection unit 74 ₁ before and after the logic circuit 51A ₁ operates when one of the switches 73 ₁ is on is the current value I AT ₀ and the current value I _AT 3. It becomes the difference with.

The difference _ΔIA changes depending on the degree of deterioration of the logic circuit 51A ₁ . For example, when any of the switches 62 ₂ and 63 ₁ constituting the output contact B deteriorates and the resistance value _RBBn becomes large, the current flowing through the output contact B is compared with the case where the output contact B is not deteriorated. Becomes smaller. Therefore, since the current I _A2 becomes small, the difference _ΔIA becomes small.

FIG. 10 shows the current detected by the current detection unit before and after the operation of the logic circuit in which the output contact is deteriorated when one of the switches of the deterioration determination unit according to the first embodiment is in the ON state. It is a figure which shows an example of a change. FIG. 11 shows the current detected by the current detection unit before and after the operation of the logic circuit in which the output contact is deteriorated when one of the switches of the deterioration determination unit according to the first embodiment is in the ON state. It is a figure which shows another example of a change.

In the example shown in FIG. 10, the difference between the current _IA detected by the current detection unit 74 ₁ before and after the operation of the logic circuit 51A ₁ in which the output contact B is deteriorated when one of the switches 73 ₁ is on. It shows the change of _ΔIA . As shown in FIG. 10, until the time T1 when the logic circuit 51A ₁ in which the output contact B is deteriorated when the switch 73 ₁ is on operates, the value of the current _IA detected by the current detection unit 74 ₁ is The current value I _AT0 . Then, the value of the current _IA detected by the current detection unit 741 changes from the current value _{I AT0} to the current value I _AT3'at the time T1 when the logic circuit 51A ₁ in which the output contact B is deteriorated operates.

Therefore, the difference _ΔIA of the current I _A detected by the current detection unit 74 ₁ before and after the logic circuit 51A ₁ operates when the switch 73 ₁ is on is the current value I AT ₀ and the current value I _AT 3'. It becomes the difference of.

Similarly, when any of the switches 61 ₂ and 63 ₂ constituting the output contact C deteriorates and the resistance value R _CCn becomes large, the current flowing through the output contact C becomes small and the output contact C is not deteriorated. Since the current I _A2 is smaller than in the case, the difference _ΔIA is smaller. In the example shown in FIG. 11, the difference between the current _IA detected by the current detection unit 74 ₁ before and after the operation of the logic circuit 51A ₁ in which the output contact C is deteriorated when one of the switches 73 ₁ is on. It shows the change of _ΔIA .

As shown in FIG. 11, until the time T1 when the logic circuit 51A ₁ in which the output contact C is deteriorated when the switch 73 ₁ is on operates, the value of the current _IA detected by the current detection unit 74 ₁ is The current value I _AT0 . Then, the value of the current _IA detected by the current detection unit 741 changes from the current value _{I AT0} to the current value I _AT3 "at the time T1 when the logic circuit 51A ₁ in which the output contact B is deteriorated operates. , The difference _ΔIA of the current I _A detected by the current detection unit 74 ₁ before and after the logic circuit 51A ₁ operates when the switch 73 ₁ is on is the current value I AT ₀ and the current value I _AT 3 ”. It becomes a difference.

Similarly, when any of the switches 61 ₁ and 62 ₁ constituting the output contact A deteriorates and the resistance value _RAAn becomes large, the value of the current flowing through the output contact A becomes small and the output contact C deteriorates. Since the current I _A2 is smaller than that in the case where the current I A2 is not set, the difference _ΔIA is smaller.

In this way, when any of the output contacts A, B, and C deteriorates and the resistance values of the output contacts A, B, and C become large, the difference is compared with the case where the output contacts A, B, and C are not deteriorated. _ΔIA becomes smaller. The determination unit 82 can determine that the logic circuit 51A ₁ is deteriorated when the difference _ΔIA is smaller than that when the output contacts A, B, and C are not deteriorated. The deterioration of the output contacts A, B, and C includes the open failure of the output contacts A, B, and C.

FIG. 12 is a diagram showing the relationship between the difference in current detected by the current detection unit and the resistance value of the output contact before and after the logic circuit operates when the switch according to the first embodiment is on. In FIG. 12, the vertical axis shows the difference in current, and the horizontal axis shows the resistance value. As shown in FIG. 12, as the degree of deterioration of the output contacts A, B, and C increases, the resistance values of the output contacts A, B, and C increase. Therefore, when the output contacts A, B, and C are not deteriorated. In comparison, the difference _ΔIA becomes smaller. Therefore, the determination unit 82 can determine the degree of deterioration of the logic circuit 51A ₁ based on the difference _ΔIA .

Here, the relationship between the resistance values _RA0 , _RA1 , _RAA1 , _RB0 , RB1, _RBB1 , _{RC0, RC1, RCC1, the current value I AT0 , and the} difference _ΔIA is _expressed in the following equation (6). It can be expressed as.

Further, assuming that the difference between the currents _IB detected by the current detection unit ₇₄₂ before and after the logic circuit 51A ₁ operates when the switch 732 is on is the difference _ΔIB , the resistance values _RA0 , _RA1 , and _so on. The relationship between _RAA1 , _RB0 , _RB1 , _RBB1 , _{RC0, RC1, RCC1, the current value IBT0 , and the} difference _ΔIB can be expressed by the following equation (7).

Further, assuming that the difference of the current IC detected by the current detection unit 74 ₃ before and after the operation of the logic circuit 51A ₁ when the switch 73 ₃ is on is the difference _ΔIC , the resistance _{values RA0} , _RA1 , and so on. The relationship between _RAA1 , _RB0 , _{RB1, RBB1, RC0, RC1, RCC1 and the current value} I _CT0 and the difference _ΔIC can be expressed by the following equation (8).

The switch control unit 81 of the processing unit 75 switches, for example, the switch to be turned _on among the plurality of switches 73 ₁ , 732, and 73 ₃ each time the logic circuit 51A ₁ changes from the non-operating state to the operating state. The determination unit 82 of the processing unit 75 determines the currents I _A , _{IB, and IC detected by the current detection units 74 1, 742, and 74 3 each time the switch} 73 to be turned on by the switch control unit 81 is switched. Calculate the differences _ΔIA , _ΔIB , and _ΔIC from the values.

Then, the processing unit 75 combines the calculated differences _ΔIA , _ΔIB , and _ΔIC with the current values I _AT0 , _IBT0 , and _ICT0 obtained from the current detection units 74 ₁ , ₇₄₂ , and 74 ₃ in the above equation (6). The resistance values R AA1, R _BB 1, and R _{CC 1 can be calculated by solving the equation with the resistance values R AA1 ,} R _BB 1, and R _CC 1 as variables, which are obtained by substituting into (8). The processing unit 75 calculates the resistance values _RAA1 , _RBB1 , and _RCC1 by using a formula different from the above formulas (6) to (8) instead of the above formulas (6) to (8). You can also do it.

Further, the processing unit 75 may have a configuration having a calculation model in which the differences _ΔIA , _ΔIB , and ΔIC are input and the degree of deterioration of the output contacts A, B, and _C is output. The processing unit 75 can determine the degree of deterioration of the output contacts A, _B , and _C by inputting the differences _ΔIA , ΔIB, and ΔIC into the calculation model. Such a calculation model is a calculation model generated by machine learning, for example, a convolutional neural network or a recurrent that inputs the differences _ΔIA , _ΔIB , and ΔIC and outputs the degree of deterioration of the output contacts A, B, and _C. It is a neural network.

The degree of deterioration of the output contacts A, B, and C may be the resistance values _RAA1 , _RBB1 , and _RCC1 , and the initial resistance values _RAA1 , _RBB1 , _RCC1 and the current resistance values _RAA1 , R. It may be a ratio with _BB1 and _RCC1 . Further, the calculation model may be a calculation model other than the convolutional neural network and the recurrent neural network. The calculation model may be a calculation model generated by a learning algorithm such as linear regression or logistic regression.

Further, the processing unit 75 has, for example, a plurality of switches 73 ₁ , 732, 73 _every time the logic circuit 51A ₁ changes from the non-operating state to the operating state and every time the logic circuit 51A ₁ changes from the operating state to the non-operating state. Of the _three , the switch that turns on is switched, and the values of the currents I _A , _IB , and IC detected by the current detectors 74 ₁ , _{742, and 74 3 are} acquired, and the above-mentioned resistance values _{R AA 1} , R _BB 1 are obtained. , R _CC1 may be calculated.

The deterioration determination unit 70 described above has a configuration having _three current detection units 74 ₁ , 742, 74 ₃ , but instead of the _three current detection units 74 ₁ , 742, 74 ₃ , the negative electrode side control line 24 It may be configured to have one current detection unit in _three . FIG. 13 is a diagram showing another example of the configuration of the control device according to the first embodiment.

The deterioration determination unit 70 shown in FIG. _{13 has one current detection unit 74 4 on} the negative electrode side control line 243 instead of the _three current detection units 74 ₁ , 742, 74 ₃ . Of the plurality of switches 73 ₁ , 732, 733 in the deterioration determination unit 70 _{, one switch is turned on by the switch control unit 81, and the plurality of switches 73 1 ,} 732, _{733 are} not turned on at the same time. .. The determination unit 82 of the deterioration determination unit 70 acquires information indicating which of the plurality of switches 73 _{1 , 732, and 73 3 is} in the ON state from the switch control unit 81, so that the difference _ΔIA , _ΔIB and _ΔIC can be calculated.

As described above, since the deterioration determination unit 70 shown in FIG. 13 has one current detection unit 74 ₄ instead of the _three current detection units 74 ₁ , 742, 74 ₃ , the cost can be reduced. be able to. The deterioration determination unit 70 may have a configuration having four current detection units 74 ₁ , 74 ₂ , 74 ₃ and 74 ₄ . In this case, even if the four current detection units 74 ₁ , 74 ₂ , 74 ₃ , 74 ₄ fail, the determination unit 82 can calculate the differences _ΔIA , _ΔIB , and _ΔIC . In the following, when each of the difference _ΔIA , _ΔIB , and _ΔIC is shown without distinction, it may be described as the difference ΔI.

Further, the deterioration determination unit 70 shown in FIG. ₁₃ has one limiting resistor 724 on the negative electrode side control line ₂₄₃ instead of the _three limiting resistors 72 ₁ , 72 ₂ , 723. As described above, since _only one of the plurality of switches 73 ₁ , 732, 733 is turned on by the switch control unit 81, the limiting resistance _{724 is the three limiting resistances 72 1 , 72} . It is possible to realize _{2,723 functions} .

Subsequently, the processing by the processing unit 75 of the deterioration determination unit 70 will be described using a flowchart. FIG. 14 is a flowchart showing an example of processing by the processing unit of the deterioration determination unit according to the first embodiment. The process shown in FIG. 14 is executed for each logic circuit 51.

As shown in FIG. 14, the processing unit 75 of the deterioration determination unit 70 determines whether or not it is the deterioration determination timing (step S10). The deterioration determination timing is, for example, a timing before the preset period in which the logic circuit 51 changes from the non-operating state to the operating state, and is a timing notified by the control unit 11.

The deterioration determination timing is generated every time the number of times the logic circuit 51 is driven by the control unit 11 reaches a preset threshold value. The threshold may be fixed or variable. For example, the threshold value becomes smaller as the degree of deterioration of the logic circuit 51 determined by the deterioration determination unit 70 increases. As a result, the deterioration determination unit 70 can increase the frequency of determining the deterioration state of the logic circuit 51 as the degree of deterioration of the determined logic circuit 51 increases.

When the processing unit 75 determines that it is the deterioration determination timing (step S10: Yes), the processing unit 75 selects a switch to be turned _on from the plurality of switches 73 ₁ , 732, and 73 ₃ (step S11), and selects the switch. Is controlled to the on state (step S12). Then, the processing unit 75 acquires the value of the current detected by the current detection unit 74 (step S13).

Next, the processing unit 75 determines whether or not the operating state of the logic circuit 51 has changed (step S14). In step S14, the processing unit 75 changes the operating state of the logic circuit 51 when the logic circuit 51 changes from the non-operating state to the operating state or when the logic circuit 51 changes from the operating state to the non-operating state. Is determined.

When the processing unit 75 determines that the operating state of the logic circuit 51 has not changed (step S14: No), the processing unit 75 repeats the processing of step S14. When the processing unit 75 determines that the operating state of the logic circuit 51 has changed (step S14: Yes), the processing unit 75 acquires the value of the current detected by the current detection unit 74 (step S15). Then, the processing unit 75 calculates the difference ΔI between the value of the current acquired in step S13 and the value of the current acquired in step S15 (step S16).

The processing unit 75 determines whether or not all the switches 73 have been selected (step S17). When the processing unit 75 determines that all the switches 73 have not been selected (step S17: No), the processing unit 75 shifts the processing to step S11.

When the processing unit 75 determines that all the switches 73 have been selected (step S17: Yes), the processing unit 75 determines the deterioration state of the logic circuit 51 (step S18). In step S18, the processing unit 75 determines the deterioration state of the logic circuit 51 by calculating the resistance values _RAA1 , _RBB1 , and _RCC1 based on the differences _ΔIA , _ΔIB , and _ΔIC . Further, the processing unit 75 is based on the difference between the differences _ΔIA , _ΔIB , and _ΔIC calculated in the state where the logic circuit 51 is not deteriorated and the differences _ΔIA , _ΔIB , and _ΔIC calculated this time. It is also possible to determine the deterioration state of the logic circuit 51.

The processing unit 75 ends the processing of FIG. 14 when the processing of step S18 is completed or when it is determined that it is not the deterioration determination timing (step S10: No). The processing unit 75 can also determine the deterioration state of the logic circuit 51 based on the change of the difference ΔI calculated in step S16. Further, the processing unit 75 can change the selection switch from the on state to the off state between steps S13 and S14, and changes the selection switch from the off state to the on state between steps S15 and S16. can do. Further, the processing unit 75 can also turn on the switch 73 for a predetermined period in which the state of the logic circuit 51 is changed by the control unit 11.

FIG. 15 is a diagram showing an example of the hardware configuration of the processing unit of the deterioration determination unit according to the first embodiment. As shown in FIG. 15, the processing unit 75 of the deterioration determination unit 70 includes a processor 101, a memory 102, and a computer including an interface circuit 103.

The processor 101, the memory 102, and the interface circuit 103 can send and receive information to and from each other by, for example, the bus 104. The processor 101 executes functions such as the switch control unit 81 and the determination unit 82 by reading and executing the program stored in the memory 102. The processor 101 is, for example, an example of a processing circuit, and includes one or more of a CPU (Central Processing Unit), a DSP (Digital Signal Processor), and a system LSI (Large Scale Integration).

The memory 102 includes one or more of RAM (Random Access Memory), ROM (Read Only Memory), flash memory, EPROM (Erasable Programmable Read Only Memory), and EEPROM (registered trademark) (Electrically Erasable Programmable Read Only Memory). include. Further, the memory 102 includes a recording medium in which a computer-readable program is recorded. Such recording media include one or more of non-volatile or volatile semiconductor memories, magnetic disks, flexible memories, optical discs, compact discs, and DVDs (Digital Versatile Discs). The processing unit 75 of the deterioration determination unit 70 may include an integrated circuit such as an ASIC (Application Specific Integrated Circuit) and an FPGA (Field Programmable Gate Array).

The deterioration determination unit 70 of the control device 1 described above has a configuration in which a switch 73 is provided for each of the positive electrode side control lines 21 and 22.23, but one or two of the positive electrode side control lines 21 and 22 and 23. The switch 73 may be provided in the switch 73. In this case as well, the deterioration determination unit 70 can determine the deterioration state of the logic circuit 51 based on, for example, the change in the difference ΔI.

As described above, the deterioration determination unit 70 according to the first embodiment is a logic circuit connected between the plurality of positive electrode side control lines 21 and 22, 23 to which the voltage is supplied from the control power supply 2 and the control target 3. The deterioration state of 51 is determined. The deterioration determination unit 70 is an example of a deterioration determination device. The deterioration determination unit 70 includes a switch 73, a current detection unit 74, and a processing unit 75. The switch 73 is provided between the positive electrode side control line and the negative electrode side control line 24 of at least one of the plurality of positive electrode side control lines 21, 22, 23. The current detection unit 74 detects the current flowing through the switch 73. The processing unit 75 determines the deterioration state of the logic circuit 51 based on the current difference ΔI detected by the current detection unit 74 before and after the logic circuit 51 operates when the switch 73 is in the ON state. .. As a result, the deterioration determination unit 70 can determine the deterioration state of the logic circuit 51 connected between the plurality of positive electrode side control lines 21, 22, 23 and the control target 3.

Further, the deterioration determination unit 70 includes a plurality of switches 73. The processing unit 75 turns on each of the plurality of switches 73 in different periods, and the logic is based on the current difference ΔI detected by the current detection unit 74 before and after the logic circuit 51 operates in each period. The deterioration state of the circuit 51 is determined. As a result, the deterioration determination unit 70 can accurately determine the deterioration state of the logic circuit 51.

Further, the deterioration determination unit 70 includes a plurality of current detection units 74. The plurality of switches 73 are provided between the positive electrode side control lines and the negative electrode side control lines 24, which are different from each other among the plurality of positive electrode side control lines 21 and 22, 23. The plurality of current detection units 74 detect currents flowing through different switches among the plurality of switches 73. As a result, the deterioration determination unit 70 can accurately determine the deterioration state of the logic circuit 51 based on the current values detected by the plurality of current detection units 74.

Further, one end of the plurality of switches 73 is connected to the corresponding connection line among the plurality of positive electrode side control lines 21 and 22.23, and the current detection unit 74 is connected to the other end of the plurality of switches 73 and the negative electrode side control line 24. It is provided between. As a result, the deterioration determination unit 70 can accurately determine the deterioration state of the logic circuit 51 by using one current detection unit 74.

Further, the current detection unit 74 is a digital current detection unit that outputs a signal corresponding to a current range including a current value among a plurality of different current ranges. As a result, the deterioration determination unit 70 can be configured at a relatively low cost as compared with the case where the current detection unit 74 is an analog type current detection unit.

Embodiment 2.
The control device according to the second embodiment further predicts the deterioration state of the logic circuit, is provided with one or more resistors for cleaning the contacts of a plurality of switches included in the logic circuit so as to be connectable, and the logic. It differs from the control device 1 according to the first embodiment in that the abnormality of the switch of the circuit is further detected. In the following, the components having the same functions as those of the first embodiment are designated by the same reference numerals and the description thereof will be omitted, and the differences from the control device 1 of the first embodiment will be mainly described.

FIG. 16 is a diagram showing an example of the configuration of the control device according to the second embodiment. As shown in FIG. 16, in the control device 1A according to the _{second embodiment, the deterioration determination unit 70A and the control units 11A 1, 11A 2 are replaced with} the deterioration determination unit 70 and the control units 11 ₁ , 112, 113. It is different from the control device ₁ of the first embodiment in that it includes 11A ₃ and further includes current detection units 40 ₁ , ₄₀₂ , and 403. The deterioration determination unit 70A is an example of a deterioration determination device.

The control units 11A ₁ , 11A ₂ , 11A ₃ can shift the timing of turning off or the timing of turning on the corresponding switch of the switches 61, 62, 63 of the logic circuit 51 to each other, and the control units 11 ₁ , 11 It is different from ₂ , 11 ₃ .

For example, the control units 11A ₁ , 11A ₂ , 11A ₃ turn on the switches 61, 62, 63 of the logic circuit 51 at the same time, and then turn off the switches 61, 62, 63 in the order of the switches 61, 62, 63. Further, the control units 11A ₁ , 11A ₂ , 11A ₃ turn on the switches 61, 62, 63 in the order of the switches 61, 62, 63, and then turn off the switches 61, 62, 63 at the same time.

The current detection units 40 ₁ , 40 _{2 ,} 403 detect the current difference between the two positive electrode side control lines of the positive electrode side control lines 21, 22, 23, which are different combinations from each other. Such current detection units 40 ₁ , 40 ₂ , ₄₀₃ are, for example, non-contact sensors.

Specifically, the current detection unit 40 ₁ detects the difference ΔI ₂₁ between the current I2 of the positive electrode side control line 22 and the current I1 of the positive electrode side control line 21. The current detection unit 402 detects the difference ΔI ₃₂ between the current I3 of the positive electrode side control line 23 and the current _I2 of the positive electrode side control line 22. The current detection unit 403 detects the difference ΔI ₁₃ between the current I1 of the positive electrode side control line 21 and the current _I3 of the positive electrode side control line 23. It should be noted that ΔI ₂₁ = I2-I1, ΔI ₃₂ = I3-I2, and ΔI ₁₃ = I1-I3.

The deterioration determination unit 70A includes a processing unit 75A instead of the processing unit 75, and further includes a limiting resistor 76 for contact cleaning and a switch 77 for connecting the limiting resistor 76 to the limiting resistor ₇₄₂ in parallel.

The processing unit 75A includes an abnormality detection unit 83 and a prediction unit 84. The abnormality detection unit 83 detects an abnormality in the logic circuit 51 based on the differences ΔI ₂₁ , ΔI ₃₂ , and ΔI ₁₃ detected by the current detection units 40 _{1 , 402} , and 403. The abnormality of the logic circuit 51 detected by the abnormality detection unit 83 is an open failure or a short failure. An open failure is a failure in which the switch is not short-circuited, and is caused by, for example, a contact failure. A short-circuit failure is a failure in which the switch remains in a short-circuited state, and is caused by, for example, welding between contacts.

For example, it is assumed that the switches 61, 62, 63 are turned on at the same time, and then the switches 61, 62, 63 are turned off in the order of the switches 61, 62, 63. In this case, the abnormality detection unit 83 switches the switches 61, 62, 63 when two of the differences ΔI ₂₁ , ΔI ₃₂ , and ΔI ₁₃ are not zero while the switches 61, 62, and 63 are in the ON state at the same time. It is determined that one of them is an open failure.

Further, when at least one of the switches 61, 62, 63 is in the off state, the abnormality detection unit 83 has the switch 61, 62, 63 when one or two of the differences ΔI ₂₁ , ΔI ₃₂ , and ΔI ₁₃ are not zero. Is determined to be an open failure or a short failure.

The abnormality detection unit 83 determines the switches 61 ₁ , 61 ₂ , 62 based on the differences ΔI ₂₁ , ΔI ₃₂ , and ΔI ₁₃ depending on the order in which the switches 61, 62, and 63 are turned off or on. It is possible to determine which of ₁ , 62 ₂ , 63 ₁ , 63 ₂ is an open failure or a short failure.

The abnormality detection unit 83 detects an abnormality in the logic circuit 51 at a fixed frequency or a variable frequency. The abnormality detection timing by the abnormality detection unit 83 occurs every time the number of times the logic circuit 51 is driven by the control units 11A ₁ , 11A ₂ , 11A ₃ reaches a preset threshold value. The threshold may be fixed or variable. For example, the threshold value becomes smaller as the degree of deterioration of the logic circuit 51 determined by the deterioration determination unit 70A increases. As a result, the deterioration determination unit 70A can increase the frequency of determining the deterioration state of the logic circuit 51 as the degree of deterioration of the determined logic circuit 51 increases.

The prediction unit 84 stores the difference ΔI calculated by the determination unit 82 each time the difference ΔI is calculated by the determination unit 82. As a result, the prediction unit 84 can store the time-series difference ΔI. The prediction unit 84 predicts the deterioration state of the logic circuit 51 from the change of the difference ΔI based on the time-series difference ΔI.

For example, the prediction unit 84 has a prediction model in which the time _- series differences _ΔIA , _ΔIB , and ΔIC are input and the degree of deterioration of the logic circuit 51 is output, and the time-series differences _ΔIA , _ΔIB , Input _ΔIC into the prediction model and output the degree of deterioration obtained.

The prediction model possessed by the prediction unit 84 is a calculation model generated by machine learning. For example, the time-series differences _ΔIA , _ΔIB , and ΔIC are input, and the degree of deterioration of the output contacts A, B, and _C is output. It is a convolutional neural network or a recurrent neural network. The degree of deterioration of the output contacts A, B, and C may be the resistance values _RAA1 , _RBB1 , and _RCC1 , and the initial resistance values _RAA1 , _RBB1 , _RCC1 and the current resistance values _RAA1 , R. It may be a ratio with _BB1 and _RCC1 .

Further, the prediction model included in the prediction unit 84 may be a calculation model other than the convolutional neural network and the recurrent neural network. The prediction model may be a computational model generated by a learning algorithm such as linear regression or logistic regression.

The prediction unit 84 may have a configuration having a plurality of prediction models according to the magnitude of the voltage of the control power supply 2. The prediction unit 84 can select one of a plurality of prediction models based on the voltage of the control power supply 2. Further, the prediction model may be a calculation model in which the time-series environmental state is input in addition to the time _- series differences _ΔIA , _ΔIB , and ΔIC. The environmental state is the temperature and humidity in the control device 1A.

Further, the prediction unit 84 may have a configuration having information on the deterioration characteristic curve instead of the prediction model. The prediction unit 84 can also determine the deterioration of the logic circuit 51 by comparing the changes of the differences _ΔIA , _ΔIB , and _ΔIC with the deterioration characteristic curve.

The limiting resistance 76 is connected in parallel to the limiting resistance ₇₂₄ by the switch 77 controlled by the switch control unit 81. The limiting resistance 76 is set to a value lower than the resistance value of the controlled object 3. For example, as the limiting resistance 76, a resistor having a resistance value of 1/10 or less of the resistance value _R1 of the controlled object 3A ₁ is used. Further, the limiting resistance 76 breaks the coating resistance of the contacts of the switches 61, 62, 63 of the logic circuit 51 in the operating state, for example, when the switches 73 and 77 are in the ON state and the logic circuit 51 is in the operating state. The resistance value is set so that no current flows.

When a current flows through the control target 3 via the switches 61, 62, 63, the contacts of the switches 61, 62, 63 are oxidized to form an oxide film. The switch control unit 81 periodically turns on the switch 77 while the switch 73 is on, so that when the logic circuit 51 changes from the non-operating state to the operating state, the switches 61, 62, 63 are switched. A current larger than the current flowing through the controlled object 3 is passed.

Therefore, the deterioration determination unit 70A can generate an arc in the switches 61, 62, 63, whereby the contacts of the switches 61, 62, 63 can be cleaned. Therefore, the response performance of the contacts of the switches 61, 62, 63 can be improved.

For example, when the difference ΔI becomes equal to or less than the threshold value, the switch control unit 81 periodically turns on the switch 77 while the switch 73 is on. As a result, the deterioration determination unit 70A can reduce the degree of deterioration due to the oxide film of the switches 61, 62, 63.

The limiting resistance 76 may be configured so as to be freely connectable in the middle portion between the positive electrode side control lines 21 and 22, 23 and the negative electrode side control line 24, and the deterioration determination unit 70A has a switch 77. It may not be configured. For example, the deterioration determination unit 70A may have a connector (not shown) for connecting the limiting resistor 76 in parallel to the limiting resistor ₇₂₄ , and the operator may attach the limiting resistor 76 to the connector (not shown).

Further, the deterioration determination unit 70A may have a configuration in which the limiting resistance 76 and the switch 77 are provided in each limiting resistance 72, and a plurality of connectors (not shown) for connecting the limiting resistance 76 in parallel to each limiting resistance 72 may be provided. It may have a configuration.

The example of the hardware configuration of the processing unit 75A of the deterioration determination unit 70A according to the second embodiment is the same as the hardware configuration of the processing unit 75 of the deterioration determination unit 70 shown in FIG. The processor 101 can execute the functions of the switch control unit 81, the determination unit 82, the abnormality detection unit 83, and the prediction unit 84 by reading and executing the program stored in the memory 102.

As described above, the processing unit 75A of the deterioration determination unit 70A according to the second embodiment includes a prediction unit 84 that predicts the deterioration state of the logic circuit 51 based on the change of the difference ΔI. As a result, the deterioration determination unit 70A can determine the deterioration state of the logic circuit 51 in advance.

Further, the prediction unit 84 has a prediction model in which the time-series difference ΔI is input and the deterioration degree of the logic circuit 51 is output, and the deterioration degree obtained by inputting the time-series difference ΔI into the prediction model is output. do. As a result, the deterioration determination unit 70A can accurately predict the deterioration of the logic circuit 51.

The deterioration determination unit 70A includes a plurality of switches 61, 62 included in the logic circuit 51 in the middle portion between the positive electrode side control line and the negative electrode side control line 24 of at least one of the positive electrode side control lines 21 and 22.23. A limiting resistor 76 for cleaning the contacts of, 63 is freely connected. As a result, the deterioration determination unit 70A can reduce the degree of deterioration due to the oxide film of the switches 61, 62, 63.

Further, the processing unit 75A increases the frequency of determining the deterioration state of the logic circuit 51 as the degree of deterioration of the determined logic circuit 51 increases. As a result, the deterioration determination unit 70A can reduce the processing load when the degree of deterioration of the logic circuit 51 is low.

Further, the control device 1A according to the second embodiment includes a deterioration determination unit 70A, a plurality of positive electrode side control lines 21 and 22, 23, a logic circuit 51, and three or more current detection units 40 ₁ , ₄₀₂ . 40 ₃ and the like. The _three or more current detectors 40 ₁ , 40 ₂ , 403 are the current differences between the two positive electrode side control lines in different combinations of the plurality of positive electrode side control lines ₂₁ , 22, ₂₃ . , ΔI ₁₃ are detected respectively. The deterioration determination unit 70A includes an abnormality detection unit 83. The abnormality detection unit 83 detects an abnormality in the logic circuit 51 based on the differences ΔI ₂₁ , ΔI ₃₂ , and ΔI ₁₃ detected by _three or _more current detection units 40 ₁ , 402, and 403. The abnormality detection unit 83 increases the frequency of detecting an abnormality in the logic circuit 51 as the degree of deterioration of the logic circuit 51 determined by the determination unit 82 increases. As a result, the abnormality detection unit 83 can reduce the processing load when the degree of deterioration of the logic circuit 51 is low.

The configuration shown in the above embodiments is an example, and can be combined with another known technique, can be combined with each other, and does not deviate from the gist. It is also possible to omit or change a part of the configuration.

1,1A control device, 2 control power supply, 3,3A, 3A ₁ to 3A _n , 3B, 3B ₁ to 3B _n Control target, 11, 11 ₁ , 112, 11 ₃ , 11A ₁ , 11A _{2 , 11A 3 control} Units ₂₀ , 21, 21, 21 ₂ , 22, 22 ₁ , 222, 23, 23 ₁ , 23 ₂ , 28 Positive electrode side control line, 24 _{, 24 1, 242, 24 3 Negative electrode side} control line, 25 ₁ , 25 ₂ , 25 ₃ connection line, 30 ₁ , 30 ₂ switch group, 31, 32, 33 shunt resistance, 40 ₁ , 40 ₂ , 40 ₃ , 74, 74 ₁ , 74 ₂ , 74 ₃ current detector, 51 , 51A, 51A ₁ to 51A _n , 51B, 51B ₁ to 51B _n Logic circuit, 61, 61 ₁ , ₆₁₂ , 62, 62 ₁ , 62 ₂ , 63, 63 ₁ , 63 ₂ , 73, 73 ₁ , ₇₃₂ , 73 ₃ , 77 Switch, 70, 70A Deterioration Judgment Unit, 71 ₁ , _{7 12} , 71 ₃ Auxiliary Line, 72 ₁ , 72 ₂ , 72 ₃ , 72 ₄ , 76 Limit Resistor, 75, 75A Processing Unit, 81 Switch Control Unit, 82 Judgment unit, 83 Abnormality detection unit, 84 Prediction unit.

Claims (10)

It is a deterioration determination device that determines the deterioration state of a logic circuit connected between a plurality of positive electrode side control lines to which voltage is supplied from a control power supply and a control target.
A switch provided between at least one positive electrode side control line and a negative electrode side control line among the plurality of positive electrode side control lines, and
A current detector that detects the current flowing through the switch,
A processing unit for determining a deterioration state of the logic circuit based on the difference in current detected by the current detection unit before and after the operation of the logic circuit when the switch is on is provided. A deterioration determination device characterized by this. Equipped with multiple switches
The processing unit
Each of the plurality of switches is turned on for a different period, and the deterioration state of the logic circuit is based on the difference in current detected by the current detection unit before and after the logic circuit is operated in each period. The deterioration determination device according to claim 1, wherein the determination is made. It is equipped with a plurality of the current detectors.
The plurality of said switches
It is provided between the positive electrode side control lines and the negative electrode side control lines that are different from each other among the plurality of positive electrode side control lines.
The plurality of current detectors are
The deterioration determination device according to claim 2, wherein the currents flowing through different switches among the plurality of switches are detected. The plurality of said switches
One end is connected to the corresponding connection line among the plurality of positive electrode side control lines.
The current detector is
The deterioration determination device according to claim 2, wherein the switch is provided between the other end of the plurality of switches and the negative electrode side control line. The current detector is
The deterioration determination device according to any one of claims 1 to 4, wherein a signal corresponding to a current range including the value of the current among a plurality of different current ranges is output. The processing unit
The deterioration determination device according to any one of claims 1 to 5, further comprising a prediction unit that predicts a deterioration state of the logic circuit based on the change in the difference. The prediction unit
It has a prediction model that inputs the difference in the time series and outputs the deterioration degree of the logic circuit, and outputs the deterioration degree obtained by inputting the difference in the time series into the prediction model. The deterioration determination device according to claim 6. One or more resistors for cleaning the contacts of a plurality of switches included in the logic circuit shall be freely connectable in the middle portion between the at least one positive electrode side control line and the negative electrode side control line. The deterioration determination device according to any one of claims 1 to 7, wherein the deterioration determination device is characterized. The processing unit
The deterioration determination device according to any one of claims 1 to 8, wherein the higher the degree of deterioration of the logic circuit, the higher the frequency of determining the deterioration state of the logic circuit. The deterioration determination device according to any one of claims 1 to 9,
The plurality of positive electrode side control lines and
With the logic circuit
It is provided with three or more current detection units for detecting the difference in current between two positive electrode side control lines having different combinations from each other among the plurality of positive electrode side control lines.
The deterioration determination device is
An abnormality detection unit for detecting an abnormality in the logic circuit based on the difference detected by the three or more current detection units is provided.
The abnormality detection unit is
A control device characterized in that the higher the degree of deterioration of the logic circuit, the higher the frequency of detecting an abnormality in the logic circuit.

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