JP2019121800A - Semiconductor device - Google Patents

Abstract

To provide a semiconductor device having an excellent current spreading effect and also having excellent light extraction efficiency.SOLUTION: A semiconductor device includes: a semiconductor structure 120 which includes a first-conductive-type semiconductor layer, a second-conductive-type semiconductor layer, and an active layer 126 disposed between the first-conductive-type semiconductor layer 124 and the second-conductive-type semiconductor layer 127. The semiconductor structure includes: a first recess 128 which penetrates through the second-conductive-type semiconductor layer and the active layer to be disposed to a partial area of the first-conductive-type semiconductor layer; and a plurality of second recesses 129 which penetrate through the second-conductive-type semiconductor layer and the active layer to be disposed to a partial area of the first-conductive-type semiconductor layer. The first recess is disposed along a side face of the semiconductor structure, and surrounds the plurality of second recesses.SELECTED DRAWING: Figure 1

Description

  The embodiment relates to a semiconductor device.

  Semiconductor devices including compounds such as GaN and AlGaN have many advantages such as wide and easily adjustable band gap energy, and thus can be variously used for light emitting devices, light receiving devices, various diodes, and the like.

  In particular, light emitting devices such as light emitting diodes (Light Emitting Diodes) and laser diodes (Laser Diodes) using semiconductor Group 3-5 or Group 2-6 compound semiconductor materials are red due to development of thin film growth technology and device materials. It is possible to realize various colors such as green, blue and ultraviolet, and it is also possible to realize efficient white light by using fluorescent materials and combining colors, and existing fluorescent light, incandescent light, etc. Compared to light sources, it has the advantages of low power consumption, semipermanent lifetime, fast response speed, safety, and environmental friendliness.

  In addition, when light-receiving elements such as light detectors and solar cells are also manufactured using semiconductor Group 3-5 or Group-6 compound semiconductor materials, development of the element materials generates light of various wavelength ranges. By absorbing to generate photocurrent, light in various wavelength ranges from gamma rays to radio wavelength range can be used. In addition, since it has advantages of quick response speed, safety, environmental friendliness and easy adjustment of element materials, it can be easily used for power control or ultra high frequency circuits and communication modules.

  Therefore, the semiconductor device is a transmitting module of an optical communication means, a light emitting diode backlight which substitutes a cold cathode fluorescent lamp (CCFL) constituting a backlight of an LCD (Liquid Crystal Display) display device, a fluorescent light or an incandescent lamp Applications are expanding to white light emitting diode lighting devices, automobile headlights and traffic lights, and sensors for sensing gas and fire, etc. In addition, the application of the semiconductor device may be expanded to high frequency application circuits, other power control devices, and communication modules.

  In particular, a light emitting element that emits light in the ultraviolet wavelength range can be used for curing, medical, and sterilization because it has a curing action and a sterilizing action.

  Recently, research on ultraviolet light emitting devices has been actively conducted, but until now, ultraviolet light emitting devices have a problem that it is difficult to realize in a vertical type, and there is a problem that oxidation and oxidation to peeling and moisture decrease light output.

  The embodiments provide semiconductor devices in the form of vertical and flip chip.

  In addition, the present invention provides a semiconductor device having excellent light extraction efficiency.

  In addition, the present invention provides a semiconductor device excellent in current distribution effect.

  The problem to be solved in the embodiment is not limited to this, and includes the purpose and effects that can be grasped from the solution means of the problem described below and the embodiment.

  A semiconductor device according to an embodiment includes a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer. A semiconductor device including a structure, the semiconductor structure including a first recess disposed through the second conductive semiconductor layer and the active layer to a region of a portion of the first conductive semiconductor layer; The first recess may be disposed along the outer surface of the semiconductor structure, and the first bottom surface of the first conductive semiconductor layer, and the first active layer disposed inward of the first bottom surface of the first conductive semiconductor layer. The side surface may include a second side surface of the second conductive type semiconductor layer, and the first bottom surface of the first conductive type semiconductor layer, the first side surface of the active layer, and the second side of the second conductive type semiconductor layer. The side surface may be exposed from the first recess.

  The first recess may further include a third side surface disposed between the first bottom surface and the first side surface.

  As another embodiment, the first recess may further include the fifth side of the active layer and the sixth side of the second conductive semiconductor layer. The fifth side may be disposed to face each other with the first side, and the second side may be disposed to face the sixth side. Therefore, the first bottom surface of the first conductive semiconductor layer may be disposed more inward than the fifth side surface and / or the sixth side surface.

  The area ratio of the top surface of the semiconductor structure to the area of the first recess may be 1: 0.01 to 1: 0.03.

  The first recess may have a maximum separation distance of 3 μm to 5 μm from an outer surface of the semiconductor structure.

  The semiconductor structure includes a first region and a second region separated by the first recess, wherein the first region is an outer surface of the semiconductor structure and a first conductivity type semiconductor layer exposed from the first recess. The second region may be a region disposed between the first bottom and the second recess may be a region disposed inside the first recess. Here, the first region may be a region between a region of a first bottom surface of the first conductive semiconductor layer exposed from the first recess and an outer surface of the semiconductor structure, and the first region may be a region of the active layer It may be an area between one side surface and an outer surface of the semiconductor structure, or an area between a second side surface of the second conductive semiconductor layer and an outer surface of the semiconductor structure.

  According to one embodiment, the semiconductor device is disposed in the second region, and the second recess is configured to expose the partial region of the first conductive semiconductor layer through the second conductive semiconductor layer and the active layer; Can be included.

  When the semiconductor device includes the second recess, the second recess may be provided in a plurality separated from each other. However, the present invention is not limited thereto, and the second recess may be formed of one recess.

  The area ratio of the area of the first recess to the area of the second recess may be 1: 6 to 1:10.

  The semiconductor device is disposed in the second recess, and a first electrode electrically connected to the first conductive semiconductor layer; and a plurality of second electrodes electrically connected to the second conductive semiconductor layer And an insulating layer disposed within the first recess.

  The insulating layer may be composed of a plurality of layers, and may include a first insulating layer and a second insulating layer. The first insulating layer and / or the second insulating layer may be disposed on a first bottom surface of the first conductive semiconductor layer exposed to the first recess.

  In the case of the embodiment including the second recess, the first insulating layer and / or the second insulating layer and the first electrode may be disposed in the second recess.

  The first electrode may overlap with the second region in a second direction, the second electrode may overlap with the second region in a second direction, and the second direction may be a thickness direction of the semiconductor structure.

  The first recess and the second recess may have the same minimum length in a second direction, may overlap in the first direction, and the second direction may be a thickness direction of the semiconductor structure.

  The tilt angle of the first recess may be the same as the tilt angle of the second recess, but is not limited thereto.

  A method of manufacturing a semiconductor device according to an embodiment includes: growing a semiconductor structure; and disposing a first recess and a second recess in the semiconductor structure, wherein the semiconductor structure has a first conductivity type. A semiconductor layer; a second conductivity type semiconductor layer; and an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and the first recess includes the second conductivity type semiconductor Layer and the active layer are disposed up to a partial region of the first conductive semiconductor layer and disposed along the outer surface of the semiconductor structure, and the second recess is the second conductive semiconductor layer And a portion of the first conductive type semiconductor layer through the active layer, and the first recess is disposed closer to the outer surface of the semiconductor structure than the second recess.

  The outer side may be the outermost side of the semiconductor structure. The semiconductor structure may further include a top surface and a bottom surface, and the outer surface may be disposed between the top surface and the bottom surface. Also, the plurality of inner surfaces may be further included by the first recess and / or the second recess, and the plurality of inner surfaces may be provided apart from each other. Further, the height of the inner side surface may be lower than the height of the outer side surface with reference to the bottom surface of the semiconductor structure.

  Further comprising disposing a first insulating layer, a first electrode and a second electrode on the semiconductor structure; and disposing a second conductive layer on the first insulating layer, the first insulating layer comprising: The first recess may be disposed.

  The second conductive layer may be electrically connected to the second electrode.

  The method may further include disposing a second insulating layer on the second conductive layer; and disposing a bonding layer and a substrate on the second insulating layer.

  The semiconductor device according to the embodiment includes a substrate including a plurality of side surfaces extending in different directions from each other; a first conductive type semiconductor layer, a second conductive type semiconductor layer, and the first conductive type disposed on the substrate. A semiconductor structure including an active layer disposed between the semiconductor layer and the second conductive semiconductor layer; an electrode pad disposed on the substrate and spaced apart from the semiconductor structure; and the semiconductor structure and A second conductive layer disposed between the electrode pad and the substrate, wherein the electrode pad is disposed in a pad region in contact with the plurality of side surfaces, the outer surface adjacent to the side surfaces, and the semiconductor structure A semiconductor device including an inner side surface adjacent to the first conductive type semiconductor layer, the semiconductor structure being disposed through the second conductive type semiconductor layer and the active layer to a partial region of the first conductive type semiconductor layer; Along the side of And a second edge surface extending along the inner surface of the electrode pad, the first recess extending along the first edge surface and the second edge surface, and the second conductive surface The layer includes a first conductive region disposed inside the first recess, and a second conductive region extending from the first conductive region to the electrode pad.

  According to the embodiment, it is possible to manufacture a semiconductor device whose reliability is improved by shielding the light emitting region of the semiconductor device from external moisture and other contaminants.

  In addition, a semiconductor device having excellent light output and operating voltage characteristics can be manufactured.

  According to an embodiment, the semiconductor device may be embodied in a vertical form, but is not limited thereto and may be embodied in a flip chip form.

  The various and beneficial advantages and effects of the present invention are not limited to the contents described above, and should be more easily understood in the process of describing the specific embodiments of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The conceptual diagram of the semiconductor element which concerns on 1st Example. The enlarged view of A part in FIG. The enlarged view of B part in FIG. The conceptual diagram of the semiconductor element which concerns on 2nd Example. The top view of the semiconductor element concerning a modification. Sectional drawing of the semiconductor element which concerns on a modification. Another embodiment of FIG. 5a. The top view of the semiconductor element concerning a 3rd example. The top view of the semiconductor element concerning a 4th example. The figure for demonstrating the structure which light output improves by the change of the number of 2nd recesses. The figure for demonstrating the structure which light output improves by the change of the number of 2nd recesses. The top view of a semiconductor element. FIG. 2 is a plan view of a semiconductor element. FIG. 2 is a plan view of a semiconductor element. Fig. 7e is a cross-sectional view taken along the line J-J 'in Fig. 7e. The enlarged view of K part in FIG. 7 c. Fig. 7c is a cross-sectional view taken along line I-I 'in Fig. 7c. The top view which illustrated the 1st recess and the 2nd recess. The top view which illustrated the 2nd conductive layer arranged inside. The figure which illustrated the modification of FIG. The figure which illustrated the modification of FIG. The conceptual diagram of the semiconductor element in which a 1st recess does not exist. The figure which illustrates the reliability problem of the semiconductor device of FIG. FIG. 1 is a conceptual view of a semiconductor device package according to an embodiment of the present invention. FIG. 1 is a plan view of a semiconductor device package according to an embodiment of the present invention. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG. 6 is a flowchart illustrating a method of manufacturing the semiconductor device of FIG.

  While the invention is susceptible to various modifications, and can have various embodiments, particular embodiments are illustrated and described in the drawings. However, this is not intended to limit the invention to the particular embodiments, but is to be understood as including all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. It is.

  Terms including ordinal numbers such as second and first may be used to describe various components, but the components are not limited by the terms. The term is used only to distinguish one component from another. For example, the second component may be named as a first component without departing from the technical scope of the present invention, and similarly, the first component may also be named as a second component. The term "and / or" includes any and all combinations of one or more of the associated listed items or any of the associated listed items.

  When a component is referred to as being "connected" or "connected" to another component, it may be directly connected to or connected to the other component, It should be understood that there may be other components in between. On the contrary, when a component is referred to as being "directly connected" or "directly connected" to another component, it should be understood that there is no other component in the middle.

  The terms used in the present application are merely used to describe particular embodiments, and are not intended to limit the present invention. Reference to a singular expression includes a plurality of expressions unless the context clearly indicates otherwise. In the present application, the terms "comprise" or "have" are intended to specify that the features, numbers, steps, acts, components, parts or combinations thereof described herein are present. It should be understood that the possibility of the presence or addition of one or more other features or numbers, steps, operations, components, parts or combinations thereof is not excluded in advance. is there.

  Unless otherwise defined, all terms used herein, including technical and scientific terms, are commonly understood by one of ordinary skill in the art to which this invention belongs. It has the same meaning. Terms as defined in commonly used dictionaries are to be interpreted as having meanings consistent with those in the context of the relevant art, and are ideal unless explicitly defined in the present application It is not interpreted as overly formal.

  Hereinafter, although the embodiment will be described in detail with reference to the attached drawings, the same or corresponding components are denoted by the same reference numerals regardless of the reference numerals, and the overlapping description will be omitted.

  The semiconductor structure according to the embodiment of the present invention can output light in the ultraviolet wavelength band. For example, the semiconductor structure can also output light UV-A in the near ultraviolet wavelength band, can output light UV-B in the far ultraviolet wavelength band, and can emit light UV-C in the deep ultraviolet wavelength band It can also be output. The wavelength range may be determined by the composition ratio of Al of the semiconductor structure 120. In addition, the semiconductor structure can output light of various wavelengths whose light intensities are different from each other, and the peak of light having the strongest intensity relatively to the intensity of the other wavelength among the wavelengths of emitted light The wavelength may be near UV, far UV, or deep UV.

  Exemplarily, light UV-A in the near UV wavelength band can have a wavelength in the range of 320 nm to 420 nm, light UV-B in the far UV wavelength band can have a wavelength in the range 280 nm to 320 nm, and deep UV The light UV-C in the wavelength band can have a wavelength in the range of 100 nm to 280 nm.

  1 is a conceptual view of a semiconductor device according to a first embodiment, FIG. 2 is an enlarged view of a portion A in FIG. 1, FIG. 3 is an enlarged view of a portion B in FIG. It is a conceptual diagram of the semiconductor device concerning an example.

  Referring to FIG. 1, the semiconductor device according to the first embodiment includes a semiconductor structure 120 including a first conductive semiconductor layer 124, a second conductive semiconductor layer 127, and an active layer 126, and a first conductive semiconductor layer 124. And the second electrode 146 electrically connected to the second conductive type semiconductor layer 127.

  The first conductive semiconductor layer 124, the active layer 126, and the second conductive semiconductor layer 127 may be disposed in a second direction (Y direction). Hereinafter, the second direction (Y direction) which is the thickness direction of each layer is defined as the vertical direction, and the first direction (X direction) perpendicular to the second direction (Y direction) is defined as the horizontal direction. The third direction (Z direction) is a direction perpendicular to all of the first direction and the second direction.

The first conductive semiconductor layer 124 may be embodied with a compound semiconductor such as a group III-V or a group II-VI, and may be doped with a first dopant. The first conductive type semiconductor layer _{124, In x1 Al y1 Ga 1-} x1-y1 N (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1,0 ≦ x1 + y1 ≦ 1) semiconductor material having a composition formula, for example GaN, It may be selected from AlGaN, InGaN, InAlGaN and the like. And, the first dopant may be an n-type dopant such as Si, Ge, Sn, Se, Te. When the first dopant is an n-type dopant, the first conductive semiconductor layer 124 doped with the first dopant may be an n-type semiconductor layer.

  The active layer 126 may be disposed between the first conductive semiconductor layer 124 and the second conductive semiconductor layer 127. The active layer 126 may be a layer in which electrons (or holes) injected through the first conductive semiconductor layer 124 and holes (or electrons) injected through the second conductive semiconductor layer 127 recombine. The active layer 126 transitions to a lower energy level as electrons and holes recombine, and generates light having a wavelength corresponding to the band gap energy of the well layer described later included in the active layer 126. Can. The wavelength of light having the relatively highest intensity among the wavelengths of light emitted by the semiconductor device may be ultraviolet light, and the ultraviolet light may be near ultraviolet light, far ultraviolet light, or deep ultraviolet light as described above.

  The active layer 126 may have any one of a single well structure, a multiple well structure, a single quantum well structure, a multiple quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure. The structure of the active layer 126 is not limited to this.

The second conductive semiconductor layer 127 may be formed on the active layer 126, and may be embodied with a compound semiconductor such as a group III-V or a group II-VI, and the second conductive semiconductor layer 127 may be doped with a second dopant. Second conductive type semiconductor layer _{127, In x5 Al y2 Ga 1-} x5-y2 N (0 ≦ x5 ≦ 1,0 ≦ y2 ≦ 1,0 ≦ x5 + y2 ≦ 1) semiconductor material, or AlInN having the formula, AlGaAs , GaP, GaAs, GaAsP, or AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second conductive semiconductor layer 127 doped with the second dopant may be a p-type semiconductor layer.

  In addition, an electron blocking layer (not shown) may be disposed between the active layer 126 and the second conductive semiconductor layer 127. In the electron blocking layer (not shown), the electrons supplied from the first conductive semiconductor layer 124 to the active layer 126 recombine in the active layer 126 and do not emit light, and flow out of the second conductive semiconductor layer 127 The blocking can increase the probability that electrons and holes recombine in the active layer 126. The energy band gap of the electron blocking layer (not shown) may be larger than the energy band gap of the active layer 126 and / or the second conductivity type semiconductor layer 127.

Electron blocking layer (not _{shown), In x1 Al y1 Ga 1-} x1-y1 N semiconductor material having a (0 ≦ x1 ≦ 1,0 ≦ y1 ≦ 1,0 ≦ x1 + y1 ≦ 1) of the formula, for example, AlGaN InGaN, InAlGaN, etc., but is not limited thereto. In the electron blocking layer (not shown), a first layer (not shown) having a high aluminum composition and a second layer (not shown) having a low aluminum composition may be alternately arranged.

  The first conductive semiconductor layer 124, the active layer 126, and the second conductive semiconductor layer 127 can all include aluminum. Therefore, the first conductive semiconductor layer 124, the active layer 126, and the second conductive semiconductor layer 127 may be AlGaN. However, it is not necessarily limited to this.

  For example, the electron blocking layer (not shown) may have an aluminum composition of 50% to 90%. If the aluminum composition of the electron blocking layer (not shown) is less than 50%, the height of the energy barrier for blocking the electrons may be insufficient and the light emitted from the active layer 126 may be an electron blocking layer (shown If the aluminum composition exceeds 90%, the electrical characteristics of the semiconductor device may be degraded.

  First, the semiconductor structure 120 may include a first recess 128. The first recess 128 may extend through the second conductive semiconductor layer 127 and the active layer 126 to a partial region of the first conductive semiconductor layer 124. It can be arranged. That is, the semiconductor structure 120 may include the first recess 128, and the first recess 128 may penetrate the second conductive semiconductor layer 127, the active layer 126, and the first portion of the first conductive semiconductor layer 124.

  Therefore, the first recess 128 may be formed on the first side f 2 of the active layer 126 and the second side f 2 of the first bottom surface f 1 of the first conductivity type semiconductor layer 124 and the first bottom surface f 1 of the first conductivity type semiconductor layer 124. The second side face f3 of the conductive semiconductor layer 127 may be included.

  Also, the first recess 128 may include the third side surface f4 of the first conductive semiconductor layer 124 exposed between the second side surface f3 and the first bottom surface f1. However, if the first recess 128 allows a process margin for removing only the second conductive semiconductor layer 127 and the active layer 126, the first side f 2 of the second conductive semiconductor layer 127 and the second side of the active layer 126 A bottom surface f1 of the first conductivity type semiconductor layer 124 may be included. That is, the bottom surface f1 of the first conductive semiconductor layer 124 may be flush with the top surface of the active layer 126.

  However, when considering the process margin in the first recess 128, the first recess 128 not only has the bottom surface f1 of the exposed first conductive semiconductor layer 124 but also the third side surface f4 of the first conductive semiconductor layer 124 Can be included. Here, the third side face f4 may be the outer side face of the exposed first conductive type semiconductor layer 124, and may be disposed inside the semiconductor structure 120 from the first bottom face f1, and the first bottom face f1 and the first side face f2. Can be placed between Although the drawings are described in consideration of the process margin, the present invention includes the case where the process margin is possible as described above.

  The first bottom surface f1 may be the top surface of the first recess 128. The first bottom surface f1 may be located inward from the outer surface of the semiconductor structure 120 and may be the same as the top surface extended and connected in the vertical direction (y-axis direction) from the upper surface of the active layer 126.

  The third side surface f4 may extend from the first bottom surface f1 to the inside of the semiconductor structure 120 and may be an exposed surface of the first conductive semiconductor layer 124. Therefore, the third side face f4 may be disposed inside the first bottom face f1 relative to the semiconductor structure 120.

  The first side face f2 may extend from the first bottom face f1 and the third side face f4 to the inside of the semiconductor structure 120 and may be an exposed face of the active layer 126. Therefore, the first side face f1 may be disposed inside the first bottom face f1 and the third side face f4 relative to the semiconductor structure 120.

  The second side surface f3 may be an exposed surface of the first bottom surface f1, the third side surface f4, and the second conductive type semiconductor layer 127 extending from the first side surface f1 to the inside of the semiconductor structure 120. Therefore, the second side face f3 may be disposed inside the first bottom face f1, the third side face f4, and the first side face f1 relative to the semiconductor structure 120. In particular, the semiconductor device 10 can easily prevent the first side surface f2 of the active layer 126 from being separated from the outer surface by the semiconductor structure 120 and being oxidized from external moisture and contaminants.

  The first side f2, the second side f3, and the third side f4 may be spaced apart from the outer side of the semiconductor structure 120.

  In the first embodiment, the semiconductor structure 120 may further include a fourth side f5, a fifth side f6, and a sixth side f7 disposed between the first bottom surface f1 and the outer surface of the semiconductor structure. it can. The fourth side f5 may be disposed to face each other with the third side f4. In the case of the embodiment described above, the first recess 128 includes the first bottom face f1, the first side face f2, the second side face f3, the third side face f4, the fourth side face f5, the fifth side face f6, and the sixth side face f7. The first bottom surface f1 may be between the third side f4 and the fifth side f6, and / or between the first side f2 and the sixth side f6, and / or the second side f3 and the sixth side f7. It can be placed between.

  Specifically, the fourth side face f5 is a side face of the first conductive type semiconductor layer 124 disposed outside the first bottom face f1, and the fifth side face f6 is an active layer 126 disposed outside the fourth side face f5. The sixth side surface f6 is a side surface of the second conductivity type semiconductor layer 127 disposed outside the fifth side surface f6.

  Also, the fourth side face f5, the fifth side face f6 and the sixth side face f7 may be disposed inside with respect to the outer side face of the semiconductor structure 120. That is, the fourth side face f5, the fifth side face f6 and the sixth side face f7 may be disposed between the first bottom face f1 (or the first recess 128) and the outermost side face of the semiconductor structure 120. In addition, the fourth side face f5, the fifth side face f6 and the sixth side face f7 may be disposed symmetrically with reference to the first to third side faces f1 to f2 and the first bottom face f1, but the fourth side face f5 is a manufacturing method It does not have to have a symmetrical structure, for example.

  Referring to FIG. 4, as described above, the semiconductor device according to the second embodiment includes the semiconductor structure 120 including the first conductive semiconductor layer 124, the second conductive semiconductor layer 127, and the active layer 126, and the first conductive type. The first electrode 142 may be electrically connected to the semiconductor layer 124 and the second electrode 146 may be electrically connected to the second conductive semiconductor layer 127.

  In addition, the semiconductor structure 120 may include the first recess 128. The first recess 128 may be disposed along the outer surface of the semiconductor structure 120. Also, as described above, the first recess 128 may include the exposed first bottom surface f1 of the first conductive semiconductor layer, the first side f2 of the active layer 126, and the second side f3 of the second conductive semiconductor layer. . Similarly, in the semiconductor structure 120, the first side face f2 may be disposed inside the first bottom face f1, and the second side face f3 may be disposed inside the first side face f2.

  However, unlike in FIG. 1, the first bottom surface f1 may be extended to be in contact with the outer surface of the semiconductor structure 120 in the semiconductor device according to the second embodiment, and the aforementioned fourth side surface may not exist. . Accordingly, the active layer 126 and the second conductive semiconductor layer 127 may not exist outside the first recess 128.

  In addition, the first bottom surface f1 of the first recess 128 may be disposed in contact with the outer surface of the semiconductor structure 120. However, in this case, as in the first embodiment, the first side f2 of the active layer 126 exposed by the first recess 128 is separated from the outer surface of the semiconductor structure 120 to prevent external moisture and / or other contaminants. The oxidation of the active layer 126 can be prevented by

  In addition, the semiconductor device has a lower structure of the semiconductor structure 120 by the first recess 128 (a first insulating layer 131, a second conductive layer 150, a first conductive layer 165, a second insulating layer 132, a bonding layer 160, and a substrate 170 described later). May be a cup structure, but is not limited thereto.

  In addition, the second conductive semiconductor layer 127 may include second to third conductive semiconductor layers 127a, 127b and 127c. The (2-1) th conductivity type semiconductor layer 127a may have a smaller aluminum composition than the (2-2) th conductivity type semiconductor layer 127b and the (2-3) th conductivity type semiconductor layer 127c. This can be similarly applied to the semiconductor device according to the first embodiment described above.

  Also, as described later, the semiconductor structure 120 may further include a second recess 129 in the semiconductor device, and the second recess 129 may penetrate the second conductive semiconductor layer 127 and the active layer 126 to form a first conductive semiconductor. It may be disposed up to a partial area of the layer 124. That is, the semiconductor structure 120 may include the first recess 128, and the first recess 128 may penetrate the second conductive type semiconductor layer 127, the active layer 126, and the second portion of the first conductive type semiconductor layer 124.

  The inclination angle of the first recess 128 may be larger than 90 degrees and smaller than 145 degrees. The inclination angle may be an angle that the first insulating layer 131 makes with the horizontal plane (XZ plane). If the angle is smaller than 90 degrees or larger than 145 degrees, the efficiency of the light traveling toward the side surface to be reflected upward by the first insulating layer 131 may be reduced.

  Referring again to FIGS. 1 to 3, as an example, when the semiconductor device includes a substrate and the semiconductor structure is disposed on the substrate, the first electrode 142 may be disposed on the semiconductor structure; An electrode 146 may be disposed between the semiconductor structure 120 and the substrate. Such a structure may also be applied to the vertical or flip structure of FIG. 5b described below.

  In addition, without being limited thereto, the semiconductor structure 120 penetrates the second conductive type semiconductor layer 127 and the active layer 126 in order to facilitate the injection characteristics of the current injected into the semiconductor device. The semiconductor device may further include a second recess 129 disposed up to a partial region of the semiconductor layer 124. Specifically, since the first recess 128 may be disposed outside the semiconductor structure 120 with respect to the second recess 129, the semiconductor structure 120 may be implanted through the first electrode 142 disposed inside the second recess 129. The current may be spread in the inner region (a second region S2 described later) to improve the light extraction efficiency of the semiconductor device.

  If the semiconductor structure 120 further includes the second recess 129, the first electrode 142 may be electrically connected to the first conductive type semiconductor layer 124 exposed in the second recess 129. However, the semiconductor structure 120 according to the embodiment may include only the first recess 128 or may include both the first recess 128 and the second recess 129.

  Then, the first recess 128 may be disposed along the outer surface of the semiconductor structure 120, and the semiconductor structure 120 may be formed of the second conductivity type semiconductor layer 127 in order to penetrate a portion of the first conductivity type semiconductor layer 124. And the active layer 126 may be separated by the first recess 128. That is, the first recess 128 may form a closed loop on a plane (XZ plane). However, as the first recess 128 may be disposed along the edge of the semiconductor structure 120 as described later, the semiconductor structure 120 may be formed by the closed loop of the first recess 128 or along the edge of the semiconductor structure 120. The first recess 128 may be divided into a first region S1 and a second region S2 by an imaginary line connecting the first recess 128. For example, the second region S2 may be located inside such a closed loop, and the first region S1 may be located outside the closed loop (as described below with reference to the closed loop, the edge of the semiconductor structure 120 The contents of the first region and the second region may be applied similarly, even when the imaginary line connected by extending the first recess 128 forms a closed loop).

  Specifically, the semiconductor structure 120 may be separated into the first region S1 and the second region S2 by the first recess 128. The first region S1 may be an outer region of the semiconductor structure 120 from the first bottom surface f1 of the first recess 128 in the semiconductor structure 120, and the second region S2 may be an inner region of the first recess 128. The first region S1 may be a light emitting region because the second region S2 is a region disposed on the inner side of the first recess 128. At this time, the first region S1 may be a region extending from the first bottom surface f1 to the outer side of the first bottom surface f1 and contacting the outer surface of the semiconductor structure 120, which will be described below with reference to this. However, as illustrated, the first region S1 is not limited to this, and may be a region from the first bottom surface f1 to the outermost side surface of the semiconductor structure 120. In addition, the passivation layer 180 which covers the side surface and the upper surface of the semiconductor structure 120 is separated from the semiconductor structure 120 due to heat generation due to the operation of the light emitting element, external high temperature, high humidity, and thermal expansion coefficient difference with the semiconductor structure 120. If there is a possibility that a crack or the like may occur in the passivation layer 180 and such peeling or cracking may occur, the semiconductor structure 120 may be oxidized due to external moisture or contaminants that penetrate the semiconductor structure 120 from the outside. It can. For example, when generating ultraviolet light, the Al concentration may increase due to the increase of the energy band gap of the active layer 126. Thus, active layer 126 may be vulnerable to oxidation by Al. On the other hand, the first recess 128 according to the embodiment can block direct connection between the active layer 126 of the first region S1 and the active layer 126 of the second region S2. Thus, as shown in FIG. 1, when the active layer 126 is present on the sidewall of the semiconductor structure 120 and exposed to the outside by peeling, the active layer 126 may be oxidized. However, the separation by the first recess 128 may increase the distance between the active layer 126 of the first region S1 and the active layer 126 of the second region S2 in the semiconductor structure 120. Accordingly, even if the active layer 126 in the first region S1 is oxidized, the semiconductor device 10 according to the first embodiment can protect the active layer 126 in the second region S2 from the oxidation.

  In addition, the first insulating layer 131 is disposed in the first recess 128, and the first insulating layer 131 continuously oxidizes the active layer 126 in the second region S2 by the oxidation of the active layer 126 in contact with the sidewall of the semiconductor structure 120. It can shut off.

And, as shown in FIG. 7a, when the semiconductor structure 120 generates ultraviolet light, the current dispersion characteristics of the semiconductor structure 120 may be degraded because the band gap energy is high, and the effective light emitting region may be reduced. . For example, when the semiconductor structure 120 is formed of a GaN-based compound semiconductor, the semiconductor structure may contain Al _x Ga _(1-x) N (0 ≦ x ₎ containing a large amount of Al in order to emit ultraviolet light. It may be configured as ≦ 1). Here, as the value of x, which means the Al content, increases, the resistance of the semiconductor structure 120 may also increase, and thus the current dispersion and current injection characteristics of the semiconductor structure 120 may be degraded. For example, current spreading may be performed in the second region S2. Thus, the semiconductor device 10 can maintain the light output even with the first recess 128. In addition, the first recess 128 is an active layer located in the effective light emitting region by limiting the region to be oxidized by water or the like to the outer region (for example, the first region S1) of the first recess 128 The light output can be maintained by protecting (for example, the active layer of the second region S2) from oxidation.

  The area ratio of the upper surface of the semiconductor structure 120 to the lower surface of the first recess 128 may be 1: 0.01 to 1: 0.03.

  When the area ratio between the upper surface of the semiconductor structure 120 and the lower surface of the first recess 128 is smaller than 1: 0.01, there is a limit where it is difficult to prevent oxidation of the active layer 126 from contaminants. And, when the area ratio of the upper surface of the semiconductor structure 120 to the lower surface of the first recess 128 is larger than 1: 0.03, there is a limit to decrease the light efficiency.

  Also, the first recess 128 may have a maximum separation distance of 3 μm to 5 μm from the outer surface (W 4, see FIG. 3) of the semiconductor structure 120. This may be modified according to the size of the semiconductor device or semiconductor structure.

  In addition, the top surface of the first recess 128 may have a minimum horizontal width (W5, see FIG. 3) of 2 μm to 8 μm. In addition, when the semiconductor device includes the second recess 129, the upper surface of the second recess 129 described below has the minimum width W2 of the second recess 129 disposed on the bottom surface of the second conductive semiconductor layer 127. obtain. The width may be the length in the horizontal direction (x direction).

  Also, the second recess 129 may be disposed in the second region S2, in other words, the second recess 129 may overlap the second region S2 in the vertical direction (y direction). Accordingly, the second recess 129 may be disposed further to the inside of the semiconductor structure 120 than the first recess 128.

  The first electrode 142 may be disposed in the second recess 129 and may be electrically connected to the first conductive semiconductor layer 124.

  The first electrode 142 may be disposed on the low concentration layer of the active layer 126 to ensure relatively smooth current injection characteristics. That is, the second recess 129 is preferably formed to the region of the low concentration layer 124 b of the active layer 126. This is because the high concentration layer 124a of the active layer 126 has a relatively low current diffusion characteristic because the concentration of Al is high.

  Also, the first electrode 142 may overlap the second region S2 in the vertical direction (y direction). A current may be injected through the first electrode 142 in the second region S2, and the semiconductor structure 120 may generate light.

  The second electrode 146 may be disposed under the second conductive semiconductor layer 127 and may be electrically connected to the second conductive semiconductor layer 127.

  The first electrode 142 and the second electrode 146 may be ohmic electrodes. The first electrode 142 and the second electrode 146 are made of ITO (indium tin oxide), IZO (indium zinc oxide), IZTO (indium zinc tin oxide), IAZO (indium aluminum zinc oxide), IGZO (indium gallium zinc oxide), IGTO (Indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / Ir or at least one of x / Au, Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, Hf Although it can be formed including, it is not limited to such a material. Illustratively, the first electrode 142 has a plurality of metal layers (eg, Cr / Al / Ni) and may be the second electrode silver ITO.

  The first insulating layer 131 may be disposed under the semiconductor structure 120 to electrically insulate the first electrode 142 from the active layer 126 and the second conductive semiconductor layer 127. In addition, the first insulating layer 131 can electrically insulate the second electrode 146 and the second conductive layer 150 from the first conductive layer 165. In addition, the first insulating layer 131 may prevent the side surface of the active layer 126 from being oxidized during the process of the semiconductor device 10.

  In addition, the first insulating layer 131 may be formed under the semiconductor structure 120 except for the positions where the first electrode 142 and the second electrode 146 are disposed. That is, the first insulating layer 131 may be disposed in the first recess 128. Accordingly, in the first insulating layer 131, the distance that the active layer 126 of the first region S1 and the active layer 126 of the second region S2 are connected to each other through the first conductive semiconductor layer 124 may be long.

The first insulating layer 131 may be formed of at least one selected from the group consisting of SiO ₂ , SixOy, Si ₃ N ₄ , SixNy, SiO x Ny, Al ₂ O ₃ , TiO ₂ , and AlN, but is not limited thereto. . The first insulating layer 131 may be formed as a single layer or multiple layers. For example, the first insulating layer 131 may be a distributed Bragg reflector (DBR) having a multilayer structure including Si oxide and Ti compound. However, the present invention is not necessarily limited thereto, and the first insulating layer 131 may include various reflective structures.

  In addition, when the first insulating layer 131 performs a reflection function, light emitted from the active layer 126 toward the side can be reflected upward to improve light extraction efficiency. In this case, the light extraction efficiency may be more effective as the number of second recesses 129 increases.

  In addition, the width W3 of the first electrode 142 may be 24 μm or more and 50 μm or less. If such a range is satisfied, it may be advantageous for current dispersion, and a large number of first electrodes 142 may be disposed. When the width W3 of the first electrode 142 is 24 μm or more, the current injected to the first conductivity type semiconductor layer 124 can be sufficiently ensured, and when it is 50 μm or less, the first electrode 142 is disposed in the first conductivity type semiconductor layer 124 Since the number of the plurality of first electrodes 142 can be sufficiently secured, current dispersion characteristics can be secured. Here, the width W3 of the first electrode 142 may be a diameter when the first electrode 142 is configured to be circular, and may represent a maximum width when configured to have an elliptical or polygonal structure. And, the width may be the length in the horizontal direction (X direction) as described above.

  In addition, the semiconductor structure 120 may control the light output through the change of the number of the second recesses 129. This is described in more detail in FIGS. 7a-b below.

  The second recess 129 may have a minimum length h1 in the vertical direction (y direction) and the same as the minimum length h1 in the vertical direction (y direction) of the first recess 128. Along with this, the second recess 129 can overlap with the first recess 128 in the horizontal direction (x direction). The inclination angle θ1 of the second recess 129 may be the same as the inclination angle θ2 of the first recess 128.

  With such a configuration, the first recess 128 and the second recess 129 can be performed simultaneously in the same process step. Therefore, the semiconductor device 10 according to the first embodiment may be embodied in a simplified process. However, it is not limited to such a process.

  The inclination angle θ1 of the second recess 129 and the inclination angle θ2 of the first recess 128 may be an angle formed by the first insulating layer 131 with the horizontal plane (XZ plane).

  The minimum width W 2 of the second recess 129 may be the minimum width of the second recess 129 in contact with the first conductive semiconductor layer 124.

  The maximum width W1 of the second recess 129 may be 38 μm or more and 60 μm or less. In such a range, a large number of first electrodes 142 may be disposed to favor current distribution. The maximum width W1 of the second recess 129 may be defined under the second conductive type semiconductor layer 127 and may be defined as the widest area of the second recess. Also, the width W1 of the second recess 129 may be a diameter when configured to be circular, and may represent a maximum width when configured to have an elliptical or polygonal structure.

  The width W1 of the second recess 129 may be the width of the second recess 129 with respect to the lower surface of the second conductive semiconductor layer 127.

  When the width W1 of the second recess 129 is 38 μm or more, the first electrode 142 is electrically connected to the first conductive semiconductor layer 124 when the first electrode 142 is disposed in the second recess 129. Process margin for securing the area, and when it is 60 .mu.m or less, the volume of the active layer 126 can be prevented from decreasing to arrange the first electrode 142, and hence the luminous efficiency Can be worse.

  The inclination angle θ1 of the second recess 129 may be 70 degrees to 90 degrees. If such an area range is satisfied, it may be advantageous to form the first electrode 142 on the top surface, and a large number of second recesses 129 may be formed.

  If the inclination angle θ1 is less than 70 degrees, the area of the active layer 126 to be removed may increase, but the area on which the first electrode 142 is disposed may be small. Thus, the current injection characteristics may be reduced and the light emission efficiency may be reduced. Therefore, the area ratio of the first electrode 142 to the second electrode 146 can be adjusted by using the inclination angle θ1 of the second recess 129.

  The thickness of the second electrode 146 may be thinner than the thickness of the first insulating layer 131. Therefore, the step coverage characteristics of the second conductive layer 150 and the second insulating layer 132 which wrap the second electrode 146 can be secured, and the reliability of the semiconductor device 10 can be improved. The second electrode 146 may have a first separation distance D1 of 1 μm to 4 μm with the first insulating layer 131. In the case of having a separation distance of 1 μm or more, a process margin of the step of arranging the second electrode 146 between the first insulating layers 131 can be secured, and accordingly, the electrical characteristics, optical characteristics and reliability of the semiconductor device 10 Sex can be improved. When the separation distance is 4 μm or less, the entire area on which the second electrode 146 can be disposed can be secured, and the operating voltage characteristic of the semiconductor device 10 can be improved.

  The second conductive layer 150 can cover the second electrode 146. Therefore, the second electrode pad 166, the second conductive layer 150, and the second electrode 146 can form one electrical channel.

  The second conductive layer 150 may be disposed to surround the second electrode 146 and be in contact with the lower surface of the first insulating layer 131. The second conductive layer 150 is made of a material having good adhesion to the first insulating layer 131, and is made of at least one material selected from the group consisting of Cr, Ti, Ni, Au, and the like, and an alloy thereof It may be formed of a single layer or multiple layers.

  The second conductive layer 150 may be disposed under the first insulating layer 131. However, the second conductive layer 150 may be disposed between the first insulating layer 131 and the second insulating layer 132 described below. Accordingly, the second conductive layer 150 may be protected by the first insulating layer 131 and the second insulating layer 132 from the penetration of external moisture or contaminants. In addition, the second conductive layer 150 may be disposed inside the semiconductor device 10 and may be surrounded by the first insulating layer 131 and the second insulating layer 132 so as not to be exposed from the outermost surface of the semiconductor device 10.

  Also, the second conductive layer 150 may be disposed on the substrate 170 and disposed between the electrode pad 166 and the semiconductor structure 120 and the substrate 170. The second conductive layer 150 may be disposed between the first insulating layer 131 and the second electrode 146. The second conductive layer 150 may be in contact with the side surface and the upper surface of the second electrode 146 and the side surface and the upper surface of the first insulating layer 131 within the first separation distance D1. In addition, there may be a region where the second conductive layer 150 and the second conductive semiconductor layer 127 are in contact and the Schottky junction is formed within the first separation distance D1, and current dispersion is caused by the formation of the Schottky junction. Can be easier. However, the present invention is not limited to such a configuration, and the resistance between the second conductive layer 150 and the second conductive semiconductor layer 127 is larger than the resistance between the second electrode 146 and the second conductive semiconductor layer 127. Within the range, the second conductive layer 150 can be freely disposed. Also, although the second conductive layer 150 may not be present due to the structure of the semiconductor device 10, it is not limited thereto.

  In addition, the second conductive layer 150 can include a first conductive region 150-1 and a second conductive region 150-2. First, the first conductive region 150-1 may be disposed inside the first recess 128, and the second conductive region 150-2 may extend from the first conductive region 150-1 toward the electrode pad 166.

  Also, the second conductive layer 150 may be disposed so as to be mostly enclosed by the first recess 128 or may extend to the electrode pad 166 disposed outside the semiconductor structure 120 at a portion adjacent to the electrode pad 166. It can be done. That is, the first conductive region 150-1 is surrounded by the first recess 128, and the second conductive region 150-2 is extended to the electrode pad 166 disposed outside the semiconductor structure 120 at the first conductive region 150-1. obtain. A detailed description of the first and second conductive regions 150-1 and 150-2 will be described later with reference to FIG. 7d.

  Also, a reflective layer (not shown) may be disposed on the second conductive layer 150. A reflective layer (not shown) may be disposed between the second electrode 146 and the second conductive layer 150, and in particular may be disposed below the second electrode 146.

  In addition, a reflective layer (not shown) can electrically connect the second electrode 146 and the second conductive layer 150. Thus, if a reflective layer (not shown) is present, the second electrode pad 166, the second conductive layer 150, the reflective layer (not shown), and the second electrode 146 can form one electrical channel. it can.

  Also, the reflective layer (not shown) may be formed of a highly reflective material, and may include any one of Ag and Rh, but is not limited to such a material.

  The second insulating layer 132 can electrically insulate the second electrode 146 and the second conductive layer 150 from the first conductive layer 165.

  The first conductive layer 165 may be electrically connected to the first electrode 142 through the second insulating layer 132. The second insulating layer 132 and the first insulating layer 131 may be formed of the same material as each other, or may be formed of different materials.

  According to the embodiment, since the second insulating layer 132 is disposed on the first insulating layer 131 in the region between the first electrode 142 and the second electrode 146, a defect occurs in the second insulating layer 132. The first insulating layer 131 can also prevent the penetration of external moisture and / or other contaminants. For example, when the first insulating layer 131 and the second insulating layer 132 are formed in one layer, defects such as cracks may easily propagate in the thickness direction. Thus, external moisture or contaminants may penetrate the semiconductor structure through the externally exposed defects.

  However, according to the embodiment, since the additional second insulating layer 132 is disposed on the first insulating layer 131, it is difficult for the defect formed in the first insulating layer 131 to propagate to the second insulating layer 132. That is, the interface between the first insulating layer 131 and the second insulating layer 132 may play a role of shielding the propagation of defects.

  Referring to FIG. 1, as described above, the second conductive layer 150 may electrically connect the second electrode 146 and the second electrode pad 166.

  The second electrode 146 may be disposed directly on the second conductive semiconductor layer 127. When the second conductivity type semiconductor layer 127 is AlGaN, hole injection may not be smoothly performed due to the low electric conductivity. Therefore, it is necessary to properly adjust the Al composition of the second conductivity type semiconductor layer 127. The second conductive layer 150 may be formed of at least one material selected from the group consisting of Cr, Ti, Ni, Au, and the like, and an alloy thereof, and may be formed of a single layer or a plurality of layers.

  Referring to FIG. 3, the maximum height h3 of the bonding layer 160 from the lowermost surface 132a of the first recess 128 may be 0.4 μm to 0.6 μm. Here, the lowermost surface 132a means the lowermost surface of the second insulating layer 132, and may be applied similarly.

  In addition, the maximum height h5 of the second insulating layer 132 from the lowermost surface 132a in the vertical direction (y direction) in the first recess 128 may be 1.7 μm to 2.1 μm. In addition, the maximum height h6 of the first insulating layer 131 from the lowermost surface 132a in the vertical direction (y direction) in the first recess 128 may be 2.4 μm to 2.6 μm.

  Referring back to FIG. 1, the first conductive layer 165 and the bonding layer 160 may be disposed along the shape of the lower surface of the semiconductor structure 120 and the second recess 129. The first conductive layer 165 may be formed of a material having high reflectivity. For example, the first conductive layer 165 may include a metal such as Ti or Ni.

  In addition, the first conductive layer 165 can provide a function to be electrically connected to the first electrode 142. Also, the first conductive layer 165 may be disposed without containing a material having high reflectivity, such as silver (Ag), and in such a case, the first electrode 142 disposed in the second recess 129 and the first conductive layer 165 may be disposed. A reflective metal layer (not shown) made of a material having a high reflectance may be disposed between the conductive layer 165 and the second conductive semiconductor layer 127 and the first conductive layer 165. However, as described above, the first conductive layer 165 may not exist below the semiconductor structure 120 without the second recess 129. And, because the semiconductor device 10 can be disposed on the top of the first conductive semiconductor layer 124 according to the structure of the semiconductor device 10, the present invention is not limited to such a position.

  The bonding layer 160 can include a conductive material. Illustratively, bonding layer 160 can include a material selected from the group consisting of gold, tin, indium, aluminum, silicon, silver, nickel, and copper, or alloys thereof.

  The substrate 170 may be composed of a conductive material. Illustratively, the substrate 170 can include metal or semiconductor material. The substrate 170 may be a metal having excellent electrical conductivity and / or thermal conductivity. In this case, the heat generated during the operation of the semiconductor element 10 can be released to the outside quickly. In addition, when the substrate 170 is made of a conductive material, the first electrode 142 may receive the supply of current externally through the substrate 170.

  The substrate 170 may comprise a material selected from the group consisting of silicon, molybdenum, silicon, tungsten, copper and aluminum or alloys thereof.

  Passivation layers 180 may be disposed on the top and side surfaces of the semiconductor structure 120. The thickness of the passivation layer 180 may be 200 nm to 500 nm. In the case of 200 nm or more, the device can be protected from external moisture and foreign matter to improve the electrical and optical reliability of the device, and in the case of 500 nm or less, the stress applied to the semiconductor device 10 can be reduced. The optical and electrical reliability of the semiconductor device 10 may be reduced, and the process time of the semiconductor device 10 may be lengthened to solve the problem that the cost of the semiconductor device 10 may be increased.

  Asperities may be formed on the top surface of the semiconductor structure 120. Such unevenness can improve the light extraction efficiency emitted from the semiconductor structure 120. The unevenness may vary in average height depending on the wavelength of ultraviolet light, and in the case of UV-C, the light extraction efficiency may be improved when it has a height of about 300 nm to 800 nm and an average height of about 500 nm to 600 nm.

  5a to 5b are a plan view and a sectional view of a semiconductor device according to a modification, and FIG. 5c is another embodiment of FIG. 5a.

  Referring to FIGS. 5a and 5b, a semiconductor device 10 'according to a modification includes a semiconductor structure 120 including a first conductive semiconductor layer 124, a second conductive semiconductor layer 127, and an active layer 126, and a first conductive type. The first electrode 142 may be electrically connected to the semiconductor layer 124 and the second electrode 146 may be electrically connected to the second conductive semiconductor layer 127.

  As described above, the semiconductor structure 120 may include the first conductive semiconductor layer 124, the active layer 126, and the second conductive semiconductor layer 127, and may penetrate the second conductive semiconductor layer 127 and the active layer 126. The first recess 128 may expose a portion of the first conductive semiconductor layer 124. And the contents of the first electrode 142, the second electrode 146 and the passivation layer 180 may be applied similarly.

  Also, as described above, the first recess 128 may be disposed along the outer surface of the semiconductor structure 120 to separate the semiconductor structure 120 into the first region S1 and the second region S2. Similarly, the first recess 128 may form a closed-loop on a plane. However, it is not limited to this.

  The second area S2 may be located inside the closed loop, and the first area S1 may be located outside the closed loop. However, as described above, the first recess 128 may be divided into the first region S1 and the second region S2 by an imaginary line extending the first recess 128 along the edge of the semiconductor structure 120, but in the following, the first recess 128 Description will be made on the basis of forming a closed loop. The contents described in FIGS. 1 and 2 may be applied to the contents of the first area S1 as well.

  When the passivation layer 180 is peeled off, the active layer 126 of the first region S1 may be oxidized from external moisture and contaminants because the active layer 126 is located outside the semiconductor structure 120. However, the oxidation generated in the active layer 126 of the first region S1 can be prevented from spreading to the active layer 126 of the second region S2 by the first recess 128.

  Then, the first pad 192 may be disposed on the first electrode 142. Also, the second pad 196 may be disposed on the second electrode 146. The thicknesses of the first pad 192 and the second pad 196 may be adjusted such that the upper surface of the first pad 192 and the upper surface of the second pad 196 may be disposed at the same position from the lower surface of the semiconductor device 10 ′. For example, when bonding the first electrode 142 and the second electrode 146 by minimizing the difference in height between the upper surface of the first electrode 142 and the upper surface of the second electrode 146, the occurrence of voids may be reduced. Can.

  As described above, even in the semiconductor device in the form of flip chip, the active layer 126 of the first region S1 can be easily prevented from being oxidized from external moisture and contaminants through the first recess 128. In addition, the present invention may be applied to a vertical semiconductor device including only the first recess 128.

  Then, referring to FIG. 5 c, the first recesses 128 may be spaced apart along the outer surface of the semiconductor structure 120. That is, although the first recess 128 may not be formed in a closed loop on a plane, as described above, the oxidation of the active region 126 of the first region from the external moisture and contaminants is also activated. Since the path extending to the layer 126 is extended by the first recess 128, oxidation of the active layer in the second region can be prevented. Thereby, the reliability of the semiconductor device can be improved. The first region and the second region are respectively an outer region and an inner region of an imaginary line formed by extending and connecting a plurality of first recesses 128 spaced apart by the semiconductor structure 120, and the contents thereof are the same as described above. It may be identical to the contents described in FIGS.

  FIG. 6a is a plan view of the semiconductor device according to the third embodiment, and FIG. 6b is a plan view of the semiconductor device according to the fourth embodiment.

  Referring to FIG. 6a, the semiconductor structure 120 may include a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer, and the first conductive type semiconductor layer and the active layer may be penetrated. The semiconductor device may include a first recess 128 exposing a partial region of the conductive semiconductor layer. And the contents of the second recess 129, the first electrode 142, the second electrode and the passivation layer may be applied similarly.

  Also, the first recess 128 may be disposed along the outer surface of the semiconductor structure 120. Specifically, as described later with reference to FIG. 7d, the first recess 128 may include a 1-1 recess 128-1 and a 1-2 recess 128-2.

  The first 1-1 recess 128-1 may extend along the outer surface of the semiconductor structure 120 adjacent to the inner surface of the electrode pad 166 (the second edge surface E2 in FIG. 7e). Also, the first and second recesses 128-2 may extend along the outer surface (the first edge surface E1 in FIG. 7e) of the adjacent semiconductor structure 120.

  At this time, a plurality of first recesses 128-1 may be separately disposed, but first 1-2 recesses 128-2 may be continuously disposed.

  That is, in the semiconductor device according to the third embodiment, the first recess 128 may not be formed in a closed loop on a plane, but oxidation may occur when the active region 126 in the first region is oxidized from external moisture or contaminants. Since the path extending to the active layer of the second region is extended by the first recess 128, the reliability of the semiconductor device can be improved. Here, the first region and the second region are the outer region and the inner region of an imaginary line formed by connecting the first recess 128-1 and the second recess 128-2 by the semiconductor structure 120, respectively. The contents of this may be the same as the contents described in FIGS.

  Referring to FIG. 6b, as described above, the semiconductor structure 120 may include the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer, and may penetrate the second conductive semiconductor layer and the active layer. The first recess 128 may expose a portion of the first conductive semiconductor layer. And the contents of the second recess 129, the first electrode 142, the second electrode and the passivation layer may be applied similarly.

  Also, the first recess 128 may be disposed along the outer surface of the semiconductor structure 120. Here, the first recesses 128 may be spaced apart along the semiconductor structure 120. That is, the first recesses 128 may have a plurality of spaced apart structures, such as the first and second recesses 128-2 described with reference to FIG. 6a. With such a configuration, the semiconductor device according to the fourth embodiment may not form the first recess 128 in a closed loop on a plane, but as described above, the active layer in the first region is protected from external moisture and contaminants. Since the path through which the oxidation extends to the active layer 126 of the second region is extended by the first recess 128 even if the oxide layer 126 is oxidized, the oxidation of the active layer of the second region can be prevented. Thereby, the reliability of the semiconductor device can be improved. The first region and the second region are respectively an outer region and an inner region of an imaginary line formed by connecting a plurality of first recesses 128 spaced apart from each other by the semiconductor structure 120, and the contents thereof will be described in the above. The contents described in 1 to 3 can be applied similarly.

  FIGS. 7a and 7b illustrate a configuration in which the light output is improved by changing the number of second recesses, and FIGS. 7c to 7e are plan views of the semiconductor device.

  First, referring to FIG. 7a, when the semiconductor structure 120 of the GaN substrate emits ultraviolet light, it can contain aluminum, and when the aluminum composition of the semiconductor structure 120 becomes high, the current dispersion characteristics deteriorate in the semiconductor structure 120 It can be done. In addition, when the active layer 126 contains Al and emits ultraviolet light, the amount of light emitted to the side surface of the active layer 126 is increased as compared to a GaN-based blue light emitting element (TM mode). Such TM mode can be mainly generated in an ultraviolet semiconductor device that generates ultraviolet light.

  The ultraviolet semiconductor device is inferior to the semiconductor device of the blue GaN substrate in current dispersion characteristics. Therefore, it is necessary to dispose a relatively large number of first electrodes 142 in the ultraviolet semiconductor device as compared to the semiconductor device of the blue GaN substrate.

  As the composition of aluminum increases, the current dispersion characteristics may deteriorate. Referring to FIG. 7a, the current may be dispersed only in the vicinity of each first electrode 142, and the current density may be sharply lowered at a distant point. Therefore, the effective light emitting region P2 can be narrowed.

  The effective light emitting region P2 can be defined as a region up to the boundary point where the current density is 40% or less based on the current density at the center of the first electrode 142 where the current density is the highest. For example, the effective light emitting region P2 can be adjusted by the composition of Al, the level of injection current within the range of 40 μm from the center of the second recess 129.

  Since the low current density region P3 has a low current density, the amount of light emitted may be smaller than that of the effective light emitting region P2. Therefore, the light output can be improved by further disposing the first electrode 142 in the low current density region P3 where the current density is low or utilizing a reflective structure.

  Generally, in the case of a GaN-based semiconductor device that emits blue light, it is preferable to minimize the area of the second recess 129 and the first electrode 142 because the current dispersion characteristics are relatively excellent. This is because the area of the active layer 126 decreases as the area of the second recess 129 and the first electrode 142 increases. However, in the case of the example, since the composition of aluminum is high and the current dispersion characteristics are relatively inferior, the area and / or number of the first electrodes 142 is increased even if the area of the active layer 126 is sacrificed to reduce the current density. It is preferable to reduce the area P3 or to arrange the reflective structure in the low current density area P3.

  Referring to FIG. 7b, if the number of second recesses 129 is increased to 48, the second recesses 129 may not be disposed in a straight line in the horizontal and vertical directions, but may be disposed in a zigzag. In this case, since the area of the low current density region P3 can be narrowed, most of the active layers 126 can participate in light emission.

  In addition, the first region S1 is extended along the outer surface of the semiconductor structure 120, and the second region S2 overlaps the effective light emitting region P2 without overlapping with the effective light emitting region P2, so that the light output is maintained. be able to.

  In the ultraviolet light emitting device, the current diffusion characteristic may be degraded in the semiconductor structure 120, and the uniform current density characteristic may be secured in the semiconductor structure 120 to secure the electrical and optical characteristics and the reliability of the semiconductor device. In addition, smooth current injection is required. Therefore, the first electrode 142 can be disposed by forming a relatively large number of second recesses 129 as compared to a general GaN substrate semiconductor structure 120 for smooth current injection.

  Referring to FIG. 7c, the first recess 128 may be disposed in the semiconductor structure 120 and may not overlap the effective light emitting area. Specifically, since the effective light emitting area exists around the plurality of first electrodes 142, current may be spread in the effective light emitting area. For example, each of the plurality of first electrodes 142 may form an effective light emitting region P2. At this time, the effective light emitting region P2 may overlap with the second region S2 described above, and may not overlap with the first region S1. That is, since the second region S2 separated by the first recess 128 is larger than the effective light emitting region P2, the first recess 128 can be positioned so as not to disturb the current spreading through the first electrode 142. Thus, the semiconductor device according to the embodiment does not reduce the light output even if it has the first recess 128.

  Referring to FIGS. 7d and 7e, the semiconductor device may be formed in various shapes. For example, the semiconductor device may have a rectangular shape, and the outer surface of the semiconductor device may be formed in a plurality. Therefore, the semiconductor device may include the first to fourth outer surfaces M1 to M4. At this time, the outer surface of the semiconductor device may be the same as the outermost side surface of the substrate 170, the bonding layer, and the first conductive layer, and hereinafter, the outer surface of the substrate 170 will be described as a reference. The outer surface of the substrate 170 may be plural, and may include, for example, a first outer surface M1 to a fourth outer surface M4. The first outer surface M1 and the third outer surface M3 may be disposed to face each other, and the second outer surface M2 and the fourth outer surface M4 may be disposed to face each other. For example, the first outer surface M1 and the third outer surface M3 are disposed on both sides in the third direction (Z direction), and the second outer surface M2 and the fourth outer surface M4 are disposed on both sides in the first direction (X direction) Can be placed.

  The first to fourth outer surfaces M1 to M4 may extend in different directions. The first outer surface M1 and the third outer surface M3 may extend in the first direction (X1 and X2 directions), and the second outer surface M2 and the fourth outer surface M4 may extend in the third direction (Z1 and Z2 directions). Specifically, the first outer surface M1 extends in the 1-2 direction (X2 direction), the second outer surface M2 extends in the 3-2 direction (Z2 direction), and the third outer surface M3 is the 1 The fourth outer surface M4 may extend in the 3-1 direction (Z1 direction).

  In addition, although the substrate 170 may have a curved surface at a portion where the plurality of outer side surfaces are in contact with each other, the present invention is not limited thereto.

  The semiconductor device may include the substrate 170, the semiconductor structure, and the electrode pad 166, and the semiconductor structure 120 and the electrode pad 166 may be disposed on the substrate 170 and spaced apart from each other.

  First, the substrate 170 is a region in which at least two outer surfaces M1 to M4 contact each other, and may include a plurality of pad regions, and an electrode pad 166 may be disposed in the pad region. Here, the substrate 170 may be a first pad area Q1 in which the first outer surface M1 and the second outer surface M2 are in contact with each other, and a second pad area Q2 in which the second outer surface M2 may be in contact with the third outer surface M3. Can be included.

  The semiconductor device may include at least one electrode pad, and the number of pad regions may be changed according to the number of electrode pads. For example, in the case of one electrode pad, only the first pad area Q1 may be present, but is not limited thereto.

  Hereinafter, it will be described that the substrate 170 has the electrode pad 166 disposed in the first pad area Q1 and the second pad area Q2, or as described above, the electrode pad 166 has the first outer surface M1 and the fourth outer surface M4. It can also be disposed in the pad area in contact with or in contact with the fourth outer surface M4 and the third outer surface M3.

  Thus, the electrode pad 166 can be disposed in any of the first pad area Q1 and the second pad area Q2. Specifically, the electrode pad 166 may include an inner side surface 166a and an outer side surface 166b, and the inner side surface 166a of the electrode pad 166 is disposed from the side adjacent to the semiconductor structure 120 toward the inside of the semiconductor device The outer surface 166 b of the pad 166 is a side surface adjacent to the outer surface (eg, M 1, M 2, M 3) of the substrate 170.

  The semiconductor structure 120 is disposed on the substrate 170, the bonding layer, and the first conductive layer as described above, and can partially overlap in the vertical direction (Y-axis direction). Accordingly, the outer side surface of the semiconductor structure 120 may be disposed inside the outer side surfaces M1 to M4 of the substrate 170. Here, the inside may be a direction toward the center O of the semiconductor device, and the outside may be a direction toward the edge of the semiconductor device. Here, the center O of the semiconductor element is at the center of the semiconductor element, for example, the center of the circle when the semiconductor element is circular, and the center of the circle when the semiconductor element is square (symmetrical) is the intersection of diagonals connecting facing angles. obtain.

  The semiconductor structure 120 may include a first edge surface E1 disposed along the outer surfaces M1 to M4 of adjacent substrates and a second edge surface E2 adjacent to the inner surface 166a of the electrode pad 166.

  The first edge surface E1 may include a 1-1 edge surface E1a, a 1-2 edge surface E1b, a 1-3 edge surface E1c, and a 1-4 edge surface E1d. Also, the second edge surface E2 may include a 2-1 edge surface E2a and a 2-2 edge surface E2b, and may be a curved surface. However, it is not limited to a curved surface.

  First, the 1-4 edge surface E1d may be disposed outside in the 1-1 direction (X1 direction). The 1-1st edge surface E1a is disposed on the outermost side in the 3-1 direction (Z1 direction) of the 1-4th edge surface E1d, and one end of the 1-4th edge surface E1d is the first outer surface. It may be extended in the 1-2 direction (X2 direction) along M1. However, the first-1 edge surface E1a may extend from the first outer surface M1 to a partial region.

  The 2-1 edge surface E2a may extend in the 1-2 direction (X2 direction) again after extending in the 3-2 direction (Z2 direction) from one end of the 1-1 edge surface E1a. That is, the (2-1) th edge surface E2a may extend to the inside of the semiconductor device and then to the outside. As a result, the (2-1) th edge surface E2a may be different in the extension direction from the outer surface of the nearest substrate 170. This can be similarly applied to the second-2 edge surface E2b. Further, as described above, the (2-1) th edge surface E2a may be a curved surface, but is not limited thereto.

  The 1-2nd edge surface E1b is connected to the 2-1-1 edge surface E2a, and from one end of the 2-1-1 edge surface E2a to the 2-2-2 outer surface M2b in the 3-2-2 direction (Z2 direction) It can be extended along. The second-2 edge surface E2b is connected to the first 1-2 edge surface E1 b, extends from one end of the first 1-2 edge surface E1 b to a partial region in the first 1-1 direction (X1 direction), and again It may be extended in the 3-2 direction (Z2 direction). That is, although the 2nd-2 edge surface E2b may be a curved surface, as mentioned above, it is not limited to this.

  The first to third edge surface E1c may be extended from the one end of the second to second edge surface E2b in the first to first direction (X1 direction), and the first to fourth edge surface E1d may be extended to the first to third edge surface E1c. Can extend in the 3-1 direction (Z1 direction) from one end of the second end surface E1a to be connected to the first 1-1 edge surface E1a.

  Further, the first edge surface E1 may have a curved surface shape in a partial region (for example, an end portion) like the second edge surface E2, but is not limited thereto.

  Also, depending on the number of the electrode pads 166, only the (2-1) th edge surface E2a of the second edge surface E2 can exist in the semiconductor structure 120. Also, the position of the pad area may be changed according to the position of the electrode pad. Thus, the edge surface of the semiconductor structure 120 may be changed according to the position, number, and shape of the electrode pads.

  And, the first recess 128 may be extended along the first edge surface E1 and the second edge surface E2. Specifically, the first recess 128 includes a first 1-1 recess 128-1 disposed along the second edge surface E2 and a first 1-2 recess 128-2 disposed along the first edge surface E1. Can be included.

  The first and second recesses 128-2 extend along the first edge surface E1 of the adjacent semiconductor structure 120, and the first and second recesses 128-1 extend along the second edge surface E2 of the adjacent semiconductor structure 120. It can be extended. Accordingly, the first recess 128-1 may be extended in a direction different from the extension direction of the outer surface of the nearest substrate 170.

  In addition, the second conductive layer 150 may be disposed at a lower portion of the first recess 128-1. Unlike this, the second conductive layer 150 (for example, the first conductive region 150-1 described later) and the second conductive region do not have the second conductive layer 150 disposed in the lower part of the first to second recesses 128-2. 150-2 may not overlap in the thickness direction, and may be disposed between the first conductive region 150-1 and the edge of the semiconductor structure 120.

  The second conductive layer 150 may include a first conductive region 150-1 and a second conductive region 150-2. The first conductive region 150-1 may be disposed inside the first recess 128, and the second conductive region 150-2 may be extended to the outside, for example, the electrode pad 166 at the first conductive region 150-1.

  Specifically, the first conductive region 150-1 may be disposed inside the first and second edge surfaces E1 and E2 of the semiconductor structure 120 and the outer surfaces M1 to M4 of the substrate. Unlike this, a part of the second conductive region 150-2 may be disposed between the first and second edge surfaces E1 and E2 of the semiconductor structure 120 and the outer surface E of the semiconductor device. In addition, the second conductive region 150-2 may partially overlap in the thickness direction of the first recess 128.

  The second conductive region 150-2 may be disposed on the first pad region Q1 and the second pad region Q2. Thereby, the second conductive region 150-2 is electrically connected to the electrode pad 166 of the pad region, and the second conductive layer 150 forms an electrical channel with the electrode pad 166, the second conductive layer 150, and the second electrode. be able to.

  When the semiconductor device includes the second recess 129, the first conductive region 150-1 may include a plurality of holes h so as not to be electrically connected to the first electrode 142 in the second recess 129. The plurality of holes h may have a maximum width greater than that of the second recess 129, but the present invention is not limited to such a structure. Also, the plurality of holes h may have various shapes such as a circle and a polygon, but is not limited thereto.

  7f is a cross-sectional view taken along the line J-J 'of FIG. 7e.

  Referring to FIG. 7f, the second conductive layer 150 may include the first conductive region 150-1 and the second conductive region 150-2, as described above.

  The second conductive region 150-2 may include a 2-1 conductive region 150-2a to a 2-1 conductive region 150-2e.

  First, the (2-1) th conductive region 150-2a may be disposed under the first recess 128 and may overlap the first recess 128 in the vertical direction. The 2-1st conductive region 150-2a is in contact with the first conductive region 150-1, and extends from the semiconductor structure 120 to the second conductive type semiconductor layer and the active layer along the first recess 128 to form the first conductive type. It can be disposed up to a partial region of the semiconductor layer.

  Specifically, the 2-1 conductive region 150-2a may be disposed at a lower portion along the first bottom surface (f1 in FIG. 1) and the first to sixth side surfaces (f2 to f7 in FIG. 1).

  The second conductive region 150-2 b may be in contact with the second conductive region 150-2 a and extend from the second conductive region 150-2 a toward the electrode pad 166. Specifically, the second-2 conductive region 150-2 b may be disposed up to the outermost side of the semiconductor structure 120.

  The 2-3 conductive region 150-2c may be in contact with the 2-2 conductive region 150-2b and extend from the 2-2 conductive region 150-2b to the electrode pad 166. Therefore, the second to third conductive regions 150-2c may not overlap the electrode pad 166 in the vertical direction.

  The 2-4 conductive region 150-2d is in contact with the 2-3 conductive region 150-2c, and in the 2-3 conductive region 150-2c, between the outer surface of the substrate 170 and the outer surface 166b of the electrode pad 166. It can be arranged. However, the second to fourth conductive regions 150-2 d vertically overlap the electrode pad 166 and may be arranged to be electrically connected to the electrode pad 166, and thus extend to the inside of the outer surface 166 b of the electrode pad 166. May be However, the second to fourth conductive regions 150-2 d may be disposed inside the outer surface of the substrate 170 and may not be exposed to the outside. As a result, oxidation or the like can be prevented, and the reliability of the semiconductor device can be improved.

  8a is an enlarged view of a portion K in FIG. 7c, FIG. 8b is a cross-sectional view taken along line II 'in FIG. 7c, and FIG. 8c is a plan view illustrating the first recess and the second recess. .

  First, referring to FIGS. 8a and 8b, the minimum width W6 of the first recess 128 may be smaller than the minimum width W1 of the second recess 129. Specifically, the minimum width W6 of the first recess 128 may have a width ratio of 1: 5 to 1:19 with respect to the minimum width W1 of the second recess 129.

  In the case where the minimum width W6 of the first recess 128 is smaller than 1: 5 with respect to the minimum width W1 of the second recess 129, there is a limit that facilitates oxidation due to peeling. And, if the minimum width W6 of the first recess 128 is larger than 1:19 with respect to the minimum width W1 of the second recess 129, the number of the second recesses 129 for current spreading is reduced and the light output is reduced. There is a problem that decreases.

  Also, as described above, the second recess 129 can have the center C. For example, if the second recess 129 is formed in a circular shape, it may be the center of the circle. The center C of the second recess 129 may be the same as the center of the first electrode 142, and the distance L to the boundary point where the current density is 40% or less with respect to the current density at the center of the first electrode 142 May be larger than the width W7 between the centers C of the adjacent second recesses 129. Specifically, the width W7 between the centers C of the adjacent second recesses 129 may be twice or more the distance L to the boundary point. Such a configuration may facilitate current injection and improve light output.

  Furthermore, the minimum width W8 between the second recess 129 closest to the first recess 128 and the first recess 128 may be larger than the distance L to the boundary point. Accordingly, since the current injected through the second recess 129 is positioned not to disturb the spreading by the first recess 128, the light output can not be reduced even if the semiconductor device has the first recess 128. .

  Referring to FIG. 8c, the area ratio of the area Sa of the first recess 128 to the area Sb of the second recess 129 may be 1: 6 to 1:10. If the area ratio is less than 1: 6, the ratio of the second recess 129 to the semiconductor device may be reduced to reduce the light output. Also, if the area ratio is greater than 1:10, the maximum width of the first recess 128 may be reduced, the mesa angle may be increased during etching, which may make manufacturing difficult, and may cause a large step.

  FIG. 9 is a plan view illustrating the second conductive layer disposed inside.

  Referring to FIG. 9, the second conductive layer 150 may include a first sub conductive layer 150a and a second sub conductive layer 150b. Here, the first sub conductive layer 150a is a region overlapping the semiconductor structure 120 in the thickness direction by the second conductive layer 150, and the second sub conductive layer 150b is a region other than the first sub conductive layer 150a. The electrode pads 166 may overlap.

  Specifically, the second conductive layer 150 may include a plurality of holes h not to be electrically connected to the first electrode 142 in the second recess 129, and the plurality of holes h may be formed in the second recess 129. The maximum width may be larger than that, but is not limited to such a structure.

  Also, as described above, the conductive layer 150 may be electrically connected to the electrode pad 166 through the second sub conductive layer 150b not overlapping the semiconductor structure 120 in the thickness direction. That is, the second sub conductive layer 150 b may be formed to extend from the first sub conductive layer 150 a toward the electrode pad 166.

  Also, the second conductive layer 150 may have a structure extending toward the outer surface of the semiconductor device. Accordingly, the outermost side surface of the second conductive layer 150 can be positioned between the first recess 128 and the outermost side surface of the semiconductor device. At this time, the second conductive layer 150 can compensate for the mesa step difference generated by the first recess 128.

  Then, the conductive layer 150 may be etched so as not to be exposed to the outer surface of the semiconductor device. At this time, the area of the second sub conductive layer 150b may be 1: 2 to 1: 4 as the area ratio of the area Sc where the semiconductor structure is not disposed in the semiconductor device. If the area ratio is less than 1: 2, there is a problem that the risk of contact with an external contaminant or the like is increased due to the proximity to the outer surface of the semiconductor device. In addition, when the area ratio is larger than 1: 4, the area of the semiconductor structure in the semiconductor device is small, so that the light output relative to the area of the chip may be reduced.

  10a to 10b illustrate the modification of FIG.

  Referring to FIG. 10a, the second recess 129 may have a minimum vertical length h1 different from the minimum vertical length h2 of the first recess 128. For example, in the second recess 129, the minimum length h1 may be greater than the minimum length h2 of the first recess 128 in the vertical direction. With such a configuration, the semiconductor structure 120 can prevent a crack due to etching or the like. The inclination angle θ1 of the second recess 129 may be the same as the inclination angle θ2 of the first recess 128. However, it is not limited to this.

  Referring to FIG. 10b, the second recess 129 may have the same minimum length h1 in the vertical direction and the minimum length h1 in the vertical direction of the first recess 128 as shown in FIG.

  However, the inclination angle θ1 of the second recess 129 may be different from the inclination angle θ3 of the first recess 128. The inclination angle θ1 of the second recess 129 may be smaller than the inclination angle θ3 of the first recess 128. That is, the maximum width of the first recess 128 may be reduced.

  Such a configuration may increase the area of the active layer 126 disposed between the first recess 128 and the nearest second recess 129.

  However, the present invention is not limited to such a configuration, and the second recess 129 has a minimum length in the vertical direction different from the minimum length in the vertical direction of the first recess 128 and an inclination angle of the second recess 129 is an inclination of the first recess 128 It can be different from the angle.

  FIG. 11 is a conceptual view of a semiconductor device without a first recess, and FIG. 12 is a view for explaining the reliability problem of the semiconductor device of FIG.

  Referring to FIG. 11, the semiconductor structure 120 may include only the second recess 129 in the semiconductor device without the first recess. Thus, the active layer 126 can be spatially separated only by the second recess 129. In this case, the side surface of the semiconductor structure 120 may be surrounded only by the passivation layer 180 and the active layer 126 may be protected by the passivation layer 180.

  However, referring to FIG. 12, if exfoliation occurs on the side of the semiconductor structure 120, the active layer 126 may be exposed and the side active layer 126 may be oxidized by the penetration of external moisture and / or other contaminants. . Then, the semiconductor structure 120 has a problem that oxidation is easily spread inside. In such a case, unlike the semiconductor device according to the embodiment, there is a problem that the active layer 126 in the effective light emitting region is oxidized to reduce the light output.

  FIG. 13 is a conceptual view of a semiconductor device package according to an embodiment of the present invention, and FIG. 14 is a plan view of a semiconductor device package according to an embodiment of the present invention.

  Referring to FIG. 13, the semiconductor device package is disposed on the main body 2 having the groove (opening, 3), the semiconductor element 10 disposed on the main body 2, and the main body 2 and electrically connected to the semiconductor element 10. Pair of lead frames 5a, 5b. The semiconductor device 10 can include all the configurations described above.

  The main body 2 can include a material or a coating layer that reflects ultraviolet light. The main body 2 can be formed by laminating a plurality of layers 2a, 2b, 2c, 2d and 2e. The plurality of layers 2a, 2b, 2c, 2d, and 2e may be the same material or may include different materials. Illustratively, the plurality of layers 2a, 2b, 2c, 2d, 2e can comprise an aluminum material.

  The groove 3 may be formed to be wider as it gets farther from the semiconductor element, and the step 3a may be formed on the inclined surface.

  The light projecting layer 4 can cover the groove 3. The light projecting layer 4 may be made of glass, but is not necessarily limited thereto. The light emitting layer 4 is not particularly limited as long as it is a material that can effectively transmit ultraviolet light. The inside of the groove 3 may be empty space.

  Referring to FIG. 14, the semiconductor device 10 may be disposed on the first lead frame 5 a and connected to the second lead frame 5 b by the wire 20. At this time, the second lead frame 5b may be disposed to wrap around the side surface of the first lead frame.

  15a to 15j are flowcharts illustrating a method of manufacturing the semiconductor device of FIG.

  The method of manufacturing a semiconductor device according to the embodiment comprises: growing a semiconductor structure; arranging a first recess and a second recess; arranging a first insulating layer, a first electrode and a second electrode, a second The method may include disposing a conductive layer, disposing a second insulating layer, disposing a bonding layer, disposing a first conductive layer, disposing a passivation layer and an electrode pad.

  First, referring to FIG. 15a, a semiconductor structure 120 can be grown. The semiconductor structure 120 can be grown on the first temporary substrate T. For example, the first conductive semiconductor layer 124, the active layer 126, and the second conductive semiconductor layer 127 can be grown on the first temporary substrate T.

The first temporary substrate T may be a growth substrate. For example, the first temporary substrate T may be formed of at least one of sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, or Ge, and is not limited to such a type. .

  In addition, the semiconductor structure 120 can be, for example, metal organic chemical vapor deposition (MOCVD; Metal Organic Chemical Vapor Deposition), chemical vapor deposition (CVD; Chemical Vapor Deposition), plasma-enhanced chemical vapor deposition (PECVD), It can be formed using methods such as molecular beam growth (MBE; Molecular Beam Epitaxy), hydride vapor phase epitaxy (HVPE), etc., but is not limited thereto.

  The description of the first conductivity type semiconductor layer 124, the active layer 126, and the second conductivity type semiconductor layer 127 can be applied similarly to the contents described above.

  Referring to FIG. 15b, a first recess 128 and a second recess 129 may be formed. The first recess 128 may be disposed along the outer surface of the semiconductor structure 120. Therefore, as described above, the active layer 126 can be separated into the first region and the second region by the first recess 128.

  The second recess 129 penetrates the second conductivity type semiconductor layer 127 and the active layer 126 in the semiconductor structure 120 and extends to a partial region of the first conductivity type semiconductor layer 124 as in the first recess 128. obtain. The second recess 129 may be plural as shown in FIGS. 7a to 7b.

  Also, the second recess 129 may be formed simultaneously with the first recess 128 by etching. This can minimize the process. In addition, as described above, the first recess 128 and the second recess 129 may have the same inclination angle and the same thickness in the vertical direction. However, the first recess 128 and the second recess 129 may have different horizontal widths. For example, the minimum width W6 of the first recess 128 may be smaller than the minimum width W1 of the second recess 129.

  Referring to FIG. 15c, a first insulating layer 131, a first electrode 142 and a second electrode 146 may be disposed. The first insulating layer 131 can be disposed, and the first electrode 142 and the second electrode 146 can be disposed. The order can be applied in various ways.

  For example, the first insulating layer 131 may be disposed on the top surface of the semiconductor structure 120, and a pattern may be formed at the position where the first electrode 142 and the second electrode 146 are disposed. The first insulating layer 131 may be disposed on the first recess 128.

  The first electrode 142 may be disposed on the top surface of the first conductive semiconductor layer 124 and may be electrically connected to the first conductive semiconductor layer 124. The second electrode 146 may be disposed on the top surface of the second conductive semiconductor layer 127 and may be electrically connected to the second conductive semiconductor layer 127.

  Referring to FIG. 15 d, the second conductive layer 150 may be disposed on the top surface of the first insulating layer 131. The second conductive layer 150 may be electrically connected to the second electrode 146. The first insulating layer 131 may electrically insulate the second conductive layer 150 and the first conductive semiconductor layer 124. The second conductive layer 150 may be disposed on the first recess 128. In addition, the second conductive layer 150 may be etched so as not to be exposed to the outer surface of the semiconductor device.

  Referring to FIG. 15 e, a second insulating layer 132 may be disposed on the semiconductor structure 120. The second insulating layer 132 may be disposed to surround the second conductive layer 150. In addition, the second insulating layer 132 may be disposed on the first insulating layer 131 so as to surround the first insulating layer 131. Thus, even if a crack occurs in the first insulating layer 131, the second insulating layer 132 can protect the semiconductor structure 120 in a secondary manner.

  The second insulating layer 132 may be disposed on the first electrode 142. However, the second insulating layer 132 may be disposed to expose a portion of the top surface of the first electrode 142.

  Referring to FIG. 15 f, a first conductive layer 165 may be disposed on the second insulating layer 132. The first conductive layer 165 may be disposed on the exposed upper surface of the first electrode 142. Thus, the first conductive layer 165 may be electrically connected to the first electrode 142. The second insulating layer 132 can electrically insulate between the second electrode 146 and the first conductive layer 165.

  Referring to FIG. 15g, a bonding layer 160 may be disposed on the first conductive layer 165. The bonding layer 160 can include a conductive material. Illustratively, bonding layer 160 can include a material selected from the group consisting of gold, tin, indium, aluminum, silicon, silver, nickel, and copper, or alloys thereof.

  Referring to FIG. 15 h, a second substrate T ′ may be disposed on the bonding layer 160. The second substrate T 'may be the same substrate as the substrate 170 in FIG. Thus, as described in FIG. 1, the second substrate T 'may be formed of a conductive material. Illustratively, the second substrate T 'can comprise a metal or a semiconductor material. The second substrate T 'may be a metal having excellent electrical conductivity and / or thermal conductivity. In this case, heat generated at the time of operation of the semiconductor element can be quickly released to the outside. In addition, when the second substrate T 'is made of a conductive material, the first electrode 142 can receive current from the outside through the second substrate T'.

  The second substrate T 'can comprise a material selected from the group consisting of silicon, molybdenum, silicon, tungsten, copper and aluminum or alloys thereof.

  Then, referring to FIG. 15i, the first temporary substrate T can be separated from the semiconductor structure 120. For example, the semiconductor structure 120 and the first temporary substrate T can be separated by irradiating the first temporary substrate T with a laser. However, it is not limited to such a system.

  Referring to FIG. 15 j, passivation layers 180 may be disposed on the top and side surfaces of the semiconductor structure 120. As described above, the thickness of the passivation layer 180 may be 200 nm to 500 nm. In the case of 200 nm or more, the device can be protected from external moisture and foreign matter to improve the electrical and optical reliability of the device, and in the case of 500 nm or less, the stress applied to the semiconductor device can be reduced. It is possible to solve the problem that the unit price of the semiconductor device is increased due to the decrease of the optical and electrical reliability of the semiconductor device and the increase of the process time of the semiconductor device. However, it is not limited to such a configuration.

  Also, asperities may be formed on the top surface of the semiconductor structure 120 before the passivation layer 180 is disposed. Such unevenness can improve the light extraction efficiency emitted from the semiconductor structure 120. The asperities may be adjusted to have different heights depending on the wavelength of light generated by the semiconductor structure 120. Also, the electrode pad 166 can be formed through the pattern.

  The semiconductor structure 120 may be disposed on the lead frame of the semiconductor device package or on the circuit pattern of the circuit board, as described above with reference to FIG. The semiconductor device can be applied to various types of light source devices. An exemplary light source device may be a concept including a sterilizer, a curing device, a lighting device, a display device, and a lamp for a vehicle. That is, the semiconductor device may be applied to various electronic devices disposed in a case to provide light.

  The sterilizer can be equipped with the semiconductor device according to the embodiment to sterilize a desired area. Although a sterilizer may be applied to household appliances, such as a water purifier, an air conditioner, and a refrigerator, it is not necessarily limited to this. That is, the sterilizer can be applied to all of the various products (eg, medical devices) that require sterilization.

  Illustratively, the water purifier can be equipped with a sterilizer according to the embodiment to sterilize circulating water. The sterilizer can be disposed at a nozzle or an outlet through which water circulates to irradiate ultraviolet light. At this time, the sterilizer may include a waterproof structure.

  The curing apparatus may be equipped with the semiconductor device according to the embodiment to cure various types of liquids. A liquid may be the broadest concept encompassing all the various substances that cure when irradiated with ultraviolet light. An exemplary curing device can cure various types of resins. Alternatively, the curing device may be applied to the curing of cosmetic products such as nail polish.

  The lighting apparatus includes a light source module including a substrate and the semiconductor device according to the embodiment, a heat dissipation unit that dissipates heat of the light source module, and a power supply unit processing or converting an externally provided electrical signal to provide the light source module. be able to. In addition, the lighting device can include a lamp, a headlamp, a street lamp, and the like.

  The display device may include a bottom cover, a reflector, a light emitting module, a light guide plate, an optical sheet, a display panel, an image signal output circuit, and a color filter. The bottom cover, the reflection plate, the light emitting module, the light guide plate, and the optical sheet may constitute a backlight unit.

  The reflector is disposed on the bottom cover, and the light emitting module can emit light. The light guide plate may be disposed in front of the reflection plate to guide light emanating from the light emitting module forward, and the optical sheet may be configured to include a prism sheet or the like and disposed in front of the light guide plate. The display panel is disposed in front of the optical sheet, the image signal output circuit supplies an image signal to the display panel, and the color filter may be disposed in front of the display panel.

  When used in a backlight unit of a display device, the semiconductor device may be used as an edge type backlight unit or as a direct type backlight unit.

  The semiconductor element may be a laser diode in addition to the light emitting diode described above.

  The laser diode can include the first conductive type semiconductor layer, the active layer, and the second conductive type semiconductor layer of the above-described structure, as in the light emitting device. Then, after joining the p-type first conductivity type semiconductor and the n-type second conductivity type semiconductor, an electro-luminescence phenomenon is used in which light is emitted when current flows. There is a difference in the directionality and phase of the emitted light. That is, in the laser diode, light having one specific wavelength (monochromatic light, monochromatic beam) emits in the same direction with the same phase by utilizing the phenomenon of stimulated emission and the reinforced interference phenomenon. Such characteristics can be used for optical communication, medical equipment, semiconductor processing equipment, and the like.

  The light receiving element may be, for example, a photodetector, which is a type of transducer that detects light and converts its intensity into an electrical signal. As such a photodetector, a photocell (silicon, selenium), a light output element (cadmium sulfide, cadmium selenide), a photodiode (for example, a PD having a peak wavelength in a true blind spectral region even in the visible blind spectral region), a photo There are transistors, photomultipliers, phototubes (vacuum, gas filled), IR (Infra-Red) detectors, etc., but the embodiment is not limited thereto.

  In addition, semiconductor devices such as photodetectors can be generally manufactured using direct transition semiconductors with excellent light conversion efficiency. Alternatively, the photodetectors have various structures, and the most common structure is a pin photodetector using a pn junction, and a Schottky photodetector using a Schottky junction (Schottky junction). And MSM (Metal Semiconductor Metal) type photodetectors.

  The photodiode may include the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer having the above-described structure, as in the light emitting device, and may be formed as a pn junction or a pin structure. The photodiode operates by applying reverse bias or zero bias, and when light is incident on the photodiode, electrons and holes are generated and current flows. At this time, the magnitude of the current may be approximately proportional to the intensity of light incident on the photodiode.

  Photovoltaic cells or solar cells are a type of photodiode that can convert light into current. The solar cell can include the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer having the above-described structure, as in the light emitting device.

  In addition, it may be used as a rectifier of an electronic circuit through the rectification characteristic of a general diode using a pn junction, and may be applied to an ultra high frequency circuit and applied to an oscillation circuit or the like.

  In addition, the semiconductor device described above is not necessarily embodied as a semiconductor, and may further include a metal material. For example, a semiconductor device such as a light receiving device may be embodied using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, and may use p-type or n-type dopants. And may be implemented using a semiconductor material or an intrinsic semiconductor material doped by

Although the embodiments have been mainly described above, this is merely an example, and does not limit the present invention, and those who have ordinary knowledge of the field to which the present invention belongs can be essential to the embodiments. It should be understood that various modifications and applications not illustrated above are possible without departing from the characteristics described above. For example, each component specifically shown in the embodiment can be modified and implemented. And, the differences associated with such variations and applications should be construed as being included in the scope of the present invention as defined in the appended claims.

Claims (20)

A semiconductor structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer,
The semiconductor structure is a first recess passing through the second conductive type semiconductor layer, the active layer, and a first portion of the first conductive type semiconductor layer; and the semiconductor structure is the second conductive type semiconductor layer, An active layer and a plurality of second recesses penetrating a second portion of the first conductive semiconductor layer;
The first recess is disposed along the outer surface of the semiconductor structure,
The semiconductor device, wherein the plurality of second recesses are enclosed by the first recess. The semiconductor device according to claim 1, further comprising: a first electrode disposed in the plurality of second recesses; and a first insulating layer disposed in the first recess.   The semiconductor device of claim 1, wherein the first recess has a maximum separation distance of 3 μm to 5 μm from an outer surface of the semiconductor structure. The semiconductor structure includes first and second regions separated by the first recess, and
The first region is disposed between the first recess and the outermost side of the semiconductor structure,
The semiconductor device of claim 1, wherein the second region is a region disposed inside the first recess. The semiconductor device further includes a second electrode electrically connected to the second conductive semiconductor layer in the second region,
The semiconductor device of claim 4, wherein the second electrode is not electrically connected to the second conductive semiconductor layer at the first electrode. Further comprising a second conductive layer electrically connected to the second electrode,
The second conductive layer includes a first conductive region and a second conductive region,
The first conductive region is disposed in the second region,
The semiconductor device of claim 5, wherein the second conductive region includes at least one protrusion extending beyond the first recess.   The semiconductor device of claim 1, wherein a length of a first portion of the first conductive semiconductor layer and a length of a second portion of the first conductive semiconductor layer are different from each other.   The semiconductor device according to claim 1, wherein a length of the first portion of the first conductive semiconductor layer and a length of the second portion of the first conductive semiconductor layer are equal to each other. The first recess and the second recess have the same minimum length in the second direction and overlap in the first direction,
The semiconductor device of claim 1, wherein the second direction is a thickness direction of the semiconductor structure.   The semiconductor device of claim 1, wherein an inclination angle of the first recess is the same as an inclination angle of the second recess. Growing a semiconductor structure; and disposing a first recess and a second recess in the semiconductor structure;
The semiconductor structure is
A first conductive type semiconductor layer; a second conductive type semiconductor layer; and an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer,
The first recess is
It is disposed through the second conductivity type semiconductor layer and the active layer to a partial region of the first conductivity type semiconductor layer, and extends along the side surface of the semiconductor structure.
The second recess is disposed through the second conductive semiconductor layer and the active layer to a partial region of the first conductive semiconductor layer.
The method of manufacturing a semiconductor device, wherein the first recess is disposed closer to the side surface of the semiconductor structure than the second recess. The semiconductor structure may include a plurality of second recesses disposed through the second conductive semiconductor layer and the active layer to a partial region of the first conductive semiconductor layer.
The first recess is disposed along the outer surface of the semiconductor structure,
The semiconductor device of claim 11, wherein the first recess encloses the plurality of second recesses.   The semiconductor device of claim 12, wherein an area ratio of the area of the first recess to the area of the second recess is 1: 6 to 1:10. The first conductive region is enclosed by the first recess,
The semiconductor device of claim 11, wherein the second conductive region extends from the first conductive region to the outside of the semiconductor structure.   The semiconductor device of claim 11, wherein the first conductive region is disposed in the first edge surface and the second edge surface.   The semiconductor device of claim 11, wherein a portion of the second conductive region is disposed between first and second edge surfaces of the semiconductor structure and an outer surface of the substrate.   The semiconductor device according to claim 11, wherein a partial region of the first edge surface is a curved surface.   The semiconductor device of claim 11, wherein an area ratio of the largest area of the semiconductor structure to the area of the first recess is 1: 0.01 to 1: 0.03.   The semiconductor device of claim 11, wherein the first recess has a maximum separation distance of 3 μm to 5 μm from an outer surface of the semiconductor structure. The semiconductor structure includes first and second regions separated by the first recess, and
The first region is disposed between the first recess and the outermost side of the semiconductor structure,
The semiconductor device according to claim 11, wherein the second region is a region disposed inside the first recess.

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