JP2018133363A - Electronic component built-in substrate and substrate mounting structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress reduction in connection reliability of an electronic component.SOLUTION: An electronic component built-in substrate 1 includes: a substrate 10; an electronic component 20 that is built in the substrate 10 and includes a first terminal 21 provided on a first main surface 10A side, a second terminal 22 provided on a second main surface 10B side, and a capacitance portion 23; a first via conductor 33 that is formed in an insulating layer 11 included in the substrate 10 and is electrically connected to the first terminal 21; and a second via conductor 34 that is formed in the insulating layer 11 included in the substrate 10 and is electrically connected to the second terminal 22. A number N1 of the first terminals 21 and a number N2 of the second terminals 22 satisfy N1>N2, and a contact area S1 between the first via conductors 33 and the first terminal 21 and a contact area S2 between the second via conductors 34 and the end surface of the second terminal 22 satisfy S1≤S2.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an electronic component built-in substrate and a board mounting structure including the electronic component built-in substrate.

  2. Description of the Related Art An electronic component built-in substrate in which a passive component connected to an active component is built is known. Patent Document 1 discloses a component built-in board in which a chip capacitor is built. In recent years, electronic components have been made thinner due to the need for downsizing of electronic devices and the like, and studies on electronic component built-in substrates in which thin-film electronic components are built are also underway.

JP 2009-194096 Gazette

  In the electronic component built-in substrate, it is required to reduce the ESL (equivalent series inductance) of the electronic component connected to the active component. Therefore, the inventors of the present application divide an electrode on the active component side of the electronic component into a plurality of parts and provide a terminal for connecting to each of the divided electrodes with the active component in order to reduce ESL. The terminal structure is being studied. However, when the electrode on the side connected to the active component is divided into a multi-terminal structure, a difference in internal stress occurs between the vicinity of the electrode connected to the active component and the vicinity of the opposite electrode. There is a possibility that the connection reliability between the terminal on the component side and the electrode is lowered.

  The present invention has been made in view of the above, and it is an object of the present invention to provide an electronic component built-in substrate capable of suppressing a decrease in connection reliability of electronic components and a substrate mounting structure including the electronic component built-in substrate. And

  In order to achieve the above object, an electronic component built-in substrate according to the present invention includes a first main surface and a substrate having a second main surface opposite to the first main surface, and the first main surface. An electronic component having a first terminal provided on a surface side, a second terminal provided on the second main surface side, and a capacitor provided between the first terminal and the second terminal; A first via conductor formed in an insulating layer included in the substrate, electrically connected to the first terminal and extending toward the first main surface; and formed in an insulating layer included in the substrate; A second via conductor that is electrically connected to the second terminal and extends toward the second main surface, and the number N1 of the first terminals and the number N2 of the second terminals are N1> N2 And the ground area S1 between the first via conductor and the first terminal, and the second via conductor and the second terminal. A contact area S2 between the surface, satisfies S1 ≦ S2.

  According to the electronic component built-in substrate, when the number of the first terminals is large and the number of the second terminals is small, the relationship of the second via conductors of the first via conductors is set to S1 ≦ S2. Thus, deformation of the electronic component due to internal stress can be suppressed. Therefore, the connection reliability at the boundary between the first terminal and the first via conductor and the connection reliability at the boundary between the second terminal and the second via conductor are improved.

  Here, a plurality of the first via conductors are connected to one of the first terminals, or a plurality of the second via conductors are connected to one of the second terminals. Also good.

  As described above, even when a plurality of via conductors are connected to one terminal, it is possible to suppress a decrease in connection reliability of the electronic component by satisfying the above relationship.

  The thickness T1 of the first terminal and the thickness T2 of the second terminal may satisfy T1 <T2.

  As described above, when the thickness of the first terminal having a large number is small and the thickness of the second terminal having a small number is large, the relationship of the second via conductors of the first via conductors is set to S1 ≦ S2. Thereby, the deformation of the electronic component due to the internal stress can be suitably suppressed.

  A substrate mounting structure according to an aspect of the present invention is a substrate mounting structure including the electronic component built-in substrate, wherein the first terminal is connected to an active component side, and the second terminal is a power supply side. It is connected to the.

  In the above-described board mounting structure, the first terminal of the electronic component built-in substrate is connected to the active component side, and the second terminal of the electronic component built-in substrate is connected to the power supply side, thereby realizing low ESL of the electronic component. However, it is possible to suppress a decrease in connection reliability of electronic components.

  ADVANTAGE OF THE INVENTION According to this invention, the board | substrate mounting structure containing this electronic component built-in board | substrate which can suppress the fall of the connection reliability of an electronic component and this electronic component built-in board | substrate is provided.

It is sectional drawing which shows roughly the board | substrate mounting structure using the electronic component built-in board | substrate which concerns on one Embodiment of this invention. 1 is a cross-sectional view schematically showing a part of an electronic component built-in substrate according to an embodiment of the present invention. It is a figure for demonstrating the manufacturing method of the electronic component built-in board | substrate shown in FIG. It is a figure for demonstrating the manufacturing method of the electronic component built-in board | substrate shown in FIG. It is a figure for demonstrating the manufacturing method of the electronic component built-in board | substrate shown in FIG.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted.

  FIG. 1 is a cross-sectional view schematically showing a substrate mounting structure using an electronic component built-in substrate according to an embodiment of the present invention. FIG. 2 is a cross-sectional view schematically showing a part of the electronic component built-in substrate according to the embodiment of the present invention.

  As shown in FIG. 1, the substrate mounting structure 100 is a mounting structure used for, for example, a communication terminal. The electronic component built-in substrate 1 includes a substrate 10 including an insulating layer 11 and an electronic component 20 built in the substrate 10. A first external terminal 31 extending from the first terminal 21 that is an electrode on one side of the electronic component 20 is provided on the first main surface 10A on one side of the substrate 10. The second main surface 10B opposite to the first main surface 10A is provided with a second external terminal 32 extending from the second terminal 22 on the opposite side of the first terminal 21 of the electronic component 20.

  On the first main surface 10A side of the substrate 10 of the electronic component built-in substrate 1 in the substrate mounting structure 100, the active component is connected to the first external terminal 31 of the electronic component built-in substrate 1 via the conductor material 41 (bump). 42 is connected. The active component 42 is not particularly limited. For example, an LSI (Large Scale Integrated Circuit), an ASIC (Application Specific Integrated Circuit), a CPU (Central Processing Unit) or the like is used. Can do.

  On the second main surface 10B side of the electronic component built-in substrate 1 in the substrate mounting structure 100, the circuit board 44 on the power source side is connected to the second external terminal 32 of the electronic component built-in substrate 1 through the conductor material 43. Is done. The circuit board 44 is, for example, a mother board. Instead of the circuit board 44, other electronic components or the like may be connected. At least in the electronic component built-in substrate 1, the first external terminal 31 on the first main surface 10A side is connected to the active component 42 side, and the second external terminal 32 on the second main surface 10B side is connected to the power supply side. Yes.

  The detailed structure of the electronic component built-in substrate 1 will be described with reference to FIG. The electronic component built-in substrate 1 includes a substrate 10 including an insulating layer 11 and a core 12, an electronic component 20 built in the substrate 10, and via conductors 30 (first via conductors 33, 2) formed in the insulating layer 11. Via conductors 34). The substrate 10 has a first main surface 10A and a second main surface 10B opposite to the first main surface 10A. The electronic component 20 includes a plurality of first terminals 21 provided on the first main surface 10A side, a plurality of second terminals 22 provided on the second main surface 10B side, and the first terminals 21 and the second terminals 22. And a capacitor portion 23 provided between the two. The electronic component built-in substrate 1 includes a first external terminal 31 that is electrically connected to the first terminal 21 of the electronic component 20 and a second external terminal that is electrically connected to the second terminal 22 of the electronic component 20. 32. Here, “the electronic component 20 is“ built into ”the substrate 10” means that the electronic component 20 is not exposed from the first main surface 10 </ b> A and the second main surface 10 </ b> B of the substrate 10.

The substrate 10 is a so-called multilayer circuit board. In the present embodiment, the substrate 10 includes an insulating layer 11 and a core 12. The core 12 is built in the insulating layer 11, and the first main surface 10 </ b> A and the second main surface 10 </ b> B of the substrate 10 correspond to the main surface of the insulating layer 11. The core 12 is provided with a through hole 13 penetrating from the first main surface 10 </ b> A side to the second main surface 10 </ b> B side, and the electronic component 20 is disposed in the through hole 13. The insulating layer 11 is also filled in the through hole 13. As a result, the insulating layer 11 is interposed between the electronic component 20 and the core 12. The insulating layer 11 is made of an insulating material such as an epoxy resin, an acrylic resin, or a phenol resin. In addition, it is preferable that the insulating material which comprises the insulating layer 11 is a material from which hardness changes by specific processes, such as a thermosetting resin or a photocurable resin, for example. The core 12 is made of, for example, silicon (Si), glass (SiO ₂ ), a resin substrate, or the like. The total thickness of the substrate 10 can be, for example, about 40 μm to 1000 μm. Moreover, the thickness of the insulating layer 11 can be about 1 μm to 200 μm, for example, and the thickness of the core 12 can be about 20 μm to 400 μm, for example. In addition, the whole thickness of the board | substrate 10, the thickness of the insulating layer 11, and the thickness of the core 12 are not specifically limited.

  The electronic component 20 is a capacitor having a plurality of first terminals 21, a plurality of second terminals 22, and a capacitor portion 23 provided between the plurality of first terminals 21 and the plurality of second terminals 22. In the present embodiment, the electronic component 20 is a so-called TFCP (Thin Film Capacitor) in which the first terminal 21 and the second terminal 22 are made of a metal thin film and the capacitor 23 is made of a dielectric film. Will be described. Note that the electrode layer formed of the metal thin film on the first terminal 21 side may include a region different from the region functioning as the first terminal 21. The electrode layer composed of the metal thin film on the second terminal 22 side may include a region different from the region functioning as the second terminal 22.

  In the example shown in FIG. 2, the first terminal 21 is divided into five, and the second terminal 22 is divided into two. Each of the divided first terminals 21 has an end surface 21a on the first main surface 10A side and a side surface 21b. The insulating layer 11 is filled around the end face 21a and the side face 21b. Each of the divided second terminals 22 has an end surface 22a on the second main surface 10B side and a side surface 22b. The insulating layer 11 is filled around the end face 22a and the side face 22b. The number (number of divisions) and shapes of the divided first terminals 21 and second terminals 22 can be changed as appropriate.

  The total thickness of the three layers (the first terminal 21, the second terminal 22, and the capacitor 23) of the electronic component 20 is, for example, about 5 μm to 650 μm, and the thickness of the first terminal 21 is about 0.1 μm to 50 μm. The thickness of the capacitor 23 can be about 0.05 μm to 100 μm, and the thickness of the second terminal 22 can be about 5 μm to 500 μm. In the electronic component 20 described in the present embodiment, the thickness of the second terminal 22 is larger than the thickness of the first terminal 21. Therefore, the second terminal 22 is appropriately selected so as to be larger than the thickness of the first terminal 21 within the above thickness range. That is, when the thickness of the first terminal 21 is T1, and the thickness of the second terminal 22 is T2, T1 <T2.

  As a material constituting the first terminal 21 and the second terminal 22, the main component is nickel (Ni), copper (Cu), aluminum (Al), platinum (Pt), an alloy containing these metals, or an intermetal A material that is a compound is preferably used. However, the material of the first terminal 21 and the second terminal 22 is not particularly limited as long as it is a conductive material. In the present embodiment, a case will be described in which the first terminal 21 has copper as a main component and the second terminal 22 has nickel as a main component. The term “main component” means that the proportion of the component is 50% by mass or more. Moreover, as an aspect of the 1st terminal 21 and the 2nd terminal 22, the case where it is the laminated body structure which consists of two or more types besides the case where an alloy and an intermetallic compound are formed is included. For example, the electrode layer may be formed as a two-layer structure in which a Cu thin film is provided on a Ni thin film. Moreover, when using pure nickel as the 1st terminal 21 and / or the 2nd terminal 22, the purity of the nickel has preferable 99.99% or more. Further, in the case of an alloy containing nickel, metals included as metals other than nickel are platinum (Pt), palladium (Pd), iridium (Ir), rhodium (Rh), ruthenium (Ru), osmium (Os), It is preferable to use at least one selected from the group consisting of rhenium (Re), tungsten (W), chromium (Cr), tantalum (Ta), silver (Ag), and copper (Cu).

When the second terminal 22 includes two or more kinds of materials, the second terminal 22 has a through-hole formed in silicon (Si) or glass (SiO ₂ ), such as a so-called TSV (Through Silicon Via) structure. You may have the structure where another electroconductive material was embedded in the through-hole.

The capacitor 23 is made of a perovskite-based dielectric material. Here, as the perovskite-based dielectric material in the present embodiment, BaTiO ₃ (barium titanate), (Ba _1-x Sr _x ) TiO ₃ (barium strontium titanate), (Ba _1-x Ca _x ) TiO 2. ₃ , PbTiO ₃ , Pb (Zr _x Ti _1-x ) O ₃ and other (strong) dielectric materials having a perovskite structure, and Pb (Mg _1/3 Nb _2/3 ) O ₃ A composite perovskite relaxor type ferroelectric material is included. Here, in the perovskite structure and the perovskite relaxor type dielectric material, the ratio of the A site to the B site is usually an integer ratio, but may be intentionally shifted from the integer ratio in order to improve the characteristics. In order to control the characteristics of the capacitor 23, the capacitor 23 may appropriately contain an additive substance as a subcomponent.

  The first external terminal 31 is provided corresponding to each of the plurality of first terminals 21. In the present embodiment, an example in which five first external terminals 31 are provided is shown. Each of the first external terminals 31 is stacked on the first main surface 10A of the substrate 10 and is electrically connected to the first terminal 21 via a via conductor 30 (a first via conductor 33 described later). ing. The first terminal 21 of the electronic component 20 is configured to be electrically connectable to an external electronic component or wiring via the first via conductor 33 and the first external terminal 31. The first external terminal 31 is made of a conductive material such as copper (Cu), for example.

  The second external terminal 32 is provided corresponding to each of the plurality of second terminals 22. In the present embodiment, an example in which two second external terminals 32 are provided is shown. Each of the second external terminals 32 is laminated on the second main surface 10B of the substrate 10 and is electrically connected to the second terminal 22 via a via conductor 30 (second via conductor 34 described later). ing. The second terminal 22 of the electronic component 20 is configured to be electrically connectable to an external electronic component or wiring via the second via conductor 34 and the second external terminal 32. The second external terminal 32 is made of a conductive material such as copper (Cu), for example.

  The via conductor 30 includes a first via conductor 33 that electrically connects the first terminal 21 and the first external terminal 31, and a second via conductor that electrically connects the second terminal 22 and the second external terminal 32. 34. The first via conductor 33 passes through the insulating layer 11 between the first terminal 21 and the first external terminal 31. The second via conductor 34 passes through the insulating layer 11 between the second terminal 22 and the second external terminal 32. The first via conductor 33 and the second via conductor 34 basically have a cylindrical shape extending in the stacking direction (thickness direction of the substrate 10), but as shown in FIG. The side surface may be inclined so that the cross-sectional area of 10A or the second main surface 10B side) is large and the cross-sectional area of the inner side (electronic component 20 side) is small.

  The area of contact between the first via conductor 33 continuous from the first external terminal 31 and the end surface 21a of the first terminal 21 is such that the second via conductor 34 continuous from the second external terminal 32 and the end surface 22a of the second terminal 22 are in contact. It is smaller than the area where it touches. That is, the area where the first via conductor 33 continuous from the first external terminal 31 and the end surface 21a of the first terminal 21 are in contact with each other is the ground area S1, the second via conductor 34 continuous from the second external terminal 32, If the area where the end face 22a of the two terminals 22 contacts is the ground contact area S2, S1 ≦ S2 is satisfied. S1 and S2 indicate the ground area of one via conductor. When a plurality of via conductors are provided, the ground area is calculated as the average of the ground areas required for each via conductor, and is set as S1 and S2.

  Thus, in the electronic component 20, the number (division number) of the first terminals 21 connected to the active component 42 side is N1, and the number (division number) of the second terminals 22 connected to the power supply side is N2. Then, N1> N2. Further, when the thickness of the first terminal 21 is T1, and the thickness of the second terminal 22 is T2, T1 <T2. Further, if the area where the first via conductor 33 and the end face 21a of the first terminal 21 are in contact is S1, and the area where the second via conductor 34 and the end face 22a of the second terminal 22 are in contact is S2, then S1 ≦ S2. ing.

  Next, a method for manufacturing the electronic component built-in substrate 1 according to this embodiment will be described with reference to FIGS. 3-5 is a figure for demonstrating the manufacturing method of the electronic component built-in board | substrate shown in FIG. 3 to 5 show a method of manufacturing one electronic component built-in substrate 1, actually, a plurality of electronic component built-in substrates 1 are formed on a single support substrate, and then each electronic component built-in substrate 1 is formed. Separated into the component-embedded substrate 1. Therefore, FIGS. 3 to 5 show an enlarged part of one support substrate.

  First, as shown in FIG. 3, the electronic component 20 is prepared. The electronic component 20 can be manufactured by a known method. The first terminal 21 of the electronic component 20 is divided into five, and the second terminal 22 is divided into two.

  Next, as shown in FIG. 4A, the core 12 provided with the through hole 13 is prepared. The through hole 13 can be formed by a known process such as etching. Thereafter, as shown in FIG. 4B, a support substrate W is prepared, and the core 12 is temporarily fixed to the support substrate W. Further, the electronic component 20 is disposed and temporarily fixed in the through hole 13 of the core 12. As the support substrate W, for example, a temporary mounting material having adhesiveness can be used.

  Next, as shown in FIG. 5A, the insulating layer 11 is formed. The insulating layer 11 is formed by, for example, applying an uncured resin material to the core 12 and the electronic component 20 temporarily fixed to the support substrate W, and removing the support substrate W after the resin material is cured. Is done. As a result, the core 12 and the electronic component 20 are embedded in the insulating layer 11.

  Next, as shown in FIG. 5B, a hole 33A for forming the first via conductor 33 and a hole 34A for forming the second via conductor 34 are formed. The holes 33 </ b> A are formed at locations corresponding to the respective first terminals 21, and penetrate the insulating layer 11 between the first main surface 10 </ b> A and the first terminals 21. The holes 34 </ b> A are formed at locations corresponding to the respective second terminals 22, and penetrate the insulating layer 11 between the second major surface 10 </ b> B and the second terminals 22. The holes 33A and 44A can be formed by laser ablation, for example.

  Next, the first via conductor 33 is formed in the hole 33A by plating or sputtering, and the second via conductor 34 is formed in the hole 34A. Thereafter, patterning is performed on the metal layer formed on the first main surface 10A and the second main surface 10B. Thereby, a plurality of first external terminals 31 and a plurality of second external terminals 32 are formed. Finally, by dividing into pieces by dicing or the like, the electronic component built-in substrate 1 shown in FIG. 1 is obtained. When the electronic component built-in substrate 1, the active component 42, and the circuit board 44 are connected using the conductor materials 41 and 43, the substrate mounting structure 100 shown in FIG. 1 is obtained.

  Here, the electronic component 20 included in the electronic component built-in substrate 1 of the substrate mounting structure 100 according to the present embodiment includes the number of first terminals 21 (number of divisions) N1 and the number of second terminals 22 (number of divisions). N2 satisfies N1> N2, and the thickness T1 of the first terminal 21 and the thickness T2 of the second terminal 22 satisfy T1 <T2. Further, in the electronic component 20, the ground area S1 between the first via conductor 33 and the end face 21a of the first terminal 21 and the ground area S2 between the second via conductor 34 and the end face 22a of the second terminal 22 are S1 ≦ S2. By having these characteristics, in the electronic component built-in substrate 1, the connection reliability between the first terminal 21 and the first via conductor 33 at the boundary between the first terminal 21 and the first via conductor 33, and There is an effect that the connection reliability between the second terminal 22 and the second via conductor 34 at the boundary between the second terminal 22 and the second via conductor 34 is improved.

  In recent years, a configuration in which an active component 42 is arranged on an electronic component 20 built in the electronic component built-in substrate 1 like the substrate mounting structure 100 shown in FIG. 1 has been studied. In such a configuration, in order to reduce ESL (equivalent series inductance), the terminals on the active component 42 side of the electronic component 20 are divided into a plurality of terminals, and the number (the number of divisions) is larger than the terminals on the other side. It is effective. Therefore, as in the case of the electronic component 20, a configuration in which the first terminal 21 on the active component 42 side is divided into a plurality of parts and via conductors extending in the thickness direction from the respective surfaces of the divided first terminals 21 has been studied. Yes. However, when the number of divisions of the first terminal is increased, a via conductor (first via conductor 33 in FIG. 1 and the like) is provided for each divided terminal. Further, in order to increase the number of divisions of the first terminals, it is necessary to reduce the thickness of the electrode layer itself that constitutes the first terminals in order to prevent a short circuit between the divided terminals. As a result, a first terminal that is thin and divided into a plurality of portions is provided above the capacitor part of the electronic component, and a cross-sectional area is made smaller than the conventional one above each of the divided first terminals. A via conductor will be provided.

  On the other hand, on the second terminal side, which is different from the active component side, the number of terminals is made smaller than that of the first terminals. Therefore, the number of via conductors provided in the terminals is also different. As a result, the thickness of the terminal, the number of vias, and the like are different between the terminal on the active component side and the surrounding structure, and the terminal on the opposite side and the surrounding structure with the capacitor portion interposed therebetween. With such a structure, there is a difference in stress generated in the vicinity of the terminal between the active component side and the opposite side. Specifically, on the first terminal side on the active component side, inward stress is applied in the direction in which adjacent terminals approach each other, and on the second terminal side on the opposite side, compared to the first terminal side. It will be in the state where an outward stress is applied. As a result, the electronic component may be deformed so that the second terminal side is warped. Even if the electronic component is not deformed, the contactability between the terminal and the via may be lowered, and the connection reliability may be lowered.

  On the other hand, in the electronic component built-in substrate 1 according to this embodiment, the number (division number) N1 of the first terminals 21 and the number (division number) N2 of the second terminals 22 satisfy N1> N2. The thickness T1 of the first terminal 21 and the thickness T2 of the second terminal 22 satisfy T1 <T2. Further, in the electronic component 20, the ground area S1 between the first via conductor 33 and the end face 21a of the first terminal 21 and the ground area S2 between the second via conductor 34 and the end face 22a of the second terminal 22 are S1 ≦ S2.

  The inventors of the present application considered that the difference in stress generated between the first terminal 21 side and the second terminal 22 side across the capacitor portion is related to the number of via conductors. That is, the difference in material between the via conductor extending in the thickness direction from the end face of the terminal and the insulating material (in this embodiment, the insulating layer 11) provided around the via conductor is that the terminals approach each other. The inventors of the present application considered that the stress in the direction was affected. In addition, when inward stress is applied, the first terminal 21 having a small thickness is divided more finely than the second terminal 22 on the first terminal 21 side. It was thought that it was easy to do.

  Therefore, on the second terminal 22 side, the thickness of the terminal is made larger than that of the first terminal 21 so that deformation against stress can be suppressed. Furthermore, the ground area with respect to the end face 22 a of the second via conductor 34 extending from the end face 22 a of the second terminal 22 is made larger than the ground area between the end face 21 a of the first terminal 21 and the first via conductor 33. As a result, since the inward stress is generated by providing the second via conductor 34 also on the second terminal 22 side, the difference in stress between the first terminal 21 side and the second terminal 22 side is reduced. Further, since the ground area of the second via conductor 34 is larger than that of the first via conductor 33, the number of via conductors is smaller than that of the first via conductor 33 side, but inward stress generated by each via conductor. Becomes larger. Therefore, the difference in stress between the second via conductor 34 side (second terminal 22 side) and the first via conductor 33 side (first terminal 21 side) is reduced, and the first via conductor 33 side is subjected to the stress received. Deformation on the first via conductor 33 side is suppressed. In this way, the deformation of the electronic component 20 is suppressed by preventing the stress from being concentrated on the first via conductor 33 side.

  Further, since the deformation of the electronic component 20 is suppressed, the connection between the end surface 21a of the first terminal 21 and the first via conductor 33 is sufficiently ensured, and as a result, the connection reliability of the electronic component is reduced. Can be suppressed. Further, when the deformation of the electronic component 20 is suppressed, the connection between the end face 22a of the second terminal 22 and the second via conductor 34 is sufficiently ensured. As described above, according to the electronic component built-in substrate 1 and the substrate mounting structure 100 including the electronic component built-in substrate 1 according to the present embodiment, the number of divisions of the first terminals 21 on the active component 42 side increases. Even if it exists, it can prevent that the electronic component 20 deform | transforms, and can suppress the fall of the connection reliability of the electronic component 20. FIG.

  In the substrate mounting structure 100, the first terminal 21 of the electronic component built-in substrate 1 is connected to the active component 42 side, and the second terminal 22 is connected to the circuit board 44 on the power source side. While realizing low ESL, it is possible to suppress a decrease in connection reliability of the electronic component 20.

  As an example in which the number of first terminals 21 (number of divisions) N1 and the number of second terminals 22 (number of divisions) N2 satisfy the relationship N1> N2, in the above embodiment, N1 = 5 (first terminal 21 is divided into five) and N2 = 2 (the second terminal 22 is divided into two). However, the combination of N1 and N2 can be changed as appropriate. That is, it can be changed within a range in which the divided terminals function effectively. For example, the difference between N1 and N2 may be increased such that N1 = 25 and N2 = 1. Further, the number of divisions on the second terminal 22 side may be increased such that N1 = 25 and N2 = 4. The number of divisions is appropriately set according to the area of the region functioning as the first terminal 21 and the second terminal 22.

  In addition, the thickness T1 of the first terminal 21 and the thickness T2 of the second terminal 22 satisfy the relationship of T1 <T2, but the first terminal 21 and the second terminal 22 are divided even after the division with respect to the difference between T1 and T2. As long as it functions as a terminal, it can be changed as appropriate.

  The ground area S1 between the first via conductor 33 and the end face 21a of the first terminal 21 and the ground area S2 between the second via conductor 34 and the end face 22a of the second terminal 22 satisfy the relationship of S1 ≦ S2. However, the difference between S1 and S2 can be changed as appropriate as long as the first via conductor 33 and the second via conductor 34 function appropriately as via conductors and no short circuit occurs. However, when the difference in the number of via conductors is large, the stress due to the provision of the via conductors affects the deformation of the electronic component 20 as described above. Therefore, in order to suppress the difference in stress, S1 = S2. If S1 <S2, the deformation of the electronic component can be suppressed.

  In the above embodiment, each of the plurality of first terminals 21 and the plurality of second terminals 22 after the division has a structure in which one via conductor is provided for one terminal. A plurality of via conductors may be provided for one terminal. The number of via conductors is appropriately changed according to the connection destination of the current flowing through the terminal. However, when the number of the first via conductors 33 on the first terminal 21 side increases, the inward stress becomes larger as described above, and thus the size of the second via conductor 34 on the second terminal 22 side. It is preferable to adjust the thickness (the ground contact area with the second terminal 22), the thickness of the second terminal 22, and the like.

  In the above embodiment, the number (division number) N1 of the first terminals 21 and the number (division number) N2 of the second terminals 22 in the electronic component 20 satisfy N1> N2, and the thickness of the first terminal 21 is the same. The case where T1 and the thickness T2 of the second terminal 22 satisfy T1 <T2 has been described. However, even when the electronic component 20 does not satisfy T1 <T2 (that is, when T1 ≧ T2), the grounding between the first via conductor 33 and the end face 21a of the first terminal 21 as described above. Since the area S1 and the ground area S2 between the second via conductor 34 and the end face 22a of the second terminal 22 satisfy the relationship of S1 ≦ S2, the electronic component 20 is deformed due to the difference in the number of via conductors. It is possible to prevent the deterioration of the connection reliability of the electronic component 20.

  As mentioned above, although embodiment of this invention has been described, this invention is not limited to said embodiment, A various change can be made.

  For example, the structure of parts different from the electronic component 20, the via conductor 30 (the first via conductor 33 and the second via conductor 34), and the insulating layer 11 included in the electronic component built-in substrate 1 can be changed as appropriate. The substrate 10 may be configured without including the core 12.

  In the above embodiment, the example in which the insulating layer 11 is a single layer and the insulating layer 11 forms the first main surface 10A and the second main surface 10B of the substrate 10 has been described. A plurality of insulating layers may be included. In this case, for example, the first via conductor 33 extending from the end face 21a of the first terminal 21 is provided in one insulating layer, and the second via conductor 34 extending from the end face 22a of the second terminal 22 is defined as one insulating layer. It may be provided in another different insulating layer. In this case, the two insulating layers may be made of a material different from the material forming the insulating layer. Further, the insulating layer 11 may be present as a single layer as shown in FIG. 2 or the like, or a plurality of types of materials may be laminated in layers.

  In the above embodiment, the number (division number) of the first terminals 21 connected to the active component 42 side of the electronic component 20 is N1, and the number (division number) of the second terminals 22 connected to the power supply side is N1. In the case of N2, the example where N1> N2 has been described, but the connection target of the first terminal 21 and the second terminal 22 of the electronic component 20 is not limited to the above. That is, for example, the first terminal 21 may be connected to the power supply side, and the second terminal 22 may be connected to the active component side.

  DESCRIPTION OF SYMBOLS 1 ... Electronic component built-in substrate, 10 ... Board | substrate, 10A ... 1st main surface, 10B ... 2nd main surface, 11 ... Insulating layer, 12 ... Core, 13 ... Through-hole, 20 ... Electronic component, 21 ... 1st terminal, 22 ... second terminal, 22a ... end face, 23 ... capacitor, 30 ... via conductor, 31 ... first external terminal, 32 ... second external terminal, 33 ... first via conductor, 34 ... second via conductor, 42 ... Active component, 44... Circuit board.

Claims (4)

A substrate having a first main surface and a second main surface opposite to the first main surface;
A first terminal built in the substrate and provided on the first main surface side, a second terminal provided on the second main surface side, and provided between the first terminal and the second terminal. An electronic component having a capacitive part;
A first via conductor formed in an insulating layer included in the substrate, electrically connected to the first terminal and extending toward the first main surface;
A second via conductor formed in an insulating layer included in the substrate, electrically connected to the second terminal and extending to the second main surface side;
Have
The number N1 of the first terminals and the number N2 of the second terminals satisfy N1> N2.
The electronic component built-in substrate, wherein a ground area S1 between the first via conductor and the first terminal and a ground area S2 between the second via conductor and the end face of the second terminal satisfy S1 ≦ S2.   The plurality of first via conductors are connected to one first terminal, or the plurality of second via conductors are connected to one second terminal. The electronic component built-in substrate described.   The electronic component built-in substrate according to claim 1 or 2, wherein a thickness T1 of the first terminal and a thickness T2 of the second terminal satisfy T1 <T2.   It is a board | substrate mounting structure containing the electronic component built-in board | substrate as described in any one of Claims 1-3, Comprising: The said 1st terminal is connected to an active component and the said 2nd terminal is connected to the power supply side. PCB mounting structure.

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