JP2018174224A - Photodetector - Google Patents

Abstract

PROBLEM TO BE SOLVED: To temperature-compensate the detection sensitivity of an SPAD in a photodetector using the SPAD.SOLUTION: A photodetector 1 includes a detection unit 2 that detects light by applying a reverse bias voltage to an SPAD 4, an adjustment amount setting unit 20 that sets an adjustment amount of the reverse bias voltage on the basis of output from the detection unit 2, and a voltage control unit 10 that controls the reverse bias voltage on the basis of the adjustment amount set by the adjustment amount setting unit.SELECTED DRAWING: Figure 1

Description

  The present disclosure relates to a photodetector using the avalanche effect.

  In Patent Document 1, in a photodetector using an avalanche photodiode (hereinafter referred to as APD), in order to perform temperature compensation of APD, the temperature characteristic of current amplification factor is substantially the same as that of APD, and the reference is reverse-biased. It is disclosed to use a joint structure.

  In this photodetector, a transistor having a current injection junction structure for injecting a reference current into the reference junction structure is used and applied to the APD and the reference junction structure so as to keep the amplification factor of the reference current at a predetermined value. By controlling the voltage, the multiplication factor of the APD is controlled.

Japanese Patent No. 5211095

  Since the APD is temperature-compensated and controlled by controlling the multiplication factor of the APD, the one disclosed in Patent Document 1 is effective in the linear mode in which a reverse bias voltage lower than the breakdown voltage is applied to the APD.

However, the technique disclosed in the cited document 1 cannot be applied to a photodetector that operates the APD in the Kaiger mode.
That is, the APD operating in the Geiger mode is called SPAD, and the reverse bias voltage is set to a voltage value higher than the breakdown voltage. SPAD is an abbreviation for Single Photon Avalanche Diode.

  Since SPAD breaks down when photons are incident, a photodetector using SPAD is configured to output a pulse signal having a predetermined pulse width when SPAD is broken down.

  Therefore, the output of the photodetector using SPAD is “1” or “0”, and this type of photodetector has no concept of controlling the multiplication factor. For this reason, it is difficult to temperature compensate the detection sensitivity by SPAD using the technique disclosed in Patent Document 1.

  In one aspect of the present disclosure, in a photodetector using SPAD, it is desirable to be able to compensate for temperature of SPAD detection sensitivity, more specifically, SPAD photon detection sensitivity.

  The photodetectors (1A to 1D) according to one aspect of the present disclosure include a detection unit (2), an adjustment amount setting unit (20, 24, 28, 36, 44), and a voltage control unit (10). . The detection unit includes SPAD (4), and performs light detection by applying a reverse bias voltage to SPAD.

  The adjustment amount setting unit sets the adjustment amount of the reverse bias voltage based on the output from the detection unit, and the voltage control unit controls the reverse bias voltage based on the adjustment amount set by the adjustment amount setting unit. To do.

Hereinafter, the reason will be described.
First, in a photodetector using SPAD, a reverse bias voltage exceeding the breakdown voltage is applied to SPAD, a photon is incident on SPAD, and a detection signal is output based on the current that flows when SPAD is broken down.

  Since the breakdown voltage of SPAD changes depending on the temperature, if the reverse bias voltage applied to SPAD is constant, the excess voltage obtained by subtracting the breakdown voltage from the reverse bias voltage also changes depending on the temperature. The detection sensitivity changes due to the voltage change.

  Therefore, in the photodetector of the present disclosure, the detection sensitivity of SPAD is temperature-compensated by controlling the reverse bias voltage applied to SPAD based on the output from the detector that changes according to the excess voltage.

  For this reason, according to the photodetector of the present disclosure, it becomes possible to perform light detection with a desired detection sensitivity without being affected by the temperature change of the SPAD, and it is possible to suppress a change in detection accuracy due to the temperature. it can.

  In addition, the code | symbol in the parenthesis described in this column and a claim shows the correspondence with the specific means as described in embodiment mentioned later as one aspect, Comprising: The technical scope of this invention is shown. It is not limited.

It is a block diagram showing the structure of the photodetector of 1st Embodiment. It is explanatory drawing showing the output change of the detection part produced by the temperature change of SPAD. It is a block diagram showing the structure of the photodetector of 2nd Embodiment. It is a block diagram showing the structure of the photodetector of 3rd Embodiment. It is a block diagram showing the structure of the photodetector of 4th Embodiment. It is a block diagram showing the structure of the photodetector of a 1st modification. It is a block diagram showing the structure of the photodetector of a 2nd modification. It is a flowchart showing operation | movement of the pulse width comparison part of a 2nd modification.

Embodiments of the present invention will be described below with reference to the drawings.
[First Embodiment]
As shown in FIG. 1, the photodetector 1 </ b> A according to the first embodiment includes a detection unit 2 including a SPAD 4, a quenching resistor 6, and a pulse conversion unit 8.

The SPAD 4 is an APD that can operate in the Geiger mode as described above, and the quenching resistor 6 is connected in series to the energization path to the SPAD 4.
The quenching resistor 6 is for stopping a Geiger discharge of the SPAD 4 by generating a voltage drop due to a current flowing through the SPAD 4 when a photon enters the SPAD 4 and the SPAD 4 is broken down.

  The voltage across the quenching resistor 6 is input to the pulse converter 8 as the detection signal V1. The quenching resistor 4 may be configured by a “resistor” which is a so-called general passive element, or may be configured by an active element such as a “transistor”.

  As shown in FIG. 2, the pulse converter 8 outputs a digital pulse V2 that is “1” when the detection signal V1 is equal to or higher than a preset threshold voltage Vth, and is “0” otherwise. It is configured.

Here, SPAD4 operates by applying a reverse bias voltage V _SPAD that is greater than the breakdown voltage. If the reverse bias voltage V _SPAD is constant, the peak voltage of the detection signal V1, that is, a digital pulse is applied. The pulse width Tp of V2 changes according to the temperature of SPAD4.

This is because the breakdown voltage of the SPAD 4 changes according to the temperature and increases as the temperature increases. That is, as shown in FIG. 2, the peak voltage of the detection signal V1 is substantially the same as the excess voltage V _{EX obtained} by subtracting the breakdown voltage of SPAD4 from the reverse bias voltage V _SPAD, and thus becomes smaller as the temperature increases. Therefore, the pulse width Tp of the digital pulse V2 becomes narrower as the temperature of the SPAD4 is higher.

On the other hand, the detection sensitivity by SPAD4 varies by excess voltage _{V EX} of SPAD4, the higher the excess voltage _{V EX} of SPAD4, detection sensitivity is high. Therefore, when the excess voltage _{V EX} of SPAD4 varies with temperature, also changes the detection sensitivity of SPAD4, the higher the temperature, the detection sensitivity is lowered.

Therefore, the photodetector 1A according to the present embodiment includes a pulse width comparison unit 20 that detects a difference ΔT between the pulse width Tp of the digital pulse V2 and a preset reference pulse width, and a difference ΔT between the pulse widths. And a voltage control unit 10 for controlling the reverse bias voltage V _SPAD .

The pulse width comparator unit 20, the pulse width Tp of the digital pulse V2, incorporation as a parameter representing the excess voltage V _EX of SPAD4, by comparing the pulse width and a reference pulse width determines the difference △ T of the pulse width It is configured as follows.

For the pulse width comparison unit 20, for example, an arithmetic circuit that quantifies the pulse width of the digital pulse V2 and the reference pulse width and calculates the difference between them can be used.
The pulse width comparison unit 20 obtains a difference ΔT between the pulse width Tp of the digital pulse V2 and the reference pulse width, and thereby detects the deviation of the excess voltage V _{EX from} the reference excess voltage as an adjustment amount of the reverse bias voltage V _SPAD. It is set and functions as an adjustment amount setting unit of the present disclosure.

Further, the voltage controller 10 reverse biases so that the difference ΔT in the pulse width detected by the pulse width comparator 20 is zero, a constant value, a predetermined range value, or a predetermined value or less. By controlling the voltage V _SPAD , the excess voltage V _EX is controlled to the reference excess voltage corresponding to the reference pulse width.

Specifically, for example, when the pulse width of the digital pulse V2 is smaller than the reference pulse width, the voltage control unit 10 increases the reverse bias voltage V _SPAD according to the pulse width difference ΔT. When the pulse width of the digital pulse V2 is larger than the reference pulse width, the reverse bias voltage V _SPAD is decreased according to the pulse width difference ΔT.

As a result, according to the photodetector 1A of the present embodiment, also vary with temperature breakdown voltage of SPAD4, be controlled to excess voltage V _EX is the voltage value of the reference excess voltage or reference excess voltage near The detection sensitivity of SPAD4 can be temperature compensated.

Therefore, according to the photodetector 1A of the present embodiment, light detection can be performed with a desired detection sensitivity without being affected by the temperature change of the SPAD 4, and the detection accuracy changes depending on the temperature. Can be suppressed.
[Second Embodiment]
As shown in FIG. 3, the photodetector 1 </ b> B of the second embodiment has the same basic configuration as the photodetector 1 </ b> A of the first embodiment, and is different from the first embodiment in that the adjustment amount setting of the present disclosure is set. As a unit, a pulse width comparison circuit 24 is provided instead of the pulse width comparison unit 20.

Therefore, in the present embodiment, the same components as those in the first embodiment will be given the same reference numerals in the drawings, and detailed description thereof will be omitted, and differences from the first embodiment will be described.
As shown in FIG. 3, the photodetector 1B of the present embodiment includes a reference pulse generator that generates a reference pulse having a constant pulse width in synchronization with the rising timing of the digital pulse V2 output from the pulse converter 8. 22 is provided.

The reference pulse generated by the reference pulse generator 22 is input to the pulse width comparison circuit 24 together with the digital pulse V 2 output from the pulse conversion unit 8. Therefore, the pulse width comparison circuit 24 outputs a pulse signal having a pulse width corresponding to the pulse width difference ΔT between the digital pulse V2 and the reference pulse as an adjustment amount of the reverse bias voltage V _SPAD. .

  The pulse width comparison circuit 24 is composed of, for example, a comparator. If the level of each pulse is the same, it becomes an intermediate potential, the input level of the digital pulse V2 is “0”, and the input level of the reference pulse is If “1”, a positive pulse signal higher than the intermediate potential is output. Further, when the input level of the digital pulse V2 is “1” and the input level of the reference pulse is “0”, a negative pulse signal lower than the intermediate potential is output.

  Next, the output from the pulse width comparison circuit 24 is input to the voltage conversion circuit 26. If the pulse signal from the pulse width comparison circuit 24 is a positive pulse signal, the voltage conversion circuit 26 outputs a positive voltage signal Vt corresponding to the pulse width to the voltage control unit 10. Further, if the pulse signal from the pulse width comparison circuit 24 is a negative pulse signal, the voltage conversion circuit 26 outputs a negative voltage signal Vt corresponding to the pulse width to the voltage control unit 10.

If the voltage signal Vt input from the voltage conversion circuit 26 is positive, the voltage controller 10 increases the reverse bias voltage V _SPAD according to the voltage value of the voltage signal Vt, and the voltage signal Vt is negative. If there is, the reverse bias voltage V _SPAD is lowered according to the voltage value of the voltage signal Vt.

As a result, also in the photodetector 1B of the present embodiment, the excess voltage V _{EX of the} SPAD 4 is detected from the pulse width of the digital pulse V2, and the excess voltage V _EX becomes the reference excess voltage corresponding to the pulse width of the reference pulse. Thus, the reverse bias voltage V _SPAD can be controlled.

Therefore, in the photodetector 1B of the present embodiment, as in the photodetector 1A of the first embodiment, it is possible to perform light detection with a desired detection sensitivity without being affected by the temperature change of the SPAD 4. Therefore, it is possible to suppress the detection accuracy from changing depending on the temperature.
[Third Embodiment]
As shown in FIG. 4, the photodetector 1 </ b> C according to the third embodiment has the same basic configuration as the photodetector 1 </ b> A according to the first embodiment, and is different from the first embodiment in that an adjustment amount setting according to the present disclosure is set. As a unit, instead of the pulse width comparison unit 20, a voltage conversion unit 30 and a voltage comparison circuit 36 are provided.

Therefore, in the present embodiment, the same components as those in the first embodiment will be given the same reference numerals in the drawings, and detailed description thereof will be omitted, and differences from the first embodiment will be described.
The voltage converter 30 converts the digital pulse V2 output from the pulse converter 8 into a voltage signal having a voltage value corresponding to the pulse width of the digital pulse V2, and takes in the digital pulse V2 via the buffer 31. The capacitor 32 is configured to be charged.

  That is, when the digital pulse V2 is at a high level of “1”, the capacitor 32 is charged with the digital pulse V2 so that the pulse width of the digital pulse V2 can be detected from the voltage across the capacitor 32. It is.

  Therefore, the voltage conversion unit 30 includes a switching element 33 that is turned on when the digital pulse V <b> 2 is at a high level “1” and charges the capacitor 32 via the buffer 31.

  In addition, the voltage conversion unit 30 inputs the voltage across the capacitor 32 to the voltage comparison circuit 36 as a voltage value corresponding to the pulse width of the digital pulse V2, so that the switching element that connects the capacitor 32 and the voltage comparison circuit 36 is connected. 35 and an inverter 34 are provided.

  The inverter 34 inverts and inputs the digital pulse V2, so that the switching element 35 is turned on when the digital pulse V2 is at a low level of “0”, and the voltage across the capacitor 32 is compared with the voltage. This is for input to the circuit 36.

  Based on the input signal from the inverter 34, the voltage comparison circuit 36 latches the voltage across the capacitor 32 at the timing when the switching element 35 is turned on and the voltage across the capacitor 32 is input. The reference voltage Vref is compared.

  The reference voltage Vref is a voltage value corresponding to the reference pulse width of each of the embodiments described above, and the voltage comparison circuit 36 compares the reference voltage Vref with the input voltage from the voltage conversion unit 30 to obtain the digital pulse V2. A voltage signal Vt corresponding to the difference ΔT between the pulse width and the reference pulse width is generated.

  The voltage comparison circuit 36 is composed of, for example, a differential amplifier circuit. When the input voltage from the voltage conversion unit 30 is lower than the reference voltage Vref, the voltage comparison circuit 36 generates a positive voltage signal Vt. When the input voltage is higher than the reference voltage Vref, a negative voltage signal Vt is generated.

The voltage signal Vt is input to the voltage control unit 10, and the voltage control unit 10 reverses according to the voltage value of the voltage signal Vt if the voltage signal Vt input from the voltage comparison circuit 36 is positive. If the bias voltage V _SPAD is raised and the voltage signal Vt is negative, the reverse bias voltage V _SPAD is lowered according to the voltage value of the voltage signal Vt.

As a result, also in the photodetector 1C of the present embodiment, the excess voltage V _{EX of the} SPAD 4 is detected from the pulse width of the digital pulse V2, and the excess voltage V _EX becomes a reference excess voltage corresponding to the reference voltage Vref. The reverse bias voltage V _SPAD can be controlled.

  Therefore, in the photodetector 1C of the present embodiment, similarly to the photodetectors 1A and 1B of the first and second embodiments, light detection is performed with a desired detection sensitivity without being affected by the temperature change of the SPAD 4. As a result, the detection accuracy can be prevented from changing depending on the temperature.

  If the voltage comparison circuit 36 latches the voltage across the capacitor 32 and then holds the capacitor 32 in a charged state, the voltage of the capacitor 32 will be digital when the capacitor 32 is next charged with the digital pulse V2. It becomes higher than the pulse width of the pulse V2.

  For this reason, the photodetector 1C of the present embodiment includes a switching element 37 that discharges the electric charge accumulated in the capacitor 32, and a delay circuit 38 that delays the input from the inverter 34 and captures it as a drive signal for the switching element 37. Is provided.

As a result, after the voltage comparison circuit 36 latches the voltage across the capacitor 32, the voltage conversion unit 30 discharges the charge accumulated in the capacitor 32 and is reset to the initial state.
[Fourth Embodiment]
In the photodetectors 1A to 1C of the first to third embodiments described above, it has been described that the excess voltage V _{EX of the} SPAD 4 is detected from the pulse width of the digital pulse V2.

However, as shown in FIG. 2, the excess voltage V _EX of SPAD4 corresponds to the voltage amplitude Vsig of the detection signal V1 when SPAD4 is broken down. Therefore, by detecting this voltage amplitude Vsig, capable of detecting the excess voltage _{V EX.}

Therefore, in the fourth embodiment, a photodetector 1D configured to detect the excess voltage V _{EX of} SPAD4 based on the voltage amplitude Vsig of the detection signal V1 and set the adjustment amount of the reverse bias voltage V _SPAD will be described. To do.

  As shown in FIG. 5, the photodetector 1 </ b> D of the present embodiment includes a detection unit including a SPAD 4, a quenching resistor 6, and a pulse conversion unit 8, similar to the photodetectors 1 </ b> A to 1 </ b> C of the above-described embodiments. 2 is provided.

  The photodetector 1D of this embodiment includes a voltage amplitude measuring circuit 42 that measures the voltage amplitude Vsig of the detection signal V1 by peak-holding the detection signal V1, and a correction voltage from the measured voltage amplitude Vsig. A correction voltage calculation unit 44 for calculating ΔV is provided.

The correction voltage calculation unit 44 functions as an adjustment amount setting unit of the present disclosure, and calculates the difference between the voltage amplitude Vsig measured by the voltage amplitude measurement circuit 42 and the reference excess voltage, as a correction voltage ΔV of the reverse bias voltage V _SPAD. It is comprised so that it may calculate as.

  The correction voltage calculation unit 44 corrects the correction voltage ΔV when the voltage amplitude Vsig of the detection signal is lower than the reference excess voltage, and corrects the voltage when the voltage amplitude Vsig of the detection signal is higher than the reference excess voltage. The correction voltage ΔV is calculated so that ΔV becomes a negative voltage.

Further, the photodetector 1D of the present embodiment includes a voltage addition circuit 46 as a voltage control unit of the present disclosure. The voltage addition circuit 46 adds the correction voltage ΔV calculated by the correction voltage calculation unit 44 to the reverse bias voltage V _SPAD so that the voltage amplitude Vsig corresponding to the excess voltage becomes the reference excess voltage. The bias voltage V _SPAD is corrected.

For this reason, also in the photodetector 1D of this embodiment, the reverse bias voltage V _SPAD can be controlled so that the excess voltage V _EX becomes the reference excess voltage, and the detection sensitivity of the _{SPAD 4} can be temperature compensated. It is possible to suppress the detection accuracy from changing depending on the temperature.

As mentioned above, although embodiment of this indication was described, the photodetector of this indication is not limited to the above-mentioned embodiment, and can carry out various modifications.
[First Modification]
For example, in each of the above embodiments, the pulse width comparison unit 20, the pulse width comparison circuit 24, and the voltage comparison circuit 36 that function as the adjustment amount setting unit are simply the digital pulse V 2 that is output from the detection unit 2 or the detection. It has been described that the adjustment amount is set based on the signal V1.

  However, since the output from the detection unit 2 may fluctuate due to the influence of measurement error and noise, the adjustment amount setting unit sets the adjustment amount based on the output from the detection unit 2 a plurality of times. You may comprise.

  For example, the photodetector 1E shown in FIG. 6 is provided with an averaging unit 28 in the photodetector 1A of the first embodiment to average the pulse width difference ΔT output from the pulse width comparison unit 20, It is configured to output to the voltage controller 10.

Thus, will be able to set the adjustment amount of the reverse bias voltage V _SPAD based on a plurality of times of output from the detection unit 2, the reverse bias voltage V _SPAD is affected by measurement error or noise of the detection unit 2 Can be suppressed.

The averaging unit 28 is a so-called low-pass filter, and can be configured by an analog circuit such as an integration circuit, or can be configured by a digital circuit that performs an averaging process.
The averaging unit 28 may be configured to measure the output from the detection unit 2 a plurality of times, obtain an average, and input the average to an adjustment amount setting unit such as the pulse width comparison unit 20.
[Second Modification]
In addition, the pulse width comparison unit 20, the pulse width comparison circuit 24, and the voltage comparison circuit 36 including the averaging unit 28 may be configured as one of synchronization circuits that operate in synchronization with a clock having a fixed period. it can.

  For example, the photodetector 1F shown in FIG. 7 is obtained by configuring the pulse width comparison unit 20 with a synchronous circuit in the photodetector 1A of the first embodiment. In this case, the digital pulse V <b> 2 output from the detection unit 2 is input to the pulse width comparison unit 20 via the sampling circuit 21. The sampling circuit 21 is a well-known one that latches the digital pulse V2 in synchronization with the clock CLK.

  The pulse width comparison unit 20 measures the pulse width based on the value of the digital pulse V2 latched by the sampling circuit 21 and outputs a voltage control signal to the voltage control unit 10 in the procedure shown in FIG.

  That is, the pulse width comparison unit 20 determines whether or not the digital pulse V2 is output from the detection unit 2 by determining whether or not the input from the sampling circuit 21 is a value 1 in S110. To do.

  In S110, if it is determined that the digital pulse V2 is not output from the detection unit 2, the process of S110 is executed again to wait for the digital pulse V2 to be output, and the digital pulse V2 is output. If it is determined that there is, the process proceeds to S120.

  In S120, the pulse width of the digital pulse V2 is measured by counting the duration of the digital pulse V2 from the detection unit 2 based on the input from the sampling circuit 21, and in S130, the count value of the pulse width is measured. Is compared with the set value.

In S140, a voltage control signal to be output to the voltage controller 10 is set according to the comparison result in S130, and the process proceeds to S110.
That is, in S140, the reverse bias voltage V _SPAD is increased when the pulse width count value is smaller than the set value, and the reverse bias voltage V _SPAD is decreased when the pulse width count value is larger than the set value. As described above, the voltage control signal output to the voltage controller 10 is changed.

In S140, if the count value of the pulse width is the same as the set value or is within an allowable range centered on the set value, the voltage control signal is held in the current state and the reverse bias voltage V _SPAD is set. Let it be maintained.

Therefore, the reverse bias voltage V _SPAD can be controlled similarly to the photodetector 1A of the first embodiment even if the pulse width comparison unit 20 is configured by a synchronous circuit as described above.
[Third Modification]
In each of the above-described embodiments, the reverse bias voltage applied to SPAD 4 is simply controlled based on the output from SPAD 4. However, SPAD 4 whose reverse bias voltage is controlled may be dedicated to temperature compensation.

  That is, the SPAD 4 of each of the above embodiments is used for temperature compensation, and the temperature-compensated bias voltage applied to the SPAD 4 is used as the reverse bias voltage of another SPAD. By doing so, it becomes possible to perform temperature compensation of other SPADs using the SPAD 4 dedicated to temperature compensation.

  In addition, a plurality of functions of one constituent element in the above embodiment may be realized by a plurality of constituent elements, or a single function of one constituent element may be realized by a plurality of constituent elements. Further, a plurality of functions possessed by a plurality of constituent elements may be realized by one constituent element, or one function realized by a plurality of constituent elements may be realized by one constituent element. Moreover, you may abbreviate | omit a part of structure of the said embodiment. In addition, at least a part of the configuration of the above embodiment may be added to or replaced with the configuration of the other embodiment. In addition, all the aspects included in the technical idea specified only by the wording described in the claim are embodiment of this invention.

  DESCRIPTION OF SYMBOLS 1A-1F ... Photodetector, 2 ... Detection part, 4 ... SPAD, 6 ... Quenching resistance, 8 ... Pulse conversion part, 10 ... Voltage control part, 20 ... Pulse width comparison part, 24 ... Pulse width comparison circuit, 28 ... Averaging unit 36... Voltage comparison circuit 44. Correction voltage calculation unit 46.

Claims (7)

A detection unit (2) that includes a SPAD (4) and performs light detection by applying a reverse bias voltage to the SPAD;
An adjustment amount setting unit (20, 24, 28, 36, 44) for setting an adjustment amount of the reverse bias voltage based on an output from the detection unit;
A voltage controller (10, 46) for controlling the reverse bias voltage based on the adjustment amount set by the adjustment amount setting unit;
A photodetector. The adjustment amount setting unit (20, 24, 28, 36, 44) detects an excess voltage of the SPAD based on an output from the detection unit, and sets the adjustment amount based on the excess voltage. The photodetector according to 1. The detection unit includes a pulse conversion unit (8) that converts an output from the SPAD into a digital pulse,
The photodetector according to claim 2, wherein the adjustment amount setting unit (20, 24, 36) is configured to detect the excess voltage from a pulse width of the digital pulse.   The adjustment amount setting unit (20, 24) compares the digital pulse with a reference pulse corresponding to a reference excess voltage, and is configured to set the adjustment amount based on a difference in pulse width. 4. The photodetector according to 3.   The adjustment amount setting unit (36) includes a voltage conversion unit (30) that converts the digital pulse into a voltage corresponding to the pulse width of the digital pulse, and the voltage converted by the voltage conversion unit and a reference pulse The photodetector according to claim 3, configured to compare a reference voltage corresponding to a width and set the adjustment amount based on a difference between the voltages.   The light according to claim 1 or 2, wherein the adjustment amount setting unit (44) is configured to set the adjustment amount based on an amplitude of a voltage signal output from the SPAD in the detection unit. Detector.   The light according to any one of claims 1 to 6, wherein the adjustment amount setting unit (28) is configured to set the adjustment amount based on a plurality of outputs from the detection unit. Detector.