JP2016225360A - Through electrode substrate, and interposer and semiconductor device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly-reliable through electrode substrate and a method of manufacturing the same.SOLUTION: Provided is a through electrode substrate comprising: a substrate that has a first surface and a second surface opposed to the first surface; a through hole that penetrates through the first surface and the second surface, and that has a shape having a major axis and a minor axis in a plan view; and a through electrode arranged at the through hole, and that electrically connects between wiring arranged at the first surface side and wiring arranged at the second surface side. An aspect ratio of a depth of the through hole to the major axis of the through hole is equal to or less than 4.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a through electrode substrate, an interposer using the through electrode substrate, and a semiconductor device, and more particularly, to a shape of a through hole formed in the through electrode substrate.

  In recent years, integrated circuits have become more miniaturized and complicated with higher performance of integrated circuits. In such an integrated circuit, a connection terminal for inputting a power supply and a logic signal necessary for circuit operation from an external device (chip) is arranged. However, the connection terminals on the integrated circuit are arranged at a very narrow pitch due to the miniaturization and complexity of the integrated circuit, which is several to several tens of times smaller than the pitch of the connection terminals of the chip.

  As described above, an interposer serving as an intermediary substrate for converting the pitch size of connection terminals is used when an integrated circuit and a chip having different connection terminal pitches are connected. In the interposer, an integrated circuit is mounted on the wiring arranged on one surface of the substrate, a chip is mounted on the wiring arranged on the other surface, and the wiring arranged on both sides of the substrate is connected to the substrate. They are connected by penetrating through electrodes.

  As the interposer, TSV (Through-Silicon Via) which is a through electrode substrate using a silicon substrate and TGV (Through-Glass Via) which is a through electrode substrate using a glass substrate have been developed (for example, Patent Document 1). And Patent Document 2). In particular, in the case of TGV, for example, it can be manufactured using a large glass substrate having a vertical and horizontal size of 730 mm × 920 mm called the 4.5th generation, which is advantageous in that the manufacturing cost can be reduced. is there. Moreover, in the case of TGV, it is advantageous at the point which can expand | deploy to the components using the transparency which is the characteristic of a glass substrate.

JP 2006-147971 A JP 2013-110347 A

  However, when the aspect ratio of the through hole (hole depth with respect to the hole diameter) in TSV or TGV increases with the miniaturization and complexity of the integrated circuit, it is used for the embedding property of the through electrode filled in the through hole or the through electrode. As a result, the throwing power of the thin film is deteriorated. If the penetrating property of the through electrode or the throwing power of the through electrode is deteriorated, it becomes impossible to ensure electrical connection between the wirings arranged on both surfaces of the substrate. Moreover, even if the electrical connection between the wirings is barely ensured, the connection area of the through electrodes is reduced. In such a case, current concentrates on the through electrode formed in a partial region of the through hole, which causes problems such as destruction of the through electrode due to excessive self-heating. In other words, as described above, when the penetrating electrode is poorly embedded or attached, the reliability of the penetrating electrode substrate deteriorates.

  The present invention has been made in view of such a problem, and an object thereof is to provide a highly reliable through electrode substrate.

  A through electrode substrate according to an embodiment of the present invention includes a substrate having a first surface and a second surface opposite to the first surface, the first surface and the second surface, a long diameter and a plan view. A through-hole having a shape having a minor axis, a through-electrode that is disposed in the through-hole and electrically connects the wiring disposed on the first surface side and the wiring disposed on the second surface side, Is provided.

  According to the above-described through electrode substrate, it is possible to obtain good coverage of the through electrode with respect to the through hole.

  The through hole may be elliptical in plan view.

  According to the above-described through electrode substrate, it is possible to obtain good coverage of the through electrode with respect to the through hole.

  The aspect ratio of the depth of the hole to the major axis of the through hole may be 4 or less.

  According to the above-described through electrode substrate, it is possible to obtain good coverage of the through electrode with respect to the through hole.

  An interposer according to an embodiment of the present invention includes the above-described through electrode substrate, a first wiring structure connected to a wiring disposed on the first surface side of the through electrode substrate, and a second surface side of the through electrode substrate. And a second wiring structure connected to the wiring arranged in the.

  According to the above interposer, good throwing power of the through electrode with respect to the through hole can be obtained.

  A semiconductor device according to an embodiment of the present invention includes the above-described through electrode substrate and another substrate or a chip arranged side by side with the through electrode substrate.

  According to the above semiconductor device, it is possible to obtain a good throwing power of the through electrode with respect to the through hole.

  According to an embodiment of the present invention, there is provided a method of manufacturing a through electrode substrate, comprising forming a deteriorated layer on a part of a substrate having a first surface and a second surface facing the first surface, and etching the deteriorated layer. , Penetrating the first surface and the second surface, forming a through hole having a shape having a major axis and a minor axis in plan view, forming a seed layer in the through hole, and forming a plating layer on the seed layer Forming.

  According to the above method for manufacturing a through electrode substrate, the throwing power of the seed layer with respect to the side wall inside the through hole can be improved.

  The through hole may be elliptical in plan view.

  According to the above method for manufacturing a through electrode substrate, the throwing power of the seed layer with respect to the side wall inside the through hole can be improved.

  The aspect ratio of the depth of the hole to the major axis of the through hole may be 4 or less.

  According to the above method for manufacturing a through electrode substrate, the throwing power of the seed layer with respect to the side wall inside the through hole can be improved.

  The seed layer may be formed by a sputtering method.

  According to the above method for manufacturing the through electrode substrate, the seed layer can be formed using a conventional film forming apparatus and film forming process.

  According to the present invention, a highly reliable through electrode substrate can be provided.

It is a top view showing an outline of a penetration electrode substrate concerning one embodiment of the present invention. It is the elements on larger scale of the penetration electrode substrate concerning one embodiment of the present invention. It is a fragmentary perspective view of the penetration electrode substrate concerning one embodiment of the present invention. It is a fragmentary sectional view of the penetration electrode substrate concerning one embodiment of the present invention. It is a fragmentary sectional view of the penetration electrode substrate concerning one embodiment of the present invention. It is a top view which shows the outline | summary of the interposer which concerns on one Embodiment of this invention. It is a B-B 'sectional view of an interposer concerning one embodiment of the present invention. It is sectional drawing which shows the process of irradiating a laser beam inside a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a quality-change area | region in a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of etching the denatured area | region of a board | substrate using a chemical | medical solution in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a through-hole in a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a seed layer in the inside of a through-hole from the one surface side of a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a seed layer in the inside of a through-hole from the other surface side of a board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a plating layer on a seed layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of removing a resist mask in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of etching the seed layer exposed from the plating layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. In the manufacturing method of the interposer concerning one embodiment of the present invention, it is a sectional view showing the process of forming the insulating layer provided with the opening which exposes the wiring formed in the upper surface of the penetration electrode substrate. It is sectional drawing which shows the process of forming a seed layer on the wiring exposed to the insulating layer and opening part in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a plating layer on a seed layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of removing the resist mask on a seed layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of etching the seed layer exposed from the plating layer in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming the insulating layer provided with the opening part which exposes the wiring formed in the lower surface of the penetration electrode board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is sectional drawing which shows the process of forming a seed layer and a plating layer in the lower surface side of a penetration electrode board | substrate in the manufacturing method of the interposer which concerns on one Embodiment of this invention. It is a sectional view showing a semiconductor device using a penetration electrode substrate concerning one embodiment of the present invention. It is sectional drawing which shows another example of the semiconductor device using the penetration electrode substrate which concerns on one Embodiment of this invention. It is sectional drawing which shows another example of the semiconductor device using the penetration electrode substrate concerning one embodiment of the present invention.

  Hereinafter, a through electrode substrate, a manufacturing method of a through electrode substrate, an interposer using the through electrode substrate, and a semiconductor device according to the present invention will be described with reference to the drawings. However, the through electrode substrate, the manufacturing method of the through electrode substrate, the interposer and the semiconductor device using the through electrode substrate of the present invention can be implemented in many different modes, and the description of the embodiments described below It is not construed as limited to. Note that in the drawings referred to in this embodiment, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted. In addition, for convenience of explanation, the description will be made using the terms “upper” or “lower”, but the vertical direction may be reversed.

  A through electrode substrate 10 according to an embodiment of the present invention will be described with reference to FIGS.

(First embodiment)
FIG. 1 is a plan view showing an outline of a through electrode substrate according to the first embodiment of the present invention. FIG. 2 is an enlarged view of a region A in the through electrode substrate shown in FIG. 3 is a perspective view of a region A in the through electrode substrate shown in FIG.

  As shown in FIG. 1, in the through electrode substrate 10 according to the first embodiment of the present invention, a through hole 103 is provided in the substrate 101. Further, as shown in FIG. 3, the through electrode substrate 10 is provided with a through electrode 107 in the through hole 103.

  The substrate 101 has a first surface 101a and a second surface 101b facing the first surface 101a. The substrate 101 is provided with a through hole 103 that penetrates the first surface 101a and the second surface 101b. Inside the through hole 103, a side wall that connects the first surface 101a and the second surface 101b is provided. 105 is provided.

  The through hole 103 provided in the through electrode substrate 10 has a shape having a major axis and a minor axis in plan view. In other words, the through hole 103 has a shape extended in one direction. 1 to 3, as an example, the through-hole 103 has an elliptical shape having a short axis in the x direction and a long axis in the y direction. The length (minor axis) of the minor axis of the through hole 103 having an elliptical shape is L1, and the length (major axis) of the major axis is L2. The aspect ratio of the depth of the hole to the long diameter L2 of the through hole 103 (hereinafter also referred to as the long diameter aspect ratio) is preferably 4 or less. Since the through hole 103 has an elliptical shape, the through hole 103 can be miniaturized in the minor axis direction, that is, in the x direction.

  A through electrode 107 is provided in the through hole 103. The through electrode 107 is disposed on the side wall 105. As shown in FIG. 3, the through electrode 107 is provided at least on the side walls 105 at both ends of the through hole 103 in the long axis direction (y direction). As described above, when the aspect ratio of the through hole (hole depth with respect to the hole diameter) is increased, the embedding property of the through electrode filled in the through hole or the throwing power of the thin film used for the through electrode is deteriorated. For example, when the seed layer is formed in the through hole by a film forming method such as a sputtering method, if the aspect ratio is larger than that of the through hole, the throwing power of the seed layer is deteriorated. In such a case, stable electrical connection between the wiring provided on the first surface 101a side of the substrate 101 and the wiring provided on the second surface 101b side (hereinafter referred to as “stable electrical connection of the upper and lower wirings”). There is a risk that the upper and lower wirings are electrically insulated.

  However, in the through electrode substrate 10 according to the first embodiment of the present invention, since the through hole 103 has an elliptical shape, the aspect ratio of the hole depth to the short diameter L1 of the through hole 103 (hereinafter referred to as a short diameter). (Also referred to as aspect ratio) is relatively large, but the aspect ratio of the major axis is relatively small. Therefore, at least at both ends of the through hole 103 in the long axis direction (y direction) having a relatively small aspect ratio, the long axis direction of the through hole 103 is formed when the seed layer is formed by a film forming method such as sputtering. Sputtering atoms incident obliquely from the first surface 101a side or the second surface 101b side of the substrate 101 with respect to (y direction) are sidewalls 105 at both ends in the long axis direction (y direction) of the through-hole 103. To reach the whole area. Therefore, at least at both ends in the long axis direction (y direction) of the through hole 103, good embedding property of the through electrode 107 filled in the through hole 103 or good throwing power of the thin film used for the through electrode 107 is maintained. Thus, the through electrode 107 can be formed. Therefore, stable electrical connection between the upper and lower wirings can be realized, and the reliability of the through electrode substrate 10 can be improved.

  4 is a cross-sectional view of the A region of the through electrode substrate 10 shown in FIG. 2 as viewed from the x direction along the YY ′ line, and FIG. 5 shows the A region of the through electrode substrate 10 shown in FIG. It is sectional drawing seen from the y direction along the XX 'line. When the seed layer 401 is formed by causing sputtering atoms to enter the through-hole 103 from the first surface 101a side and the second surface 101b side of the substrate 101 by sputtering, as shown in FIG. Since the ratio is relatively small, at the both ends of the long-axis direction (y direction) of the through-hole 103, sputtering atoms are deposited over the entire side wall 105 at both ends in the long-axis direction (y-direction) of the through-hole 103, In the through hole 103, the seed layer 401 can be formed from the first surface 101a side to the second surface 101b side. A plating layer 403 is formed on the seed layer 401 by electrolytic plating, and as shown in FIG. 4, the through electrode 107 is formed over the entire side wall 105 at both ends in the long axis direction (y direction) of the through hole 103. be able to.

  On the other hand, as shown in FIG. 5, since the aspect ratio of the short diameter of the through hole 103 is relatively large, the sputtering atoms cannot reach the inside of the through hole 103 in the short axis direction (x direction) of the through hole 103. However, it is deposited only on the first surface 101a side and the second surface 101b side. As a result, when the plating layer 403 is formed on the seed layer 401 by electrolytic plating, the plating layer is formed only on the first surface 101a side and the second surface 101b side of the side wall 105 on the short axis direction (x direction) side of the through-hole 103. 403 is formed.

  As shown in FIGS. 3 to 5, in the through electrode substrate 10 according to the present invention, since the aspect ratio of the short diameter of the through hole 103 is relatively large, the side wall on the short axis direction (x direction) side of the through hole 103. In 105, the throwing power of the seed layer 401 is deteriorated. However, since the aspect ratio of the long diameter of the through-hole 103 is relatively small, good throwing power of the seed layer 410 can be realized on the side walls 105 at both ends in the long axis direction (y direction) of the through-hole 103. Therefore, the through electrode 107 can be formed over the entire side wall 105 at both ends in the major axis direction (y direction) of the through hole 103, and stable electrical connection between the upper and lower wirings becomes possible.

  As described above, according to the through electrode substrate 10 according to the first embodiment of the present invention, it is possible to realize the miniaturization in the x direction and the through electrode 107 that realizes stable electrical connection of the upper and lower wirings. Therefore, a highly reliable through electrode substrate can be provided.

  1 to 5 described an example in which the shape of the through hole 103 is an elliptical shape having a major axis and a minor axis. However, the shape of the through hole 103 is a shape having a major axis and a minor axis in plan view. That is, as long as it has a shape extended in one direction, it is not limited to an elliptical shape. For example, the through hole 103 may be rectangular in plan view.

(Second Embodiment)
The structure and manufacturing method of the interposer 60 according to the second embodiment of the present invention will be described with reference to FIGS. In the present embodiment, an example in which the through electrode substrate 10 described in the first embodiment is used as the through electrode substrate of the interposer 60 will be described.

  FIG. 6 is a plan view showing an outline of an interposer according to an embodiment of the present invention. FIG. 7 is a cross-sectional view of the interposer according to the present invention as seen from the x direction along B-B ′. As shown in FIGS. 6 and 7, the interposer 60 according to the present invention has a first surface (upper surface) 601 and a second surface (lower surface) 603, and penetrates the first surface 601 and the second surface 603. It has a substrate 600 provided with a through hole 605 and a through electrode 607 disposed inside the through hole 605 and connecting the first surface 601 and the second surface 603.

  In FIG. 7, the through electrode 607 includes a seed layer 609 and a plating layer 611, the seed layer 609 is disposed on the side wall 613 of the through hole 605, and the plating layer 611 is disposed on the seed layer 609. When the plating layer 611 is formed by an electrolytic plating method, the plating layer 611 is formed by energizing the seed layer 609. The seed layer 609 is formed using a material that suppresses the plating layer 611 from diffusing into the substrate 600. The shape of the through hole 605 is an elliptical shape like the through hole 13 shown in FIGS.

  A first insulating layer 615 and a first wiring 619 are arranged on the first surface 601 side of the substrate 600. The first insulating layer 615 is disposed on the first surface 601 of the substrate 600 and a part of the through electrode 607, and an opening 617 that exposes a part of the through electrode 607 is provided. That is, the first insulating layer 615 is arranged so that at least a part thereof is in contact with the through electrode 607 and the other part is exposed to the outside. The first wiring 619 is disposed on the first insulating layer 615 and inside the opening 617 and is electrically connected to the through electrode 607. The first wiring 619 includes a seed layer 621 disposed on the first insulating layer 615 and the through electrode 607, and a plating layer 623 disposed on the seed layer 621. Here, the first insulating layer 615 and the first wiring 619 are also referred to as a first wiring structure.

  Similarly to the first surface 601 side, the second insulating layer 625 and the second wiring 631 are also arranged on the second surface 603 side of the substrate 600. The second insulating layer 625 is provided with an opening 627 that is disposed on the second surface 603 of the substrate 600 and a part of the through electrode 607 and exposes a part of the through electrode 607. That is, the second insulating layer 625 is disposed so that at least a part thereof is in contact with the through electrode 607 and the other part is exposed to the outside. The second wiring 629 is disposed on the second insulating layer 625 and inside the opening 627 and is electrically connected to the through electrode 607. The second wiring 629 includes a seed layer 631 disposed on the second insulating layer 625 and the through electrode 607 and a plating layer 633 disposed on the seed layer 631. Here, the second insulating layer 625 and the second wiring 629 are also referred to as a second wiring structure.

As the substrate 600, a glass substrate can be used. In addition to a glass substrate, an insulating substrate such as a quartz substrate, a sapphire substrate, or a resin substrate, a semiconductor substrate such as a silicon substrate, a silicon carbide substrate, or a compound semiconductor substrate, or a conductive substrate such as a stainless steel substrate can be used. . Further, as a material used for the substrate, a material having a thermal expansion coefficient in the range of 2 × 10 ⁻⁶ [/ K] to 17 × 10 ⁻⁶ [/ K] can be used. Moreover, these may be laminated. The thickness of the substrate 600 is not particularly limited, but for example, a substrate having a thickness of 100 μm or more and 800 μm or less can be used. The thickness of the substrate 600 is more preferably not less than 200 μm and not more than 400 μm. When the substrate becomes thinner than the lower limit of the thickness of the substrate, the deflection of the substrate increases. As a result, handling in the manufacturing process becomes difficult, and the substrate is warped by an internal stress such as a thin film formed on the substrate. Further, when the substrate becomes thicker than the upper limit of the thickness of the substrate, the process of forming the through hole becomes longer. As a result, the manufacturing process becomes longer and the manufacturing cost also increases.

  The seed layer 609 can be formed using a conductive material having good adhesion to the base substrate 600. For example, it is possible to use titanium (Ti), molybdenum (Mo), tungsten (W), tantalum (Ta), nickel (Ni), chromium (Cr), aluminum (Al), these compounds, or alloys thereof. it can. In particular, when the plating layer 611 includes copper (Cu), the seed layer 609 can use a material that suppresses the diffusion of Cu. For example, titanium nitride (TiN), molybdenum nitride (MoN), and tantalum nitride (TaN). ) Etc. may be used. Here, the thickness of the seed layer 609 is not particularly limited, but can be appropriately selected within a range of, for example, 50 nm or more and 400 nm or less.

  The plating layer 611 can be formed using a conductive material that has good adhesion to the seed layer 609 and high electrical conductivity. For example, a metal such as copper (Cu), gold (Au), silver (Ag), platinum (Pt), rhodium (Rh), tin (Sn), aluminum (Al), nickel (Ni), chromium (Cr) or the like It can select from the alloy etc. which used these. The plating layer 611 is disposed along the side wall 613 inside the through hole 605. That is, a cavity is provided inside the through hole 605. However, the structure is not limited to the above, and the inside of the through hole 605 may be filled with the plating layer 611. Alternatively, a filling material such as a resin material may be disposed in a region inside the plating layer 611 disposed along the side wall 613.

As the first insulating layer 615 and the second insulating layer 623, a resin layer having a property of transmitting gas and moisture can be used. As the resin layer, in addition to the above polyimide, epoxy resin, polyimide resin, benzocyclobutene resin, polyamide, phenol resin, silicone resin, fluororesin, liquid crystal polymer, polyamideimide, polybenzoxazole, cyanate resin, aramid, polyolefin , Polyester, BT resin, FR-4, FR-5, polyacetal, polybutylene terephthalate, syndiotactic polystyrene, polyphenylene sulfide, polyether ether ketone, polyether nitrile, polycarbonate, polyphenylene ether polysulfone, polyether sulfone, polyarylate , Polyetherimide and the like can be used. The above resins may be used alone or in combination of two or more kinds of resins. Further, an inorganic filler such as glass, talc, mica, silica, alumina or the like may be used in combination with the above resin. Here, the resin used for the first insulating layer 615 and the second insulating layer 623 is a resin having a Young's modulus of 1 × 10 ⁹ [dyne / cm ² ] or less at room temperature for the purpose of stress relaxation. Also good.

Further, the first insulating layer 615 and the second insulating layer 623 are not limited to resin layers, and inorganic insulating layers can also be used. As the inorganic insulating layer, silicon oxide (SiO ₂ ), silicon nitride (SiN), aluminum oxide (Al ₂ O ₃ ), aluminum nitride (AlN), silicon carbide (SiC), silicon nitride carbide (SiCN), carbon Additive silicon oxide (SiOC) or the like can be used. Here, as the first insulating layer 615 and the second insulating layer 623, the above-described inorganic insulating layer may be used as a single layer or may be used as a stacked layer. Further, as the first insulating layer 615 and the second insulating layer 623, a resin layer and an inorganic insulating layer may be stacked.

  Further, a film-like resin can be used for the first insulating layer 615 and the second insulating layer 623. The film-like resin is a film having a thickness of 1 μm or more and 100 μm or less, and is a resin that is in a film form before being formed on a substrate. The film-like resin can also be called a sheet-like resin or a laminate-like resin.

  The seed layers 621 and 631 can be formed using a conductive material having good adhesion to the first insulating layer 615 and the second insulating layer 623 which are base layers. For example, similarly to the seed layer 609, titanium (Ti), molybdenum (Mo), tungsten (W), tantalum (Ta), nickel (Ni), chromium (Cr), aluminum (Al), these compounds, or these An alloy or the like can be used. In particular, when the plating layers 623 and 633 include copper (Cu), the seed layers 621 and 631 can use a material that suppresses diffusion of Cu. For example, titanium nitride (TiN), molybdenum nitride (MoN), Tantalum nitride (TaN) or the like may be used. Here, the thickness of the seed layers 621 and 631 is not particularly limited, but can be appropriately selected within a range of 20 nm to 1 μm, for example. The thicknesses of the seed layers 621 and 631 are more preferably 100 nm or more and 300 nm or less.

  For the plating layers 623 and 633, a conductive material having good adhesion to the seed layers 621 and 631 and high electrical conductivity can be used. For example, like the plating layer 611, copper (Cu), gold (Au), silver (Ag), platinum (Pt), rhodium (Rh), tin (Sn), aluminum (Al), nickel (Ni), chromium It can be selected from metals such as (Cr) or alloys using these.

  As described above, according to the interposer 60 according to the second embodiment of the present invention, it is possible to obtain the through electrode 607 that realizes stable electrical connection between the upper and lower wirings, and therefore, it is possible to provide a highly reliable interposer. Can do. In addition, since the first insulating layer 615 and the second insulating layer 623 transmit gas and moisture, the gas and moisture contained in the cavity inside the through hole 605 are easily released to the outside. Therefore, oxidation of the through electrode 607 can be suppressed, and problems such as rupture due to the gas released from the material constituting the interposer 60 being filled and the internal pressure inside the through hole 605 rising can be suppressed. Can do.

[Method of manufacturing feedthrough substrate and interposer]
A method for manufacturing the interposer 60 according to the second embodiment of the present invention will be described with reference to FIGS. 8 to 23 are cross-sectional views taken along the line BB ′ of the interposer according to the present invention shown in FIG. 8 to 23, the same or similar components as those shown in FIG. Here, the manufacturing method of the glass interposer which uses a glass substrate as a penetration electrode substrate is demonstrated.

  FIG. 8 is a cross-sectional view showing a step of irradiating a substrate with laser light in the method of manufacturing an interposer according to an embodiment of the present invention. FIG. 8 illustrates a method of etching by changing the material of the substrate in a region where a through hole is to be formed by irradiating the substrate 600 with a femtosecond laser. Here, the laser beam 801 emitted from the light source 800 is incident from the first surface 601 side of the substrate 600 and is focused on a region where a through-hole is to be formed inside the substrate 600. At the position where the laser beam 801 is focused, high energy is supplied to the substrate 600, and the material of the substrate changes.

  In the above, the manufacturing method using the femtosecond laser is exemplified as the method for forming the deteriorated layer, but the deteriorated layer can be formed by a method other than the femtosecond laser. For example, the altered layer may be formed by condensing a pulse laser having a wavelength λ with a lens. The laser beam 801 may be incident from the second surface 603 side of the substrate 600, or may be incident from the first surface 601 side and the second surface 603 side.

  The pulse width, wavelength, energy, and the like of the laser are appropriately set according to the composition of the material used for the substrate, the absorption coefficient, and the like. For example, when an altered layer is formed on a glass substrate, the pulse width of the pulse laser is preferably in the range of 1 nanosecond (nsec) to 200 nsec. When the pulse width is shorter than the lower limit, an expensive laser oscillator is required, and when the pulse width is longer than the upper limit, the peak value of the laser pulse is lowered and the workability is lowered. The wavelength λ of the pulse laser is preferably 535 nm or less. When the wavelength λ is longer than the upper limit, the irradiation spot becomes large, so that it becomes difficult to form a microhole, and the surroundings of the irradiation spot are likely to be broken due to heat.

  FIG. 9 is a cross-sectional view showing a process of forming a denatured region inside the substrate 600. As shown in FIG. 9, an altered region 901 is formed on the substrate 600 from the first surface 601 side to the second surface 603 side by the laser irradiation described above. Since the region of the altered region 901 becomes the subsequent through hole 605, the altered region 901 is adjusted according to the shape and size of the through hole 605. Here, the altered region 901 is formed to have an elliptical shape in accordance with the shape of the through hole 605. In addition, it is preferable to form the altered region so that the aspect ratio of the major axis of the altered region 901 having an elliptical shape is 4 or less.

  Here, the altered region will be described in detail. As described above, a photochemical reaction occurs in the region of the glass substrate irradiated with the laser light. As a result, in the region irradiated with the laser beam, defects such as E ′ center and non-bridging oxygen, and / or a sparse glass structure in a high temperature region generated by rapid heating / cooling by the laser irradiation are generated. . The defect and the sparse glass structure are more easily etched with a predetermined etching solution than a glass substrate in a region where laser light irradiation is not performed.

  FIG. 10 is a cross-sectional view showing a process of etching a denatured region of a substrate using a chemical solution in the method of manufacturing an interposer according to an embodiment of the present invention. When the substrate 600 is immersed in the chemical solution 1001, minute holes and minute grooves are formed in the altered region 901. Therefore, the altered region 901 has a higher etching rate due to the chemical solution than an unmodified region. That is, the entire region of the substrate 600 is immersed in the chemical solution 1001 so that the altered region 901 is etched at a faster rate than the selectively or unaltered region. FIG. 10 shows a method of performing etching from both the first surface 601 side and the second surface 603 side by immersing the substrate 600 in a chemical solution 1001 placed in a container 1000.

  Here, as the chemical solution 1001 used for the etching, a chemical solution that can selectively etch the altered region 901 with respect to the region other than the altered region 901 or at a high etching rate is used. For example, when the substrate 600 is a glass substrate, hydrofluoric acid (HF), buffered hydrofluoric acid (BHF), surfactant-added buffered hydrofluoric acid (LAL), or the like can be used. The chemical solution used for etching can be appropriately selected depending on the material of the substrate. Further, the etching method may be a spin coat etching method in addition to the immersion method. When performing spin coat etching, the treatment is performed on each side. Here, the etching solution, the etching time, and the etching processing temperature may be appropriately selected according to the shape of the formed altered region 901 and the processing shape of the target through hole.

  FIG. 11 is a cross-sectional view showing a process of forming a through hole in a substrate in the method of manufacturing an interposer according to an embodiment of the present invention. By removing the altered region 901 by etching using the chemical solution 1001, the through-hole 605 surrounded by the side wall 613 is formed. The through hole 605 has an elliptical shape having a minor axis and a major axis. Note that the aspect ratio of the major axis of the through hole 605 is preferably 4 or less.

Here, FIGS. 8 to 11 illustrate a method of forming a through hole by irradiating a laser beam to a region where a through hole is to be formed in the substrate 600 to form an altered region and performing wet etching with a chemical solution. It is not limited to this method. For example, the through hole may be formed by irradiating the substrate 600 with a high-power laser and melting the substrate. For example, a CO ₂ laser or the like can be used as a laser for processing a glass substrate.

  FIG. 12 is a cross-sectional view showing a step of forming a seed layer in the through hole from the one surface (first surface 601) side of the substrate in the method of manufacturing an interposer according to an embodiment of the present invention. As illustrated in FIG. 12, a first seed layer 609 </ b> A is formed on the first surface 601 and the side wall 613 with respect to the through hole 605 provided with the substrate 600. Here, in the seed layer 609 shown in FIG. 17, the seed layer 609 formed on the first surface 601 and the side wall 613 on the first surface 601 side is referred to as a first seed layer 609A.

  The first seed layer 609A can use, for example, a single layer or a laminate of a metal such as Cu, Ti, Ta, or W or an alloy using these, and is formed by a PVD method such as a vacuum evaporation method or a sputtering method. be able to. As the material used for the first seed layer 609A, the same material as that of the plating layer 611 formed later on the first seed layer 609A can be selected. Here, the first seed layer 609A is preferably formed to a thickness of 20 nm to 1 μm. The first seed layer 609A is more preferably formed with a thickness of 100 nm to 300 nm. Since the through-hole 605 has an elliptical shape, as shown in FIG. 12, the sputtering atoms reach the depth of half or more of the through-hole 605 and deposit on the side wall 613 at both ends in the long axis direction of the through-hole 605. First seed layer 609A is formed. On the other hand, although not shown, in the short axis direction of the through hole 605, the sputtering atoms do not reach the inside of the through hole 605 and are deposited only on the first surface 601 side.

  FIG. 13 is a cross-sectional view showing a step of forming a seed layer in the through hole from the other surface (second surface 603) side of the substrate in the interposer manufacturing method according to one embodiment of the present invention. As shown in FIG. 13, the second seed layer 609 </ b> B is formed on the second surface 603 and the side wall 613 with respect to the through hole 605 provided with the substrate 600. Here, in the seed layer 609 shown in FIG. 7, the seed layer 609 formed on the second surface 603 and the side wall 613 on the second surface 603 side is referred to as a second seed layer 609B.

  Similarly to the first seed layer 609A, the second seed layer 609B can use a single layer or a laminated layer of a metal such as Cu, Ti, Ta, or W, or an alloy using these metals, and can be vacuum deposited or sputtered. It can form by PVD methods, such as. As the material used for the second seed layer 609B, the same material as that of the plating layer 611 to be formed on the second seed layer 609B later can be selected. That is, the same material as the first seed layer 609A can be selected. Here, the second seed layer 609B is preferably formed to a thickness of 20 nm to 1 μm. The second seed layer 609B is more preferably formed with a thickness of 100 nm to 300 nm. Since the through-hole 605 has an elliptical shape, as shown in FIG. 13, sputtering atoms reach the depth of more than half of the through-hole 605 and deposit on the side wall 613 at both ends in the long axis direction of the through-hole 605. A second seed layer 609B is formed. On the other hand, although not shown, in the short axis direction of the through hole 605, the sputtering atoms do not reach the inside of the through hole 605 and are deposited only on the second surface 603 side. Hereinafter, the first seed layer 609A and the second seed layer 609B are collectively referred to as a seed layer 609. As shown in FIG. 13, a seed layer 609 is formed over the entire side wall 613 at both ends in the major axis direction of the through hole 605.

  Note that the seed layer 609 may be formed from one surface side (the first surface 601 side or the second surface 603 side) of the substrate 600 by a vacuum deposition method or the like. For example, by setting the vapor deposition material flying from the vapor deposition source to reach the surface of the substrate from a direction inclined with respect to the normal to the surface of the substrate to be formed, the seed layer 609 is formed in the through hole 605. It may be formed.

  FIG. 14 is a cross-sectional view showing a step of forming a plating layer on the seed layer in the method of manufacturing an interposer according to one embodiment of the present invention. As shown in FIG. 14, first, after applying a photoresist on the seed layer 609, a resist pattern 1400 is formed by performing exposure and development. The resist pattern 1400 is formed so as to expose at least the through hole 605. Next, electroplating is performed by energizing the seed layer 609 to form a plating layer 611 on the seed layer 609 exposed from the resist pattern 1400.

  FIG. 15 is a cross-sectional view showing a step of removing the resist mask in the method of manufacturing an interposer according to one embodiment of the present invention. As shown in FIG. 15, after forming the plating layer 611, the photoresist constituting the resist pattern 1400 is removed with an organic solvent. Note that ashing by oxygen plasma can be used for removing the photoresist instead of using an organic solvent.

  FIG. 16 is a cross-sectional view showing a step of etching the seed layer exposed from the plating layer in the method of manufacturing the interposer according to the embodiment of the present invention. As shown in FIG. 16, the seed layer 609 in the region covered with the resist pattern 1400 and where the plating layer 611 is not formed is removed.

  Here, in the steps of FIGS. 14 to 16, the through electrode 607 formed inside the through hole 605 and the wiring on the first surface 601 and the second surface 603 connected to the through electrode 607 are electrically independent. The interconnects thus formed can also be formed on the first surface 601 and the second surface 603. Specifically, a resist pattern 1400 in which a region in which a wiring electrically independent from the through electrode 607 is to be formed is opened is formed, the seed layer 609 in that region is exposed, a plating layer 611 is formed, and a plating layer 611 is formed. The seed layer 609 is removed from the region where no is formed. Thereby, the wiring can be formed in the same process as the through electrode 607 formed in the process of FIGS.

  FIG. 17 shows a step of forming an insulating layer provided with an opening exposing a wiring formed on the upper surface (first surface 601) of the through electrode substrate in the method of manufacturing an interposer according to an embodiment of the present invention. It is sectional drawing shown. Here, a method using photosensitive polyimide as the first insulating layer 615 will be described. As shown in FIG. 17, photosensitive polyimide is applied as a first insulating layer 615 onto the first surface 601 of the substrate 600 using a coating method such as spin coating, and is exposed and developed using a photomask. Thus, an opening 617 exposing at least a part of the through electrode 607 is formed.

  After the opening 617 is formed, a thermosetting process is performed to cure the applied first insulating layer 615. The thermosetting treatment is preferably set to be equal to or lower than the glass transition temperature of the first insulating layer 615 to be used. This is because if the curing is performed at a temperature exceeding the glass transition temperature, the shape of the opening 617 is deformed, and problems such as an opening diameter larger than the design dimension occur. For example, when photosensitive polyimide is used as the first insulating layer 615, if the glass transition temperature of the photosensitive polyimide is 280 ° C., it is preferable to perform heat treatment at 250 ° C., for example, 250 ° C. for 1 hour in a nitrogen atmosphere. Heat treatment should be performed below. In addition, it is preferable to perform not only the process of thermosetting but the heat processing after this process so that the glass transition temperature of photosensitive polyimide may not be exceeded.

  Here, as the first insulating layer 615, an insulating layer obtained by attaching a film-like resin may be used instead of the insulating layer in which the resin material is formed by a coating method. Since the film-like resin has a film-like shape before being formed on the substrate, the resin hardly covers the inside of the through-hole 605 and covers the end of the through-hole 605 even if formed on the through-hole 605. A hollow structure can be formed. In the case where a film-like resin is used as the first insulating layer 615, the opening 617 can be formed by a photolithography process and an etching process. Or you may form the opening part 617 by sublimating resin using energy rays, such as a laser.

  FIG. 18 is a cross-sectional view showing a step of forming a seed layer on the insulating layer and the wiring exposed in the opening in the method of manufacturing the interposer according to the embodiment of the present invention. As shown in FIG. 18, a seed layer 621 is formed on the first insulating layer 615 and on the through electrode 607 exposed inside the opening 617. For the seed layer 621, for example, a single layer or stacked layer of a metal such as Cu, Ti, Ta, W, or an alloy using these can be used, such as a PVD method (such as a vacuum deposition method and a sputtering method) or a CVD method. Can be formed. As a material used for the seed layer 621, the same material as that of the plating layer 623 to be formed on the seed layer 621 later can be selected. Here, the seed layer 621 is preferably formed to a thickness of 20 nm to 1 μm. The seed layer 621 is more preferably formed with a thickness of 100 nm to 300 nm.

  FIG. 19 is a cross-sectional view showing a step of forming a plating layer on the seed layer in the method of manufacturing an interposer according to one embodiment of the present invention. As shown in FIG. 19, after applying a photoresist on the seed layer 621, exposure and development are performed to form a resist pattern 1900 in which a region where a wiring pattern is to be formed is opened. Next, electroplating is performed by energizing the seed layer 621 to form a plating layer 623 on the seed layer 621 exposed from the resist pattern 1900.

  FIG. 20 is a cross-sectional view showing a step of removing the resist mask on the seed layer in the method of manufacturing the interposer according to the embodiment of the present invention. As shown in FIG. 26, after forming the plating layer 623, the photoresist constituting the resist pattern 1900 is removed with an organic solvent. Note that ashing by oxygen plasma can be used for removing the photoresist instead of using an organic solvent.

  FIG. 21 is a cross-sectional view showing a step of etching the seed layer exposed from the plating layer in the method of manufacturing an interposer according to the embodiment of the present invention. As shown in FIG. 21, by removing (etching) the seed layer 621 in the region covered with the resist pattern 1900 and where the plating layer 623 is not formed, each wiring is electrically separated. Since the surface of the plating layer 623 is also etched and thinned by etching the seed layer 621, it is preferable to set the thickness of the plating layer 623 in consideration of the influence of this thinning. As etching in this step, wet etching or dry etching can be used. In addition, by this step, the first wiring 619 including the seed layer 621 and the plating layer 623 is formed on the through electrode 607 and the first insulating layer 615.

  FIG. 22 shows a step of forming an insulating layer provided with an opening for exposing a wiring formed on the lower surface (second surface 603) of the through electrode substrate in the method of manufacturing an interposer according to the embodiment of the present invention. It is sectional drawing shown. The second insulating layer 625 illustrated in FIG. 22 can be formed using the same material and method as the first insulating layer 615. Similarly to the opening 617, an opening 627 that exposes at least part of the through electrode 607 is formed in the second insulating layer 625.

  FIG. 23 is a cross-sectional view showing a step of forming a seed layer and a plating layer on the lower surface (second surface 603) side of the through electrode substrate in the method of manufacturing an interposer according to the embodiment of the present invention. Here, the second wiring 629 is formed on the second surface 603 side of the substrate 600 by performing the same process as the steps shown in FIGS.

  As described above, according to the manufacturing method of the interposer 60 according to the second embodiment, the throwing power of the seed layer 609 with respect to the side wall 613 inside the through hole 605 can be improved. Therefore, it is not necessary to devise a method for forming the seed layer in order to improve the throwing power with respect to the side wall of the through hole, and the seed layer can be formed using a conventional film forming apparatus and film forming process.

(Embodiment 3)
In the third embodiment, a semiconductor device manufactured using the through electrode substrate 10 shown in the first embodiment or the interposer 60 shown in the second embodiment will be described. In the following description, a semiconductor device using the through electrode substrate 10 shown in the first embodiment will be described, but the through electrode substrate 10 may be replaced with an interposer 60.

  FIG. 24 is a cross-sectional view showing a semiconductor device using a through electrode substrate according to an embodiment of the present invention. In the semiconductor device 2400, three through electrode substrates 2401, 2403, and 2405 are stacked and connected to an LSI substrate 2407 on which a semiconductor element such as a DRAM is formed. The through electrode substrate 2401 has connection terminals 2409 and 2411 formed by wiring provided on the first surface (upper surface) side, wiring provided on the second surface (lower surface) side, and the like. These through electrode substrates 2401, 2403, and 2405 may be through electrode substrates formed from substrates of different materials. The connection terminal 2411 is connected to the connection terminal 2419 of the LSI substrate 2407 by the bump 2421. The connection terminal 2409 is connected to the connection terminal 2415 of the through electrode substrate 2403 by the bump 2423. The connection terminals 2413 of the through electrode substrate 2403 and the connection terminals 2417 of the through electrode substrate 2405 are also connected to each other through the bumps 2425. For the bumps 2421, 2423, and 2425, for example, a metal such as indium, copper, or gold is used.

  In addition, when laminating | stacking a through-electrode board | substrate, not only three layers but two layers may be sufficient, and also four or more layers may be sufficient. Further, the connection between the through-electrode substrate and another substrate is not limited to using bumps, and other bonding techniques such as eutectic bonding may be used. Alternatively, polyimide, epoxy resin, or the like may be applied and baked to bond the through electrode substrate and another substrate.

  FIG. 25 is a cross-sectional view showing another example of a semiconductor device using a through electrode substrate according to an embodiment of the present invention. In a semiconductor device 2500 shown in FIG. 25, semiconductor chips (LSI chips) 2501 and 2503 such as a MEMS device, a CPU, and a memory, and a through electrode substrate 2505 are stacked and connected to the LSI substrate 2507.

  A through electrode substrate 2505 is disposed between the semiconductor chip 2501 and the semiconductor chip 2503 and is connected by bumps 2517 and 2519. A semiconductor chip 2501 is placed on the LSI substrate 2507, and the LSI substrate 2501 and the semiconductor chip 2503 are connected by a wire 2521. In this example, the through electrode substrate 2505 can manufacture a multifunctional semiconductor device by stacking a plurality of semiconductor chips each having a different function. For example, by using the semiconductor chip 2501 as a three-axis acceleration sensor and the semiconductor chip 2503 as a two-axis magnetic sensor, a semiconductor device in which a five-axis motion sensor is realized with one module can be manufactured.

  When the semiconductor chip is a sensor formed by a MEMS device, the sensing result may be output as an analog signal. In this case, a low-pass filter, an amplifier, and the like may also be formed on the semiconductor chip or the through electrode substrate 2505.

  FIG. 26 is a cross-sectional view showing still another example of a semiconductor device using a through electrode substrate according to an embodiment of the present invention. The two examples shown in FIG. 24 and FIG. 25 are three-dimensional implementations, but in this example, this is an example applied to the combined implementation of two dimensions and three dimensions (sometimes referred to as 2.5 dimensions). . In the example shown in FIG. 26, six through electrode substrates 2601, 2603, 2605, 2607, 2609, and 2611 are stacked and connected to the LSI substrate 2613. However, all the through electrode substrates are not only laminated and arranged, but are also arranged side by side in the in-plane direction of the substrate. These through electrode substrates may be through electrode substrates formed from substrates of different materials.

  In the example of FIG. 26, the through electrode substrates 2601 and 2609 are connected to the LSI substrate 2613, the through electrode substrates 2603 and 2607 are connected to the through electrode substrate 2601, and the through electrode substrate 2605 is connected to the through electrode substrate 2603. The through electrode substrate 2611 is connected to the through electrode substrate 2609. Even if the through-electrode substrate is used as an interposer for connecting a plurality of semiconductor chips, such two-dimensional and three-dimensional mounting can be performed. For example, the through electrode substrate 2605, 2607, 2611 and the like shown in FIG. 26 may be replaced with a semiconductor chip.

  The semiconductor devices described with reference to FIGS. 24 to 26 include, for example, mobile terminals (mobile phones, smartphones, notebook personal computers, etc.), information processing devices (desktop personal computers, servers, car navigation systems, etc.), home appliances, and the like. Installed in various electrical equipment.

  As described above, according to the through electrode substrate according to the present invention, since the shape of the through hole has a major axis and a minor axis, that is, a shape extending in one direction, the aspect ratio of the minor axis of the through hole is relatively However, the aspect ratio of the major axis becomes relatively small. Therefore, at least at both ends in the major axis direction of the through hole having a relatively small aspect ratio, when forming the seed layer by a film forming method such as a sputtering method, the sputtering atoms are in the major axis direction of the through hole, It reaches the entire side wall of both end portions in the major axis direction of the through hole, and good embedding property of the through electrode filled in the through hole or good throwing power of the thin film used for the through electrode is maintained. Therefore, it is possible to form a through electrode that can realize miniaturization of the through hole in the minor axis direction and realize stable electrical connection between the upper and lower wirings.

  Note that the present invention is not limited to the above-described embodiment, and can be changed as appropriate without departing from the spirit of the present invention.

10: Through electrode substrate 101, 600: Substrate 101a, 601: First surface 101b, 603: Second surface 103, 605: Through hole 105, 613: Side wall 107, 607: Through electrode 401, 609: Seed layers 403, 611 : Plating layer 615: first insulating layer 625: second insulating layer 619: first wiring 629: second wiring 2400, 2500, 2600: semiconductor device

Claims (9)

A substrate having a first surface and a second surface opposite to the first surface;
A through-hole penetrating the first surface and the second surface and having a shape having a major axis and a minor axis in plan view;
A through electrode disposed in the through hole and electrically connecting the wiring disposed on the first surface side and the wiring disposed on the second surface side;
A through electrode substrate.   The through electrode substrate according to claim 1, wherein the through hole has an elliptical shape in plan view.   The penetration electrode substrate according to claim 1 or 2 whose aspect ratio of the depth of the hole to said major axis of said penetration hole is 4 or less. The through electrode substrate according to any one of claims 1 to 3,
A first wiring structure connected to the wiring disposed on the first surface side of the through electrode substrate;
A second wiring structure connected to the wiring disposed on the second surface side of the through electrode substrate;
Interposer with The through electrode substrate according to any one of claims 1 to 3,
Other substrates or chips arranged side by side with the through electrode substrate,
A semiconductor device comprising: Forming a deteriorated layer on a part of the substrate having a first surface and a second surface opposite to the first surface;
Etching the altered layer, penetrating the first surface and the second surface, forming a through-hole having a shape having a major axis and a minor axis in plan view,
Forming a seed layer in the through hole;
Forming a plating layer on the seed layer;
The manufacturing method of the penetration electrode substrate containing this.   The said through-hole is a manufacturing method of the penetration electrode board | substrate of Claim 6 which is elliptical shape in planar view.   The method for manufacturing a through electrode substrate according to claim 6 or 7, wherein an aspect ratio of a depth of the hole to the major axis of the through hole is 4 or less.   The method for manufacturing a through electrode substrate according to any one of claims 6 to 8, wherein the seed layer is formed by a sputtering method.

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