JP2016106427A - Wiring board manufacturing method and package structure manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board manufacturing method and a package structure manufacturing method, which fulfill the requirement of activating an electronic component with high reliability.SOLUTION: A wiring board manufacturing method comprises: a process of forming power source through hole conductors 10P in a plurality of power source through holes formed on a substrate 9 by sandblasting to form a core substrate 7; and a process of forming an insulation layer 11 on the core substrate 7 and forming a plurality of power source pads 14P electrically connected to the plurality of power source through hole conductors 10P on the insulation layer 11 thereby to form a build-up layer 8 where an electronic component 2 is mounted, on the core substrate 7, in which a pitch of the power source through holes in a region corresponding to a central part of an undersurface of the electronic component 2 is narrower than a pitch of the power source pads 14P, and in one pair of power source pad 14P and power source through hole conductors 10P which are electrically connected with each other, the number of the power source through hole conductors 10P is not less than two timed and not more than four times larger than the number of power source pads 14P.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a method for manufacturing a wiring board and a method for manufacturing a mounting structure used for electronic devices (for example, various audiovisual devices, home appliances, communication devices, computer devices, and peripheral devices thereof).

  2. Description of the Related Art Conventionally, as a mounting structure in an electronic device, an electronic component mounted on a wiring board is used.

  With respect to the wiring board, Patent Document 1 includes a plurality of buildup layers on both surfaces of the core board, and the core board includes a filling through hole portion that is a part of a signal line in the semiconductor package, and a power line or a ground line in the semiconductor package. The structure which has the plating through-hole part which becomes a part of is disclosed.

  Incidentally, in recent years, there is a demand for power saving of electronic devices, and there is a demand for reducing the power consumption of semiconductor chips. Since this power consumption is proportional to the power supply voltage of the semiconductor chip, it is necessary to reduce the power supply voltage in order to reduce the power consumption.

  However, when the voltage of the power source of the semiconductor chip is lowered, the influence of voltage fluctuation due to the impedance and inductance of the power source line in the wiring board increases, and the semiconductor chip is likely to malfunction.

  Therefore, it is required to operate the semiconductor chip with high reliability.

JP 2004-134679 A

  The present invention provides a method of manufacturing a wiring board and a method of manufacturing a mounting structure that meet the demand for operating electronic components with high reliability.

  The method for manufacturing a wiring board according to the present invention includes a step of preparing a base, and forming a plurality of power through holes penetrating the base in the thickness direction using sandblasting, and a plurality of power supplies in the plurality of power through holes. Forming a core substrate by forming a through-hole conductor for use, and forming an insulating layer having a thickness smaller than that of the base on the core substrate, and being electrically connected to a power supply terminal of the electronic component Forming a buildup layer on which the electronic component is mounted on the core substrate by forming, on the insulating layer, a plurality of power supply pads electrically connected to the plurality of power supply through-hole conductors. And the pitch of the power through holes in the region corresponding to the center of the lower surface of the electronic component is narrower than the pitch of the power pads, and is electrically In the set of connected power supply pads and power supply through-hole conductors, the number of power supply through-hole conductors is in the range of 2 to 4 times the power supply pad. is there.

  According to the method for manufacturing a wiring board of the present invention, the pitch of the power through holes in the region corresponding to the central portion of the lower surface of the electronic component is narrower than the pitch of the power pads, and is electrically connected to each other. In the set of power supply pads and power supply through-hole conductors, since the number of power supply through-hole conductors is larger than the number of power supply pads, by increasing in parallel the path through which the power supply current flows in the core substrate, It is possible to provide a wiring board capable of reducing the impedance and inductance of the power supply through-hole conductor in the core board and thus operating the electronic component with high reliability.

FIG. 1A is a side view of a mounting structure manufactured according to an embodiment of the present invention, and FIG. 1B is a top view of the mounting structure manufactured according to an embodiment of the present invention. is there. FIG. 2 is an enlarged view of a cross section cut in the thickness direction along the line AA in the P1 portion of FIG. FIG. 3 is an enlarged view of a cross section cut in the thickness direction along the line BB in the P1 portion of FIG. 4A is an enlarged view of a cross section cut in a plane direction along the line CC in FIG. 2 in the P1 portion of FIG. 1B. FIG. 4B is a cross-sectional view of FIG. 4A is an enlarged view of a cross section cut in a plane direction along the line DD in FIG. 2, and FIG. 4C is a cross-sectional view taken along line E- in FIG. It is an enlarged view of a section cut in the plane direction along line E. FIG. 5 is an enlarged view of a cross-section corresponding to FIG. 2 for explaining the manufacturing process of the mounting structure shown in FIG. FIG. 6 is an enlarged view of a cross-section corresponding to FIG. 2 for explaining the manufacturing process of the mounting structure shown in FIG.

  Hereinafter, a mounting structure including a wiring board manufactured according to an embodiment of the present invention will be described in detail with reference to the drawings.

  The mounting structure 1 shown in FIGS. 1A and 1B is used for electronic devices such as various audiovisual devices, home appliances, communication devices, computer devices, and peripheral devices thereof. The mounting structure 1 includes a flat electronic component 2 and a flat wiring substrate 4 on which the electronic component 2 is flip-chip mounted via bumps 3.

  The electronic component 2 is a semiconductor element such as an IC or an LSI, for example, and as shown in FIGS. 2 and 3, a flat semiconductor substrate 5 and a plurality of disk-shaped discs formed on the lower surface of the semiconductor substrate 5. Terminal 6. The semiconductor substrate 5 is made of a semiconductor material such as silicon, germanium, gallium arsenide, gallium arsenide phosphorus, gallium nitride, or silicon carbide. The terminal 6 can be formed of a conductive material such as copper, gold, aluminum, nickel, or chromium, for example, and it is preferable to use copper from the viewpoint of conductivity.

  2 and 3, the plurality of terminals 6 include a plurality of power terminals 6P for supplying power to the semiconductor substrate 5, a plurality of ground terminals 6G for connecting the semiconductor substrate 5 to the ground potential, and a semiconductor. The substrate 5 includes a plurality of signal terminals (not shown) for inputting and outputting signals.

  Here, the lower surface of the electronic component 2 includes a first region R1 located in the center and a second region R2 located near the outer periphery of the electronic component 2 and surrounding the first region R1, and the first region R1. A plurality of power supply terminals 6P and a plurality of ground terminals 6G are arranged, and a plurality of signal terminals are arranged in the second region R2.

  In the first region R1, the plurality of terminals 6 are arranged, for example, in a lattice pattern, and the plurality of power supply terminals 6P are arranged in a staggered manner by alternately positioning the power supply terminals 6P and the ground terminals 6G. In addition, a plurality of ground terminals 6G are also arranged in a staggered pattern. In this case, the pitch between the plurality of terminals 6 in the first region R1 is set to, for example, 200 μm or more and 250 μm or less. In the first region R1, the plurality of terminals 6 may not be arranged in a lattice pattern. Further, the pitch between the plurality of terminals 6 can be obtained by measuring the distance between the centers of the adjacent terminals 6 in a cross section cut in the thickness direction. Hereinafter, the pitch of each member is obtained in the same manner as the pitch of the terminals 6.

  In the second region R2, the plurality of signal terminals are arranged in a lattice pattern, for example. The pitch between the plurality of terminals 6 in the second region R2 is set smaller than the pitch between the plurality of terminals 6 in the first region R1. The pitch between the plurality of terminals 6 in the second region R2 is set to 128 μm or more and 180 μm or less, for example.

  The bump 3 is made of a conductive material such as solder including lead, tin, silver, gold, copper, zinc, bismuth, indium, aluminum, or the like.

  The wiring board 4 electrically connects the electronic component 2 and a mother board (not shown). The electronic component 2 is mounted on the upper surface, and the lower surface is connected to the motherboard via ball bumps (not shown). Implemented. The wiring substrate 4 includes a flat core substrate 7 and a pair of buildup layers 8 formed on both sides of the core substrate 7.

  The core substrate 7 is intended to increase the strength of the wiring substrate 4 while achieving electrical connection between the pair of build-up layers 8, and includes a flat substrate 9 having a plurality of cylindrical through holes penetrating in the thickness direction, And a through-hole conductor 10 filled in the plurality of through-holes.

  The base 9 is for increasing the rigidity of the core substrate 7 and includes, for example, a resin such as an epoxy resin, a silica filler coated with the resin, and a glass cloth coated with the resin. The thickness of the substrate 9 is set to, for example, 0.4 mm or more and 1.2 mm or less. Note that the thickness of the base 9 is larger than the thickness of an insulating layer 11 described later, and further larger than the thickness of one buildup layer 8.

  The through-hole conductor 10 electrically connects the build-up layers 8 on the upper and lower sides of the core substrate 7 and can be formed of, for example, a conductive material such as copper, aluminum, or nickel. It is desirable to use copper having high conductivity. The plurality of through-hole conductors 10 are arranged in a lattice pattern. The pitch between the plurality of through-hole conductors 10 is smaller than the pitch between the plurality of terminals 6 in the first region R1. The pitch between the plurality of through-hole conductors 10 is set to, for example, 100 μm or more and 180 μm or less.

  The through-hole conductor 10 is electrically connected to the bump 3 and the terminal 6 through a via conductor 13 and a pad 14 described later. The plurality of through-hole conductors 10 include a plurality of power through-hole conductors 10P electrically connected to the power supply terminal 6P, a plurality of ground through-hole conductors 10G electrically connected to the ground terminal 6G, And a plurality of signal through-hole conductors (not shown) electrically connected to the signal terminals.

  On the other hand, a pair of buildup layers 8 are formed on both sides of the core substrate 7 as described above. The buildup layer 8 functions as a multilayer wiring layer for routing the wiring while increasing the wiring density. The buildup layer 8 is laminated on the base 9 and has an insulating layer 11 formed with via holes penetrating in the thickness direction, a conductive layer 12 formed on the base 9 or on the insulating layer 11, and the via holes And a via conductor 13 electrically connected to the conductive layer 12, and a pad 14 disposed on the uppermost insulating layer 11 and electrically connected to the via conductor 13 and connected to the bump 3. Is included. In the present embodiment, one buildup layer 8 includes three insulating layers 11.

  Here, for convenience, a pair of buildup layers 8 disposed on the electronic component 2 side is referred to as a first buildup layer 8a, and a pair disposed on the motherboard side is referred to as a second buildup layer 8b.

  The insulating layer 11 not only functions as a support member that supports the conductive layer 12, but also functions as an insulating member that prevents a short circuit between the conductive layers 12, and is coated with a resin such as an epoxy resin and the resin. And silica filler. The thickness of the insulating layer 11 is set to be smaller than that of the base 9. As a result, the base 9 can increase the rigidity of the wiring board 4 while increasing the wiring density in the buildup layer 8. The thickness of the insulating layer 11 is set to 20 μm or more and 40 μm or less, for example.

  Here, for convenience, the three insulating layers 11 included in the first buildup layer 8a are sequentially connected to the first insulating layer 11a, the second insulating layer 11b, and the third insulating layer 11c (uppermost layer) from the base 9 side. To do.

  The conductive layer 12 functions by wiring. For example, a layer formed of a metal material such as copper, silver, gold, aluminum, nickel, or chromium can be used. It is desirable to use The thickness of the conductive layer 12 is set to, for example, 10 μm or more and 25 μm or less.

  Here, for convenience, the names of the layers on which the conductive layer 12 is provided are FC1, FC2, and FC3 from the upper surface of the base 9 toward the upper surface of the wiring substrate 4, and from the lower surface of the base 9 to the lower surface of the wiring substrate 4. Toward, BC1, BC2, and BC3.

  The conductive layer 12 includes a plurality of power conductive layers 12P electrically connected to the power terminals 6P, a plurality of ground conductive layers 12G electrically connected to the ground terminals 6G, and signal terminals. And a plurality of signal conductive layers (not shown) electrically connected to each other. The power supply conductive layer 12P and the ground conductive layer 12G include a solid layer formed in a solid shape. The solid layer of the power supply conductive layer 12P and the solid layer of the ground conductive layer 12G are alternately arranged. In the first buildup layer 8a, as shown in FIGS. 2, 4A, and 4B, the solid layer (FC1) of the ground conductive layer 12G and the power supply conductive layer 12P are formed from the upper surface of the base 9. The solid layer (FC2) and the solid layer (FC3) of the ground conductive layer 12G are formed in this order. In the second buildup layer 8b, as shown in FIGS. 2 and 4C, from the lower surface of the base 9, a solid layer (BC1) of the power supply conductive layer 12P and a solid layer (BC2) of the ground conductive layer 12G are formed. ) And the solid layer (BC3) of the conductive layer 12P for power supply.

  The via conductor 13 connects the conductive layers 12 that are spaced apart from each other in the thickness direction. For example, the via conductor 13 may be formed of a metal material such as copper, silver, gold, aluminum, nickel, or chromium. Among them, it is desirable to use copper from the viewpoint of conductivity. The via conductor 13 is formed in a tapered shape in which the upper surface and the lower surface are circular and the diameter decreases toward the core substrate 7.

  The via conductor 13 includes a plurality of power via conductors 13P electrically connected to the power terminal 6P, a plurality of ground via conductors 13G electrically connected to the ground terminal 6G, and a signal terminal. And a plurality of signal via conductors (not shown) electrically connected to each other.

  The pad 14 functions as a terminal for electrically connecting to the electronic component 2, and for example, a pad formed of a metal material such as copper, silver, gold, aluminum, nickel, or chromium can be used. In particular, it is desirable to use copper from the viewpoint of conductivity. The pad 14 is formed in a disk shape, for example. The thickness of the pad 14 is set to, for example, 10 μm or more and 25 μm or less.

  The pad 14 is electrically connected to a plurality of power supply pads 14P electrically connected to the power supply terminal 6P, a plurality of ground pads 14G electrically connected to the ground terminal 6G, and a signal terminal. And a plurality of signal pads (not shown) connected to the. These pads 14 are arranged in the same manner as the terminals 6 to be connected.

  In the wiring board 4 described above, the plurality of power supply through-hole conductors 10P, the plurality of power supply conductive layers 12P, the plurality of power supply via conductors 13P, and the plurality of power supply pads 14P are electrically connected to each other. One set of power supply wiring is configured, and only one set of power supply wiring is formed on the wiring board 4. In this power supply wiring, a plurality of power supply through-hole conductors 6P or a plurality of power supply via conductors 13P are electrically connected to each other by a solid layer of the power supply conductive layer 12P.

  Similarly, the plurality of ground through-hole conductors 10G, the plurality of ground conductive layers 12G, the plurality of ground via conductors 13G, and the plurality of ground pads 14G are electrically connected to each other to form a set of grounds. The wiring wiring board 4 is formed with only one set of ground wiring. In this ground wiring, the plurality of ground through-hole conductors 6G or the plurality of ground via conductors 13G are electrically connected to each other by the solid layer of the ground conductive layer 12G.

  Further, the signal through-hole conductor, the signal conductive layer of each layer, the signal via conductor of each layer, and the signal pad are electrically connected to each other one by one, so that one set of signal wiring on the wiring board 4 A plurality of sets of signal wirings are formed on the wiring board 4.

  By the way, the thickness of the base 9 in the core substrate 7 is larger than the thickness of the insulating layer 11 of the buildup layer 8. Therefore, the impedance and inductance of the power supply through-hole conductor 10P penetrating the base 9 in the thickness direction tend to be larger than the impedance and inductance of the power supply via conductor 13P penetrating the insulating layer 11 in the thickness direction.

  On the other hand, in the present embodiment, as shown in FIG. 2, in one set of power supply pad 14P and power supply through-hole conductor 10P electrically connected to each other, that is, in one set of power supply wiring, The number of conductors 10P is larger than the number of power supply pads 14P. As a result, by increasing the number of power supply through-hole conductors 10P and increasing in parallel the paths through which power supply current flows in the core substrate 7, the impedance of the power supply through-hole conductor 10P in the core substrate 7 and Inductance can be reduced. Therefore, it is possible to stabilize the voltage in the power supply wiring and to operate the electronic component 2 with high reliability. Note that the number of power supply through-hole conductors 10P is set to be, for example, two to four times the number of power supply pads 14P.

  In the set of power supply pads 14P, power supply via conductors 13P, and power supply through-hole conductors 10P that are electrically connected to each other, that is, in one set of power supply wirings, the number of power supply through-hole conductors 10P is the maximum. There are more than the number of power supply via conductors 13P penetrating through the third insulating layer 11c located in the upper layer. As a result, it is possible to effectively stabilize the voltage in the power supply wiring by reducing the impedance and the inductance in the power supply through-hole conductor 10P that penetrates the base 9 having a thickness larger than that of the third insulating layer 11c in the thickness direction. Can do.

  In the present embodiment, the number of power supply via conductors 13P penetrating the third resin layer 11c is equal to the number of power supply pads 14P, and the power supply via conductors 13P penetrating the third resin layer 11c are each a power source. Connected to the pad 14P.

  In the present embodiment, the number of power supply via conductors 13P penetrating the first resin layer 11a is equal to the number of power supply through-hole conductors 10P, and the power supply via conductors penetrating the first resin layer 11a. 13P is connected to the through-hole conductor 10P for power supplies, respectively. In the conductive layer 12 (FC2) on the first resin layer 11a, the power supply via conductors 13P penetrating the first resin layer 11a are electrically connected to each other through the solid layer of the power supply conductive layer 12. A power supply via conductor 13 </ b> P penetrating the second resin layer 11 b is connected to the solid layer of the power supply conductive layer 12. The number of power supply via conductors 13P penetrating the second resin layer 11b is smaller than the number of power supply via conductors 13P penetrating the first resin layer 11a, and the number of power supply via conductors 13P penetrating the third resin layer 11c. It is equal to the number of via conductors 13P. The power supply via conductor 13P that penetrates the second resin layer 11b is connected to the power supply via conductor 13P that penetrates the third resin layer 11c. The number of power supply via conductors 13P in each layer may be changed as appropriate.

  In the present embodiment, the power supply through-hole conductor 10P is filled in the power supply through-hole penetrating the base 9P in the thickness direction. As a result, the impedance and inductance of one power supply through-hole conductor 10P can be reduced.

  On the other hand, in this embodiment, in the set of ground pads 14G and ground through-hole conductors 10G that are electrically connected to each other, that is, in the ground wiring, the number of ground through-hole conductors 10G is equal to the number of ground pads 14G. More than the number. As a result, similarly to the power supply wiring, the voltage can be stabilized in the ground wiring, and as a result, the electronic component 2 can be operated with high reliability.

  In the present embodiment, the ground through-hole conductors 10G are electrically connected to each other through the solid layer of the ground conductive layer 12 in the conductive layer 12 (FC1) on the base 9. A ground via conductor 13G penetrating the first resin layer 11a is connected to the solid layer of the ground conductive layer 12. The number of ground via conductors 13G penetrating the first resin layer 11a is smaller than the number of ground through-hole conductors 10G, and the number of ground via conductors 13G penetrating the second resin layer 11b is It is equal to the number of ground via conductors 13G penetrating through the three resin layers 11c and the number of ground pads 14G. The number of ground via conductors 13G in each layer may be changed as appropriate.

  On the other hand, in one set of signal pads and signal through-hole conductors electrically connected to each other, that is, in one set of signal wirings, the number of signal through-hole conductors is equal to the number of signal pads. As a result, the signal pads and the signal through-hole conductors can be connected on a one-to-one basis, and signals can be transmitted satisfactorily in the signal wiring.

  Thus, the mounting structure 1 described above exhibits a desired function by driving or controlling the electronic component 2 based on the power supply and signals supplied via the wiring board 4.

  Next, the manufacturing method of the mounting structure 1 mentioned above is demonstrated based on drawing.

  (1) As shown in FIG. 5, the core substrate 6 is produced. Specifically, for example, the following is performed.

  A copper-clad laminate comprising a substrate 9 obtained by curing an uncured resin sheet and copper foils disposed above and below the substrate 9 is prepared. Next, through-holes are formed in the copper-clad laminate 5x using sandblasting. Next, the through hole conductor 10 is formed by filling the through hole with a conductive material by, for example, an electroless plating method, an electrolytic plating method, a vapor deposition method, a CVD method, or a sputtering method. Next, the conductive layer 12 is formed by patterning the copper foil on the substrate 9 by a conventionally known photolithography technique, etching, or the like. As described above, the core substrate 7 can be manufactured.

  Here, a through hole forming method using sandblasting will be described in detail.

  First, a resist having openings at through-hole formation locations is formed on both sides of a copper clad laminate. This resist can be formed, for example, by exposure and development of a photosensitive resin. Next, fine particles are sprayed onto one main surface of the copper clad laminate from the nozzle of the sand blasting device, thereby forming a part (non-penetrating) of the through hole through the opening of the resist. Next, a through hole penetrating the substrate 9 is formed by injecting fine particles onto the other main surface of the copper clad laminate. Note that the through hole penetrating the base 9 may be formed by spraying fine particles only on one main surface of the copper clad laminate. Next, the resist is removed with, for example, 1 to 3 wt% sodium hydroxide solution. Next, the inner wall of the through hole is washed with high pressure water to remove the remaining fine particles and the processing waste of the through hole. As described above, a through hole can be formed using sandblasting.

  When the sandblasting method is used as described above, through holes are formed by injection of fine particles, so that stress and heat applied to the boundary between the glass cloth and the resin can be reduced as compared with drilling. Furthermore, compared with laser processing, the heat applied to the boundary between the glass cloth and the resin can be reduced. Therefore, when the sandblasting method is used, the separation between the glass cloth and the resin can be reduced as compared with drilling or laser processing, so that the distance between the through-hole conductors 10 adjacent to each other can be reduced. The through-hole conductor 10 can be narrowed and the pitch can be reduced. As a result, as described above, the power through-hole conductors 10P can be made narrower than the power pads 14P, and the number of power through-hole conductors 10P can be made larger than the number of power pads 14P. Similarly to the power supply through-hole conductor 10P, the number of ground through-hole conductors 10G can be made larger than the number of ground pads 14G.

  In addition, since sandblasting is performed using a resist, a plurality of through holes can be processed simultaneously by spraying a wide range of fine particles, so that through holes can be formed more efficiently than drilling or laser processing. Therefore, even if the number of through holes is increased, an increase in processing time can be suppressed.

  In addition, when sandblasting is used, when the silica filler content in the substrate 9 is increased, the drill does not wear like drilling, and through holes can be formed more easily than laser processing. Can do.

  In order to form a through hole by sandblasting as described above, sandblasting can be performed under the following conditions.

  First, sandblasting is performed by drive blasting. As a result, since resistance to fine particles is smaller than that of wet blasting, it is possible to improve the machinability of the through hole, reduce the residual of machining waste during cutting, and reduce the cutting hindrance due to the machining waste.

  Further, as fine particles to be ejected by sandblasting, fine particles having a crushed shape (crushed particles) made of an inorganic insulating material having higher hardness than glass can be used. As a result, the glass cloth exposed on the inner wall of the through hole can be cut efficiently by the sharp edges of the crushed particles that are harder than the glass cloth, reducing the stress applied between the glass cloth and the resin. However, the through hole can be formed efficiently. As such an inorganic insulating material having a hardness higher than that of glass, for example, alumina, silicon carbide, zirconia, or the like can be used, and among these, it is desirable to use alumina. As the hardness, Vickers hardness can be used.

  Moreover, the maximum diameter of the fine particles is set to 3 μm or more and 40 μm or less. As a result, by setting the maximum diameter to 3 μm or more, it is possible to improve the machinability by crushed particles and easily form a through hole. In addition, by setting the maximum diameter to 40 μm or less, through holes can be formed without crushing the clogged particles.

  Moreover, it is desirable that the pressure for injecting the fine particles is set to 0.15 MPa or more and 0.22 MPa or less. As a result, the glass cloth in the through hole can be efficiently cut by setting the pressure to 0.15 MPa or more. Further, by setting the pressure to 0.22 MPa or less, it is possible to process so that the crushed particles collide with each other and the resin on the inner wall of the through hole is not excessively cut.

  Moreover, it is desirable that the injection amount of the fine particles is set to 30 g / min or more and 200 g / min or less. As a result, the glass cloth in the through hole can be efficiently cut by setting the injection amount to 30 g / min or more. Further, by setting the injection amount to 200 g / min or less, it is possible to process the crushed particles so that the resin on the inner wall of the through hole is not excessively cut.

  In addition, the number of times fine particles are ejected to one through hole (the number of scans) is set to, for example, 4 to 20 times when the thickness of the core substrate 7 is 40 to 200 μm.

  Further, in the substrate 9 for injecting fine particles, the content rate of the silica filler is set to 40% by volume or more and 75% by volume or less. As a result, the machinability of the resin layer 15 by sandblasting can be enhanced by setting the content rate of the silica filler to 40% by volume or more. In addition, when the content rate of the silica filler is 75% by volume or less, when the through hole is formed, the silica filler is prevented from degranulating from the inner wall of the through hole, and bubbles remain in the depression caused by the degranulation. It is possible to reduce the decrease in the adhesion strength between the hole inner wall and the conductive layer 12. In addition, the content rate of a silica filler is obtained by calculating the ratio of the volume of a silica filler with respect to the sum total of the volume of resin and a silica filler in the area | region which does not contain the glass cloth of the base | substrate 9. FIG.

  Here, it is desirable that the inner wall of the through hole formed by sandblasting is not desmeared. When through holes are formed by sandblasting, compared to drilling or laser processing, the heat applied to the inner walls of the through holes can be reduced to reduce the residue of carbonized resin, and the bonds between molecules can be physically reduced. Since it is cut, the reaction activity of the surface of the resin exposed on the inner wall of the through hole can be increased. By not performing the desmear treatment in this manner, it is possible to reduce only the resin from being selectively etched and to greatly expose the side surface of the glass cloth, and to reduce peeling between the resin and the glass cloth.

  (2) As shown in FIG. 6, by forming a pair of buildup layers 8 on both sides of the core substrate 7, the wiring substrate 4 is produced. Specifically, for example, it is performed as follows.

  First, an uncured resin is disposed on the conductive layer 12, and the insulating layer 11 is formed on the conductive layer 12 by further heating and curing the resin while heating and fluidly adhering the resin. Next, a via hole is formed by laser processing, and at least a part of the conductive layer 12 is exposed in the via hole. Thus, by forming a via hole by laser processing, damage to the conductive layer 12 exposed in the via hole can be reduced as compared with sandblasting. Next, the via conductor 13 is formed in the via hole and the conductive layer 12 is formed on the upper surface of the insulating layer 11 by, for example, a semi-additive method, a subtractive method, or a full additive method. By repeating the above steps, the buildup layer 8 can be formed. A pad 14 can be formed on the upper surface of the uppermost insulating layer 11 in the same manner as the conductive layer 12.

  The wiring board 4 can be produced as described above. By repeating this step, the insulating layer 11 and the conductive layer 12 can be made more multilayered in the buildup layer 8.

  (3) The bump 3 is formed on the upper surface of the pad 14 and the electronic component 2 is flip-chip mounted on the wiring board 4 via the bump 3.

  As described above, the mounting structure 1 shown in FIG. 1A can be manufactured.

  The present invention is not limited to the above-described embodiments, and various modifications, improvements, combinations, and the like can be made without departing from the spirit of the present invention.

  For example, in the above-described embodiment, the configuration in which the build-up layer includes three insulating layers has been described as an example, but the build-up layer may include any number of insulating layers.

  Moreover, in the above-described embodiment, the configuration in which the through-hole conductor is filled in the through-hole has been described as an example. However, the through-hole conductor only needs to be arranged in the through-hole, and the inner wall of the through-hole is covered in a cylindrical shape. It does not matter.

  In the above-described embodiment, the configuration in which the via conductor is filled in the via hole has been described as an example. However, the via conductor only needs to be disposed in the via hole, and the inner wall of the via hole is covered in a cylindrical shape. It doesn't matter.

  In the above-described embodiment, a stack structure in which a plurality of via conductors are stacked is formed. However, the stack structure may not be used, and for example, a spiral structure may be used.

  Moreover, in embodiment mentioned above, although the structure using copper foil was demonstrated to the example in the process of (1), the metal which consists of metal materials, such as an iron nickel alloy or an iron nickel cobalt alloy, for example instead of copper foil A foil may be used.

DESCRIPTION OF SYMBOLS 1 Mounting structure 2 Electronic component 3 Bump 4 Wiring board 5 Semiconductor substrate 6 Terminal 7 Core board 8 Build-up layer 9 Base 10 Through-hole conductor 11 Insulating layer 12 Conductive layer 13 Via conductor

Claims (3)

Preparing a substrate;
Forming a core substrate by forming a plurality of power supply through holes penetrating the substrate in the thickness direction using sandblasting, and forming a plurality of power supply through hole conductors in the plurality of power supply through holes; and ,
A plurality of power supplies formed with an insulating layer having a smaller thickness than the base on the core substrate and electrically connected to power supply terminals of the electronic component and electrically connected to the plurality of power supply through-hole conductors Forming a build-up layer on which the electronic component is mounted on the core substrate by forming a pad for use on the insulating layer,
A pair of the power supply pads and the power supply through holes that are electrically connected to each other while the pitch of the power supply through holes in the region corresponding to the center of the lower surface of the electronic component is narrower than the pitch of the power supply pads In the conductor, the number of the through-hole conductors for power supply is in the range of 2 to 4 times the pad for power supply. In the manufacturing method of the wiring board of Claim 1,
In the step of forming the build-up layer on the core substrate,
Forming a plurality of power supply via holes penetrating the insulating layer in the thickness direction by using laser processing, forming a plurality of power supply via conductors in the plurality of power supply via holes, and then forming the plurality of power supply via conductors; Forming the plurality of power supply pads electrically connected to the plurality of power supply through-hole conductors via
In the set of the power supply pad, the power supply via conductor, and the power supply through-hole conductor that are electrically connected to each other, the number of the power supply through-hole conductors is greater than the number of the power supply via conductors. A method for manufacturing a wiring board.   The process of mounting the said electronic component on the said buildup layer, electrically connecting the terminal for power supplies of an electronic component to the said power supply pad of the said wiring board produced by the manufacturing method of the wiring board of Claim 1 A method for manufacturing a mounting structure, comprising:

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