JP2016039246A - Photoelectric conversion element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a photoelectric conversion element capable of improving characteristics.SOLUTION: The photoelectric conversion element includes: an n-type semiconductor substrate (1); an amorphous silicon film (6b) on the semiconductor substrate (1); a crystalline silicon part (6a) between the semiconductor substrate (1) and the amorphous silicon film (6b); and an insulator film (7) capable of having a positive constant charge (22) on the amorphous silicon film (6b).SELECTED DRAWING: Figure 1

Description

  The present invention relates to a photoelectric conversion element.

  In recent years, a solar cell that directly converts solar energy into electric energy has been rapidly expected as a next-generation energy source particularly from the viewpoint of global environmental problems. There are various types of solar cells, such as those using compound semiconductors or organic materials, but the mainstream is currently using silicon crystals.

  Currently, the most manufactured and sold solar cells have a structure in which electrodes are respectively formed on a light receiving surface that is a surface on which sunlight is incident and a back surface that is opposite to the light receiving surface.

  However, when an electrode is formed on the light receiving surface, sunlight is reflected and absorbed by the electrode, so that the amount of incident sunlight is reduced by the area of the electrode. For this reason, development of solar cells in which electrodes are formed only on the back surface is being promoted (see, for example, Patent Document 1).

  In FIG. 20, the typical expanded sectional view of the light-receiving surface of the solar cell of patent document 1 is shown. As shown in FIG. 20, the light receiving surface of the solar cell described in Patent Document 1 is formed on an i-type amorphous semiconductor layer 102 and a substrate 101 having the same conductivity type on a substrate 101 made of an n-type or p-type semiconductor. The amorphous semiconductor layer 103 and the protective layer 104 are stacked in this order.

JP 2010-258043 A

  However, in the solar cell described in Patent Document 1, light in the short wavelength region out of the light incident on the light receiving surface of the solar cell is absorbed by the i-type amorphous semiconductor layer 102 and the amorphous semiconductor layer 103. Therefore, there is a problem that sufficient characteristics cannot be obtained.

  Embodiments disclosed herein include an n-type semiconductor substrate, an amorphous silicon film on the semiconductor substrate, a crystalline silicon portion between the semiconductor substrate and the amorphous silicon film, and an amorphous silicon film. And an insulating film that can have a positive fixed charge.

  In addition, an embodiment disclosed herein includes an n-type semiconductor substrate, an amorphous silicon film on the semiconductor substrate, a crystalline silicon portion between the semiconductor substrate and the amorphous silicon film, and amorphous silicon. An insulating film on the film, and the insulating film is a photoelectric conversion element including at least one of a silicon nitride film and a silicon oxynitride film.

  In addition, the embodiment disclosed herein includes a p-type semiconductor substrate, an amorphous silicon film on the semiconductor substrate, a crystalline silicon portion between the semiconductor substrate and the amorphous silicon film, and amorphous silicon. It is a photoelectric conversion element provided with the insulating film which can have a negative fixed charge on a film | membrane.

  According to the embodiment disclosed herein, a photoelectric conversion element capable of improving characteristics can be provided.

2 is a schematic cross-sectional view of a heterojunction back contact cell according to Embodiment 1. FIG. FIG. 3 is a schematic enlarged cross-sectional view illustrating the operational effect of the heterojunction back contact cell of Embodiment 1. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. FIG. 3 is a schematic cross-sectional view illustrating a part of the manufacturing process of the example of the method for manufacturing the heterojunction back contact cell according to the first embodiment. 4 is an enlarged photograph of an example of a crystalline silicon portion between a light receiving surface of a semiconductor substrate and an amorphous silicon film on the light receiving surface of a heterojunction back contact cell according to Embodiment 1. 6 is a schematic cross-sectional view of a heterojunction back contact cell of Embodiment 2. FIG. 6 is a schematic cross-sectional view of a heterojunction back contact cell according to Embodiment 4. FIG. FIG. 6 is a schematic enlarged cross-sectional view illustrating the operational effects of the heterojunction back contact cell of Embodiment 4. 2 is a schematic enlarged cross-sectional view of a light receiving surface of a solar cell described in Patent Document 1. FIG.

  Hereinafter, embodiments will be described. In the drawings used to describe the embodiments, the same reference numerals represent the same or corresponding parts.

[Embodiment 1]
<Configuration of photoelectric conversion element>
FIG. 1 is a schematic cross-sectional view of a heterojunction back contact cell according to Embodiment 1, which is an example of the photoelectric conversion element according to Embodiment 1. FIG. The heterojunction back contact cell according to the first embodiment includes a semiconductor substrate 1 which is an n-type single crystal silicon substrate, and a crystalline silicon portion 6a on the unevenness 1a of one main surface (hereinafter referred to as “light receiving surface”) of the semiconductor substrate 1. And an amorphous silicon film 6b, and an insulating film 7 on the laminate 6. Here, the stacked body 6 includes a crystalline silicon portion 6 a in contact with the unevenness 1 a of the semiconductor substrate 1 and an amorphous silicon film 6 b in contact with the crystalline silicon portion 6 a in this order. That is, the crystalline silicon portion 6a is provided between the semiconductor substrate 1 and the amorphous silicon film 6b. The insulating film 7 is provided in contact with the amorphous silicon film 6b.

In the first embodiment, the crystalline silicon portion 6a is i-type polycrystalline silicon, and the amorphous silicon film 6b is an i-type amorphous silicon film. The insulating film 7 is a silicon nitride (SiN _x ) film that can have a positive fixed charge.

In the present specification, “i-type” means not only a completely intrinsic state but also a sufficiently low concentration (the n-type impurity concentration is less than 1 × 10 ¹⁵ / cm ³ and the p-type impurity concentration is 1 × (Less than 10 ¹⁵ / cm ³ ) is meant to include n-type or p-type impurities. In this specification, “n-type” means a state where the n-type impurity concentration is 1 × 10 ¹⁵ / cm ³ or more, and “p-type” means that the p-type impurity concentration is 1 × 10 ¹⁵ / cm ³ or more. Means the state.

  In this specification, “amorphous silicon” includes not only amorphous silicon in which dangling bonds of silicon atoms are not terminated with hydrogen, but also silicon such as hydrogenated amorphous silicon. Also included are those in which dangling bonds of atoms are terminated with hydrogen.

  The semiconductor substrate 1 includes a first i-type amorphous semiconductor film 2 and a second i-type amorphous semiconductor film 4 which are in contact with the back surface which is the other main surface of the semiconductor substrate 1. In the first embodiment, each of the first i-type amorphous semiconductor film 2 and the second i-type amorphous semiconductor film 4 is an i-type amorphous silicon film.

  On the first i-type amorphous semiconductor film 2, a first conductivity type amorphous silicon film 3 made of p-type amorphous silicon is provided in contact with the first i-type amorphous semiconductor film 2. ing. On the second i-type amorphous semiconductor film 4, a second conductivity type amorphous silicon film 5 made of n-type amorphous silicon is in contact with the second i-type amorphous semiconductor film 4. Is provided.

  A first electrode 11 is provided on the first conductivity type amorphous silicon film 3. A second electrode 12 is provided on the second conductivity type amorphous silicon film 5.

  The end of the stacked body of the second i-type amorphous semiconductor film 4 and the second conductivity-type amorphous silicon film 5 is the first i-type amorphous semiconductor film 2 and the first conductivity-type amorphous. The edge part of the laminated body with the silicon film 3 is covered. Therefore, the end of the second i-type amorphous semiconductor film 4 is located between the first conductive type amorphous silicon film 3 and the second conductive type amorphous silicon film 5. The end of the second i-type amorphous semiconductor film 4 is in contact with both the first conductivity type amorphous silicon film 3 and the second conductivity type amorphous silicon film 5. Thereby, the first conductivity type amorphous silicon film 3 and the second conductivity type amorphous silicon film 5 are separated by the second i-type amorphous semiconductor film 4.

<Effect>
In a conventional solar cell in which an electrode is formed only on the back surface, an amorphous silicon film is used as a passivation film for suppressing carrier recombination on the light receiving surface of the semiconductor substrate of the solar cell. This is because when the polycrystalline silicon film formed by the plasma CVD (Chemical Vapor Deposition) method is used as the passivation film, the interface between the amorphous silicon film and the polycrystalline silicon film increases. Because the interface contains many crystal defects, minority carriers in the semiconductor substrate generated by the incidence of light are captured by these crystal defects, and sufficient characteristics are not exhibited. It is.

  However, the amorphous silicon film absorbs more light in the short wavelength region than the polycrystalline silicon film. Therefore, when an amorphous silicon film is used as the passivation film on the light receiving surface, the amount of light incident on the semiconductor substrate in the short wavelength region is reduced, so that sufficient characteristics cannot be obtained.

  Therefore, in the heterojunction back contact cell of Embodiment 1, by providing the crystalline silicon portion 6a on the semiconductor substrate 1, the amount of light incident on the semiconductor substrate 1 in the short wavelength region (wavelength of 300 nm or more and 600 nm or less) is reduced. Become more.

  Further, in the heterojunction back contact cell of Embodiment 1, the interface between the crystalline silicon portion 6a and the amorphous silicon film 6b is increased by the crystalline silicon portion 6a, and the adverse effect of minority carrier trapping due to crystal defects at the interface. In order to avoid this, an insulating film 7 capable of having a positive fixed charge is provided on the crystalline silicon portion 6a via an amorphous silicon film 6b. As a result, as shown in the schematic enlarged cross-sectional view of FIG. 2, positive carriers that are minority carriers among the carriers (holes 23 and electrons 24) generated inside the semiconductor substrate 1 when light enters the semiconductor substrate 1. Since the hole 23 is moved away from the crystalline silicon portion 6 a by the repulsive force due to the energy level barrier formed by the positive fixed charge 22 of the insulating film 7, it is difficult to be captured by the crystal defect 21. Then, the holes 23 are extracted from the first electrode 11 through the first i-type amorphous semiconductor film 2 and the first conductive amorphous silicon film 3, and the electrons 24 are extracted from the second i-type amorphous semiconductor film. It is taken out from the second electrode 12 through the semiconductor film 4 and the second conductivity type amorphous silicon film 5.

  For the above reasons, in the heterojunction back contact cell of Embodiment 1, the amount of light generated in the short wavelength region is increased by the crystalline silicon portion 6a, thereby increasing the amount of carriers generated in the semiconductor substrate 1, Furthermore, since minority carriers generated inside the semiconductor substrate 1 by the insulating film 7 are less likely to be captured by the crystal defects 21, a photoelectric conversion element having better characteristics than the conventional one can be obtained.

  In the above description, the case where the crystalline silicon portion 6a is formed on the entire surface of the unevenness 1a of the light receiving surface of the semiconductor substrate 1 has been described. 6a may be formed. In particular, the crystalline silicon portion 6 a is easily formed in the concave portion of the concave and convex portion 1 a on the light receiving surface of the semiconductor substrate 1. However, from the viewpoint of making more light in the short wavelength region incident on the semiconductor substrate 1, it is preferable that the formation region of the crystalline silicon portion 6 a on the unevenness 1 a of the light receiving surface of the semiconductor substrate 1 is wide.

  In addition, the presence of the crystalline silicon portion 6a between the semiconductor substrate 1 and the amorphous silicon film 6b in the heterojunction back contact cell of Embodiment 1 can be confirmed by, for example, a transmission electron microscope (TEM).

  Further, the thickness t of the crystalline silicon portion 6a is preferably 1/5 or more of the thickness T of the stacked body 6 of the crystalline silicon portion 6a and the amorphous silicon film 6b. In this case, the amount of light in the short wavelength region incident on the semiconductor substrate 1 can be further increased.

<Method for producing photoelectric conversion element>
Hereinafter, an example of a method for manufacturing the heterojunction back contact cell of Embodiment 1 will be described with reference to schematic cross-sectional views of FIGS. First, as shown in FIG. 3, the unevenness 1 a is formed on the light receiving surface of the semiconductor substrate 1.

  Here, the unevenness 1a on the light receiving surface of the semiconductor substrate 1 can be formed, for example, by texture-etching the light receiving surface of the semiconductor substrate 1 after forming a texture mask on the entire back surface of the semiconductor substrate 1. For example, silicon nitride or silicon oxide can be used as the texture mask. Moreover, as an etchant used for texture etching, for example, an alkaline solution capable of dissolving silicon can be used.

  As the semiconductor substrate 1, an n-type single crystal silicon substrate can be suitably used, but is not limited to an n-type single crystal silicon substrate, and for example, a conventionally known n-type semiconductor substrate can be used as appropriate.

Next, as shown in FIG. 4, a crystalline silicon portion 6 a is formed on the unevenness 1 a of the light receiving surface of the semiconductor substrate 1. Here, the crystalline silicon portion 6a can be formed by, for example, a plasma CVD method. Hydrogen (H ₂ ) gas is allowed to flow during formation of the crystalline silicon portion 6a by the plasma CVD method, whereby silicon dangling bonds between the interface between the semiconductor substrate 1 and the crystalline silicon portion 6a and between the crystalline silicon portions 6a. By attaching hydrogen atoms to the crystal, crystal defects can be reduced.

  Next, as shown in FIG. 5, an amorphous silicon film 6b is formed on the crystalline silicon portion 6a. Here, the amorphous silicon film 6b can be formed by, for example, a plasma CVD method.

The formation conditions for forming the crystalline silicon portion 6a and the amorphous silicon film 6b by the plasma CVD method are particularly limited as long as the crystalline silicon portion 6a and the amorphous silicon film 6b can be formed, respectively. However, for example, the plasma power when the crystalline silicon portion 6a is formed is higher than the plasma power when the amorphous silicon film 6b is formed, and H ₂ against silane (SiH ₄ ) gas when the crystalline silicon portion 6a is formed. Conditions under which the gas flow rate ratio ((H ₂ gas flow rate) / (SiH ₄ gas flow rate)) is larger than the flow rate ratio of H ₂ gas to SiH ₄ gas during formation of the amorphous silicon film, or these conditions By adopting a combination of the conditions, the crystalline silicon portion 6a and the amorphous silicon film 6b can be formed by the plasma CVD method, respectively. it can.

Next, as shown in FIG. 6, an insulating film 7 which is a SiN _x film is formed on the amorphous silicon film 6b. Here, the insulating film 7 can be formed by, for example, a plasma CVD method.

When the insulating film 7 is formed by plasma CVD, the composition ratio of Si and N in the insulating film 7 that is a SiN _x film can be set relatively freely. The insulating film 7 can be formed by setting the composition ratio of Si and N so as to have a fixed charge of 5%.

  Next, as shown in FIG. 7, a first i-type amorphous semiconductor film 2 is formed on the entire back surface of the semiconductor substrate 1. The method for forming the first i-type amorphous semiconductor film 2 is not particularly limited, and for example, a plasma CVD method can be used.

  As the first i-type amorphous semiconductor film 2, an i-type amorphous silicon film can be preferably used, but is not limited to an i-type amorphous silicon film. A quality semiconductor film can also be used.

  Next, as shown in FIG. 8, a first conductivity type amorphous silicon film 3 is formed on the back surface of the semiconductor substrate 1. Although the formation method of the 1st conductivity type amorphous silicon film 3 is not specifically limited, For example, plasma CVD method can be used.

  As the first conductive type amorphous silicon film 3, a p-type amorphous silicon film can be suitably used, but is not limited to a p-type amorphous silicon film, and for example, a conventionally known p-type amorphous silicon film is used. A semiconductor film can also be used. As the p-type impurity contained in the p-type amorphous silicon film constituting the first conductivity type amorphous silicon film 3, for example, boron can be used.

  Next, as shown in FIG. 9, an etching mask 31 such as a photoresist having an opening at a location where the semiconductor substrate 1 is etched in the thickness direction is formed on the first conductivity type amorphous silicon film 3.

  Next, as shown in FIG. 10, the stacked body 51 of the first i-type amorphous semiconductor film 2 and the first conductive type amorphous silicon film 3 is etched in the thickness direction using the etching mask 31 as a mask. As a result, a part of the semiconductor substrate 1 is exposed.

  Next, as shown in FIG. 11, a second i-type amorphous semiconductor film 4 is formed so as to cover the exposed surface of the semiconductor substrate 1 and the first conductive type amorphous silicon film 3. The method for forming the second i-type amorphous semiconductor film 4 is not particularly limited, and for example, a plasma CVD method can be used.

  As the second i-type amorphous semiconductor film 4, an i-type amorphous silicon film can be suitably used, but is not limited to an i-type amorphous silicon film. For example, a conventionally known i-type amorphous silicon film is used. A quality semiconductor film can also be used.

  Next, as shown in FIG. 12, a second conductivity type amorphous silicon film 5 is formed on the second i-type amorphous semiconductor film 4. The method for forming the second conductivity type amorphous silicon film 5 is not particularly limited, but for example, a plasma CVD method can be used.

  As the second conductive type amorphous silicon film 5, an n-type amorphous silicon film can be suitably used, but is not limited to an n-type amorphous silicon film. For example, a conventionally known n-type amorphous silicon film is used. A semiconductor film can also be used. As the n-type impurity contained in the n-type amorphous silicon film constituting the second conductivity type amorphous silicon film 5, for example, phosphorus can be used.

  Next, as shown in FIG. 13, the photoresist is applied only to the portion where the stacked body of the second i-type amorphous semiconductor film 4 and the second conductive amorphous silicon film 5 is left on the back surface of the semiconductor substrate 1. Etching mask 32 is formed.

  Next, by etching a part of the stacked body 52 of the second i-type amorphous semiconductor film 4 and the second conductive amorphous silicon film 5 in the thickness direction using the etching mask 32 as a mask, As shown in FIG. 14, a part of the first conductivity type amorphous silicon film 3 is exposed. Thereafter, as shown in FIG. 15, the etching mask 32 is completely removed.

  Next, as shown in FIG. 1, the first electrode 11 is formed so as to contact the first conductivity type amorphous silicon film 3, and the second electrode 12 is formed so as to contact the second conductivity type amorphous silicon film 5. Form. Here, the formation method of the first electrode 11 and the second electrode 12 is not particularly limited, but for example, an evaporation method or the like can be used.

  Thus, the heterojunction back contact cell of Embodiment 1 having the configuration shown in FIG. 1 is completed.

  FIG. 16 shows an example of the crystalline silicon portion 6a between the light-receiving surface of the semiconductor substrate 1 and the amorphous silicon film 6b of the light-receiving surface of the heterojunction back contact cell of Embodiment 1 manufactured as described above. An enlarged photograph is shown. As shown in FIG. 16, in the light receiving surface of the heterojunction back contact cell of Embodiment 1, the presence of the crystalline silicon portion 6a can be confirmed between the semiconductor substrate 1 and the amorphous silicon film 6b. .

[Embodiment 2]
FIG. 17 is a schematic cross-sectional view of the heterojunction back contact cell of Embodiment 2, which is an example of the photoelectric conversion element of Embodiment 2. The heterojunction back contact cell of Embodiment 2 is characterized by using an insulating film 7a which is a silicon oxynitride film (SiO _x N _y film).

Even when the insulating film 7a, which is a SiO _y N _z film, is formed by the plasma CVD method, the composition ratio of Si, O, and N in the insulating film 7a can be set relatively freely. The insulating film 7a can be formed by setting the composition ratio of Si, O, and N so that has a positive fixed charge.

  Since the description other than the above in the second embodiment is the same as that in the first embodiment, the description thereof will not be repeated.

[Embodiment 3]
In the heterojunction back contact cell according to the third embodiment, a silicon oxynitride film (SiO _x N _y film) and a silicon nitride film (SiN _x film) are used instead of the insulating film 7 of the first embodiment and the insulating film 7a of the second embodiment. ) And a composite membrane.

As the composite film of the SiO _x N _y film and the SiN _x film, for example, a film in which the SiO _x N _y film and the SiN _x film are laminated in this order from the amorphous silicon film 6b side, an amorphous silicon film The composition of the film in which the SiN _x film and the SiO _x N _y film are laminated in this order from the 6b side, and the composition of the SiO _x N _y film laminated on the amorphous silicon film 6b are from the amorphous silicon film 6b side. A film whose thickness gradually changes in the thickness direction and whose outermost surface is SiN can be exemplified.

The composite film of the SiO _x N _y film and the SiN _x film can be formed by, for example, a plasma CVD method as in the first and second embodiments. The composition of the SiO _x N _y film can be changed by, for example, adjusting the composition ratio of Si, O, and N relatively freely by adjusting the flow rate ratio of the material gas introduced into the plasma CVD apparatus. Can do.

Furthermore, since the composition ratio of Si, O, and N can be changed, for example, during a series of film forming processes in one reaction chamber of the plasma CVD apparatus, the Si and O of the insulating film in the third embodiment can be changed. The composition ratio of N to N can be changed stepwise or can be changed continuously. For example, during a series of film formation processes in one reaction chamber of the plasma CVD apparatus by changing the composition ratio of Si, O, and N of the insulating film in Embodiment 3 stepwise or continuously. A composite film of the SiO _x N _y film and the SiN _x film exemplified above can be produced.

  Since the description other than the above in the third embodiment is the same as that in the first and second embodiments, the description thereof will not be repeated.

[Embodiment 4]
FIG. 18 is a schematic cross-sectional view of a heterojunction back contact cell of Embodiment 4 which is an example of the photoelectric conversion element of Embodiment 4. The heterojunction back contact cell of Embodiment 4 uses a semiconductor substrate 1b which is a p-type single crystal silicon substrate, and an insulating film 7b which is an aluminum oxide (AlO _x ) film capable of having a negative fixed charge. It is characterized by having.

Even when the insulating film 7b, which is an AlO _x film, is formed by the plasma CVD method, the composition ratio of Al and O in the insulating film 7b can be set, so that the insulating film 7b has a negative fixed charge. The insulating film 7b can be formed by setting the composition ratio of Al and O.

  Further, in the heterojunction back contact cell of Embodiment 4, as shown in the schematic enlarged cross-sectional view of FIG. 19, carriers (holes) generated inside the semiconductor substrate 1b when light enters the semiconductor substrate 1b. 23 and electrons 24), which are minority carriers, are trapped by the crystal defect 21 because they are moved away from the crystalline silicon portion 6a by the repulsive force caused by the energy level barrier formed by the negative fixed charge 25 of the insulating film 7b. It becomes difficult. The holes 23 are taken out from the first electrode 11 through the first i-type amorphous semiconductor film 2 and the first conductive amorphous silicon film 3, and the electrons 24 are extracted from the second i-type amorphous semiconductor. The film is taken out from the second electrode 12 through the film 4 and the second conductivity type amorphous silicon film 5.

  Since descriptions other than the above in the fourth embodiment are the same as those in the first to third embodiments, the description thereof will not be repeated.

[Appendix]
(1) An embodiment disclosed herein includes an n-type semiconductor substrate, an amorphous silicon film on the semiconductor substrate, a crystalline silicon portion between the semiconductor substrate and the amorphous silicon film, and an amorphous A photoelectric conversion element including an insulating film capable of having a positive fixed charge on a silicon film. The energy level formed by the insulating film that can have a positive fixed charge by increasing the incident amount of light in the short wavelength region to the semiconductor substrate due to the crystalline silicon portion between the semiconductor substrate and the amorphous silicon film. Due to the repulsive force of the barrier, minority carriers are generated due to crystal defects present at the interface between the crystalline silicon portion and the amorphous silicon film, the interface between the semiconductor substrate and the amorphous silicon film, and the interface between the semiconductor substrate and the crystalline silicon portion. Since the trapping can be suppressed, the characteristics of the photoelectric conversion element can be improved.

  (2) An embodiment disclosed herein includes an n-type semiconductor substrate, an amorphous silicon film on the semiconductor substrate, a crystalline silicon portion between the semiconductor substrate and the amorphous silicon film, and an amorphous An insulating film on the silicon film, and the insulating film is a photoelectric conversion element including at least one of a silicon nitride film and a silicon oxynitride film. The crystalline silicon portion between the semiconductor substrate and the amorphous silicon film increases the amount of light incident on the semiconductor substrate in the short wavelength region, and in this case as well, the insulating film can have a positive fixed charge. The repulsive force due to the energy level barrier formed by the insulating film causes the interface between the crystalline silicon portion and the amorphous silicon film, the interface between the semiconductor substrate and the amorphous silicon film, and between the semiconductor substrate and the crystalline silicon portion. Since it can be suppressed that minority carriers are captured by crystal defects present at the interface, the characteristics of the photoelectric conversion element can be improved.

  (3) An embodiment disclosed herein includes a p-type semiconductor substrate, an amorphous silicon film on the semiconductor substrate, a crystalline silicon portion between the semiconductor substrate and the amorphous silicon film, and an amorphous A photoelectric conversion element including an insulating film capable of having a negative fixed charge on a silicon film. The crystalline silicon portion between the semiconductor substrate and the amorphous silicon film increases the amount of light incident on the semiconductor substrate in the short wavelength region, and the insulating film that can have a negative fixed charge allows the crystalline silicon portion to Minority carriers can be prevented from being trapped by crystal defects existing at the interface with the crystalline silicon film, the interface between the semiconductor substrate and the amorphous silicon film, and the interface between the semiconductor substrate and the crystalline silicon portion. The characteristics of the photoelectric conversion element can be improved.

  (4) In the embodiment disclosed herein, the insulating film preferably includes an aluminum oxide film. Also in this case, since the insulating film can have a negative fixed charge, due to the repulsive force of the insulating film, the interface between the crystalline silicon portion and the amorphous silicon film, the interface between the semiconductor substrate and the amorphous silicon film, In addition, minority carriers can be suppressed from being captured by crystal defects present at the interface between the semiconductor substrate and the crystalline silicon portion.

  (5) In the embodiment disclosed herein, the semiconductor substrate preferably has at least one unevenness, and preferably has a crystalline silicon portion in at least one of the uneven recesses. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (6) In the embodiment disclosed herein, it is preferable that the semiconductor substrate and the crystalline silicon portion are in contact with each other. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (7) In the embodiment disclosed herein, it is preferable that the crystalline silicon portion and the amorphous silicon film are in contact with each other. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (8) In the embodiment disclosed herein, the thickness of the crystalline silicon part is preferably 1/5 or more of the thickness of the stacked body of the crystalline silicon part and the amorphous silicon film. In this case, the amount of light in the short wavelength region incident on the semiconductor substrate can be further increased.

  (9) In the embodiment disclosed herein, the amorphous silicon film and the insulating film are preferably in contact with each other. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (10) In the embodiment disclosed herein, the amorphous silicon film preferably includes i-type amorphous silicon. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (11) In the embodiment disclosed herein, the crystalline silicon portion preferably includes i-type polycrystalline silicon. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (12) In the embodiment disclosed herein, the semiconductor substrate preferably contains silicon. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (13) In the embodiment disclosed herein, a first conductive type amorphous silicon film and a second conductive type amorphous silicon film provided on the opposite side of the amorphous silicon film on the semiconductor substrate, It is preferable that a first electrode on the first conductivity type amorphous silicon film and a second electrode on the second conductivity type amorphous silicon film are provided. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (14) In the embodiment disclosed herein, a first i-type amorphous semiconductor film between a semiconductor substrate and a first conductive type amorphous silicon film, a semiconductor substrate, and a second conductive type amorphous It is preferable to further include a second i-type amorphous semiconductor film between the silicon film. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (15) In the embodiment disclosed herein, the semiconductor substrate and the first i-type amorphous semiconductor film are preferably in contact with each other. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (16) In the embodiment disclosed herein, it is preferable that the semiconductor substrate and the second i-type amorphous semiconductor film are in contact with each other. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (17) In the embodiment disclosed herein, it is preferable that the first i-type amorphous semiconductor film and the first conductivity-type amorphous silicon film are in contact with each other. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (18) In the embodiment disclosed herein, it is preferable that the second i-type amorphous semiconductor film and the second conductivity-type amorphous silicon film are in contact with each other. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (19) In the embodiment disclosed herein, the end of the second i-type amorphous semiconductor film is between the first conductive type amorphous silicon film and the second conductive type amorphous silicon film. Preferably it is located. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (20) In the embodiment disclosed herein, end portions of the second i-type amorphous semiconductor film are respectively connected to the first conductive type amorphous silicon film and the second conductive type amorphous silicon film. It is preferable to contact. Also in this case, the characteristics of the photoelectric conversion element can be improved.

  (21) An embodiment disclosed herein includes a step of forming a crystalline silicon portion on an n-type semiconductor substrate, a step of forming an amorphous silicon film on the crystalline silicon portion, and an amorphous silicon film And a step of forming an insulating film capable of having a positive fixed charge. The energy level formed by the insulating film that can have a positive fixed charge by increasing the incident amount of light in the short wavelength region to the semiconductor substrate due to the crystalline silicon portion between the semiconductor substrate and the amorphous silicon film. Due to the repulsive force of the barrier, minority carriers are generated due to crystal defects present at the interface between the crystalline silicon portion and the amorphous silicon film, the interface between the semiconductor substrate and the amorphous silicon film, and the interface between the semiconductor substrate and the crystalline silicon portion. Since the trapping can be suppressed, a photoelectric conversion element with improved characteristics can be manufactured.

  (22) An embodiment disclosed herein includes a step of forming a crystalline silicon portion on an n-type semiconductor substrate, a step of forming an amorphous silicon film on the crystalline silicon portion, and an amorphous silicon film And a step of forming at least one of a silicon nitride film and a silicon oxynitride film. The crystalline silicon portion between the semiconductor substrate and the amorphous silicon film increases the amount of light incident on the semiconductor substrate in the short wavelength region, and in this case as well, the insulating film can have a positive fixed charge. The repulsive force due to the energy level barrier formed by the insulating film causes the interface between the crystalline silicon portion and the amorphous silicon film, the interface between the semiconductor substrate and the amorphous silicon film, and between the semiconductor substrate and the crystalline silicon portion. Since minority carriers can be prevented from being captured by crystal defects present at the interface, a photoelectric conversion element with improved characteristics can be manufactured.

  (23) An embodiment disclosed herein includes a step of forming a crystalline silicon portion on a p-type semiconductor substrate, a step of forming an amorphous silicon film on the crystalline silicon portion, and an amorphous silicon film And a step of forming an insulating film capable of having a negative fixed charge. The energy level formed by the insulating film that can have a negative fixed charge by increasing the incident amount of light in the short wavelength region to the semiconductor substrate due to the crystalline silicon portion between the semiconductor substrate and the amorphous silicon film. Due to the repulsive force of the barrier, minority carriers are caused by crystal defects present at the interface between the crystalline silicon portion and the amorphous silicon film, the interface between the semiconductor substrate and the amorphous silicon film, and the interface between the semiconductor substrate and the crystalline silicon portion. Since the trapping can be suppressed, a photoelectric conversion element with improved characteristics can be manufactured.

  (24) In the embodiment disclosed herein, it is preferable that the step of forming the crystalline silicon portion and the step of forming the amorphous silicon film are each performed by a plasma CVD method. Also in this case, a photoelectric conversion element with improved characteristics can be manufactured.

  (25) In the embodiment disclosed herein, it is preferable that the plasma power when forming the crystalline silicon portion is higher than the plasma power when forming the amorphous silicon film. In this case, the crystalline silicon portion and the amorphous silicon film can be formed separately.

(26) In the embodiment disclosed herein, the flow ratio of H ₂ gas for SiH ₄ gas during the formation of the crystalline silicon portion, the flow rate of H ₂ gas for SiH ₄ gas during formation of the amorphous silicon film It is preferable that the ratio is larger than the flow rate ratio. Also in this case, the crystalline silicon portion and the amorphous silicon film can be formed separately.

  Although the embodiments of the present invention have been described above, it is also planned from the beginning to combine the configurations of the above-described embodiments as appropriate.

  It should be thought that embodiment disclosed this time is an illustration and restrictive at no points. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The photoelectric conversion element and the method for manufacturing a photoelectric conversion element of the embodiment disclosed herein can be suitably used for a solar cell and a method for manufacturing a solar cell. In addition, the photoelectric conversion element and the method for manufacturing the photoelectric conversion element of the embodiment disclosed herein can be suitably used for a heterojunction back contact cell and a method for manufacturing a heterojunction back contact cell.

  1, 1b Semiconductor substrate, 1a Concavity and convexity, 2 First i-type amorphous semiconductor film, 3 First conductivity type amorphous silicon film, 4 Second i type amorphous semiconductor film, 5 Second conductivity type non Crystalline silicon film, 6, 51, 52 laminate, 6a crystallized silicon part, 6b amorphous silicon film, 7, 7a, 7b insulating film, 11 first electrode, 12 second electrode, 21 crystal defect, 22 positive Fixed charge, 23 holes, 24 electrons, 25 negative fixed charges.

Claims (5)

an n-type semiconductor substrate;
An amorphous silicon film on the semiconductor substrate;
A crystalline silicon portion between the semiconductor substrate and the amorphous silicon film;
A photoelectric conversion element comprising: an insulating film capable of having a positive fixed charge on the amorphous silicon film. an n-type semiconductor substrate;
An amorphous silicon film on the semiconductor substrate;
A crystalline silicon portion between the semiconductor substrate and the amorphous silicon film;
An insulating film on the amorphous silicon film,
The photoelectric conversion element, wherein the insulating film includes at least one of a silicon nitride film and a silicon oxynitride film. a p-type semiconductor substrate;
An amorphous silicon film on the semiconductor substrate;
A crystalline silicon portion between the semiconductor substrate and the amorphous silicon film;
A photoelectric conversion element comprising: an insulating film capable of having a negative fixed charge on the amorphous silicon film.   The photoelectric conversion element according to claim 3, wherein the insulating film includes an aluminum oxide film. The semiconductor substrate has at least one unevenness;
The photoelectric conversion element of any one of Claims 1-4 which has the said crystalline silicon part in at least 1 of the recessed part of the said unevenness | corrugation.