JP2016019391A - Controller of acdc converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a controller of ACDC converter capable of improving the power factor.SOLUTION: Based on an input voltage Vinr, a reference AC signal Sig of same cycle and same phase as those of a squared value of an input voltage Vinr is calculated. Based on an output voltage Vor and an output current Ior, an actual output power Por is calculated. Subsequently, based on the reference AC Sig and the actual output power Por, a target input powers Pintgt is calculated. On the other hand, based on the input voltage Vinr and an input current Iinr, an actual input power Pinr is calculated. The controller controls an improvement switch 12b which constitutes a PFC converter 10 to perform ON/OFF operation to feedback the actual input power Pinr to the target input powers Pintgt.SELECTED DRAWING: Figure 1

Description

  The present invention provides a power factor correction circuit configured to execute a rectification operation for converting an input AC voltage into a DC voltage and a power factor improvement operation, and a DC voltage output from the power factor improvement circuit to a predetermined value. The present invention relates to a control device applied to an ACDC converter including a DCDC converter that converts and outputs a DC voltage.

  Conventionally, as can be seen in Patent Document 1 below, a charging device is known that includes a rectifier circuit that converts an AC voltage input from an AC power source into a DC voltage, and a step-up chopper circuit connected to the rectifier circuit. In this device, the switching elements constituting the step-up chopper circuit are turned on and off based on the maximum value in one cycle of fluctuation of the output voltage of the charging device and the input current and input voltage of the rectifier circuit. As a result, harmonic components included in the input current are reduced to improve the power factor.

JP 2009-247101 A

  Here, in the charging device, constant voltage control for controlling the voltage supplied to the power supply target is performed. For this reason, when the constant power control which controls the electric power supplied to the electric power feeding object is requested | required, the technique of the said charging device which aims at the improvement of a power factor cannot be applied.

  The main object of the present invention is to provide an ACDC converter control device that can be applied to an ACDC converter in which power supplied to a power supply target is controlled and can improve the power factor.

  Hereinafter, means for solving the above-described problems and the operation and effects thereof will be described.

  The present invention includes an input terminal (T1, T2) connected to an AC power source (51), a reactor (12a; 61p, 61n; 65p, 65n), an output terminal (T3, T4), and an input from the input terminal. An improvement switch (12b) is provided so that energy can be accumulated in the reactor by an on operation based on the AC voltage that has been generated, and energy accumulated in the reactor can be discharged by an off operation and output from the output terminal. 62p, 62n; 66a, 66b), a rectifying operation for converting an AC voltage input from the input terminal into a DC voltage, and a power factor improving operation using the reactor by an on / off operation of the improvement switch And a DC voltage output from the output terminal of the power factor correction circuit is set to a predetermined value. A DCDC converter (20; 70) that converts the current voltage into a power supply target (50) and outputs it to the power supply target (50); an input voltage detector (52) that detects an AC voltage input from the AC power supply to the power factor correction circuit; An input current detector (53) for detecting an alternating current input to the power factor correction circuit from the AC power supply, and an input voltage detected by the input voltage detector, and the input Instantaneous input power calculation means (30a) for calculating the actual input power of the power factor correction circuit each time based on the input current detected by the current detector, and the input AC that is either the input voltage or the input current A reference signal calculation means (30c) for calculating a reference AC signal having the same period and phase as the square value of the input AC signal based on the signal, and the reference signal calculation means; Based on the calculated reference AC signal, target input power calculation means (30d) that calculates the target input power that is a signal having the same period and phase as the reference AC signal, and the actual input power for each time Operating means (30g) for operating the improvement switch to feedback control the target input power.

  When the power factor between the input current and the input voltage of the power factor correction circuit is 1, the input power of the power factor correction circuit is theoretically the same period and the same as the square value of the input voltage or input current. This is a phase signal. Therefore, the power factor can be maintained at a high level by controlling the input power of the power factor correction circuit to a signal having the same period and the same phase as the square value of the input voltage or input current. In view of this point, in the above invention, the target input power calculation means calculates the target input power, which is a signal having the same period and the same phase as the reference AC signal, on the basis of each reference AC signal. Then, the improvement switch is operated so as to feedback control the actual input power every time to the calculated target input power every time. According to such a configuration, it is possible to reduce harmonic components contained in the input current, and thus improve the power factor.

1 is an overall configuration diagram of an ACDC converter according to a first embodiment. FIG. 1 is an overall configuration diagram of an ACDC converter according to related technology. The figure which shows the reduction effect of the harmonic current concerning 1st Embodiment. The figure which shows the reduction effect of the harmonic current concerning the embodiment. The figure which shows the improvement effect of the responsiveness at the time of the load electric power fluctuation concerning the embodiment. The whole ACDC converter block diagram concerning 2nd Embodiment. The figure which shows the setting aspect of the target intermediate voltage concerning the embodiment. The whole block diagram of the ACDC converter concerning 3rd Embodiment. The whole ACDC converter lineblock diagram concerning a 4th embodiment. The whole block diagram of the ACDC converter concerning a 5th embodiment. FIG. 10 is an overall configuration diagram of an ACDC converter according to a sixth embodiment.

(First embodiment)
Hereinafter, a first embodiment of a control device for an ACDC converter according to the present invention will be described with reference to the drawings.

  As shown in FIG. 1, the ACDC converter includes a PFC converter 10 (corresponding to a “power factor correction circuit”) and a DCDC converter 20. Each converter 10, 20 is controlled by the control device 30. In the present embodiment, the ACDC converter uses the power storage device 50 as the power supply target. In the present embodiment, a storage battery (nickel metal hydride storage battery, lithium ion storage battery) is used as the power storage device 50. In addition, as the electrical storage apparatus 50, not only a storage battery but a large-capacity capacitor can also be used, for example. Further, the ACDC converter can be, for example, a vehicle-mounted type.

  The PFC converter 10 includes a first rectifier circuit 11 and a boost chopper circuit 12. The first rectifier circuit 11 performs a rectification operation for converting an AC voltage input via the first and second terminals T1 and T2 that are input terminals of the PFC converter 10 into a DC voltage, and includes first to fourth rectifier diodes. 11a to 11d. Specifically, the cathode of the second rectifier diode 11b is connected to the anode of the first rectifier diode 11a, and the first terminal T1 is connected to the connection point of these diodes 11a and 11b. The cathode of the fourth rectifier diode 11d is connected to the anode of the third rectifier diode 11c, and the second terminal T2 is connected to the connection point of these diodes 11c and 11d. The cathode of the first rectifier diode 11a is connected to the cathode of the third rectifier diode 11c, and the anode of the second rectifier diode 11b is connected to the anode of the fourth rectifier diode 11d. An external AC power supply 51 is connected to the first and second terminals T1 and T2.

  The input side of the boost chopper circuit 12 is connected to the output side of the first rectifier circuit 11. The step-up chopper circuit 12 includes an improvement reactor 12a, an improvement switch element 12b, an improvement diode 12c, and a smoothing capacitor 12d. In the present embodiment, an IGBT having a free wheel diode connected in antiparallel is used as the improvement switch 12b. The cathodes of the first and third rectifier diodes 11a and 11c are connected to the first end of the improvement reactor 12a. The second end of the improvement reactor 12a is connected to the collector of the improvement switch 12b and the anode of the improvement diode 12c. The first end of the smoothing capacitor 12d is connected to the cathode of the improvement diode 12c. The second end of the smoothing capacitor 12d is connected to the emitter of the improvement switch 12b and the anodes of the second and fourth rectifier diodes 11b and 11d. The first terminal of the smoothing capacitor 12d is connected to the third terminal T3 that is the output terminal of the PFC converter 10, and the second terminal of the smoothing capacitor 12d is connected to the fourth terminal T4 that is the output terminal of the PFC converter 10. Has been. For example, a film capacitor or a ceramic capacitor can be used as the smoothing capacitor 12d. Incidentally, in the present embodiment, the smoothing capacitor 12d is arranged in the PFC converter 10, but the present invention is not limited to this. For example, the smoothing capacitor 12 d may be disposed in the DCDC converter 20, or may be disposed between the output side of the PFC converter 10 and the input side of the DCDC converter 20.

  The third terminal T3 of the PFC converter 10 is connected to the fifth terminal that is the input terminal of the DCDC converter 20, and the fourth terminal T4 of the PFC converter 10 is the sixth terminal T6 that is the input terminal of the PFC converter 10. It is connected. The DCDC converter 20 is a full-bridge type insulating converter including first to fourth conversion switches 21 a to 21 d, a transformer 22 (insulating transformer), a second rectifier circuit 23, a conversion reactor 24, and a conversion capacitor 25. . The DCDC converter 20 converts the input DC voltage into a predetermined DC voltage and outputs it. In the present embodiment, as each of the conversion switches 21a to 21d, an IGBT in which free wheel diodes are connected in antiparallel is used.

  A fifth terminal T5 is connected to the collector of the first conversion switch 21a and the collector of the third conversion switch 21c. The emitter of the second conversion switch 21b is connected to the emitter of the first conversion switch 21a, and the emitter of the fourth conversion switch 21d is connected to the emitter of the third conversion switch 21c. A sixth terminal T6 is connected to the emitter of the second conversion switch 21b and the emitter of the fourth conversion switch 21d.

  A first end of a primary winding 22a constituting the transformer 22 is connected to a connection point between the first conversion switch 21a and the second conversion switch 21b. A connection point between the third conversion switch 21c and the fourth conversion switch 21d is connected to the second end of the primary winding 22a. A second rectifier circuit 23 is connected to the secondary winding 22 b constituting the transformer 22. The second rectifier circuit 23 performs a rectification operation for converting the AC voltage output from the secondary winding 22b into a DC voltage, and includes fifth to eighth rectifier diodes 23a to 23d. Specifically, the cathode of the sixth rectifier diode 23b is connected to the anode of the fifth rectifier diode 23a, and the first end of the secondary winding 22b is connected to the connection point of these diodes 23a and 23b. The cathode of the eighth rectifier diode 23d is connected to the anode of the seventh rectifier diode 23c, and the second end of the secondary winding 22b is connected to the connection point of these diodes 23c and 23d. The cathode of the fifth rectifier diode 23a is connected to the cathode of the seventh rectifier diode 23c, and the anode of the sixth rectifier diode 23b is connected to the anode of the eighth rectifier diode 23d.

  A seventh terminal T7 that is an output terminal of the DCDC converter 20 is connected to the cathodes of the fifth rectifier diode 23a and the seventh rectifier diode 23c via a conversion reactor 24. An eighth terminal T8 that is an output terminal of the DCDC converter 20 is connected to anodes of the sixth rectifier diode 23b and the eighth rectifier diode 23d. The seventh terminal T7 and the eighth terminal T8 are connected by a conversion capacitor 25. The positive terminal of the power storage device 50 is connected to the seventh terminal T7, and the negative terminal of the power storage device 50 is connected to the eighth terminal T8.

  The ACDC converter includes an input voltage sensor 52 (corresponding to “input voltage detector”), an input current sensor 53 (corresponding to “input current detector”), an intermediate voltage sensor 54 (corresponding to “intermediate voltage detector”), An output voltage sensor 55 (corresponding to “output voltage detector”) and an output current sensor 56 (corresponding to “output current detector”) are provided. In the present embodiment, the input voltage sensor 52 detects an AC voltage output from the AC power supply 51 (specifically, for example, a potential difference between the first and second terminals T1 and T2). The input current sensor 53 detects the current flowing through the improvement reactor 12 a as the input current of the PFC converter 10. The intermediate voltage sensor 54 detects the voltage between the terminals of the smoothing capacitor 12d as the output voltage of the PFC converter 10 (in other words, the input voltage of the DCDC converter 20). The output voltage sensor 55 detects the voltage between the terminals of the conversion capacitor 25 as the output voltage of the DCDC converter 20. The output current sensor 56 detects the current flowing through the conversion reactor 24 as the output current of the DCDC converter 20. In this embodiment, the subscript “r” is basically added to the detection value of each sensor and the value calculated based on the detection value.

  The control device 30 performs constant power control for controlling the actual output power Por of the DCDC converter 20 to the target output power Potgt by turning on and off the first to fourth conversion switches 21a to 21d. Further, the control device 30 performs a power factor improving operation by turning on and off the improvement switch 12b. Hereinafter, the power factor improving operation and the constant power control in the control device 30 will be described. Note that each processing unit such as the input power calculation unit 30a in the control device 30 performs arithmetic processing, for example, every predetermined processing cycle.

  The input power calculation unit 30a (corresponding to “instantaneous input power calculation means”) multiplies the input voltage Vinr detected by the input voltage sensor 52 by the input current Iinr detected by the input current sensor 53, thereby The input power Pinr is calculated. The output power calculation unit 30b (corresponding to “instantaneous output power calculation means”) multiplies the output voltage Vor detected by the output voltage sensor 55 by the output current Ior detected by the output current sensor 56, thereby The output power Por is calculated.

  The reference signal calculation unit 30c (corresponding to “reference signal calculation means”) calculates a reference AC signal Sig having the same period and the same phase of the square value of the input voltage Vinr based on the input voltage Vinr. Hereinafter, the reference AC signal Sig will be described. When the power factor between the input current Iin and the input voltage Vin of the PFC converter 10 is 1, the input power Pin of the PFC converter 10 is expressed by the following equation (eq1).

In the above equation (eq1), “Va” represents the effective value of the input voltage Vin, “Ia” represents the effective value of the input current Iin, and “ω” represents the angular velocity of the input voltage Vin and the input current Iin. When constant power control is performed, the output power Pout of the DCDC converter 20 is expressed by the following equation (eq2).

In the above equation (eq2), “Vo” indicates the output voltage of the DCDC converter 20, and “Io” indicates the output current of the DCDC converter 20. Here, if the loss from the input side of the PFC converter 10 to the output side of the DCDC converter 20 is ignored, the effective value of the input power Pin becomes equal to the output power Pout, and thus the following equation (eq3) is derived.

Substituting the above equation (eq3) into the above equation (eq1) leads to the following equation (eq4).

From the above equation (eq4), it is understood that when the power factor is 1, the input power Pin is an AC signal having the same period and the same phase as the square value of the input voltage Vin. For this reason, the power factor can be maintained at a high level by setting the target input power Pintgt, which is the target value of the input power Pin, to an AC signal having the same period and the same phase as the square value. The reference signal calculation unit 30c includes, for example, a phase synchronization circuit (PLL) that receives the input voltage Vinr, and a conversion circuit that converts the output signal of the phase synchronization circuit into the reference AC signal Sig and outputs it. What is necessary is just to comprise.

  The target input power calculation unit 30d (corresponding to “target input power calculation unit”) multiplies the actual output power Por calculated by the output power calculation unit 30b by the reference AC signal Sig calculated by the reference signal calculation unit 30c. As a result, the target input power Pintgt is calculated. The power deviation calculation unit 30e calculates the power deviation ΔPin by subtracting the actual input power Pinr from the target input power Pintgt. The feedback control unit 30f calculates a first duty ratio signal as an operation amount for performing feedback control of the actual input power Pinr to the target input power Pintgt based on the power deviation ΔPin. Specifically, the first duty ratio signal is calculated by proportional-integral control based on the power deviation ΔPin. The first duty ratio signal is an operation signal for turning on and off the improvement switch 12b, and specifically, a ratio of the on operation time to one cycle (switching cycle) of the on / off operation of the improvement switch 12b is determined. It is. The first drive unit 30g (corresponding to “operation means”) turns on / off the improvement switch 12b based on the first duty ratio signal. Thereby, a power factor improvement operation is performed.

  The second drive unit 30h performs constant power control for controlling the actual output power Por of the DCDC converter 20 to the target output power Potgt by turning on and off the first to fourth conversion switches 21a to 21d. Specifically, the second drive unit 30h calculates a second duty ratio signal based on the target output power Potgt and the actual output power Por. The second time ratio signal is an operation signal for turning on / off each of the conversion switches 21a to 21d. Specifically, the ratio of the on operation time to one cycle of the on / off operation of each of the conversion switches 21a to 21d is determined. It is a thing. The second drive unit 30h sandwiches the dead time between the set of the first and third conversion switches 21a and 21c and the set of the second and fourth conversion switches 21b and 21d based on the second duty ratio signal. While turning on alternately.

  Subsequently, the effects of the present embodiment will be described in comparison with related technologies.

  First, FIG. 2 shows an ACDC converter according to the related art. In FIG. 2, the same members as those shown in FIG. 1 are denoted by the same reference numerals for convenience.

  As illustrated, the voltage deviation calculation unit 31a calculates the voltage deviation ΔV by subtracting the intermediate voltage Vmr detected by the intermediate voltage sensor 54 from the target intermediate voltage Vmtgt. The voltage feedback control unit 31b calculates the amplitude Ia of the target input current by proportional integral control based on the voltage deviation ΔV. The signal generation unit 31c calculates the reference signal “sin (ωt)” based on the input voltage Vinr.

  The target input current calculation unit 31d calculates the target input current Itgt by multiplying the amplitude Ia and the reference signal “sin (ωt)”. The current deviation calculation unit 31e calculates the current deviation ΔI by subtracting the input current Iinr from the target input current Itgt. The current feedback control unit 31f calculates a first time ratio signal for turning on / off the improvement switch 12b by proportional-integral control based on the current deviation ΔI. The calculated first duty ratio signal is input to the first drive unit 30g.

  Here, the output voltage Vor includes a fluctuation component having a frequency twice that of the AC power supply 51. For this reason, the voltage deviation ΔVo calculated by the voltage deviation calculation unit 31a also includes a fluctuation component. As a result, the target input current Itgt also includes a fluctuation component. That is, the target input current Itgt is distorted from the sine wave. For this reason, when the improvement switch 12b is turned on / off based on the target input current Itgt including the fluctuation component, the input current Iinr is distorted, and as a result, the power factor is deteriorated.

  FIG. 3 shows changes in the input voltage Vin, the input current Iin, and the intermediate voltage Vm in the present embodiment and related technologies. Specifically, FIG. 3A shows a transition according to the present embodiment, and FIG. 3B shows a transition according to related technology. In FIGS. 3A and 3B, “VL1” indicates that the scales of the input voltage Vin and the intermediate voltage Vm are the same, and “VL2” indicates that the scales of the input current Iin are the same. “HL1” indicates that the horizontal scales are the same.

  As shown in the figure, according to the present embodiment, the target input power Pintgt does not include the influence of the fluctuation of the intermediate voltage Vm, so that the input current Iin is not distorted. On the other hand, in the related art, the target input current Itgt is distorted due to the influence of the change in the intermediate voltage Vm, and as a result, the input current Iin is distorted.

  FIG. 4 shows the relationship between the capacitance of the smoothing capacitor 12d and the third harmonic component included in the input current Iin in the present embodiment and related technology. As shown in the figure, in the related art, the third harmonic component increases as the capacitance of the smoothing capacitor 12d decreases. This means that the related technology requires a large-capacity smoothing capacitor 12d in order to reduce the third-order harmonic component. On the other hand, in the present embodiment, the third harmonic component is small regardless of the size of the smoothing capacitor 12d. This is because the third harmonic component is greatly reduced by the above-described power factor correction operation. Therefore, according to the present embodiment, the capacity of the smoothing capacitor 12d can be reduced. In FIG. 4, the upper limit threshold of the third harmonic component is also shown. This threshold value is a value determined based on laws and regulations, for example.

  In the related art, as described above, the target input current Itgt is distorted due to the influence of the change in the intermediate voltage Vm. In order to avoid such a situation, it is conceivable to reduce the response of the voltage feedback control unit 31b in the related art. However, in this case, as shown in FIG. 5, the control responsiveness of the intermediate voltage Vm when the target output power Potgt is suddenly changed is greatly reduced. Here, Fig.5 (a) shows the transition concerning this embodiment, and FIG.5 (b) has shown the transition concerning a related technique. 5A and 5B, “VL3” indicates that the intermediate voltage Vm has the same scale, and “VL4” indicates that the input current Iin has the same scale. “HL2” indicates that the horizontal scales are the same.

  In the present embodiment, since the intermediate voltage Vmr is not used for calculating the target input power Pintgt, it is not necessary to set the control response of the feedback control unit 30f low. For this reason, the fluctuation amount ΔV1 of the intermediate voltage Vm according to the present embodiment is sufficiently smaller than the fluctuation amount ΔV2 of the intermediate voltage Vm according to the related art. Therefore, even when the output power changes suddenly, the control responsiveness of the output power can be maintained high, and the intermediate voltage Vm can be set to an upper limit value (for example, a breakdown voltage of the device) and a lower limit value (for example, a peak value of the AC power supply 51). It is possible to avoid the deviation from the range specified in.

  As described above, according to the present embodiment, the harmonic component included in the input current of the PFC converter 10 can be reduced, and as a result, the power factor can be improved to approach 1. Thereby, the capacity of the smoothing capacitor 12d can be reduced. Furthermore, the control response of output power can be improved.

(Second Embodiment)
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment. In the present embodiment, as shown in FIG. 6, the calculation method of the target input power Pintgt is changed. Specifically, the control device 30 further includes a configuration capable of controlling the intermediate voltage Vmr to the target intermediate voltage Vmtgt. In FIG. 6, the same members as those shown in FIG. 1 are denoted by the same reference numerals for convenience.

  As illustrated, the intermediate voltage deviation calculating unit 30i calculates the intermediate voltage deviation ΔVm by subtracting the intermediate voltage Vmr from the target intermediate voltage Vmtgt. The intermediate voltage feedback control unit 30j (corresponding to “intermediate compensation power calculation means”) calculates intermediate compensation power Pctr as an operation amount for feedback control of the intermediate voltage Vmr to the target intermediate voltage Vmtgt based on the intermediate voltage deviation ΔVm. To do. Specifically, the intermediate compensation power Pctr is calculated by proportional integral control based on the intermediate voltage deviation ΔVm. It is desirable to set the control responsiveness of the intermediate voltage feedback control unit 30j so low that it is not affected by fluctuations in the intermediate voltage Vmr.

  The intermediate compensation power addition unit 30k adds the intermediate compensation power Pctr to the actual output power Por calculated by the output power calculation unit 30b. The output value “Por + Pctr” of the intermediate compensation power adding unit 30k is input to the target input power calculating unit 30d. That is, in the present embodiment, the target input power Pintgt is expressed by the following equation (eq5).

Here, a specific example of the control mode of the intermediate voltage Vmr detected by the intermediate voltage sensor 54 will be described with reference to FIG. FIG. 7 shows transition of the intermediate voltage Vmr when the output power P1 (for example, 3 kW) is large and when the output power P2 (for example, 1 kW) is small.

  As shown in FIG. 7A, the median value of the intermediate voltage Vmr in one fluctuation period Tac of the AC power supply 51 may be feedback controlled to the target intermediate voltage Vmtgt. In this case, for example, a time average value of the intermediate voltage Vmr in one fluctuation cycle Tac may be input to the intermediate voltage deviation calculation unit 30i.

  Further, as shown in FIG. 7B, the maximum value of the intermediate voltage Vmr in one fluctuation period Tac of the AC power supply 51 may be feedback controlled to the target intermediate voltage Vmtgt. In this case, for example, the maximum value of the intermediate voltage Vmr in one fluctuation cycle Tac may be input to the intermediate voltage deviation calculation unit 30i. According to such a configuration, the intermediate voltage can be kept as high as possible when the output power is small. For this reason, the margin between the intermediate voltage and the lower limit value can be increased, and when the output power increases rapidly, the intermediate voltage can be prevented from falling below the lower limit value due to a decrease in the intermediate voltage.

  Further, as shown in FIG. 7C, the minimum value of the intermediate voltage Vmr in one fluctuation period Tac of the AC power supply 51 may be feedback controlled to the target intermediate voltage Vmtgt. In this case, for example, the minimum value of the intermediate voltage Vmr in one fluctuation cycle Tac may be input to the intermediate voltage deviation calculation unit 30i. According to such a configuration, since the intermediate voltage is held at a low voltage when the output power is small, the switching loss of the PFC converter 10 can be reduced.

(Third embodiment)
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the second embodiment. In the present embodiment, as shown in FIG. 8, the target intermediate voltage Vmtgt is variably set. In FIG. 8, the same members as those shown in FIG. 6 are given the same reference numerals for the sake of convenience.

  As illustrated, the intermediate voltage setting unit 301 (corresponding to “intermediate voltage setting means”) sets the target intermediate voltage Vmtgt lower as the actual output power Por increases. According to such setting, when the output power is small, the intermediate voltage can be held at a high voltage. For this reason, even if it is a case where output electric power increases rapidly after that, it can avoid that an intermediate voltage falls below a lower limit.

(Fourth embodiment)
Hereinafter, the fourth embodiment will be described with reference to the drawings with a focus on differences from the first embodiment. In this embodiment, as shown in FIG. 9, the calculation method of the target input power Pintgt is changed. In FIG. 9, the same members as those shown in FIG. 1 are given the same reference numerals for the sake of convenience.

  As shown in the figure, the loss compensation power calculation unit 30m (corresponding to “loss compensation power calculation means”) calculates the loss compensation power Ploss based on the input voltage Vinr and the actual output power Por. Here, the greater the actual output power Por or the lower the input voltage Vinr, the larger the loss compensation power Ploss is calculated. The loss compensation power Ploss may be calculated using, for example, a map or a mathematical formula in which the actual output power Por and the loss compensation power Ploss are related. The map is stored in advance in storage means (for example, a non-volatile memory) included in the control device 30.

  The loss compensation power adding unit 30n adds the actual output power Por and the loss compensation power Ploss. The output value “Por + Ploss” of the loss compensation power addition unit 30n is input to the intermediate compensation power addition unit 30k. That is, in the present embodiment, the target input power Pintgt is expressed by the following equation (eq6).

According to this embodiment described above, the responsiveness of constant power control can be further improved.

(Fifth embodiment)
Hereinafter, the fifth embodiment will be described with reference to the drawings with a focus on differences from the first embodiment. In this embodiment, as shown in FIG. 10, the configuration of the ACDC converter is changed. In FIG. 10, the same members as those shown in FIG. 1 are denoted by the same reference numerals for the sake of convenience.

  As illustrated, the ACDC converter includes a PFC converter 60 and a DCDC converter 70. The PFC converter 60 includes first and second reactors 61p and 61n, first and second improvement switches 62p and 62n, a rectifier circuit 63, and a smoothing capacitor 64. In the present embodiment, N-channel MOSFETs are used as the switches 62p and 62n.

  The first terminal T1 is connected to the first end of the first reactor 61p. A second terminal T2 is connected to the first end of the second reactor 61n. The second ends of the reactors 61p and 61n are connected to each other through a series connection body of a first improvement switch 62p and a second improvement switch 62n. Specifically, the second end of the first reactor 61p is connected to the drain of the first improvement switch 62p, and the second end of the second reactor 61n is connected to the drain of the second improvement switch 62n. . The sources of the switches 62p and 62n are short-circuited. The input side of the rectifier circuit 63 is connected to the drain side of each switch 62p, 62n. Third and fourth terminals T3 and T4 are connected to the output side of the rectifier circuit 63 via a smoothing capacitor 64.

  The fifth and sixth terminals of the DCDC converter 70 are connected to the third and fourth terminals T3 and T4 of the PFC converter 60. The DCDC converter 70 is a push-pull type insulating converter including first and second conversion switches 71a and 71b, first and second transformers 72 and 73, and first and second conversion diodes 74a and 74b. In the present embodiment, N-channel MOSFETs are used as the conversion switches 71a and 71b.

  The first terminal of the first primary winding 72a constituting the first transformer 72 is connected to the fifth terminal T5, and the second terminal is connected to the sixth terminal T6 via the first conversion switch 71a. It is connected. The fifth terminal T5 is connected to the first end of the second primary winding 73a constituting the second transformer 73, and the sixth terminal T6 is connected to the second end via the second conversion switch 71b. It is connected. The seventh terminal T7 is connected to the first end of the first secondary winding 72b constituting the first transformer 72, and the cathode of the first conversion diode 74a is connected to the second end. An eighth terminal T8 is connected to the anode of the first conversion diode 74a. The seventh terminal T7 is connected to the first end of the second secondary winding 73b constituting the second transformer 73, and the cathode of the second conversion diode 74b is connected to the second end. An eighth terminal T8 is connected to the anode of the second conversion diode 74b. A conversion reactor 75 and a conversion capacitor 76 are provided between the conversion diodes 74a and 74b and the seventh and eighth terminals T7 and T8.

  In the present embodiment, the input current sensor 53 detects the current flowing through the first reactor 61p as the input current. The intermediate voltage sensor 54 detects the voltage between the terminals of the smoothing capacitor 64 as an intermediate voltage. The output voltage sensor 55 detects the voltage between the terminals of the conversion capacitor 76 as output power. The output current sensor 56 detects the current flowing through the conversion reactor 75 as an output current.

  The control device 30 performs constant power control for controlling the actual output power Por of the DCDC converter 70 to the target output power Potgt by turning on and off the first and second conversion switches 71a and 71b. Here, each of the conversion switches 71a and 71b is operated by the second drive unit 30h. Further, the control device 30 performs a power factor improving operation by turning on and off the first and second improvement switches 62p and 62n. Here, each of the improvement switches 62p and 62n is operated by the first drive unit 30g. Specifically, during the period in which the polarity of the output voltage of the AC power supply 51 is positive, the first improvement switch 62p is turned on / off in a situation where the second improvement switch 62n is turned off. Note that the output voltage of the PFC converter 60 during this period can be adjusted by adjusting the ratio of the ON operation time of the first improvement switch 62p to one cycle of the ON / OFF operation of the first improvement switch 62p. On the other hand, during the period in which the polarity of the output voltage of the AC power supply 51 is negative, the second improvement switch 62n is turned on / off under the situation where the first improvement switch 62p is turned off. The output voltage of the PFC converter 60 during this period can be adjusted by adjusting the ratio of the ON operation time of the second improvement switch 62n to one cycle of the ON / OFF operation of the second improvement switch 62n.

  According to the present embodiment described above, the same effect as that of the first embodiment can be obtained.

(Sixth embodiment)
Hereinafter, the sixth embodiment will be described with reference to the drawings with a focus on differences from the fifth embodiment. In this embodiment, as shown in FIG. 11, the PFC converter is changed to a bridgeless boost type. In FIG. 11, the same members as those shown in FIG. 10 are given the same reference numerals for the sake of convenience.

  As shown in the figure, the PFC converter 80 includes first and second reactors 65p and 65n, first and second improvement switches 66a and 66b, first and second improvement diodes 67a and 67b, and a smoothing capacitor 64. I have. In the present embodiment, IGBTs are used as the switches 66a and 66b.

  The first terminal T1 is connected to the first end of the first reactor 65p. The second terminal T2 is connected to the first end of the second reactor 65n. The collector of the first improvement switch 66a is connected to the anode of the first improvement diode 67a, and the collector of the second improvement switch 66b is connected to the anode of the second improvement diode 67b. A third terminal T3 is connected to the cathodes of the first and second improvement diodes 67a and 67b, and a fourth terminal T4 is connected to the emitters of the first and second improvement switches 66a and 66b.

  A connection point between the first improvement diode 67a and the first improvement switch 66a is connected to the second end of the first reactor 65p, and a second improvement diode 67b is connected to the second end of the second reactor 65n. A connection point with the second improvement switch 66b is connected. Each improvement switch 66a, 66b is turned on and off by the first drive unit 30g. In this embodiment, the DCDC converter 20 shown in FIG. 1 of the first embodiment is used as the DCDC converter. In the present embodiment, the input current sensor 53 detects the current flowing through the first reactor 65p as the input current.

  According to the present embodiment described above, the same effect as that of the fifth embodiment can be obtained.

(Other embodiments)
Each of the above embodiments may be modified as follows.

  In the first embodiment, a value calculated from the output current Ior detected by the output current sensor 56 and the output voltage Vor detected by the output voltage sensor 55 is used as the output power used for calculating the target input power Pintgt. Although it used, it is not restricted to this. For example, the target output power Potgt may be used for calculation of the target input power Pintgt without using the detected value. That is, in this case, the product of the target output power Potgt and the reference AC signal Sig is the target input power Pintgt. Even with such a configuration, it is possible to obtain an effect according to the effect obtained in the first embodiment.

  In the third embodiment, the target intermediate voltage Vmtgt is set continuously lower as the actual output power Por is larger, but the present invention is not limited to this. For example, the target intermediate voltage Vmtgt may be set lower stepwise as the actual output power Por is larger.

  The loss compensation power calculation unit 30m and the loss compensation power addition unit 30n described in the fourth embodiment may be applied to the second and third embodiments.

  The reference AC signal may be calculated based on the input current Iinr instead of the input voltage Vinr. This is based on the fact that the period and phase of the input voltage and the input current are the same or substantially the same because the power factor correction operation is performed in the PFC converter 10.

  In the feedback control unit 30f, for example, the first duty ratio signal may be calculated by proportional integral derivative control or integral control. The same applies to the intermediate voltage feedback control unit 30j of the second embodiment.

  -As a DCDC converter, not only an insulation type but a non-insulation type may be sufficient.

  DESCRIPTION OF SYMBOLS 10 ... PFC converter, 20 ... DCDC converter, 30 ... Control apparatus.

Claims (8)

Input terminals (T1, T2) connected to the AC power source (51), reactors (12a; 61p, 61n; 65p, 65n), output terminals (T3, T4), and AC voltage input from the input terminals Based on the above, an improvement switch (12b; 62p, 62n) is provided so that energy is stored in the reactor by an ON operation and energy stored in the reactor is released by an OFF operation and can be output from the output terminal. 66a, 66b), and can perform a rectifying operation for converting an AC voltage input from the input terminal into a DC voltage, and a power factor improvement operation using the reactor by turning on and off the improvement switch A power factor correction circuit (10; 60; 80) configured to:
A DCDC converter (20; 70) for converting a DC voltage output from the output terminal of the power factor correction circuit into a predetermined DC voltage and outputting the same to the power supply target (50);
An input voltage detector (52) for detecting an AC voltage input from the AC power source to the power factor correction circuit;
Applied to an ACDC converter comprising an input current detector (53) for detecting an alternating current input from the alternating current power source to the power factor correction circuit,
Instantaneous input power calculation means (30a) for calculating the actual input power of the power factor correction circuit each time based on the input voltage detected by the input voltage detection unit and the input current detected by the input current detection unit; ,
A reference signal calculating means (30c) for calculating a reference AC signal having the same period and the same phase as the square value of the input AC signal based on the input AC signal which is either the input voltage or the input current;
Target input power calculation means (30d) for calculating the target input power that is a signal having the same period and the same phase as the reference AC signal based on the reference AC signal calculated by the reference signal calculation means;
An ACDC converter control device, comprising: operating means (30g) for operating the improvement switch so as to feedback control the actual input power each time to the target input power each time. The ACDC converter includes
An output voltage detector (55) for detecting an output voltage of the DCDC converter;
An output current detector (56) for detecting an output current of the DCDC converter,
Instantaneous output power calculation means (30b) for calculating the actual output power of the DCDC converter each time based on the output voltage detected by the output voltage detector and the output current detected by the output current detector. ,
2. The target input power calculation unit calculates the target input power including the actual output power in the amplitude of the reference AC signal each time based on the actual output power every time and the reference AC signal each time. The control apparatus of the ACDC converter of description. The ACDC converter includes an intermediate voltage detector (54) that detects an output voltage of the power factor correction circuit.
An intermediate compensation power calculating means (30j) for calculating an intermediate compensation power, which is an operation amount for performing feedback control of the output voltage detected by the intermediate voltage detection unit to a target intermediate voltage,
The target input power calculation means is configured to calculate the actual output power and the intermediate compensation power to the amplitude of the reference AC signal based on the actual output power each time, the reference AC signal each time, and the intermediate compensation power each time. The control apparatus for an ACDC converter according to claim 2, wherein the target input power including the power is calculated each time.   The intermediate compensation power calculation means calculates the intermediate compensation power as an operation amount for performing feedback control of a median value in one fluctuation period of the output voltage of the power factor correction circuit to the target intermediate voltage. ACDC converter control device.   The intermediate compensation power calculation means calculates the intermediate compensation power as an operation amount for feedback-controlling the maximum value of the output voltage of the power factor correction circuit to the target intermediate voltage in one fluctuation cycle of the AC power supply. Item 4. The control apparatus for an ACDC converter according to Item 3.   The intermediate compensation power calculation means calculates the intermediate compensation power as an operation amount for feedback-controlling the minimum value of the output voltage of the power factor correction circuit to the target intermediate voltage in one fluctuation cycle of the AC power supply. Item 4. The control apparatus for an ACDC converter according to Item 3.   The intermediate voltage setting means which sets the said target intermediate voltage when the said actual output power is large lower than the said target intermediate voltage when the said actual output power is small is further provided in any one of Claims 3-6 ACDC converter control device. Loss compensation power calculation means (30m) for calculating loss compensation power that is set larger when the actual output power is larger than when the actual output power is small is further provided,
The target input power calculation means is configured to calculate the actual output power and the loss compensation power to the amplitude of the reference AC signal based on the actual output power each time, the reference AC signal each time, and the loss compensation power each time. The control apparatus for an ACDC converter according to any one of claims 2 to 7, wherein the target input power including the power is calculated each time.