JP2016012606A - Printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a short-circuiting defect in a connection part of a printed wiring board and a connection part with an electrode pad of an electronic component, the short-circuiting defect being apprehended particularly in the case where the electrode pad of the electronic component is concentrated around in a narrow pitch.SOLUTION: On a first face of a resin insulation layer, a first conductor layer including a wiring pattern including a plurality of wires 12a is embedded so as to expose its surface. A solder resist layer 16 is provided on the surface and a connection part 12b of the wires 12a is exposed. The electrode pad of the electronic component is soldered to the connection part 12b. The connection part 12b is provided in one line or in a zigzag shape in a direction across an extension direction of the wires 12a and can also be soldered without the risk of contact even to an electronic component of a narrow pitch where the electrode pad is formed in a concentrated manner around an electronic component 20.

Description

  The present invention relates to a printed wiring board on which electronic components are mounted. In more detail, even if the fine pitch is increased due to the high integration of the electronic components at the connection part between the electronic component and the printed wiring board in which the electrode pads are concentrated in the periphery, there is no problem such as a short circuit, and The present invention relates to a printed wiring board that can be reliably connected to wiring.

  The printed wiring board is formed by laminating a resin insulating layer and a conductor layer on which a circuit pattern is formed. Various components are formed by mounting electronic components such as ICs on such a printed wiring board.

  In recent years, electronic components such as ICs have become highly functional and highly integrated, and the number of electrode pads has become very large. On the other hand, as electronic devices become lighter, thinner, and smaller, electronic components such as ICs are required to be further miniaturized. Therefore, the pitch of the electrode pads of the electronic parts is very narrow. In particular, in a so-called peripheral type electronic component in which electrode pads are concentrated only around the electronic component, the distance between the electrode pads is particularly narrow, and as shown in FIG. 4, the printed wiring board 100 and the electronic component 200 are separated. The solder 300 bulges out at a portion connected by the solder 300 or the like, and a problem of short-circuiting (part A) between adjacent wiring pads 101 (between the electrode pads 201 of the electronic component 200) is likely to occur.

  On the other hand, with the fine pitch between the electrode pads 201 of the electronic component 200 and the like, also in the printed wiring board 100, the width of each wiring (wiring pad 101) of the wiring pattern becomes narrower, and each wiring (wiring pad 101) Adhesiveness with the resin insulating layer 110 is lowered. Further, the printed wiring board 100 is also required to be thin. Therefore, for example, a configuration is adopted in which the wiring 101 having a wiring pattern connected to the electronic component 200 is embedded in the resin insulating layer 110 and only one surface thereof is exposed (for example, Patent Document 1).

Japanese Patent Laid-Open No. 10-173316

  As shown in FIG. 4 described above, when the connection portion of the wiring 101 protrudes and is connected to the electrode pad 201 of the electronic component 200, the solder spreads in a spherical shape at the connection portion. Easy to contact with. On the other hand, even if the wiring is embedded in the resin insulating layer 110, a contact accident is likely to occur if there is a lot of solder due to a narrow pitch.

  The object of the present invention is when the electrode pads of the electronic component are concentrated around the electronic component, and even if the function is highly functional and highly integrated, the wiring connection portion of the printed wiring board and the electronic component It is an object to provide a printed wiring board having a structure in which a short circuit failure does not occur between adjacent connection portions at a joint portion with an electrode pad.

  A printed wiring board according to the present invention is formed on a resin insulating layer having a first surface and a second surface opposite to the first surface, and on the first surface side of the resin insulating layer, to which an electronic component is connected. A first conductor layer including a wiring having a connecting portion, a second conductor layer formed on the second surface of the resin insulation layer, the first conductor layer provided through the resin insulation layer, and A via conductor connecting the second conductor layer; and a solder resist layer provided on a first surface and a second surface of the resin insulating layer. The first conductor layer has a plurality of connection portions, is embedded in the resin insulating layer so that at least a part of the uppermost surface of the plurality of connection portions is exposed, and at least one of the connection portions. The portions are arranged in a row so as to form a row of connection portions spaced apart from each other along one side of the electronic component, and at least a part of the connection portion is exposed to the solder resist layer An opening is formed as described above.

  In the present invention, the solder resist layer is provided on the wiring pattern of the printed wiring board, and only the connection portion of the wiring connected to the electrode pad of the electronic component is exposed from the opening formed in the solder resist layer. If the opening is a structure of an individual opening that is exposed for each connection portion of each wiring, even if the distance between adjacent wirings is narrow due to the finer wiring, it is possible to reliably prevent a short circuit failure.

  Moreover, even if it is a collective opening where a plurality of adjacent connection portions are continuously exposed, for example, the width of the opening portion in the direction perpendicular to the direction in which the connection portions are adjacent (column direction in which the connection portions are arranged) is narrowed. The solder balls (lumps) when soldering the printed wiring board connection parts and the electrode pads of the electronic parts are controlled by the narrow width of the opening, and the solder does not spread so much toward the adjacent connection parts and is small solder Connected in chunks. As a result, even if the wiring width and pitch of the printed wiring board are narrowed, there is no problem of short-circuiting between adjacent connection portions when soldering with an electronic component connected thereon.

Plane | planar explanatory drawing of the connection part with the electronic component of the printed wiring board of one Embodiment of this invention. Explanatory drawing of the bottom face of the electronic component mounted in the printed wiring board of FIG. 1A. Explanatory drawing of the 1C-1C cross section of FIG. 1A of the state in which the electronic component was connected. Explanatory drawing of another example of the 1C-1C cross section of FIG. 1A of the state in which the electronic component was connected. The plain explanatory drawing of the connection part of the printed wiring board of other embodiment of this invention. Explanatory drawing of the bottom face of the electronic goods mounted in the printed wiring board of FIG. 2A. Explanatory drawing of 2C-2C cross section of FIG. 2A of the state in which the electronic component was connected. Explanatory drawing of another example of the 2C-2C cross section of FIG. 2A of the state to which the electronic component was connected. Explanatory drawing of the 2D-2D cross section of FIG. 2A of the state in which the electronic component was connected. Sectional explanatory drawing of each process of the manufacturing method of the printed wiring board shown by FIG. Sectional explanatory drawing of each process of the manufacturing method of the printed wiring board shown by FIG. Sectional explanatory drawing of each process of the manufacturing method of the printed wiring board shown by FIG. Sectional explanatory drawing of each process of the manufacturing method of the printed wiring board shown by FIG. Sectional explanatory drawing of each process of the manufacturing method of the printed wiring board shown by FIG. Sectional explanatory drawing of each process of the manufacturing method of the printed wiring board shown by FIG. Sectional explanatory drawing of each process of the manufacturing method of the printed wiring board shown by FIG. Cross-sectional explanatory drawing which shows the problem at the time of the conventional printed wiring board and an electronic component being connected.

  A printed wiring board according to an embodiment of the present invention will be described with reference to the drawings. As shown in FIG. 1A and FIG. 3G, the printed wiring board 1 of the present embodiment includes a plurality of resin insulation layers 11 having a first surface 11a and a second surface 11b opposite to the first surface 11a. A first conductor layer 12 having a wiring pattern 121 having a wiring 12a and a connecting portion 12b to which an electronic component of each wiring 12a of the wiring pattern 121 is connected is formed. A second conductor layer 14 is formed on the second surface 11 b of the resin insulating layer 11. A via conductor 15 is provided so as to penetrate the resin insulating layer 11, and a part of the first conductor layer 12 and a part of the second conductor layer 14 are connected to each other. A solder resist layer 16 is provided on the first surface 11 a of the resin insulating layer 11 and a part of the first conductor layer 12. As shown in FIGS. 1 and 3G, the first conductor layer 12 is embedded in the resin insulating layer 11 so that the connection portion (uppermost surface in FIG. 3G) 12b is exposed, and the connection portion 12b is connected to each wiring. 12a in the direction intersecting with the extending direction of 12a (perpendicular direction in the example shown in FIG. 1A) and along one side of the electronic component 20 (see the imaginary line in FIGS. 1A and 2A, FIG. 1B). It is formed so that it may be arranged in. And this connection part 12b is exposed from opening part 16a, 16b (refer FIG. 2A) formed in the soldering resist layer 16. FIG. In the opening, as shown in FIG. 1A, individual openings 16a that individually expose the connecting portions 12b, and a collective opening that exposes the connecting portions 12b arranged in a row as shown in FIG. 2A. There is a portion 16b, but either may be used.

  As shown in FIGS. 1A, 1B, 2A, 2B, etc., even in the peripheral type electronic component 20, an electrode pad 22 such as a power supply terminal or a ground terminal is formed at the center thereof. In this case, a C4 pad 12c corresponding to the electrode pad 22 is formed, and the C4 pad 12c is also formed so as to be exposed from the opening 16c of the solder resist layer 16. In this case, the wiring connected to the C4 pad 12c may be connected to the inside or the back side of the resin insulating layer 11.

The resin insulating layer 11 is an insulating layer having a first surface 11a and a second surface 11b opposite to the first surface 11a. The resin insulating layer 11 may be formed by impregnating a core material (not shown) such as glass fiber with a resin composition containing a filler, or may be formed only by a resin composition containing a filler. Further, it may be a single layer or may be formed from a plurality of insulating layers. If the resin insulating layer 11 is formed of a plurality of insulating layers, for example, the coefficient of thermal expansion, flexibility, and thickness can be easily adjusted. Examples of the resin include epoxy. Examples of the filler mixed with the resin include silica (SiO ₂ ), alumina (Al ₂ O ₃ ), titanium oxide (Ti ₂ O ₃ ), and the like. Examples of the thickness of the resin insulating layer 11 include 25 to 100 μm. On the first surface 11a, one surface of each wiring 12a of the first conductor layer 12 is exposed to form a connection portion 12b. On the second surface 11b, a second conductor layer 14 described later is formed on the second surface. It is formed on the surface of 11b.

  The first conductor layer 12 is a pattern embedded in the first surface 11 a of the resin insulating layer 11. The embedded first conductor layer 12 is substantially flush with the first surface 11a of the resin insulating layer 11, and only one surface of the wiring 12a is exposed. For this reason, the width of the wiring 12a is particularly narrow due to high density and fine pitch, and there is a risk of lowering the adhesion due to the use of the resin containing the core material as the resin insulating layer 11 becomes thinner. However, since the first conductor layer 12 is embedded in the resin insulating layer 11 in this way, it contributes to the improvement in the adhesion between the first conductor layer 12 and the resin insulating layer 11.

  The wiring pattern 121 of the first conductor layer 12 needs to be connected to highly integrated and highly densified electronic components in accordance with recent reductions in the size and performance of electronic devices. In 121, the width of each wiring 12a is about 15 to 40 μm, and the interval is 30 to 80 μm. The method for forming the first conductor layer 12 is not particularly limited. Preferably, the first conductor layer 12 may be an electroplated film formed by electroplating. If the first conductor layer 12 is an electroplated film, there is an advantage that it is formed as a pure metal film. The material constituting the first conductor layer 12 is exemplified by copper. Copper is easy to electroplat, but has low resistance and is less likely to cause corrosion. As for the thickness of this 1st conductor layer 12, 3-20 micrometers is illustrated.

  In the pattern formed in the first conductor layer 12, individual openings 16a are formed in the solder resist layer 16 so that the connection portions 12b of the respective wirings 12a are exposed. In the example shown in FIG. 1A, the connecting portions 12b of the respective wires 12a are not provided at the same distance from the tip portion, but are alternately shifted in the direction in which the wires 12a extend, that is, in the direction perpendicular to the arrangement direction of the connecting portions 12b. It is formed in a staggered pattern. That is, as shown in FIG. 1A, the wiring 12a formed so as to have one end of the connecting portion 12b at a distance r from the tip of the wiring 12a, and the connecting portion 12b at a distance s from the tip of the wiring 12a. The wiring 12a formed so as to have one end is formed so as to repeat alternately. The individual openings 16a of the solder resist layer 16 are individually formed so that the connection portions 12b are individually exposed in accordance with the connection portions 12b. Since the electrode pads 21 of the electronic component 20 are soldered to the connection portions 12b exposed in the individual openings 16a, the surface is treated with a surface treatment such as OSP, Ni / Au, Ni / Pd / Au, or Sn. Is done. Note that the distance f (see FIGS. 1C and 1D) between the end of the opening 16a and the end of the adjacent wiring 12a is preferably 10 μm or more from the viewpoint of preventing a contact accident between the adjacent wirings 12a. .

  The second conductor layer 14 is formed on the second surface 11 b of the resin insulating layer 11. The method for forming the second conductor layer 14 is not particularly limited. The material constituting the second conductor layer 14 is exemplified by copper. As for the thickness of the 2nd conductor layer 14, 3-20 micrometers is illustrated. The second conductor layer 14 is shown as an example of one layer in FIG. 3G, but may be formed of, for example, a metal foil and a plating film as described later in the manufacturing method.

  The via conductor 15 penetrates the resin insulating layer 11 and electrically connects a part of the first conductor layer 12 and a part of the second conductor layer 14. The via conductor 15 is formed by filling a conductor in a conduction hole 11 d penetrating the second conductor layer 14 and the resin insulating layer 11. An example of the via conductor 15 is copper, which is formed by electroplating, for example. The cross-sectional shape of the via conductor 15 is not particularly limited, but as shown in FIG. 3G, the width of the cross-section may be formed smaller on the first conductor layer 12 side than on the second conductor layer 14 side. This is because the depth of the conduction hole 11d is preferably smaller because it is necessary to be completely buried to the depth of the conduction hole 11d in which the via conductor 15 is embedded. The conduction hole 11d in which the via conductor 15 is formed can be formed in such a shape by being processed by laser light from the second conductor layer 14 side.

  The solder resist layer 16 is formed on the wiring pattern 121 of the first conductor layer 12 to which the electrode of the electronic component is connected, and the first surface 11a of the resin insulating layer 11 exposed without the wiring pattern 121, and each wiring An individual opening 16a is formed so that only the connecting portion 12b of 12a is exposed. In the example shown in FIG. 1A, the individual openings 16a are individually formed so that the connection portions 12b are exposed for each connection portion 12b of each wiring 12a. Moreover, the connecting portions 12b are formed by adjacent wirings 12a that are alternately shifted by a predetermined distance along the direction in which the wirings 12a extend (the direction perpendicular to the arrangement direction of the connecting portions 12b). Therefore, the individual openings 16a are also formed in a staggered arrangement. As a result, each opening 16a is formed so that only one connecting portion 12b of each wiring 12a is exposed. On the other hand, as shown in FIG. 1A, the connecting portions 12b of every other wiring 12a, that is, the individual openings 16a are formed in a row in a direction intersecting (for example, a right angle) with the extending direction of the wiring 12a. Two rows of openings 16a are formed in parallel, and adjacent individual openings 16a are formed in a direction intersecting with the extending direction of the wiring 12a and spaced apart by a staggered pattern alternately. Yes.

  That is, as shown in FIG. 1A, the connection portions 12b of the respective wirings 12a are formed so as to have one end portion at a distance r from the distal end portion instead of a constant distance from the distal end portion in all the wirings 12a. The connection part 12b and the connection part 12b formed so as to have one end part at a distance s from the tip of the wiring 12a are formed so as to repeat alternately. This corresponds to a case where the electronic component 20 connected to the wiring pattern 121 has the electrode pads 21 of the electronic component 20 formed in a staggered pattern as shown in the bottom view of FIG. 1B. That is, even in the electronic component 20, in the so-called peripheral structure in which the electrode pads 21 are concentrated only around the electronic component 20, the electrode pads 21 are separated from each other due to the increase in the number of electrode pads 21 and the downsizing of the electronic component 20. Since there is a risk of short-circuiting, the electrode pads 21 may be formed in two rows with a certain pitch. Since it corresponds to such an electronic component 20, the wiring 12a of the printed wiring board 1 is dense, and there is a greater risk of short-circuiting by soldering of the connecting portion 12b. However, the staggered pattern as shown in FIG. Further, by forming the individual openings 16a that individually expose only the connection portions 12b, the connection portions 12b do not line up side by side even when the interval between the adjacent wirings 12a is narrowed. Since the wiring 12a immediately adjacent to the connecting portion 12b is covered with the solder resist layer 16, the problem of short circuit between the adjacent wirings 12a is almost completely eliminated.

  In this way, short openings are reliably prevented by forming the individual openings 16a through which the connection portions 12b are exposed. That is, as shown in FIG. 1C or 1D, the cross-sectional explanatory view of 1C-1C in FIG. 1A is embedded in the resin insulating layer 11, and only the surface thereof is exposed, but the connection portion 12b is opened. A solder resist layer 16 is formed on the wiring 12a between the two wirings 12a exposed from the portion 16a, and the surface of the wiring 12a is protected. As described above, the connecting portions 12b arranged in a row of the parallel wirings 12a become the connecting portions 12b of every other wiring 12a, and the solder resist layer 16 is formed on the surface of the wiring 12a between them. Therefore, the possibility of occurrence of a defect such as a short circuit is greatly reduced between the adjacent joints 12b and between the adjacent wirings 12a. Note that the example of FIG. 1C is an example in which soldering is directly performed on the connection portion 12b, and FIG. 1D shows an example of being connected via solder bumps.

  The size of the opening 12a may be any size as long as the connection portion 12b is exposed. However, even if the opening 12a is not exactly the same as the area of the connection portion 12b, the size of the opening 12a does not expose the adjacent wiring 12a. If so, it may be larger than the width d of the wiring 12a. Even if the width is smaller than the width d of the wiring 12a, there is no problem as long as there is no problem in electrical connection with the connecting portion 12b. This is because if the individual openings 16a are too large, the adjacent wirings 12a are also exposed to cause a short circuit, and if they are too small, poor connection is likely to occur. In this way, it is desirable that an individual opening 16a is formed for each wiring 12a so that the connecting portion 12b is exposed. However, as in the example described later, when there is some margin in the gap between the wirings 12a, a plurality of connection portions 12b are formed in a row so as to be arranged side by side between the adjacent wirings 12a. The collective openings 16b (see FIG. 2A) may be formed so that the plurality of connection parts 12b are exposed collectively. The material constituting the solder resist layer 16 is exemplified by a thermosetting epoxy resin. The solder resist layer 16 is formed to have a thickness of about 20 μm, for example.

  The above example is an example of the individual openings 16a in which the openings 16a provided in the solder resist layer 16 are exposed for each connection portion 12b of the wiring 12a. However, as described above, FIG. 2A shows an example in which a plurality of connection portions 12a arranged in a row are collectively exposed as a plurality of openings 16b, as shown in FIG. 1A. 2A is also an electronic component in which electrode pads 21 are formed in a row along the four sides of a rectangular electronic component, as shown in the conceptual diagram of the bottom surface of the electronic component in FIG. 2B. An example of the printed wiring board 1 corresponding to 20 is shown.

  In this example, for convenience of explanation, the wiring group of the printed wiring board 1 corresponding to the first side of the electronic component 20 is the wiring 12a1 and the connecting portion 12b1, and the printed wiring board corresponding to the second side facing the first side. One wiring group is the wiring 12a2 and the connection portion 12b2, and the wiring group corresponding to the third side which is one of the sides orthogonal to the first side is the wiring 12a3 and the connection portion 12b3, which is the fourth side facing the third side. A wiring group corresponding to is shown as a wiring 12a4 and a connecting portion 12b4. However, when it is not necessary to specify which side these correspond to, they are simply shown as the wiring 12a and the connecting portion 12b. Also, a solder resist layer 16 is formed on the surface of the printed wiring board 1 on which the electronic component 20 is mounted, and a rectangular collective opening 16b is formed so that the connecting portion 12b is exposed for each of the aforementioned wiring groups. However, also for the collective openings 16b, the collective first openings 16b1, the collective second openings 16b2, and the collective third openings corresponding to the first side, the second side, and the like described above. The parts 16b3 and the collective fourth openings 16b4 are shown as a collective opening 16b when there is no need to distinguish between them.

  In the example shown in FIG. 2A, the collective first openings 16b1 of the solder resist layer 16 are formed so as to continuously expose the connecting portions 12b1 of the plurality of wirings 12a1 arranged in succession. The collective first openings 16b1 are continuously exposed without forming the solder resist layer 16 between the adjacent wirings 12a1.

  However, since the width w of the first opening 16b1 that is collectively opened is narrowed, the region of the connection portion 12b is narrowed, and the amount of solder is reduced, the solder lump to be soldered does not become so large. Therefore, contact between adjacent wirings 12a can be prevented. In short, the solder resist layer 16 cannot be formed between the adjacent wirings 12a, but the soldering width in the direction in which the wirings 12a extend is limited so that the solder in the direction perpendicular to the direction in which the wirings 12a extend is limited. The spread of 30 is also controlled.

  2C and FIG. 2D show the 2C-2C cross section of FIG. 2A, and FIG. 2E shows the explanatory view of the 2E-2E cross section of FIG. 2A, respectively, the adjacent wiring 12a1 and the electrode pad 21 of the electronic component 20 are Although each is connected by the solder 30, the spread of the solder 30 is suppressed and there is no risk of contact. This is because the solder resist layer 16 suppresses the spread of the solder 30 as shown in the cross-sectional explanatory view in the direction in which the wiring 12a1 extends in FIG. 2E, so that the expansion to the adjacent wiring 12a side in the perpendicular direction is also possible. It is because it is suppressed. As a result, when the connection portions 12b of the respective wirings 12a are arranged in a line, even if the collective openings 16b are formed along the continuous connection portions 12b, the connection portions 12b of the adjacent wirings 12a are connected to each other. Or an accident such as contact with the adjacent wiring 12a is prevented. Note that the example of FIG. 2C is an example in which soldering is directly performed on the connecting portion 12b, and FIG. 2D shows an example of being connected via solder bumps.

  As described above, in the example shown in FIG. 2A, the electronic component 20 in which the electrode pads 21 are formed along the four sides of the square-shaped electronic component 20 (indicated by a two-dot chain line in FIG. 2A). The printed wiring board 1 is suitable for being mounted. Therefore, the collective second openings 16b2 are collectively arranged so that the connection portions 12b2 of the second group of wirings 12a2 are exposed so as to correspond to the electrode pads 21 on the second side facing the one side of the electronic component 20. It is formed similarly to the first opening 16b1. That is, the second group of wirings 12a2 are arranged in the same manner as the first group of wirings 12a1 on the second opening 16b2 side, and the connection parts 12b2 are connected to the respective parts of the wirings 12a2. It is formed so as to be arranged in a line in a direction (for example, a right angle direction) intersecting the extending direction. A solder resist layer 16 is provided on the surface, and a narrow second opening portion 16b2 having a narrow width is formed so that the connection portion 12b2 is exposed. In other words, the collective second openings 16b2 are formed in the same manner as the collective first openings 16b1, and the collective first openings are exposed so that the connection portions 12b2 of the wirings 12a2 of the second wiring group are exposed. It is formed in parallel with 16b1. In the example shown in FIGS. 1A and 2A, an example is shown in which the electrode pads 21 are provided along the four sides of the rectangular electronic component 20, but the electrode pads 21 are provided along only one side. In the case of being formed (single in-line package), only a pair of staggered rows shown in FIG. 1A or the collective first openings 16b1 shown in FIG. When the electrode pads 21 are formed on only two opposite sides (dual in-line package), only the first opening 16b1 and the second opening 16b2 are formed, and the electrode pads are formed on the three sides or the four sides. When 21 is formed, a third opening 16b3 and a fourth opening 16b4 are formed as described later. This embodiment is similarly applied to the structure shown in FIG. 1A.

  In the example shown in FIG. 2A, a plurality of third groups of wirings 12a3 extending in a direction perpendicular to the direction in which the first group of wirings 12a1 extend are provided, and the connecting portions 12b3 are exposed in a row. The third opening 16 b 3 is formed in the solder resist layer 16. The wiring 12a3, the connecting portion 12b3, and the collective third opening 16b3 are formed in the same manner as the wiring 12a, the connecting portion 12b, and the collective opening 16b.

  Further, the collective fourth opening 16b4 is formed so that the connection portion 12b4 of the fourth group of wirings 12a4 is exposed so as to correspond to the electrode pad 21 on the fourth side facing the third side of the electronic component 20. It is formed similarly to the collective third opening 16b3. In other words, the fourth group of wirings 12a4 is arranged in the same manner as the first group of wirings 12a1 on the fourth opening 16b4 side, and the connection part 12b4 is connected to a part of each of the wirings 12a4. It is formed so as to be arranged in a line in a direction crossing the extending direction. Then, a solder resist layer 16 is provided on the surface, and a narrow fourth opening 12b4 having a narrow width is formed in parallel with the third opening 16b3 so as to expose the connection portion 12b4 in one row. ing. As described above, even when the first opening portion 16b1 to the fourth opening portion 16b4 are all formed, the electrode pad 21 is provided along the four sides of the quadrangular electronic component 20 (quad package). All the electrode pads 21 are connected to the printed wiring board 1 without fear of a short circuit. In the example shown in FIG. 2A, the first opening 16b1 to the fourth opening 16b4 are formed separately from each other, but they are connected to each other to form a single opening 16b in a loop shape. May be.

  Next, an embodiment of a method for manufacturing the printed circuit board shown in FIG. 1A will be described with reference to FIGS.

  First, as shown in FIG. 3A, a carrier 18 provided with a metal film 13a is prepared. For example, a copper-clad support plate is used as the carrier 18, but the carrier 18 is not limited to this. In the example shown in FIG. 3A, for example, a carrier copper foil-attached metal film 13a in which, for example, a carrier copper foil 18b and a metal film 13a are bonded to both surfaces of a support plate 18a made of a prepreg is an adhesive or a vacuum press. The metal film 13a is affixed to the support plate 18a and the carrier 18 made of, for example, the carrier copper foil 18b. The carrier 18 and the metal film 13a are removed and discarded later, and the material is not particularly limited. For the metal film 13a, for example, copper, nickel, or the like is used. Since the metal film 13a and the carrier copper foil 18b are separated later, the entire surface may be adhered by an easily separable adhesive such as a thermoplastic resin. By being bonded with such an adhesive, the metal film 13a and the carrier 18 are easily separated by being peeled off by raising the temperature in a later step. Or, for example, it may be pasted only with a normal adhesive. This is because the surroundings are easily separated by cutting and removing. Since it is desirable that there is no difference in thermal expansion between the carrier 18 and the metal film 13a, if nickel is used for the metal film 13a, the same material such as the carrier copper foil is also made of carrier nickel foil. It is preferable that However, this is not a limitation. Further, a release layer may be appropriately provided on the surface of the carrier 18 on which the metal film 13a is provided.

  Moreover, in the example shown by FIG. 3A, the figure by which the metal film 13a with the carrier copper foil 18b was affixed on both surfaces of the support plate 18a is shown. By doing in this way, since the support plate 18a is removed, it leads to effective use and contributes to shortening of the manufacturing process. However, the metal film 13a with the carrier copper foil 18b may be attached to only one surface of the support plate 18a. Even if the metal film 13a with the carrier copper foil 18b is provided on both surfaces of the support plate 18a of the carrier 18, the upper side and the lower side of the support plate 18a in the figure have exactly the same structure. The explanation is made, and the reference numerals of the drawings are appropriately omitted for the lower part.

  Next, as shown in FIG. 3B, the first conductor layer 12 including the wiring pattern 121 having the wiring 12a on which the electronic component is mounted and the connecting portion 12b is formed. In the method of forming the first conductor layer 12, a resist pattern (not shown) for forming a predetermined pattern is formed on the surface of the metal film 13a, and the metal film 13a is used as one electrode to form a metal by electroplating. The first conductor layer 12 is formed in the portion where the film 13a is exposed. Thereafter, by removing the resist pattern, the first conductor layer 12 as shown in FIG. 3B is formed.

  Next, as shown in FIG. 3C, the metal foil 14a that becomes part of the resin insulating layer 11 and the second conductor layer 14 is provided on the first conductor layer 12 and the first conductor layer 12 of the metal film 13a. Laminated on the exposed surface. For the resin insulating layer 11 and the metal foil 14a, a known method is used in which the resin insulating layer 11 and the metal foil 14a are bonded together under pressure and heat.

Next, a conduction hole 11d (see FIG. 3D) is formed. As a method of forming the conduction hole 11d, a laser beam irradiation method is used. That is, it is formed in a portion where the first conductor layer 12 and the second conductor layer 14 provided on both surfaces of the resin insulating layer 11 are connected, and the surface of the metal foil 14a is irradiated with CO ₂ laser light or the like. Processed.

  Next, a metal film such as an electroless plating film (not shown) is formed in the conduction hole 11d and on the metal foil 14a, a resist film (not shown) having a predetermined pattern is formed on the electroless plating film, For example, the via conductor 15 is formed by electroplating, and a layer of the electroplated film 14b is formed on a metal film not covered with a resist film (not shown). Thereafter, the resist film and the underlying metal film are removed. As a result, the second conductor layer 14 is formed which is composed of the metal foil 14a and the metal coating and electroplating film 14b (not shown) and is patterned in a predetermined pattern. This state is shown in FIG. 3D.

  Next, as shown in FIG. 3E, the carrier 18 is removed. In addition, although two laminated bodies are obtained by removing the carrier 18, only the upper laminated body in FIG. 3E is the upper side of the carrier 18 shown in FIG. 3D for clarity of explanation. It is shown upside down. As described above, the carrier 18 (carrier copper foil 18b) and the metal film 13a are fixed with an adhesive that easily peels off, such as a thermoplastic resin, or is fixed only with an adhesive or the like only at the periphery. Therefore, it is easily peeled off by raising the temperature or by cutting the surrounding adhesive portion, and the contact surface of the metal film 13a with the carrier copper foil 18b is exposed.

  Next, as shown in FIG. 3F, the metal film 13a is entirely removed by, for example, wet or dry chemical etching.

  Next, as shown in FIG. 3G, a solder resist layer 16 is formed on both surfaces of the resin insulation layer 11, and then electronic components are mounted on the first surface 11 a side of the resin insulation layer 11. The solder resist layer 16 is patterned so that the connection portions 12b of the wirings 12a to be exposed are exposed to form individual openings 16a (see FIG. 1A). Also, on the second surface 11b side of the resin insulating layer 11, as shown in FIG. 3G, the printed wiring board 1 is obtained by patterning the solder resist layer 16 so that the via conductor 15 is exposed. . In addition, from the viewpoint of the withstand voltage of the solder resist layer 16, since the thickness of the solder resist layer 16 from the surface of the conductor layers 12 and 14 is formed to be equal to or greater than a certain thickness, the first conductor layer 12 is the resin insulating layer 11. The second conductor layer 14 is formed on the second surface of the resin insulating layer 11 while only the surface is exposed, so that the surface (first surface) of the resin insulating layer 11 is exposed. 11a and the second surface 11b) are different in height (thickness), and warpage is likely to occur. However, according to this embodiment, since the connection is made to the connection portion 12b exposed at the opening 16a of the solder resist layer 16, the electronic component 20 can be reliably connected without causing a short circuit defect.

  Thereafter, although not shown, the exposed surface of the connection portion 12b of each wiring 12a to which the electrode pad 21 of the electronic component 20 of the second conductor layer 12 is connected has OSP, Ni / Au, Ni / Pd / Au. Surface treatment such as Sn is performed. This is to facilitate soldering.

  In the embodiment shown in FIG. 1, a printed wiring board in which a pair of conductor layers (the first conductor layer 12 and the second conductor layer 14) is formed via one resin insulating layer is illustrated. However, for example, after the second conductor layer 14 shown in FIG. 3D is formed, on the exposed surfaces of the second conductor layer 14 and the resin insulation layer 11, as shown in FIG. The second metal foil may be laminated, and then a process of FIG. 3E and subsequent steps may be performed to obtain a printed wiring board having a three-layer structure.

DESCRIPTION OF SYMBOLS 1 Printed wiring board 11 Resin insulating layer 11a 1st surface 11b 2nd surface 11d Conduction hole 12 1st conductor layer 12a Wiring 12b Connection part 13a Metal film 14 2nd conductor layer 14a Metal foil 14b Electroplating film 15 Via conductor 16 Solder Resist layer 16a Individual openings 16b Collective openings 18 Carrier 20 Electronic component 21 Electrode pad 30 Solder

Claims (9)

A resin insulation layer having a first surface and a second surface opposite to the first surface;
A first conductor layer including a wiring formed on the first surface side of the resin insulating layer and having a connection portion to which an electronic component is connected;
A second conductor layer formed on the second surface of the resin insulation layer;
A via conductor provided through the resin insulation layer and connecting the first conductor layer and the second conductor layer;
A solder resist layer provided on the first surface and the second surface of the resin insulation layer;
A printed wiring board comprising:
The first conductor layer has a plurality of connection portions, and is embedded in the resin insulating layer so that an uppermost surface of at least a part of the plurality of connection portions is exposed, and at least a part of the connection portions is formed. Formed in a row so as to form a row of connecting portions spaced apart from each other along one side of the electronic component,
An opening is formed in the solder resist layer so that at least a part of the connection portion is exposed. The printed wiring board according to claim 1, wherein the opening of the solder resist layer is formed such that a plurality of the connection portions are continuously exposed in a row. 2. The printed wiring board according to claim 1, wherein the opening of the solder resist layer is individually formed so that each connection portion of the wiring is exposed. 4. The printed wiring board according to claim 3, wherein the openings are formed in a zigzag pattern that is alternately shifted in a direction perpendicular to an arrangement direction of the connection parts in which the adjacent connection parts are arranged in a row. 5. The printed wiring board according to claim 3, wherein a distance f between one end of the opening and the side of the opening adjacent to the one end is 10 μm or more. It is a printed wiring board of any one of Claims 1-5, Comprising: The some connection part different from the row | line | column of the said connection part is parallel to the 1st arrangement | sequence of the said connection part arranged in the said row | line | column form. In addition, they are formed in a second array that is arranged in a row spaced apart from each other, and are exposed from openings formed in the solder resist layer. 7. The printed wiring board according to claim 6, wherein a plurality of connection portions different from the row of the connection portions are arranged in a row spaced apart from each other in a direction intersecting the arrangement direction of the first arrangement. It is formed in three arrays and exposed from an opening formed in the solder resist layer. The printed wiring board according to claim 7, wherein a plurality of wiring connection portions different from the connection portion rows are arranged in a row apart from each other in parallel with the arrangement direction of the third arrangement. Electronic components formed in four arrays and exposed from openings formed in the solder resist layer and having a rectangular shape and electrode pads formed in the periphery are arranged in the first to fourth arrays. It is formed so that it can be connected to the connecting portion. It is a printed wiring board of any one of Claims 1-8, Comprising: The width | variety of the cross section of the said via conductor is smaller on the said 1st conductor layer side than the said 2nd conductor layer side.

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