JP2016086118A - Multilayer capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer capacitor which has a path for flowing a current in an inner electrode for grounding and has a low ESL.SOLUTION: A multilayer capacitor includes: a laminate body in which a plurality of dielectric layers 1g are laminated; a plurality of inner electrodes 2 for signals drawn to a first and a second end surfaces; a pair of inner electrodes 3a and 3b for grounding which face each other in the same plane of the laminate body and have drawing portions 3a1, 3a2, 3b1, and 3b2 extended to a first and second side surfaces; an external terminal for grounding disposed on the first and second side surfaces and electrically connected to an inner electrode 3 for grounding; and a pair of external electrodes electrically connected to the inner electrode 2 for signals. Each of the pair of inner electrodes 3a and 3b for grounding is inclined toward a first principal surface or a second principal surface in a manner such that each end portion thereof facing each other approaches the inner electrode 2 for signals.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a multilayer capacitor used for a noise filter or the like with reduced equivalent series inductance (ESL) in a high frequency region.

  In recent years, information processing devices, communication devices, and the like have been digitized, and the frequency of digital signals handled by these devices has been increasing with the increase in information processing capability. Therefore, in these devices, the generated noise tends to increase in the high frequency region as well, and for example, electronic components such as multilayer capacitors are used for noise countermeasures. An example of such a multilayer capacitor is disclosed in Patent Document 1.

JP 2005-44871 A

  As described above, the multilayer capacitor is used, for example, to suppress noise from entering the LSI from the power supply line or other devices in an LSI power circuit such as a CPU, or to prevent malfunction of the LSI. It is used for.

  However, the trend toward higher frequencies is increasing in information processing equipment or communication equipment, and multilayer capacitors are subject to noise in high frequency areas, for example, noise in high frequency areas such as signal lines or power supply lines. In order to reduce, ESL must be further reduced.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a multilayer capacitor capable of reducing ESL.

  In the multilayer capacitor of the present invention, a plurality of dielectric layers are stacked to connect the first and second main surfaces facing each other and the first and second main surfaces facing each other. A laminated body formed in a substantially rectangular parallelepiped shape having a second end face and the first and second end faces that connect between the first and second end faces, and the plurality of dielectrics in the laminated body; A plurality of signal internal electrodes led to at least one of the first end surface and the second end surface are disposed between the signal internal electrodes, and are disposed in the stacking direction of the body layers. A pair of grounding internal electrodes facing each other in the same plane in the laminate and having lead portions to the first side surface and the second side surface, and the first side surface and the first side surface. 2 on the side of the ground A grounding external terminal electrically connected to the internal electrode, a pair of external electrodes disposed on the first end surface and the second end surface, respectively, and electrically connected to the signal internal electrode; And the pair of grounding internal electrodes are inclined toward the first main surface or the second main surface so that their opposing ends approach the signal internal electrode. It is characterized by.

  According to the multilayer capacitor of the present invention, the ESL can be lowered by bringing the end of the opposing grounding internal electrode closer to the signal internal electrode.

1 is a schematic perspective view showing a multilayer capacitor according to an embodiment. (A) is sectional drawing cut | disconnected by the AA line of the multilayer capacitor | condenser shown in FIG. 1, (b) is the cross section cut | disconnected by the AA line | wire of the other example of the multilayer capacitor | condenser shown in FIG. FIG. FIG. 2 is a schematic exploded perspective view of the multilayer capacitor shown in FIG. 1. FIG. 2A is an enlarged view of a main part B of the multilayer capacitor shown in FIG. 2A, and FIG. 2B is an explanatory diagram for explaining an arrangement state of a signal internal electrode and a ground internal electrode. It is. FIG. 6 is an explanatory diagram for explaining an arrangement state of signal internal electrodes and ground internal electrodes in another example of the multilayer capacitor shown in FIG. 1. FIG. 3 is a schematic exploded perspective view of another example of the multilayer capacitor shown in FIG. 1.

<Embodiment 1>
Hereinafter, the multilayer capacitor 10 according to the first embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a schematic perspective view showing a multilayer capacitor 10 according to an embodiment of the present invention, and FIG. 2A is a cross section of the multilayer capacitor 10 shown in FIG. FIG. The multilayer capacitor 10 may have either direction upward or downward. For convenience, the multilayer capacitor 10 defines an orthogonal coordinate system XYZ, and the upper side or the lower side with the positive side in the Z direction as the upper side. The following terms shall be used.

  As shown in FIGS. 1 to 4, the multilayer capacitor 10 includes a multilayer body 1, a signal internal electrode 2, a pair of ground internal electrodes 3 (a first ground internal electrode 3a and a second ground ground electrode). An internal electrode 3b), a grounding external terminal 4, and a pair of external electrodes 5 (a first external electrode 5a and a second external electrode 5b) are provided.

  The multilayer body 1 is formed in a substantially rectangular parallelepiped shape by laminating a plurality of dielectric layers 1g, and the first and second end faces 1c facing each other with the first and second main faces 1a and 1b facing each other. 1d and first and second side surfaces 1e and 1f facing each other. The first and second end faces 1c, 1d facing each other connect the first and second main faces 1a, 1b, and the first and second side faces 1e, 1f facing each other. Connects the first and second main faces 1a, 1b and the first and second end faces 1c, 1d. The substantially rectangular parallelepiped shape includes not only a cubic shape or a rectangular parallelepiped shape, but also includes, for example, a shape in which a ridge line portion of a cube or a rectangular parallelepiped is chamfered so that a ridge portion has an R shape.

  The laminated body 1 is a sintered body obtained by laminating and firing a plurality of ceramic green sheets to be the dielectric layer 1g. Thus, the laminated body 1 is formed in a substantially rectangular parallelepiped shape, and is formed on the first main surface 1a and the second main surface 1b, the first main surface 1a, and the second main surface 1b facing each other. The first end face 1c and the second end face 1d that are orthogonal to each other, and the first side face 1e and the second end face 1d that are orthogonal to the first end face 1c and the second end face 1d and that are opposite to each other. Side surface 1f. Moreover, the laminated body 1 has a rectangular plane that is a cross section (XY plane) in a direction orthogonal to the laminating direction (Z direction) of the dielectric layer 1g. In the multilayer capacitor 10, each ridge line portion of the multilayer body 1 may be rounded.

The dimension of the multilayer capacitor 10 having such a configuration is such that the length in the longitudinal direction (Y direction) is, for example, 0.6 (mm) to 2.2 (mm), and the length in the short direction (X direction). However, the length in the height direction (Z direction) is, for example, 0.3 (mm) to 1.5 (mm).
2 (mm).

  The dielectric layer 1g has a rectangular shape in a plan view, and the thickness per layer is, for example, 0.5 (μm) to 3.0 (μm). In the laminated body 1, for example, a plurality of dielectric layers 1g composed of 10 (layers) to 1000 (layers) are laminated in the Z direction.

The dielectric layer 1g is, for example, barium titanate (BaTiO ₃ ), calcium titanate (CaTiO ₃ ), strontium titanate (SrTiO ₃ ), or calcium zirconate (CaZrO ₃ ). The dielectric layer 1g is preferably made of barium titanate as a ferroelectric material having a high dielectric constant from the viewpoint of a high dielectric constant.

  The plurality of signal internal electrodes 2 are formed in the multilayer body 1 and have a rectangular shape in plan view from the stacking direction, and are spaced in the stacking direction of the plurality of dielectric layers 1g in the stack body 1. And is drawn out to at least one end face of the first end face 1c and the second end face 1d.

  2A and 3, the signal internal electrode 2 includes the first end face 1c and the second end face so that both end portions in the Y direction are exposed to the first end face 1c and the second end face 1d. Are respectively drawn out to the end face 1d. That is, the signal internal electrode 4 is provided such that the end portion in the X direction is located inside the first side surface 1e and the second side surface 1f, and the end portion in the Y direction is the first end surface. It extends in the Y direction so as to be exposed at each of 1c and second end face 1d, and is arranged in laminate 1. That is, the signal internal electrode 2 is provided so as to be exposed to the first end face 1c and the second end face 1d and not to be exposed to the first side face 1e and the second side face 1f. The number of signal internal electrodes 2 in the multilayer body 1 is appropriately designed according to the characteristics of the multilayer capacitor 10.

  As described above, the plurality of signal internal electrodes 2 are arranged at predetermined intervals in the stacking direction of the plurality of dielectric layers 1g in the stacked body 1, and the first main surface 1a and the first main surface 1a of the stacked body 1 are arranged. 2 are provided so as to be substantially parallel to the main surface 1b. In the multilayer capacitor 10, the signal internal electrode 2 is disposed between the dielectric layers 1g as shown in FIG. 2 (a), and one end thereof is drawn out to the first end face 1c. The other end is drawn out to the second end face 1d facing the first end face 1c.

  The conductive material of the signal internal electrode 2 is, for example, a metal material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), or gold (Au), or one or more of these metal materials For example, an alloy material such as an Ag—Pd alloy. Further, the signal internal electrode 2 has an electrode thickness of, for example, 0.5 (μm) to 2 (μm), and the thickness may be appropriately set according to the application.

  As shown in FIG. 2A, the pair of grounding internal electrodes 3 is composed of a first grounding internal electrode 3a and a second grounding internal electrode 3b, and between the signal internal electrodes 2 in the stacking direction. Are disposed so as to be substantially parallel to the signal internal electrode 2 and are disposed to face each other at a predetermined interval in the same plane in the laminate 1. The first grounding internal electrode 3a has a lead-out part 3a1 to the first side face 1e and a lead-out part 3a2 to the second side face 1f, and the second grounding internal electrode 3b It has a lead-out part 3b1 to the first side face 1e and a lead-out part 3b2 to the second side face 1f. As shown in FIG. 4, the pair of grounding internal electrodes 3 includes an end portion 3aa of the first grounding internal electrode 3a from a side portion 3ac located between the corner portion 3ab and the corner portions 3ab on both sides. Thus, the end portion 3ba of the second grounding internal electrode 3b is composed of the corner portion 3bb and the side portion 3bc located between the corner portions 3bb on both sides.

  As described above, the pair of grounding internal electrodes 3 is a direction orthogonal to the stacking direction in the stacked body 1, in which the first grounding internal electrode 3 a and the second grounding internal electrode 3 b form a pair. Are arranged opposite to each other at a predetermined interval in the same plane. The term “in the same plane” means that it is between the same dielectric layers 1g.

  As shown in FIG. 3, the first grounding internal electrode 3a has a rectangular main electrode portion in plan view from the stacking direction, and the lead-out portion 3a1 is a first main electrode portion having a rectangular shape. It extends from the side on the side surface 1e side to the first side surface 1e, and is pulled out to the first side surface 1e so that the end of the lead-out portion 3a1 is exposed to the first side surface 1e.

  Similarly, as shown in FIG. 3, the first grounding internal electrode 3a has a rectangular main electrode portion in plan view from the stacking direction, and the lead-out portion 3a2 is a rectangular main electrode portion. The second side surface 1f is extended from the side of the second side surface 1f to the second side surface 1f, and is pulled out to the second side surface 1f so that the end of the lead-out portion 3a2 is exposed to the second side surface 1f. ing.

  Further, as shown in FIG. 3, the second grounding internal electrode 3b has a quadrangular main electrode portion in plan view from the stacking direction, and the lead-out portion 3b1 is the second main electrode portion of the quadrangular main electrode portion. 1 is extended from the side portion on the side surface 1e side to the first side surface 1e, and is pulled out to the first side surface 1e so that the end portion of the lead-out portion 3b1 is exposed to the first side surface 1e. Yes.

  Similarly, as shown in FIG. 3, the first grounding internal electrode 3b has a rectangular main electrode portion in plan view from the stacking direction, and the lead-out portion 3b2 is a rectangular main electrode portion. The second side 1f is extended from the side of the second side 1f to the second side 1f, and the end of the lead-out part 3b2 is pulled out to the second side 1f so as to be exposed to the second side 1f. ing.

  In this way, the pair of grounding internal electrodes 3 are arranged such that the first grounding internal electrode 3a and the second grounding internal electrode 3b face each other with a gap therebetween, and are within the same plane. It has an opposing part in the area | region of the center part. As shown in FIG. 3, the lead-out part 3a1 and the lead-out part 3a2 of the first grounding internal electrode 3a are provided close to the opposing part, and the lead-out part 3b1 of the second grounding internal electrode 3b. Similarly, the lead-out part 3b2 is provided close to the facing part.

  Further, the first grounding internal electrode 3a and the second grounding internal electrode 3b are disposed to face each other with an interval of 20 (μm) to 200 (μm), for example.

  Further, as shown in FIG. 4, the signal internal electrode 2 has a recess 2 a in a portion overlapping with a region between the pair of ground internal electrodes 3 in plan view from the stacking direction. That is, as shown in FIG. 4, the signal internal electrode 2 has a portion corresponding to a region between the end 3 aa and the end 3 ba of the pair of ground internal electrodes 3 when viewed from the direction orthogonal to the stacking direction. It is recessed and has the recessed part 2a over the width direction (X direction). The recess 2a of the signal internal electrode 2 is formed according to the size of the region between the ends 3aa and 3ba of the pair of ground internal electrodes 3. That is, the length and the depth in the width direction (X direction) of the recess 2a are formed according to the size of the region between the end portions 3aa and 3ba of the pair of grounding internal electrodes 3.

The conductive material of the grounding internal electrode 3 is, for example, a metal material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), or gold (Au), or one or more of these metal materials For example, an alloy material such as an Ag—Pd alloy. The first to fourth grounding electrodes 2a, 2b, 3a, 3b are preferably formed of the same metal material or alloy material. The first grounding internal electrode 2 and the second grounding internal electrode 3 have a thickness of 0.5 (μm) to 2 (μm), for example. The signal internal electrode 2 and the ground internal electrode 3 are preferably formed of the same metal material or alloy material.

  As shown in FIG. 2A and FIG. 3, the multilayer capacitor 10 includes a signal internal electrode 2, a pair of ground internal electrodes 3, a signal internal electrode 2, The grounding internal electrodes 3 are alternately disposed in order from the top, and dielectric layers 1g are disposed between the respective internal electrodes. That is, the signal internal electrode 2, the pair of ground internal electrodes 3, the signal internal electrode 2, and the pair of ground internal electrodes 3 are separated from each other by the dielectric layer 1 g in the multilayer body 1 and face each other. And at least one dielectric layer 1g is sandwiched between the internal electrodes, and a plurality of dielectric layers 1g on which these internal electrodes are formed are laminated to form a multilayer capacitor Ten laminated bodies 1 are formed.

  2A and 3, the multilayer capacitor 10 includes a signal internal electrode 2, a pair of ground internal electrodes 3, a signal internal electrode 2, and a pair of ground internal electrodes 3. Are alternately arranged in order from the top, and the outermost layers (upper surface side and lower surface side) in the Z direction are the signal internal electrodes 2, respectively. Further, the multilayer capacitor 10 is not limited to the multilayer configuration as shown in FIG. The number of layers of the signal internal electrode 2 and the pair of grounding internal electrodes 3 is appropriately designed according to the characteristics of the multilayer capacitor 10 and the like.

  Further, as shown in FIG. 2B, the multilayer capacitor 10A includes a pair of grounding internal electrodes 3, a signal internal electrode 2, a pair of grounding internal electrodes 2, and a signal internal, as shown in FIG. The electrodes 2 may be alternately arranged in order from the top, the outermost layer on the upper surface side in the Z direction may be a pair of grounding internal electrodes 3, and the outermost layer on the lower surface side may be a pair of grounding internal electrodes 3. As described above, the multilayer capacitor 10A is configured such that the pair of grounding internal electrodes 3 are arranged on the outermost layer internal electrodes on the upper surface side and the lower surface side, respectively, so that the pair of grounding internal electrodes 3 can receive an electric field from the outside. Shielding can be improved so that the shielding effect can be improved.

  Therefore, in the multilayer capacitor 10A, the inner electrodes on the outermost layer on the upper surface side and the lower surface side are constituted by a pair of grounding internal electrodes 2 (first grounding internal electrode 3a and second grounding internal electrode 3b). Thus, a shield effect is obtained by the pair of grounding internal electrodes 2, and the influence of disturbance noise such as noise exceeding input tolerance or discharge due to static electricity can be effectively reduced.

  The grounding external terminals 4 are disposed on the first side face 1e and the second side face 1f, respectively, and are electrically connected to the grounding internal electrode 3. In the multilayer capacitor 10, the grounding external terminal 4 includes first to fourth grounding external terminals 4 a, 4 b, 4 c, and 4 d, and as shown in FIG. 1e and the second side face 1f, respectively. The first grounding external terminal 4a and the third grounding external terminal 4c are respectively disposed on the first side surface 1c, and the second grounding external terminal 4b and the fourth grounding external terminal 4d are the second. It is arrange | positioned at 1f of each side. The first to fourth grounding external terminals 4a, 4b, 4c, and 4d have respective end portions extending to the upper surface (first main surface 1a) and the lower surface (second main surface 1b) of the laminate 1. It is provided to do.

The first grounding external terminal 4a and the second grounding external terminal 4b are electrically connected, and the third grounding external terminal 4cb and the fourth grounding external terminal 4d are electrically connected. The structure connected to may be sufficient. For example, the first ground external terminal 4a and the second ground external terminal 4b are connected to one of the upper surface (first main surface 1a) or the lower surface (second main surface 1b) of the laminate 1, The third grounding external terminal 4cb and the fourth grounding external terminal 4d are connected to one of the upper surface (first main surface 1a) and the lower surface (second main surface 1b) of the laminate 1. The grounding external terminal 4 may be the first grounding external terminal 4a and the second grounding external terminal 4b, and the third grounding external terminal 4c and the fourth grounding external terminal. 4d is the upper surface of the laminate 1 (
The structure connected in both the 1st main surface 1a) and the lower surface (2nd main surface 1b) may be sufficient.

  The first grounding external terminal 4a is connected to the lead portion 3a1 of the first grounding internal electrode 3a, and the second grounding external terminal 4b is connected to the lead portion 3a2a of the first grounding internal electrode 3a. Has been. The third grounding external terminal 4c is connected to the lead portion 3b1 of the second grounding internal electrode 3b, and the fourth grounding external terminal 4d is the lead portion 3b2 of the second grounding internal electrode 3b. It is connected to the.

  The first grounding external terminal 4a is provided so as to cover the exposed part of the lead part 3a1 to the first side face 1e, and the second grounding external terminal 4b is the second part of the lead part 3a2. It is provided so as to cover the exposed part to the side surface 1f. The third grounding external terminal 4c is provided so as to cover the exposed part of the lead part 3b1 to the first side face 1e, and the fourth grounding external terminal 4d is the second part of the lead part 3b2. It is provided so as to cover the exposed part to the side surface 1f.

  As shown in FIG. 1, the grounding external terminal 4 is formed so as to cover the lead portions 3 a 1, 3 a 2, 3 b 1, 3 b 2, and in the laminated body 1, the first and second side surfaces 1 e, 1 f To the surfaces of the first and second main surfaces 1a and 1b.

  Specifically, the grounding external terminals 4 (first to fourth grounding external terminals 4a to 4d) are formed on the surface (main surface and side surfaces) of the laminate 1 as shown in FIG. The base electrode and the plating layer are included, and the plating layer is formed on the surface of the base electrode so as to cover the base electrode. The plating layer is formed on the surface of the base electrode so as to cover the base electrode for solder joining, and the grounding external terminal 4 can be easily and reliably inserted into the pad of the substrate through the reflow method. For the purpose of protecting the base electrode or improving the mountability of the multilayer capacitor 10.

  The first to fourth grounding external terminals 4a, 4b, 4c, and 4d of the multilayer capacitor 10 are, for example, for grounding (grounding) on a circuit board (not shown) on which the multilayer capacitor 10 is mounted. It will be connected to each pad.

  The conductive material of the ground electrode of the grounding external terminal 4 is, for example, a metal material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd) or gold (Au), or these metal materials For example, an alloy material such as an Ag—Pd alloy.

  The base electrode has a thickness on the first and second main surfaces 1a and 1b of, for example, 4 (μm) to 10 (μm), and a thickness of the first and second side surfaces 1e and 1f of, for example, 4 (Μm) to 10 (μm).

  The pair of external electrodes 5 includes a first external electrode 5a and a second external electrode 5b facing each other, and are disposed on the first end surface 1c and the second end surface 1d, respectively. As shown in FIG. 2, the multilayer capacitor 10 has a first external electrode 5a provided on the first end face 1c, and a second external electrode 5b provided on the first end face 1d. The first external electrode 5a and the second external electrode 5b are connected to the signal internal electrode 2, respectively.

As described above, the pair of external electrodes 5 includes the first external electrode 5a and the second external electrode 5b, and is formed so as to cover the first and second end faces 1c and 1d. The external electrode 5a and the second external electrode 5b are arranged so as to face each other. As shown in FIG. 1, the pair of external electrodes 5 are formed so as to cover the first and second end faces 1 c and 1 d, and in the stacked body 1, the first and second end faces 1 c, The first and second main faces 1a and 1b are formed to extend from 1d to the surfaces of the first and second main faces 1a and 1b, respectively, and from the first and second end faces 1c and 1d to the first and second side faces 1e and 1f. Each is formed extending on the surface.

  Specifically, the pair of external electrodes 5 (first external electrode 5a and second external electrode 5b) are formed on the surface (end surface, main surface and side surface) of the laminate 1 as shown in FIG. And includes a base electrode and a plating layer, and the plating layer is formed on the surface of the base electrode so as to cover the base electrode. Note that the plating layer is formed on the surface of the base electrode so as to cover the base electrode for solder bonding, and the pair of external electrodes 5 are easily and reliably attached to the substrate pad via the solder by a reflow method or the like. For the purpose of protecting the base electrode or improving the mountability of the multilayer capacitor 10.

  The conductive material of the base electrode of the external electrode 5 is, for example, a metal material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), or gold (Au), or one of these metal materials For example, an alloy material such as an Ag—Pd alloy is included. The pair of metal layers 4g are preferably formed of the same metal material or alloy material.

  The base electrode has a thickness on the first and second main surfaces 1a and 1b of, for example, 4 (μm) to 10 (μm), and a thickness on the first and second end surfaces 1c and 1d of, for example, 10 (Μm) to 25 (μm), and the thicknesses of the first and second side surfaces 1e and 1f are, for example, 4 (μm) to 10 (μm).

  The plating layers of the grounding external terminal 4 and the external electrode 5 may be formed of a single plating layer, but may include a first plating layer and a second plating layer. The first plating layer is formed so as to cover the base electrode, and the second plating layer is formed on the surface of the first plating layer so as to cover the first plating layer. The plating layer is formed of one or more plating layers such as a nickel (Ni) plating layer, a copper (Cu) plating layer, a gold (Au) plating layer, or a tin (Sn) plating layer. The first plating layer has a thickness of, for example, 5 (μm) to 10 (μm), and the second plating layer has a thickness of, for example, 3 (μm) to 5 (μm). In the multilayer capacitor 10, for example, the first plating layer is a nickel (Ni) plating layer and the second plating layer is a tin (Sn) plating layer.

  In the multilayer capacitor 10, the signal internal electrode 2 is connected to, for example, a signal line electrode or a current line electrode on a circuit board (not shown) on which the multilayer capacitor 10 is mounted. .

  In the multilayer capacitor 10, the signal internal electrode 2 extends in the Y direction (the direction of the first end face 1 c and the second end face 1 d), and a path for transmitting a signal through the signal internal electrode 2 is provided. It is composed. The multilayer capacitor 10 includes a signal internal electrode 2 and a first ground internal electrode 3a in the vertical direction (lamination direction) in the multilayer body 1, and the signal internal electrode. 2 and the second grounding internal electrode 3b constitute a capacitor.

  In the multilayer capacitor 10, a pair of grounding internal electrodes 3 are arranged in the Z direction (lamination direction) with the signal internal electrode 2 sandwiched therebetween, and intersect with the signal internal electrode 2. The lead portions 3a1, 3a2, 3b1, 3b2 extend on the (first side surface 1e and second side surface 1f). In the multilayer capacitor 10, the lead portions 3a1, 3a2, 3b1, 3b2 are connected to the first to fourth grounding external terminals 4a, 4b, 4c, 4d, respectively, and the first grounding internal electrode 3a is connected. The second grounding internal electrode 3b constitutes a path for passing a current to the ground.

  Thus, in the multilayer capacitor 10, the first grounding internal electrode 3a and the second grounding internal electrode 3b are arranged to face each other with a gap in the same plane in the multilayer body 1. The first grounding internal electrode 3a has a lead part 3a1 and a lead part 3a2, and the second grounding internal electrode 3b has a lead part 3b1 and a lead part 3b2. The first grounding inner electrode 3a has a lead portion 3a1 led out to the first side surface 1e, and a lead portion 3a2 led out to the second side surface 1d opposite to the first side surface 1e. Since the lead portion 3a1 and the lead portion 3a2 are provided to face each other, the current flowing toward the lead portion 3a1 and the current flowing toward the lead portion 3a2 are opposite to each other in the lead portion 3a1 and the lead portion 3a2. To flow into.

  The second grounding internal electrode 3b has a lead portion 3b1 drawn to the first side surface 1e, and a lead portion 3b2 drawn to the second side surface 1d facing the first side surface 1e. Since the lead portion 3b1 and the lead portion 3b2 are provided to face each other, in the lead portion 3b1 and the lead portion 3b2, the current flowing toward the lead portion 3b1 and the current flowing toward the lead portion 3b2 are opposite to each other. To flow into.

  The multilayer capacitor 10 has a current flowing to the ground via a path formed by the lead portions 3a1 and 3a2 of the first grounding internal electrode 3a and the lead portions 3b1 and 3b2 of the second grounding internal electrode 3b. It comes to flow. Therefore, the multilayer capacitor 10 can cancel each other's mutual inductance since a current flows to the ground through these paths.

  Thus, in the multilayer capacitor 10, the lead portion 3 a 1 and the lead portion 3 a 2 are arranged to face each other in the first grounding internal electrode 3 a so that currents flow in opposite directions. With this configuration, since the current flowing through the ground is in the opposite direction, the directions of the generated magnetic fields are opposite to each other, and the equivalent series inductance (ESL) can be reduced due to the mutual induction effect. Similarly, in the multilayer capacitor 10, the lead portion 3b1 and the lead portion 3b2 are arranged to face each other in the second grounding internal electrode 3b so that currents flow in opposite directions. With such a configuration, since the current flowing through the ground is in the opposite direction, the directions of the generated magnetic fields are opposite to each other, and the equivalent series inductance (ESL) can be reduced due to the mutual induction effect.

  Further, as shown in FIG. 4, the pair of grounding internal electrodes 3 includes the first main surface 1a or the second main surface 1a or the second main surface 2a so that the opposing end portions 3aa and end portions 3ba approach the signal internal electrode 2. It is inclined toward the main surface 1b. That is, in the facing portion of the pair of grounding internal electrodes 3, the end portion 3aa and the end portion 3ba are inclined downward with respect to each other, as shown in FIG. It is curved toward the lower signal internal electrode 2.

  Specifically, in the multilayer capacitor 10, at the facing portion where the first grounding internal electrode 3a and the second grounding internal electrode 3b face each other with a gap, the end 3aa and the end 3ba are: It is inclined toward the second main surface 1b below so as to approach the signal internal electrode 2 positioned below. Moreover, as shown in FIG. 4, the inclination | tilt angle (alpha) of edge part 3aa and edge part 3ba is 5 (degrees)-20 (degrees), for example. The inclination angle α approaches the signal internal electrode 2 as it increases, but is appropriately set in consideration of a short circuit between the signal internal electrode 2 and the ground internal electrode 3.

As described above, in the multilayer capacitor 10, currents flow in the opposite directions in the first grounding internal electrode 3a in the same plane, and in the second grounding internal electrode 3b. Since the current flows in the opposite direction, an action that cancels the magnetic field in the stacked body 1 occurs. Therefore, in the multilayer capacitor 10, currents flow in the opposite directions in the first grounding internal electrode 3a in the same plane, and the currents flow in the reverse direction in the second grounding internal electrode 3b. Therefore, the directions of the generated magnetic fields are opposite to each other, and the equivalent series inductance (ESL) can be reduced due to the mutual induction effect.

  Further, the first grounding internal electrode 3a and the second grounding internal electrode 3b are arranged so that the end 3aa and the end 3ba located at the opposing part approach the signal internal electrode 2 located below, respectively. It is inclined toward the main surface 1b. In the region between the end portion 3aa and the end portion 3ba of the grounding internal electrode 3, the end portion 3aa and the end portion 3ba of the grounding internal electrode 3 are not restrained, whereas the end portion of the grounding internal electrode 3 is not constrained. The signal internal electrode 2 is constrained in a region corresponding to the space between 3aa and the end 3ba. When a laminated body is produced by pressing the laminated ceramic green sheets, the dielectric layer 1g between the signal internal electrode 2 and the pair of grounding internal electrodes 3 is deformed in the pressing direction of the press. Accordingly, the end 3aa and the end 3ba of the grounding internal electrode 3 are not constrained, while the signal internal electrode 2 is constrained, so that the lower part 3aa and the end 3ba (second Is greater than the recess of the recess 2a of the signal internal electrode 2. Therefore, the end 3aa of the first grounding internal electrode 3a and the end 3ba of the second grounding internal electrode 3b are close to the signal internal electrode 2.

  For example, as shown in FIG. 4, the pair of grounding internal electrodes 3 are provided so as to approach the signal internal electrode 2, so that the noise component that has entered the signal internal electrode 2 is converted into the first grounding internal electrode 2. It is possible to effectively escape to the ground through the end 3aa of the electrode 3a and the end 3ba of the second grounding internal electrode 3b.

  Therefore, the multilayer capacitor 10 can reduce the equivalent series inductance (ESL) by reducing the inductance by the magnetic field canceling action. As described above, the multilayer capacitor 10 has a low ESL and can shift the resonance frequency to the high frequency region side, so that noise in the high frequency region can be effectively reduced.

  For example, when the multilayer capacitor 10 is connected to a signal line or a power supply line of a circuit board (not shown), the first external electrode 5a is connected to the input end of the signal line or the power supply line, The second external electrode 5b is connected to the output end of the signal line or the power supply line, and the first to fourth grounding external terminals 4a, 4b, 4c, 4d are connected to the grounding end (ground), respectively. High frequency noise of the line or power supply line can be reduced. In this case, for example, a pattern such as a signal line or a power supply line for which noise is to be reduced is cut, and the multilayer capacitor 10 includes the first external electrode 5a and the second external electrode at the cut pattern portion. 5b are connected to each other.

  Similarly, since the equivalent series inductance (ESL) of the multilayer capacitor 10 is reduced, for example, by connecting it to the drive power supply line or signal line of the CPU, the high frequency range of the drive power supply line or signal line can be reduced. Noise can be reduced. For example, the multilayer capacitor 10 connects the first external electrode 5a and the second external electrode 5b in parallel with the power supply line or signal line on the circuit board (the same potential in the circuit), and The first to fourth grounding external terminals 4a, 4b, 4c, and 4d can be connected to a ground terminal (ground) to reduce high-frequency noise in the power supply line or signal line. In this case, for example, the pattern of the power supply line or the signal line for which noise is to be reduced is not cut, and the multilayer capacitor 10 is configured such that the first external electrode 5a and the second external electrode 5b are the power supply line or signal line. Are connected in parallel.

  In addition, as shown in FIG. 6, the multilayer capacitor 100 has a signal internal electrode 2 </ b> A formed in the multilayer body 1 and has a rectangular shape in plan view, and is disposed between the pair of grounding internal electrodes 3. The laminated body 1 may be drawn out to one end face of the first end face 1c and the second end face 1d. That is, the signal internal electrode 2A is provided so as to be located on the inner side with respect to the first side surface 1e and the second side surface 1f, and the end portions in the Y direction are the first end surface 1c and the second end surface. You may arrange | position in the laminated body 1 so that it may extend in a Y direction so that it may be exposed to either one end surface of 1d. That is, the signal internal electrode 2A is provided so as to be exposed at one end face of the first end face 1c and the second end face 1d, and is not exposed to the first side face 1e and the second side face 1f. Is provided.

  As described above, in the multilayer capacitor 100, the signal internal electrode 2 is drawn out only to one end face as described above. With this configuration, for example, a signal of a circuit board (not shown) can be obtained. When connecting to a line or a power supply line or the like, the first external electrode 5a and the second external electrode 5b are connected to the signal line or the power supply line, and the first to fourth grounding external terminals 4a and 4b are connected. 4c and 4d can be connected to a ground end (ground) to reduce high-frequency noise in the signal line or the power line. In this case, for example, the pattern of the power supply line or signal line for which noise is to be reduced is not cut, and the first external electrode 5a and the second external electrode 5b are connected on the line pattern.

  Similarly, in the multilayer capacitor 100, for example, the first external electrode 5a and the second external electrode 5b are arranged in parallel with the power supply line or signal line on the circuit board (the same potential in the circuit). In addition to the connection, the first to fourth ground external terminals 4a, 4b, 4c, and 4d can be connected to the ground end (ground) to reduce high-frequency noise in the power supply line or the signal line. In this case, the pattern of the power supply line or signal line for which noise is to be reduced is not cut, and the first external electrode 5a and the second external electrode 5b are connected in parallel to the power supply line.

  Here, an example of a method for manufacturing the multilayer capacitor 10 shown in FIG. 1 will be described.

  A plurality of first to third ceramic green sheets are prepared. The first ceramic green sheet is formed with the signal internal electrode 2, and the second ceramic green sheet is formed with a pair of grounding internal electrodes 3.

  In order to form the signal internal electrode 2, the plurality of first ceramic green sheets are formed on the ceramic green sheet by using the pattern shape of the signal internal electrode 2 using the conductor paste for the signal internal electrode 2. An electrode conductor paste layer is formed. In the first ceramic green sheet, in order to obtain a large number of multilayer capacitors 10, a plurality of signal internal electrodes 2 are formed in one ceramic green sheet.

  Further, in order to form a pair of grounding internal electrodes 3, the plurality of second ceramic green sheets have a pair of grounding internal electrodes 3 (the first grounding internal electrode 3 a and the second grounding internal electrode 3 on the ceramic green sheet). A pair of grounding internal electrode conductor paste layers are formed using the conductive paste for the grounding internal electrode 3 by arranging the pattern shapes of the grounding internal electrodes 3b) at a predetermined interval. In the second ceramic green sheet, a plurality of pairs of grounding internal electrodes 3 are formed in one ceramic green sheet in order to obtain a large number of multilayer capacitors 10.

The signal internal electrode conductor paste layer and the ground internal electrode conductor paste layer described above are formed by printing each conductor paste in a predetermined pattern shape on a ceramic green sheet using, for example, a screen printing method or the like. .

  The first and second ceramic green sheets become the dielectric layer 1g, the signal internal electrode conductor paste layer becomes the signal internal electrode 2, and the ground internal electrode conductor paste layer becomes the ground internal electrode 3.

Examples of the material of the ceramic green sheet used as the dielectric layer 1g include dielectrics such as barium titanate (BaTiO ₃ ), calcium titanate (CaTiO ₃ ), strontium titanate (SrTiO ₃ ), or calcium zirconate (CaZrO ₃ ). The main component is body ceramics. For example, a Mn compound, Fe compound, Cr compound, Co compound, or Ni compound may be added as the accessory component.

  The first and second ceramic green sheets are prepared by adding a suitable organic solvent and the like to the dielectric ceramic raw material powder and the organic binder and mixing them, and using a doctor blade method or the like. It is obtained by forming a ceramic slurry.

  The conductor paste for the signal internal electrode 2 and the conductor paste for the ground internal electrode 3 are formed by adding additives (dielectric materials), binders, solvents, dispersions to the above-described conductor material (metal material) powders of the internal electrodes. It is prepared by adding an agent and kneading. The conductive material of the signal internal electrode 2 and the ground internal electrode 3 is, for example, a metal material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), or gold (Au), or these metals. For example, an alloy material such as an Ag—Pd alloy including one or more materials may be used. The signal internal electrode 2 and the ground internal electrode 3 are preferably formed of the same metal material or alloy material.

  The first ceramic green sheet has a signal internal electrode 2 formed thereon, and the second ceramic green sheet has a ground internal electrode 3 formed thereon. The first ceramic green sheet and the second ceramic green sheet A plurality of green sheets are alternately stacked, and a ceramic green sheet on which no internal electrode is formed is stacked on the outermost layer in the stacking direction, thereby manufacturing a stacked body made of a ceramic material.

  Thus, the laminated body which consists of a some 1st and 2nd ceramic green sheet becomes a large-sized raw laminated body containing many raw laminated bodies 1 by pressing and integrating. By cutting this large green laminate, a green laminate 1 that becomes the laminate 1 of the multilayer capacitor 10 as shown in FIG. 1 can be obtained. The large green laminate can be cut using, for example, a dicing blade.

  In the multilayer capacitor 10, the pair of grounding internal electrodes 3 are inclined toward the first main surface 1 a or the second main surface 1 b so that the opposing end portions approach the signal internal electrode 2. . Here, a method of tilting the end 3aa and the end 3ba of the pair of grounding internal electrodes 3 will be described below.

  When laminating a plurality of ceramic green sheets, for example, a pet film is placed on a base plate for lamination, and first, a ceramic green sheet on which no internal electrode is formed is placed on the pet film. Then, the first ceramic green sheet and the second ceramic green are alternately laminated in a plurality of layers, and finally a ceramic green sheet on which no internal electrode is formed is placed to form a laminated body. For example, a pet film is disposed on the upper surface. Here, it is assumed that the lower surface of the laminate is the second main surface 1b.

Next, a temporary press is performed on the above-described laminate (including a pet film). Temporary pressing is performed for deaeration of air between the laminated ceramic green sheets or adhesion between the laminated ceramic green sheets. Then, after the temporary pressing, the temporarily pressed laminate (including the pet film) is pressurized using an isostatic press. During this pressurization, the non-printing portion of the grounding internal electrode 3 (the region between the first grounding internal electrode 3a and the second grounding internal electrode 3b) is hydrostatically pressed on the second ceramic green sheet. And the printing portion of the grounding internal electrode 3 (the end portion 3aa of the first grounding internal electrode 3a and the end portion 3ba of the second grounding internal electrode) facing each other. By extending and deforming toward the portion, the grounding internal electrode 3 is inclined toward the second main surface so that the end portion 3aa and the end portion 3ba approach the signal internal electrode 2 below. In addition, end part 3aa and end part 3ba can be made into a desired inclination angle by adjusting the pressure at the time of pressurization of an isostatic press, for example.

  Further, the signal internal electrode 2 has a concave portion 2a in which a portion corresponding to a region between the first ground internal electrode 3a and the second ground internal electrode 3b is recessed. Therefore, by pressing the laminate using the hydrostatic press, the grounding internal electrode 3 is inclined toward the second main surface so that the end 3aa and the end 3ba approach the signal internal electrode 2. Thus, the signal internal electrode 2 has a recess 2a in a portion facing the region between the end 3aa and the end 3ba of the pair of ground internal electrodes 3.

  As will be described later (Embodiment 2), the grounding internal electrode 3 is configured such that the corner 3ab of the end 3aa of the opposing portion is more than the side 3ac, and the corner 3bb of the end 3ba is the side 3bc. Furthermore, it is provided so that it may approach the 1st main surface 1a or the 2nd main surface 1b, and also in such a case, it can adjust with the pressure at the time of pressurization of an isostatic press, for example. Further, since the corner portion 3ab and the corner portion bb are not constrained in the grounding internal electrode 3, the grounding inner electrode 3 tends to be inclined more downward than the side portion 3ac and the side portion 3bc, and is more likely to come closer to the signal internal electrode 2.

  And the laminated body 1 can be obtained by baking the raw laminated body 1 at 800 (degreeC) -1300 (degreeC), for example. By this step, the plurality of first and second ceramic green sheets become the dielectric layer 1g, the signal internal electrode conductor paste layer becomes the signal internal electrode 2, and the ground internal electrode conductor paste layer becomes the ground internal electrode 3. It becomes. Moreover, the laminated body 1 can round a corner | angular part or a side part using grinding | polishing means, such as barrel grinding | polishing, for example. The laminated body 1 becomes a thing which a corner | angular part or a side part cannot be easily chipped by rounding a corner | angular part or a side part.

  Next, the base electrode of the external electrode 5 is formed by applying and baking the conductive paste for the external electrode 5 that becomes the base electrode of the external electrode 5 on the first end surface 1c and the second end surface 1d of the laminate 1. . In addition, the conductive paste for the base electrode is produced by adding and kneading a binder, a solvent, a dispersant, and the like to the metal material powder constituting the base electrode described above.

  In addition, the conductive paste for the base electrode is produced by adding a binder, a solvent, a dispersant, and the like to the powder of the metal material constituting the base electrode and kneading. The conductive material of the base electrode is, for example, a metal material such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), or gold (Au), or one or more of these metal materials. For example, an alloy material such as an Ag—Pd alloy. The base electrode may be formed by using a thin film forming method such as a vapor deposition method, a plating method, or a sputtering method, in addition to using a method of baking a conductor paste.

Similarly, a grounding external terminal 4 is applied to the first side surface 1e and the second side surface 1f of the laminated body 1 by applying and baking a conductive paste for the grounding external terminal 4 which is a base electrode of the grounding external terminal 4. A base electrode is formed. In addition, the conductive paste for the base electrode is prepared by adding a binder, a solvent, a dispersant and the like to the metal material powder constituting the grounding external terminal 4 and kneading them.

  Next, a plating layer is formed on the surface of the base electrode so as to cover the base electrode of the external electrode 5 and the external grounding terminal 4. The plating layer is formed on the surface of the base electrode using, for example, an electrolytic plating method. The plating layer is, for example, a single plating layer or a plurality of plating layers such as a nickel (Ni) plating layer, a copper (Cu) plating layer, a gold (Au) plating layer, or a tin (Sn) plating layer. Although the plating layer may be formed from a single plating layer, the multilayer capacitor 10 includes a first plating layer and a second plating layer, and these laminates are formed on the surface. doing. In the multilayer capacitor 10, for example, the first plating layer is a nickel (Ni) plating layer, the second plating layer is a tin (Sn) plating layer, and the second plating layer is a tin (Sn) plating layer. Is formed so as to cover the nickel (Ni) plating layer of the first plating layer.

  Through such a process, the multilayer capacitor 10 has the first main surface 1a or the second main surface 1a or the second main surface 3a so that the opposing end portions 3aa and 3ba of the pair of grounding internal electrodes 3 approach the signal internal electrode 2. 2 toward the main surface 1b.

  The present invention is not limited to the multilayer capacitor 10 of the first embodiment described above, and various modifications and improvements can be made without departing from the scope of the present invention. Hereinafter, other embodiments will be described. Note that, among the multilayer capacitors according to other embodiments, the same portions as those of the multilayer capacitor 10 according to the first embodiment are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

<Embodiment 2>
Hereinafter, the multilayer capacitor 10B according to the second embodiment of the present invention will be described with reference to the drawings.

  In the multilayer capacitor 10B, as shown in FIG. 5, the first grounding internal electrode 3a is composed of a corner portion 3ab and a side portion 3ac located between the corner portions 3ab on both sides. 3b includes a corner 3bb and a side 3bc located between the corners 3bb on both sides.

  The pair of grounding internal electrodes 3 are arranged on the first main surface 1b or the second main surface so that the corners 3ab and 3bb on both sides of the end 3aa and the end 3ba are closer to the signal inner electrode 2. It is tilted toward. That is, as shown in FIG. 5, in the grounding internal electrode 3, the corner portion 3ab of the end portion 3aa of the facing portion has a corner portion 3ab that is closer to the side portion 3ac, and the corner portion 3bb of the end portion 3ba has the second portion than the side portion 3bc. 1 main surface 1a or 2nd main surface 1b is approached.

  The first grounding internal electrode 3a and the second grounding internal electrode 3b are connected to the signal internal electrode 2 in which the corner 3ab of the end 3aa located at the opposite portion and the corner 3bb of the end 3ba are located below. Since it is inclined toward the second main surface 1b so as to approach further, the corner 3ab and the distance between the corner 3bb and the signal internal electrode 2 are shortened. For example, as shown in FIG. Through the corner 3ab of the first grounding internal electrode 3a and the corner 3bb of the second grounding inner electrode 3b, the noise component that has entered the signal inner electrode 2 can be effectively released to the ground.

  Further, the first grounding internal electrode 3a is provided with the lead part 3a1 and the lead part 3a2 close to the corner part 3ab, and the second grounding internal electrode 3b is provided with the lead part 3b1 and the lead part. Since 3b2 is provided close to the corner portion 3bb, the pair of grounding inner electrodes 2 is connected to the upper cornering portion 3ab of the first grounding inner electrode 3a via the leading portion 3a1 and the leading portion 3a2. In addition, the noise component that has entered the signal internal electrode 2 can be more effectively released to the ground from the corner 3bb of the second grounding internal electrode 3b through the extraction portion 3b1 and the extraction portion 3b2.

  The present invention is not particularly limited to Embodiment 1 and Embodiment 2 described above, and various modifications and improvements can be made within the scope of the present invention.

DESCRIPTION OF SYMBOLS 1 Laminated body 1a 1st main surface 1b 2nd main surface 1c 1st end surface 1d 2nd end surface 1e 1st side surface 1f 2nd side surface 1g Dielectric layer 2, 2A Signal internal electrode 2a Recessed part 3 Ground Internal electrode 3a first grounding internal electrode 3aa end 3ab corner 3ac side 3b second grounding internal electrode 3ba end 3bb corner 3bc side 4 grounding external terminal 5 external electrodes 10, 10A, 10B , 100 multilayer capacitors

Claims (2)

A plurality of dielectric layers are stacked to connect the first and second main surfaces facing each other and the first and second main surfaces, and the first and second end surfaces facing each other and the first And a laminated body formed in a substantially rectangular parallelepiped shape having first and second side surfaces that face each other and connect between the second end faces;
A plurality of signal internal electrodes arranged at intervals in the stacking direction of the plurality of dielectric layers in the stack, and drawn to at least one of the first end surface and the second end surface;
A pair of grounding internal electrodes disposed between the signal internal electrodes, facing each other in the same plane within the laminate, and having lead-out portions to the first side surface and the second side surface; ,
A ground external terminal disposed on the first side surface and the second side surface and electrically connected to the ground internal electrode;
A pair of external electrodes disposed on the first end surface and the second end surface, respectively, and electrically connected to the signal internal electrode;
The pair of grounding internal electrodes are tilted toward the first main surface or the second main surface so that respective opposing end portions approach the signal internal electrode. Type capacitor. The pair of grounding internal electrodes are inclined toward the first main surface or the second main surface so that corners on both sides of the end portion are further closer to the signal internal electrode. The multilayer capacitor according to claim 1.

Images