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JP2015231056A5 - - Google Patents

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Publication number
JP2015231056A5
JP2015231056A5 JP2014114776A JP2014114776A JP2015231056A5 JP 2015231056 A5 JP2015231056 A5 JP 2015231056A5 JP 2014114776 A JP2014114776 A JP 2014114776A JP 2014114776 A JP2014114776 A JP 2014114776A JP 2015231056 A5 JP2015231056 A5 JP 2015231056A5
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JP
Japan
Prior art keywords
signal
phase
phase shift
shift circuit
output
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JP2014114776A
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JP2015231056A (en
JP6359878B2 (en
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Priority to JP2014114776A priority Critical patent/JP6359878B2/en
Priority claimed from JP2014114776A external-priority patent/JP6359878B2/en
Priority to PCT/JP2015/065091 priority patent/WO2015186569A1/en
Publication of JP2015231056A publication Critical patent/JP2015231056A/en
Publication of JP2015231056A5 publication Critical patent/JP2015231056A5/ja
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Claims (4)

入力信号に基づいて互いに異なる位相{θ1,(θ1+pπ/3),(θ1+2pπ/3)}(pは、0と3の整数倍を除く整数)を有する第1信号、第2信号及び第3信号を生成する信号生成手段と、
前記第1信号、前記第2信号及び前記第3信号をそれぞれ同一の条件で増幅して、第1増幅信号、第2増幅信号及び第3増幅信号を生成する増幅手段と、
前記第1増幅信号、前記第2増幅信号及び前記第3増幅信号の位相を変化させて、それぞれ{(θ2+2pπ/3),(θ2+pπ/3),θ2}の位相を有する第1移相信号、第2移相信号及び第3移相信号を生成する移相手段と、
前記第1移相信号、前記第2移相信号及び前記第3移相信号を合成する合成手段と、
を備え
前記信号生成手段は、
前記入力信号の位相を変化させ、相対的にqπ/2(qは、0を除く整数)だけ位相が異なる2つの信号を出力する第1移相回路と、
前記第1移相回路が出力した2つの信号のうちの1つの信号の位相を変化させ、相対的にqπ/2(qは、0を除く整数)だけ位相が異なる2つの信号を出力する第2移相回路と、
前記第2移相回路が出力した信号を遅延させることにより、前記第2信号及び前記第3信号を生成する遅延回路と、
を有する電力増幅装置。
A first signal and a second signal having different phases {θ 1 , (θ 1 + pπ / 3), (θ 1 + 2pπ / 3)} (p is an integer excluding an integer multiple of 0 and 3) based on the input signal Signal generating means for generating a signal and a third signal;
Amplifying means for amplifying the first signal, the second signal, and the third signal under the same conditions to generate a first amplified signal, a second amplified signal, and a third amplified signal;
The phases of the first amplified signal, the second amplified signal, and the third amplified signal are changed to have the phases {(θ 2 + 2pπ / 3), (θ 2 + pπ / 3), θ 2 }, respectively. Phase shifting means for generating one phase shifting signal, a second phase shifting signal, and a third phase shifting signal;
Combining means for combining the first phase shift signal, the second phase shift signal, and the third phase shift signal;
Equipped with a,
The signal generating means includes
A first phase shift circuit that changes the phase of the input signal and outputs two signals that are relatively different in phase by qπ / 2 (q is an integer other than 0);
The first phase shift circuit changes the phase of one of the two signals output, and outputs two signals that are relatively different in phase by qπ / 2 (q is an integer other than 0). Two phase shift circuits;
A delay circuit that generates the second signal and the third signal by delaying the signal output from the second phase shift circuit;
A power amplifying apparatus.
前記遅延回路は、前記第1移相回路が出力した信号に基づく信号を第1遅延時間だけ遅延させて前記第2信号を生成し、前記第1移相回路が出力した信号の位相をqπ/2(qは、0を除く整数)だけ変化させた信号を、前記第1遅延時間と異なる第2遅延時間だけ遅延させて前記第3信号を生成する、  The delay circuit delays a signal based on the signal output from the first phase shift circuit by a first delay time to generate the second signal, and sets the phase of the signal output from the first phase shift circuit to qπ / A signal changed by 2 (q is an integer other than 0) is delayed by a second delay time different from the first delay time to generate the third signal;
請求項1に記載の電力増幅装置。  The power amplification device according to claim 1.
前記遅延回路は、前記第1移相回路が出力した信号の位相を相対的にπ/6だけ変化させた前記第2信号と、前記第1移相回路が出力した信号の位相を相対的に5π/6だけ変化させた前記第3信号とを出力する、  The delay circuit relatively compares the phase of the signal output from the first phase shift circuit with the second signal obtained by relatively changing the phase of the signal output by π / 6 and the phase of the signal output from the first phase shift circuit. Outputting the third signal changed by 5π / 6,
請求項1又は2に記載の電力増幅装置。  The power amplification device according to claim 1 or 2.
前記第1移相回路は、前記入力信号を電力分配比1:2で分配することにより、前記第1信号と、前記入力信号の位相を相対的にqπ/2(qは、0を除く整数)だけ変化させた信号とを出力し、  The first phase shift circuit distributes the input signal at a power distribution ratio of 1: 2, thereby relatively shifting the phase of the first signal and the input signal to qπ / 2 (q is an integer excluding 0). ) Only the changed signal is output,
前記第2移相回路は、前記第1移相回路が出力した信号を電力分配比1:1で分配することにより、前記第2信号及び前記第3信号を出力する、  The second phase shift circuit outputs the second signal and the third signal by distributing the signal output from the first phase shift circuit at a power distribution ratio of 1: 1.
請求項1から3のいずれか1項に記載の電力増幅装置。  The power amplifying device according to any one of claims 1 to 3.
JP2014114776A 2014-06-03 2014-06-03 Power amplifier Active JP6359878B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2014114776A JP6359878B2 (en) 2014-06-03 2014-06-03 Power amplifier
PCT/JP2015/065091 WO2015186569A1 (en) 2014-06-03 2015-05-26 Power amplification device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014114776A JP6359878B2 (en) 2014-06-03 2014-06-03 Power amplifier

Publications (3)

Publication Number Publication Date
JP2015231056A JP2015231056A (en) 2015-12-21
JP2015231056A5 true JP2015231056A5 (en) 2017-06-08
JP6359878B2 JP6359878B2 (en) 2018-07-18

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Family Applications (1)

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JP2014114776A Active JP6359878B2 (en) 2014-06-03 2014-06-03 Power amplifier

Country Status (2)

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JP (1) JP6359878B2 (en)
WO (1) WO2015186569A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111740710B (en) * 2020-06-03 2025-04-01 唯捷创芯(天津)电子技术股份有限公司 RF power amplifier, RF front-end module and communication terminal
JP7542773B2 (en) 2022-02-25 2024-08-30 三菱電機株式会社 Low Distortion Amplifier

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09148849A (en) * 1995-11-21 1997-06-06 Nippon Telegr & Teleph Corp <Ntt> Power amplifier
JP3209086B2 (en) * 1996-04-24 2001-09-17 松下電器産業株式会社 Power combiner and power divider
JP3502572B2 (en) * 1999-06-10 2004-03-02 株式会社日立国際電気 Amplifier
US6242979B1 (en) * 2000-02-23 2001-06-05 Motorola, Inc. Linearization using parallel cancellation in linear power amplifier
JP2007243491A (en) * 2006-03-07 2007-09-20 R & K:Kk Amplifier circuit

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