JP2015027216A - Power-supply device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power-supply device that allows maintaining a stop mode due to an overvoltage detection.SOLUTION: A power-supply device includes: a transformer reacted by a drive circuit and outputting an excitation voltage; a smoothing circuit section converting the excitation voltage into a main power-supply voltage having a substantially constant value; a drive-signal generation circuit providing a command signal for the drive circuit on the basis of a later-stage voltage of the transformer; a latch-state detection circuit, in generating an internal current in a latch section, continuing the internal current and maintaining output of a latch signal outputted by the occurrence of the internal current; and an overvoltage detection circuit for control generating the internal current in a situation in which a voltage for control is higher than a predetermined value. On receiving the latch signal, the drive-signal generation circuit prevents excitation operation of the transformer.

Description

  The present invention relates to a power supply device, and more particularly to a power supply device having an overvoltage protection function.

  Conventionally, a power supply device provided with an overvoltage protection circuit has been introduced (Japanese Patent Laid-Open No. 06-105547). This power supply device is equipped with a voltage detection circuit consisting of a photocoupler, a switching regulator, etc., and an overvoltage protection circuit consisting of a Zener diode, and supports each open mode for the output voltage of the main power supply line and the output voltage of the sub power supply line The output limit function is activated.

JP-A-06-105547

  According to the technique of Patent Document 1, when the output voltage is restored to a normal value after reaching the overvoltage, the normal operation of the power supply device is resumed. However, depending on the device in which the power supply device is incorporated, there is a demand for restarting operation after a restart operation by the user from the viewpoint of safety.

  In view of the above problems, an object of the present invention is to provide a power supply device capable of maintaining a stop mode formed by overvoltage detection.

In order to solve the above problems, the present invention has the following configuration of the power supply device. A transformer that responds by a drive circuit and outputs an excitation voltage; a smoothing circuit that converts the excitation voltage to a first voltage that is a substantially constant value; and a first power supply line to which the first voltage is applied A regulator for generating a second voltage set lower than the first voltage based on the first voltage, and the second voltage applied to the output terminal of the regulator. A second power supply line, a drive signal generation circuit for giving a command signal to the drive circuit based on the voltage at the subsequent stage of the transformer, and the internal current is sustained when an internal current is generated in the latch unit; A latch state detection circuit for maintaining the output of the latch signal to be output, and a control overvoltage detection circuit for generating the internal current when the second voltage becomes higher than a specified value. It equipped with a door,
The drive signal generation circuit suppresses the excitation operation of the transformer when receiving the latch signal.

  The command signal may be any of an operation stop signal for stopping the excitation operation of the transformer during the output of the latch signal and a feedback signal for controlling the first voltage to a substantially constant value during the non-output of the latch signal. It will be switched to.

  When the overvoltage is detected by the control overvoltage detection circuit, the power supply device according to the present invention maintains the stop mode accordingly, so that it is possible to prevent the occurrence of unforeseen accidents associated with the spontaneous operation recovery of the device. Safe safety.

FIG. 3 illustrates a circuit configuration of a power supply device according to an embodiment. The figure which shows the circuit structure of the overvoltage protection function part which concerns on embodiment. The figure which shows the peripheral circuit of the watchdog IC which concerns on embodiment. The timing chart of the scene where AC power supply which concerns on embodiment returns.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 shows a configuration of a power supply device 100 according to the present embodiment. In addition, the power supply device 100 demonstrated by this Embodiment shall be integrated in combustion apparatuses, such as an oil fan heater.

  As illustrated, the power supply apparatus 100 includes an AC input unit 110, a full-wave rectification unit 130, a DC input unit 140, a transformer TR, a first load circuit 150, a DC output unit 160, and an overvoltage protection function unit. 170, a control unit 180, and a watchdog IC 190.

  AC input unit 110, full-wave rectification unit 130, and DC input unit 140 are provided on the primary side of transformer TR. The first load unit 150 and the DC output unit 160 are provided on the secondary side of the transformer TR.

  The AC input unit 110 is a circuit part to which AC power is input, and AC power is applied to the power supply line. The AC input unit 110 includes filter circuits 111 and 113 and a second load 112. Among these, the second load 112 is provided with devices such as a fan motor and an ignition heater, and is appropriately operated by the control unit 180.

  The full-wave rectification unit 130 is provided in the subsequent stage of the rectifier circuit 120 such as a diode bridge, and a full-wave rectified voltage is applied to the power supply line here. A zero cross detection circuit 131 is formed in the full wave rectification unit 130. This circuit configuration will be described in detail later.

  The DC input unit 140 is provided at the subsequent stage of the smoothing capacitor C1, and the output voltage (DC voltage) from the smoothing capacitor C1 is applied to the power supply lines Lx and Ly here. As shown in the figure, the DC input unit 140 is provided with an input DC voltage detection circuit 141 and a drive circuit 143. These circuit configurations and functions will also be described in detail later.

  As described above, on the primary side of the transformer TR, the input AC power is consumed by the load 112, and the remaining part of the AC power is converted into DC power. In this process, the zero cross signal SG6, the voltage detection signal SG7, etc. are detected and output.

  The transformer TR includes a primary winding L1 connected to the primary circuit, a secondary winding L2 connected to the first load circuit 150, and a secondary winding L3 connected to the DC output unit 160, It is comprised from the iron core which electromagnetically couples these. The transformer TR responds by the drive circuit 143 to generate a primary-side passing current step by step, thereby causing excitation voltages to be output from the secondary-side coils L2 and L3.

  Among these, the first load circuit 150 includes a smoothing circuit including a diode D2 and a capacitor C2, and a load 151. The load 151 is a device that is driven by DC power. In the present embodiment, a fuel pump device is connected. The operation of the fuel pump device is also controlled by the control unit 180 as before.

  On the other hand, in the DC output unit 160, power supply lines Lv1 and Lv4 are connected to each end of the secondary coil L3, and further, power supply lines (Lv2, Lv3) are branched through a regulator 161. The power supply lines Lv1 and Lv4 are provided with smoothing circuits 174 (C3, D3), the power supply lines Lv2 and Lv4 are provided with smoothing circuits (C4, D4a), and the power supply lines Lv3 and Lv4 are provided with smoothing circuits (C5). , D4b). These smoothing circuits smooth the excitation voltage or the voltage oscillating at a high frequency (control it to a substantially constant value).

  The main power supply voltage V1 (first voltage) of about 12 V is applied to the power supply line Lv1 (first power supply line) by the output voltage of the smoothing circuit 174. The power supply line Lv2 (second power supply line) is electrically connected at the subsequent stage of the regulator 161 that steps down the main power supply voltage V1, and a control voltage V2 of about 5V is applied. Furthermore, the power supply line Lv3 is a power supply line branched from the power supply line Lv2, and a control backup voltage V3 (hereinafter referred to as a backup voltage) of about 5 V is generated as with the control voltage V2. In particular, the capacitance of the capacitor C5 is sufficiently large compared to that of the capacitor C4, and the control unit 180 can function for several hours to several tens of hours.

  As shown in FIG. 2, the overvoltage protection function unit 170 includes a control overvoltage detection circuit 171, a latch state detection circuit 172, and a drive signal generation circuit 173. Among these, in the control overvoltage detection circuit 171, the voltage dividing resistors R2 and R3 and the Zener diode Dz are connected in series to the input signal line La connected to the detection point ta. Further, the voltage dividing resistors R2 and R3 are connected to the resistor R1 in parallel at both ends thereof, and the signal input end (base portion) of the transistor Tr1 is connected to the voltage dividing point. Further, the transistor Tr1 has an input terminal (collector part) connected to the internal current line L3 and an output terminal (emitter part) connected to the ground potential.

  When the potentials of the power supply lines Lv2 and Lv3 provided at the subsequent stage of the regulator 161 exceed a predetermined threshold value (specified value), the control overvoltage detection circuit 171 reaches the breakdown voltage, and current is supplied to the input signal line La. Start flowing. At this time, the transistor Tr1 is switched to a conductive state. That is, when the overvoltage detection circuit 171 detects the overvoltage state of the control voltage (V2, V3), the control overvoltage detection circuit 171 passes and generates the current (internal current) output from the latch state detection circuit 172, and the overvoltage state converges. , Functions to block the passage of the current (internal current).

  The latch state detection circuit 172 includes a latch unit and a signal output unit. Among these, the latch unit is electrically connected to the subsequent contact tb of the smoothing circuit 174 via the input current line Lb. The input current line Lb is wired to the contact tx via the voltage dividing resistors R4 and R5, and is connected to the internal current line L3 in a subsequent stage. Branching into this current path, transistors Tr3 and Tr2 are connected. The first path having the transistor Tr3 is conducted to the ground potential via the resistor R6 and the capacitor Cp. The signal input terminal (base portion) of the transistor Tr3 is connected to the voltage dividing point of the voltage dividing resistors R4 and R5. On the other hand, the transistor Tr2 forms a further branch path of the internal current. The transistor Tr2 has a resistor R7 and a capacitor Cp connected in parallel between a signal input terminal (base part) and an output terminal (emitter part), and a signal line L4 connected to the signal input terminal (base part). The The signal line L4 includes a diode Dp that is forward from the signal line L4 toward itself to the drive signal generation circuit, and forms the above-described signal output unit.

  In the latch state detection circuit 172 having such a configuration, when an overvoltage is detected by the control overvoltage detection circuit 171, an internal current starts to flow through a path of “input current line Lb → internal current line L3 → transistor Tr1”. In response to this, the transistor Tr3 is switched to the energized state. As a result, the potential of the capacitor Cp rises, so that the transistor Tr2 is also switched to the energized state. Here, since the internal current continues to flow via the transistor Tr2 even if the overvoltage is calmed down, the internal current continues to branch into a via route including the transistor Tr2 and a via route including the transistor Tr3. As described above, the latch state detection circuit 172 receives an overvoltage once, forms a latch state, and turns off the power of the apparatus (an operation to turn off the power button performed by the operator or an operation to remove the power outlet). This latch state is maintained until () is performed.

  In the scene where the latch state is formed, since the capacitor Cp is in a charged state, the output voltage by the signal line L4 is in a HIGH state, and this state is kept until the apparatus power supply is turned off (reset operation by the user). Will be maintained. Hereinafter, this state in the signal line L4 is referred to as a latch signal SG4.

  The drive signal generation circuit 173 is connected to a power supply line between the diode and the smoothing capacitor in the smoothing circuit 174 (contact part tc), and the contact part tc is the contact tc and tc2, and the coil L arranged between them. It consists of. The contact Lc1 is connected to the energization line Lc1, and is connected to an appropriate part to be grounded via an energization path “resistance R9 → active element portion of the photocoupler PC1 → shunt regulator REG (energization control unit)”. The On the other hand, the contact tc2 is connected to the energization line Lc2, and is connected to an appropriate part of the ground potential via an energization path that is a series circuit of the resistor R8 and the resistor R11.

  The voltage dividing resistor contact ty is connected to the signal line L4 on the one hand and to the input end of the shunt regulator REG on the other hand. Further, a series circuit of a capacitor Cr, a capacitor Cq, and a resistor R10 is provided between the energization lines Lc1 and Lc2, and phase compensation is appropriately performed.

  The drive signal generation circuit 173 having such a configuration appropriately generates a command signal from the active element unit of the photocoupler PC1, and performs an operation command in the normal mode or an operation command in the stop mode. Among these, the operation command in the normal mode is a signal formed in accordance with increase / decrease of the voltage at the subsequent stage of the transformer TR (in this embodiment, the voltage immediately after the diode D3), and if the effective value of the voltage is high The light emission frequency is increased, and if the effective value is low, the light emission frequency is decreased. At this time, the drive circuit 143 receives the light emission signal at the passive element portion of the photocoupler PC1, and controls the main power supply voltage V1 to be constant by energizing / cutting off the primary current according to the light emission frequency. Such a command signal in the normal mode is generated in a scene where the latch signal is not output, and may be referred to as a feedback signal.

  On the other hand, the operation command in the stop mode increases the light emission frequency of the photocoupler PC1 according to the increase of the energization amount of the shunt regulator REG when the latch signal SG4 is input. At this time, the drive circuit 143 receives an optical signal having a light emission frequency higher than that in the normal mode, and suppresses the excitation operation of the transformer TR (stops or the output voltage is not sufficient). Such a command signal in the stop mode is generated during the input of the latch signal SG4 and may be referred to as an operation stop signal.

  As described above, the power supply device 100 according to the present embodiment continuously notifies the fact of the occurrence of the overvoltage by the latch state detection circuit 172 and restricts the operation of the drive circuit 143. For this reason, once an overvoltage occurs, each output voltage in the subsequent stage of the transformer TR is kept in a lowered state (or stopped state) that does not function as a power source until a return operation is performed by the operator.

  For this reason, the power supply apparatus 100 can prevent an unexpected accident caused by spontaneous recovery of operation, and can guarantee a high level of safety. For example, since the load control operation by the control unit 180 is not performed, it is possible to avoid a heat generation accident in a device such as an ignition heater. In addition, since the power supply to the load 151 can be suppressed, an oversupply of fossil fuel or the like, and a fire associated therewith can be avoided.

  In particular, power supply apparatus 100 according to the present embodiment has a circuit configuration that detects an overvoltage of control voltages (V2, V3). For this reason, the runaway of the control unit 180 constituted by a microcomputer or the like is prevented in advance, and the microcomputer or the like is activated by an appropriate control voltage by the operator turning on the power again.

  With reference to FIG. 3, the watchdog IC 190 and the circuit configuration related thereto will be described. First, the zero cross detection circuit 131 includes a power supply side detection unit 131a and a control unit side signal output unit 131b, which are operatively connected via a photocoupler PC2.

  The power supply side detection unit 131a includes a series circuit of resistors R21 and R22, and further, a capacitor Cv and an active element unit of the photocoupler PC2 are connected in parallel to the resistor R21. The power supply side detection unit 131a is connected to the subsequent power supply line of the rectifier circuit 120, and detects the zero cross timing by monitoring the full-wave rectified waveform. For this reason, in the power supply side detection unit 131a, the time constant of the circuit including the capacitor and the resistance element is appropriately set so that the timing can be expressed by the light emission signal SG1.

  When the control unit side signal output unit 131b receives the optical signal SG1, the control unit side signal output unit 131b outputs a zero-cross signal SG6 having a frequency representing the optical signal SG1. Further, in the control unit side signal output unit 131b, the range of the voltage value of the HL signal is appropriately adjusted so that the state of the zero cross signal SG6 is discriminated by the control unit 180.

  Similar to the zero-cross detection circuit 131, the input DC voltage detection circuit 141 includes a power supply side detection unit 141a and a control unit side signal output unit 141b. The power supply side detection unit 141a includes a series circuit of resistors R31 and R32. Further, a capacitor Cv and an active element unit of the photocoupler PC3 are connected in parallel to the resistor R31. The power supply side detection unit 141a is connected to a power supply line immediately after the smoothing capacitor C1 (a power supply line provided in the DC input unit 140), detects a DC voltage immediately after the smoothing capacitor C1, and reaches a specified value Vth. At the time, the light emission signal SG2 is output. For this reason, the power supply side detection unit 141a appropriately sets the capacitance of the capacitor and the resistance value of the resistance element so that the specified value Vth can be set appropriately. That is, even in the power supply side detection unit 141a, when the electrical elements constituting the power detection unit 141a are appropriately selected, a time constant corresponding to the electrical element is set.

  The control unit side signal output unit 141b includes a resistor R33, a DC circuit including resistors (R34, R35) and a passive element unit of the photocoupler PC3, a capacitor Cs connected in parallel to the DC circuit, and resistors (R34, R35). ) Has a transistor Tr4 whose input signal end (base portion) is connected to the voltage dividing point. The transistor Tr4 has an input end (collector portion) connected to the signal line L7 and an output end (emitter portion) connected to the ground potential.

  When the DC input voltage Vin reaches the specified value Vth, the control unit side signal output unit 141b receives the optical signal SG2, and at this time, the transistor Tr4 is energized by the current generated on the light receiving side of the photocoupler PC3. That is, when the input DC voltage Vin reaches the specified value Vth, the input DC voltage detection circuit 141 lowers the collector potential that has been pulled up of the transistor Tr4 and switches the potential state on the signal line L7. Hereinafter, the collector potential applied to the signal line L7 is referred to as a voltage detection signal SG7.

  The control unit 180 includes a power supply port Vcc to which the backup voltage V3 is applied, Vss in which an electric furnace is formed on the ground side, an input port P1 connected to the signal line L6, an output port P2 connected to the signal line L8, and a signal line An input port P3 connected to L9 is provided. The control unit 180 is an electronic device having an arithmetic processing function such as a microcomputer, and includes a CPU, a memory, an AD conversion unit, and the like.

  Among these, an appropriate control program is stored in the memory. The control unit 180 constructs a predetermined processing function in cooperation with hardware resources such as a CPU and software resources such as a program. In particular, in the control unit 180 according to the present embodiment, as shown in FIG. 3, a zero-cross signal detection process 181, a watchdog signal output process 182, a reset operation process 183, and the like are constructed.

  The zero cross signal detection processing 181 performs threshold determination for the zero cross signal SG6 applied to the input port P1, and determines whether or not the detection time is the zero cross timing. Note that the control unit 180 cannot grasp the operation base timing unless an appropriate zero-cross signal is given, and thus cannot continue the correct operation. That is, the control unit 180 is one of the conditions for realizing correct operation that the power supply is properly performed and that the zero-cross signal SG6 is input at an appropriate value.

  The watchdog signal output processing 182 outputs the watchdog signal SG8 as a periodic pulse wave when the zero-cross signal SG6 and other operations are normal (in FIG. 4, this is expressed in a HIGH state for convenience). ) The watchdog signal output process 182 sets the watchdog signal to the LOW state when the zero-cross signal SG6 and other operations are abnormal. As described above, the watchdog signal output processing 182 switches and outputs the watchdog signal SG8 according to the state (normal state / abnormal state) of the zero cross signal or the like. The zero cross signal SG6 being in an abnormal state indicates a state in which the zero cross timing is not cut at a predetermined frequency (for example, 50 Hz or 60 Hz).

  The reset operation process 183 is a process for interrupting the processing of the operating program and restarting the operation of the control unit itself. The reset operation processing 183 is useful when a temporary malfunction occurs, and the malfunction may be resolved by restarting itself. The reset operation process 183 is activated in response to a reset signal SG9 input to the port P3. In the case of the present embodiment, the reset signal SG9 is a pulse wave that is output in a function period to be described later, and is output when a predetermined condition is satisfied for the function period. Further, the reset signal SG9 is not output during the regulation period mode.

  The watchdog IC 190 is provided with a Vcc port, a Vss port, a WD port, an RST port, and an ENB port. Among these, the WD port is connected to the port P2 and receives the watchdog signal SG8. The RST port is connected to the port P3 and outputs a reset signal SG9. The ENB port is connected to the signal line L7 and receives the voltage detection signal SG7. The Vcc port is a power supply input port to which a backup voltage V3 is applied.

  The watch dog IC counts the pulse width of the watch dog signal for each element timing, and outputs a reset signal (pulse wave) only when the pulse edge of the watch dog signal is not detected within a predetermined time. Thereafter, the previous count value is cleared, and the watchdog signal is continuously monitored in preparation for the arrival of the next specified value. That is, the watchdog IC monitors the pulse state of the watchdog signal. If the pulse width is inappropriate, the watchdog IC outputs a reset signal at a predetermined timing. If the pulse width of the watchdog signal is appropriate, Does not output reset signal. Such a period in which the reset signal is permitted to be output is referred to as a “function period”, and a setting in which the reset signal is permitted to be output is referred to as a “function period mode”.

  On the other hand, when the voltage detection signal SG7 is in the HIGH state, the watchdog IC determines that the power recovery has not been achieved and disallows the output of the reset signal SG9. This corresponds to the enable function. Hereinafter, a period in which the output of the reset signal is regulated is referred to as a “regulation period”, and a setting in which the reset signal is regulated (not permitted) is referred to as a “regulation period mode”.

  The reset signal SG9 is a signal that can be output during the “functional period mode” so that it can be distinguished from the “regulation period mode”, and is not output during the “regulation period mode”. The reset signal SG9 is a signal that is output for a predetermined period only when the watchdog IC 190 detects a waveform abnormality of the watchdog signal, and the waveform is not particularly questioned.

  As described above, the watchdog IC switches between the “functional period mode” and the “regulation period mode” according to the state of the voltage detection signal SG7. In the present embodiment, the “regulation period mode” is set when the voltage detection signal SG7 is in the HIGH state, and the “functional period mode” is set when the voltage detection signal SG7 is in the LOW state. That is, the watchdog IC 190 permits the output of the reset signal when the power supply is confirmed to be restored, and outputs the reset signal when a waveform abnormality of the watchdog signal is detected in this state. On the other hand, when the power recovery has not been achieved, the output of the reset signal is limited, so that this signal is not output.

  FIG. 4 shows a time chart of each signal during the power recovery operation. Among these, FIG. 4A shows a scene in which the commercial power supply AC rises relatively steeply. The zero-cross signal SG6 is formed with a pulse signal synchronized with the half cycle of the power supply during power-on, and this pulse does not appear during a power failure. That is, in the zero cross signal SG6 in FIG. 4A, the synchronization pulse is correctly formed in the HIGH state portion. In the figure, the period during which the synchronization pulse is correctly output is expressed as a HIGH state for convenience.

  Referring to FIG. 4A, it is assumed that the zero cross signal SG6 is restored after Δt2 from the time when the voltage effective value Vrms of the commercial power supply AC is recovered. Hereinafter, Δt2 is referred to as a second return period. Since the watchdog signal SG8 plays a role of monitoring the state of the zero-cross signal SG6, the watchdog signal SG8 switches to a potential state indicating normality at the same time as it returns to normal.

  Here, the voltage value of the power supply line provided in the DC input unit 140 (corresponding to the input DC voltage Vin) starts to increase from substantially the same time as the return of the commercial power supply AC. However, since the input DC voltage Vin is given a time constant by the detection circuit 141, it gradually increases as shown in the figure. And the capacitor | condenser and resistance of the control part side signal output part 141a are suitably set so that the time when the input DC voltage Vin reaches the specified value Vth appears after the time when the watchdog signal SG8 switches. As a result, the voltage detection signal SG7 and the reset signal SG9 appear after the time when the watchdog signal SG8 switches. That is, the period from when the DC input voltage Vin starts to increase until the watchdog signal SG8 switches (hereinafter referred to as the first return period Δt1) is the second period in which the switching time of the watchdog signal SG8 is the end point. The period is longer than Δt2.

  As described above, when the commercial power supply AC is restored, the power supply device 100 according to the present embodiment waits for the zero cross signal SG6 to be restored and releases the output restriction of the reset signal. Therefore, the control unit 180 receives the reset signal SG8 after its own operation returns to a normal state (a state in which the runaway operation is not performed), and can correctly execute the reset operation processing 183.

  The time when the output of the reset signal SG9 is permitted is determined by the first return period Δt1, and can be adjusted by the circuit configuration (capacitor Cv, resistors R21, R22) of the control unit side signal output unit 141a. For this reason, even when the second return period Δt2 is prolonged, by appropriately selecting the electrical elements of the circuit configuration, the output possible time of the reset signal SG9 is set so as not to induce the runaway operation of the control unit 180. It can be set correctly.

  In particular, the power supply apparatus 100 according to the present embodiment is useful in a scene where the voltage effective value Vrms of the commercial power supply AC recovers to a normal value over a predetermined time, as shown in FIG. 4B. In such a scene, the power applied to the zero-cross detection circuit 131 is also gradually recovered, so that the second recovery period Δt2, that is, the time for the zero-cross signal SG6 to recover normally is lengthened.

  However, the power supply device 100 according to the present embodiment can be set so that the “first return period Δt1” is longer than the “second return period Δt2” in view of this situation. After the zero-cross signal SG6 returns to normal, the setting for permitting the output of the reset signal SG9 can be performed. That is, the reset operation process is not started during the unstable operation of the control unit 180.

  If the commercial power supply gradually decreases (slowly changes to a power failure state) when a power failure occurs, the controller 180 resets the reset signal SG9 after the zero cross signal becomes unstable. There is a possibility of runaway due to the signal SG9. For this reason, it is preferable that the timing of the reset signal SG9 to be switched to the regulation period mode is set earlier than the switching timing at which the watchdog signal SG8 indicates an abnormality of the zero cross signal.

  Thereby, the output of the reset signal SG9 is limited before the zero-cross signal SG6 becomes in an irregular state, so that it is not necessary to induce the runaway of the control unit 180, and the malfunction of the control unit 180 is avoided. Accordingly, the control unit 280 can also avoid problems due to malfunctions such as abnormal heat generation of the heater, fuel oversupply accompanying pump malfunction, and wasteful consumption of the backup power source. In particular, the protection of the backup power supply is a beneficial merit for preventing the loss of operational information and timer information immediately before a power failure.

  DESCRIPTION OF SYMBOLS 100 Power supply device, 143 Drive circuit, 140 Transformer, 174 Smoothing circuit part, Lv1 1st power supply line, Lv2 2nd power supply line, 161 Regulator, 173 Drive signal generation part, 172 Latch state detection circuit, 171 Control overvoltage detection circuit, SG4 Latch signal.

Claims (2)

A transformer that responds by a drive circuit and outputs an excitation voltage; a smoothing circuit that converts the excitation voltage to a first voltage that is a substantially constant value; a first power supply line to which the first voltage is applied; A regulator that generates a second voltage set lower than the first voltage based on the first voltage, and a second that is electrically connected to the output terminal of the regulator and to which the second voltage is applied A power supply line, a drive signal generation circuit for giving a command signal to the drive circuit based on the voltage at the subsequent stage of the transformer, and when the internal current is generated in the latch unit, the internal current is maintained and output by the generation of the internal current A latch state detection circuit for maintaining the output of a latch signal; a control overvoltage detection circuit for generating the internal current when the second voltage becomes higher than a specified value; Provided,
The drive signal generation circuit is configured to suppress an excitation operation of the transformer when receiving the latch signal.   The command signal includes an operation stop signal for stopping the excitation operation of the transformer during output of the latch signal, and a feedback signal for controlling the first voltage to a substantially constant value during non-output of the latch signal. The power supply device according to claim 1, wherein the power supply device is switched to any one.

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