JP2015099240A - Electro-optic device and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a DC component applied to a liquid crystal capacitance and to decrease fluctuations in the process of degradation in a display panel plane.SOLUTION: A first drive mode is determined by setting length of a positive polarity drive period and length of a negative polarity drive period based on a first potential that is a potential at a first position of a common electrode in such a manner that a product value of a voltage applied to a liquid crystal at the first position and a period length of the voltage application in the positive polarity drive period is closer to a product value of a voltage applied to the liquid crystal at the first position and a period length of the voltage application in the negative polarity drive period. A second drive mode is determined by setting length of a positive polarity drive period and length of a negative polarity drive period based on a second potential that is a potential at a second position of the common electrode in such a manner that a product value of a voltage applied to the liquid crystal at the second position and a period length of the voltage application in the positive polarity drive period is closer to a product value of a voltage applied to the liquid crystal at the second position and a period length of the voltage application in the negative polarity drive period. A control circuit 52 for executing the first drive mode and the second drive mode is included in a liquid crystal device 1.

Description

  The present invention relates to an electro-optical device and a method for driving an electronic apparatus.

The liquid crystal panel usually includes a plurality of scanning lines, a plurality of data lines, and a plurality of pixels provided corresponding to each intersection of the scanning lines and the data lines. The pixel usually includes a pixel electrode, a common electrode, a liquid crystal element sandwiched between the pixel electrode and the common electrode, and a transistor provided between the pixel electrode and the data line. This transistor is controlled to be turned on / off by a scanning signal supplied to the scanning line.
In such a liquid crystal panel, when a DC voltage is applied to the liquid crystal element and driven, impurity ions are deposited in the vicinity of the pixel electrode or the common electrode of the liquid crystal element. As a result, a deterioration phenomenon such as a so-called image burn-in occurs, in which an image display trace remains.

In order to solve such a problem, AC driving has been conventionally employed in liquid crystal panels. In AC driving, a constant common potential (for example, 0 [V]) is supplied to the common electrode, while a grayscale potential corresponding to the grayscale to be supplied to the pixel electrode via the data line is set to the common potential. Periodically reverse (polarity inversion) as a reference. Specifically, the gradation potential is switched between the high potential side and the low potential side with reference to the common potential. In the following description, driving by the high potential side gradation potential is referred to as “positive polarity driving”, and driving by the low potential side gradation potential is referred to as “negative polarity driving”.
In the AC drive, the voltage applied between the pixel electrode and the common electrode is normally driven to be 0 V when the average is taken in the positive drive period and the negative drive period. When the voltage fluctuates, the voltage applied to the pixel during the positive polarity driving period (potential difference between the gradation potential on the high potential side and the common potential) and the voltage applied to the pixel during the negative polarity driving period (the gradation on the low potential side) The potential difference between the potential and the common potential is a different value.
Here, since the display luminance of the pixel is mainly determined by the potential difference between the gradation potential and the common potential, if the common potential fluctuates, a difference occurs in the display luminance between the positive polarity driving period and the negative polarity driving period. Flickering occurs in the liquid crystal panel. Patent Document 1 discloses a technique for suppressing the occurrence of flicker.
Specifically, according to the technique disclosed in Patent Document 1, the difference between the brightness when holding a positive voltage and the brightness when holding a negative voltage is a predetermined value. The lengths of the positive polarity drive period and the negative polarity drive period are controlled so as to gradually change within the range, and the occurrence of flicker can be suppressed.

JP 2011-158776 A

By the way, the common electrode is common to all the pixels, and a constant common potential is applied in time. However, in reality, the common electrode is shifted from the common potential at each position in the plane of the common electrode. Has occurred.
Here, as the pixel corresponding to the position where the amount of deviation from the common potential is large, the voltage applied to the liquid crystal is greatly different between the positive polarity driving period and the negative polarity driving period, and as a result, a larger amount of DC component is applied. Deterioration progresses. And in the site | part to which deterioration progressed, symptoms, such as flicker, image sticking, or bleeding, are easy to produce compared with the site | part which is not so. Furthermore, the above-mentioned symptom may be promoted by sweeping impurity ions generated due to aging to the site. Some users feel uncomfortable with the display on the display panel in which such a phenomenon occurs.
Note that such non-uniformity of deterioration in the display panel is a process of suppressing the occurrence of flicker based on the brightness detected for a pixel at a specific position on the liquid crystal panel (for example, a central position that is easily visible to the user). If you do, you will be further encouraged.
The present invention has been made in view of the above-described circumstances, and reduces the direct current component applied to the liquid crystal capacitance due to the common potential shift, and also causes variations in the deterioration progress rate in the plane of the display panel. Reduction is the problem to be solved.

  One aspect of the electro-optical device according to the invention is a pixel electrode provided at an intersection of a scanning line and a data line, to which a gradation potential is applied via the data line, and a liquid crystal interposed between the pixel electrode A liquid crystal panel including a common electrode to which a common potential is applied, a positive polarity driving period for supplying a potential higher than a predetermined potential as the gradation potential to the data line, and the gradation potential A driving unit that drives the liquid crystal panel by switching a negative driving period for supplying a potential lower than the predetermined potential to the data line, and a control unit that controls the driving unit, and the positive electrode A value of a product of a voltage applied to the liquid crystal at the first position of the common electrode and the length of the positive polarity driving period in the negative driving period, and a value applied to the liquid crystal in the first position in the negative polarity driving period. Voltage and negative Driving in which the length of the positive polarity driving period and the length of the negative polarity driving period are set based on the first potential that is the potential of the first position so that the product value of the length of the negative driving period approaches In the positive drive period, the product of the voltage applied to the liquid crystal at the second position of the common electrode and the length of the positive drive period, and the first drive period in the negative drive period. Based on the second potential, which is the potential at the second position, so that the product of the voltage applied to the liquid crystal at two positions and the length of the negative polarity driving period approaches, When the drive in which the length and the length of the negative drive period are set is the second drive, the control unit controls the drive unit to execute at least the first drive and the second drive. It is characterized by.

According to this aspect, the first drive is a drive in which the duty ratio is corrected based on the potential at the first position of the common electrode, and the second drive is a correction in which the duty ratio is corrected based on the potential at the second position of the common electrode. Drive. Here, these duty ratios are the product value of the voltage applied to the liquid crystal at the first position of the common electrode in the positive polarity driving period and the length of the positive polarity driving period, and the liquid crystal at the first position in the negative polarity driving period. The ratio set so that the product of the voltage applied to the length of the negative drive period and the length of the negative drive period approaches, and the voltage applied to the liquid crystal at the second position of the common electrode in the positive drive period and the positive polarity The ratio is set so that the product value of the length of the drive period and the product value of the voltage applied to the liquid crystal at the second position in the negative polarity drive period and the length of the negative polarity drive period are close to each other.
Here, assuming that the above-mentioned predetermined potential is a potential determined according to the value of the common potential, there is a variation in potential due to the distributed resistance of the common electrode in the plane of the common electrode to which the common potential is applied. However, by performing the first drive and the second drive, the effect of correcting the duty ratio is more effective than the case of executing the drive in which the duty ratio is corrected based on the potential at one position. Uniform in the plane. Accordingly, the direct current component applied to the liquid crystal is reduced by correcting the duty ratio, and the degree of reduction is also made uniform in the plane of the liquid crystal panel as compared with the prior art. Thereby, the dispersion | variation in the progress of the deterioration of the liquid crystal in the surface of the said liquid crystal panel is also reduced.
Further, since the impurity ions are prevented from being swept away by the direct current component applied to the liquid crystal, the time until a display defect occurs in the liquid crystal panel is extended, and the product life is increased.

In the electro-optical device described above, a first ratio that is a ratio of the length of the positive drive period corresponding to the first drive and the length of the negative drive period, and the second drive A storage unit that stores a second ratio that is a ratio between a corresponding length of the positive polarity driving period and a length of the negative polarity driving period, and the control unit includes the first ratio stored in the storage unit and It is preferable to read the second ratio and control the driving unit to execute at least the first driving and the second driving.
According to this aspect, the drive for which the duty ratio is corrected according to the potential distribution in the plane of the common electrode without separately providing the electro-optical device with a configuration for specifying the potential at each position of the common electrode. Can be executed.

  According to another aspect of the electro-optical device according to the aspect of the invention, the potential that is in the range that is higher than the first potential and lower than the second potential is the third potential, and the third potential is applied to the front common electrode. Further, the product of the voltage applied to the liquid crystal during the positive polarity driving period and the length of the positive polarity driving period, the voltage applied to the liquid crystal during the negative polarity driving period, and the negative driving period. When the drive set with the length of the positive polarity drive period and the length of the negative polarity drive period is set as the third drive so as to approach the product value of the length, the control unit includes at least the first drive, It is preferable that the drive unit is controlled to execute the second drive and the third drive.

According to this aspect, in addition to the first drive and the second drive, the third drive that is a drive in which the duty ratio is corrected based on the third potential within the range between the first potential and the second potential is also executed. Therefore, the number of duty ratios to be switched can be increased, and correction can be performed more continuously. As a result, the degree of reduction of the direct current component applied to the liquid crystal is further uniformized in the plane of the liquid crystal panel, and the progress of deterioration is further uniformed. Further, when the duty ratio changes greatly, it becomes easy for humans to detect, but by increasing the number of duty ratios, it can be made difficult to see and display quality is improved.
The third potential is preferably a potential at a third position which is a position of the common electrode different from the first position and the second position. In this case, since the third potential is the potential at the third position of the common electrode, the direct current component applied to the liquid crystal at the third position is reduced, and the third position is the same as the first position and the second position. The progress of liquid crystal deterioration can be made uniform.

In one aspect of the electro-optical device described above, the control unit corrects the gradation potential according to a ratio between the length of the positive polarity driving period and the length of the negative polarity driving period. It is preferable.
According to this aspect, the gradation potential is corrected according to the ratio between the length of the positive polarity driving period and the length of the negative polarity driving period, so that the progress of deterioration in the plane of the liquid crystal panel is further suppressed. In addition, since the correction of the duty ratio, which is considered to have a different suppression effect on the display defect in the liquid crystal panel, and the correction of the gradation potential are used in combination, the display defect due to various causes is suppressed. In addition, by combining the correction of the duty ratio and the correction of the gradation potential, the dynamic range of the gradation potential can be narrowed compared to the case where only the correction of the duty ratio is employed.
In this case, the product of the voltage applied to the liquid crystal at each position of the common electrode and the length of the positive drive period in the positive driving period and the liquid crystal at each position of the common electrode are applied. It is preferable that the gradation potential is corrected so that a product value of the voltage to be obtained and the length of the negative polarity driving period approach each other.

One aspect of the electronic apparatus according to the invention includes the electro-optical device according to any one of the various aspects described above.
According to this aspect, there is provided an electronic apparatus that can obtain the effect exhibited by the electro-optical device according to any one of the various aspects described above.

  The present invention is also grasped as a method for driving a liquid crystal panel. In this method, a pixel electrode provided at an intersection of a scanning line and a data line, to which a gradation potential is applied via the data line, and a liquid crystal interposed between the pixel electrode and a common potential are arranged. A liquid crystal panel including a common electrode to be applied; a positive polarity driving period in which a potential higher than a predetermined potential as the gradation potential is supplied to the data line; and a potential lower than the predetermined potential as the gradation potential And a voltage applied to the liquid crystal at the first position of the common electrode during the positive polarity driving period. The product value of the length of the positive polarity drive period and the value of the product of the voltage applied to the liquid crystal at the first position in the negative polarity drive period and the length of the negative polarity drive period are close to each other. , The first position Performing a first drive in which a length of the positive drive period and a length of the negative drive period are set based on a first potential that is a potential, and the second position of the common electrode in the positive drive period The product of the voltage applied to the liquid crystal and the length of the positive polarity driving period, and the product of the voltage applied to the liquid crystal at the second position in the negative polarity driving period and the length of the negative polarity driving period. The second driving is performed in which the length of the positive polarity driving period and the length of the negative polarity driving period are set based on the second potential which is the potential of the second position so as to approach the value of Features.

1 is a block diagram illustrating a configuration of a liquid crystal device according to a first embodiment. 2 is a diagram showing a configuration of a display panel of the liquid crystal device. FIG. 2 is a diagram showing a configuration of a pixel in the display panel. FIG. The figure which shows the deviation | shift amount of the electric potential in a common electrode. FIG. 14 is a diagram showing an operation of a scanning line driving circuit in the display panel. The figure which shows the concept of duty ratio correction | amendment. The figure which shows the voltage waveform example of the data signal in the display panel. The figure which shows the voltage waveform example of the data signal in the display panel. The figure which shows transition of the writing of the pixel in a display area. FIG. 14 is a diagram showing an operation of a scanning line driving circuit in the display panel. The figure which shows transition of the writing of the pixel in a display area. FIG. 14 is a diagram showing an operation of a scanning line driving circuit in the display panel. The figure which shows transition of the writing of the pixel in a display area. The figure which shows the concept of the drive in 1st Embodiment. The figure which shows the concept of the drive in a comparative example. The figure which shows the effect of the correction | amendment with respect to the common potential shift | offset | difference in each position in the surface of a common electrode. The figure which shows the concept of the drive in 2nd Embodiment. The figure which shows the effect of the correction | amendment with respect to the common potential shift | offset | difference in each position in the surface of a common electrode. The block diagram which shows the structure of the liquid crystal device which concerns on 3rd Embodiment. The figure which shows the concept of the drive in 3rd Embodiment. FIG. 3 is a diagram illustrating a configuration example of a projector to which the liquid crystal device according to the embodiment is applied. FIG. 9 is a block diagram showing a configuration of a liquid crystal device according to Modification 3.

Hereinafter, a liquid crystal device will be described as an example of an electro-optical device according to the present invention.
[First Embodiment]
FIG. 1 is a block diagram showing the configuration of the liquid crystal device 1 according to the first embodiment of the present invention. As shown in FIG. 1, the liquid crystal device 1 is roughly divided into a display panel 10 (liquid crystal panel) and a processing circuit 50. Among these, the processing circuit 50 which is a circuit module for controlling the operation of the display panel 10 includes a control circuit 52, a display data processing circuit 54, a D / A conversion circuit 56, and a duty ratio setting storage unit 83. A (flexible printed circuit) substrate is connected to the display panel 10. The liquid crystal device 1 is an example of a liquid crystal device that displays an image using liquid crystal.

  The control circuit 52 generates various control signals for controlling the display panel 10 in synchronization with a synchronization signal Vsync supplied from an external host device (not shown). These control signals will be described later as appropriate. The control circuit 52 generates various control signals and controls the display data processing circuit 54.

  The display data processing circuit 54 temporarily stores display data Video supplied from an external host device in an internal memory (not shown) under the control of the control circuit 52 and then reads it in synchronization with driving of the display panel 10. It is. Note that the display data Video is data that specifies the gradation of the pixels in the display panel 10, and the waveform is not particularly shown, but for one frame (period of 16.7 milliseconds (frequency 60 Hz)) (For pixel). The D / A conversion circuit 56 converts the read display data into an analog data signal Vid according to control by the control circuit 52.

  Next, the display panel 10 will be described. FIG. 2 is a diagram illustrating a configuration of the display panel 10. As shown in this figure, the display panel 10 is a peripheral circuit built-in type in which a scanning line driving circuit 130 and a data line driving circuit 140 are built around the display region 100. In the display area 100, 480 scanning lines 112 are provided so as to extend in the row (X) direction, and 640 columns of data lines 114 are provided so as to extend in the column (Y) direction. The pixels 110 are arranged so as to be electrically insulated from the scanning lines 112 and correspond to the intersections of the scanning lines 112 of 480 rows and the data lines 114 of 640 columns. Accordingly, in the present embodiment, the pixels 110 are arranged in a matrix of 480 rows × 640 columns in the display region 100, but the present invention is not limited to this arrangement.

  The configuration of the pixel 110 will be described with reference to FIG. FIG. 3 shows a total of 4 pixels of 2 × 2 corresponding to the intersection of the i row and the (i + 1) row adjacent to it by 1 row and the j column and the (j + 1) column adjacent to the right by 1 column. The structure of is shown. Note that i and (i + 1) are symbols for generally indicating the row in which the pixels 110 are arranged, and are integers of 1 to 480 in this description. J and (j + 1) are symbols for generally indicating a column in which the pixels 110 are arranged, and are integers of 1 to 640.

As shown in FIG. 3, each pixel 110 includes an n-channel TFT 116 and a liquid crystal capacitor 120. Here, since each pixel 110 has the same configuration, the gate electrode of the TFT 116 in the pixel 110 in the i row and j column will be described as the pixel in the i row and j column. On the other hand, the source electrode is connected to the data line 114 in the j-th column, and the drain electrode is connected to the pixel electrode 118 which is one end of the liquid crystal capacitor 120. Further, the other end of the liquid crystal capacitor 120 is connected to the common electrode 108. Here, in order to focus on the characteristic part of the liquid crystal device 1 according to the present embodiment and facilitate understanding thereof, the common potential LCcom is set. In the following, an example in which the gray scale potential supplied to the data line 114 is set to coincide with the center potential will be described. In the case of this example, the positive potential in the first embodiment means a higher potential with respect to the common potential LCcom applied to the common electrode 108, and the negative potential is lower than the common potential LCcom. Side potential. Further, in the first embodiment, the polarity of the data signal is based on the common potential LCcom. However, unless otherwise specified, the ground potential Gnd corresponding to the L level of the logic level is set to the potential of zero. The standard.
Of course, the period in which the gradation potential supplied to the data line is on the high potential side with reference to the predetermined potential may be the positive polarity driving period, and the period in which the gradation potential is on the low potential side is the negative polarity driving period. This predetermined potential is, for example, a potential determined according to the value of the common potential LCcom and various conditions.

  The common electrode 108 is common to all the pixels 110, and a common potential LCcom constant in time is applied. However, in reality, the potentials at all positions in the plane of the common electrode 108 are not necessarily the common potential LCcom. FIG. 4 is a diagram showing a potential shift at each position in the plane of the common electrode 108 (hereinafter referred to as “common potential shift”). As shown in FIG. 4, the amount of common potential deviation increases as the position deviates from the position corresponding to the center position C of the display panel 10. In the example shown in the figure, the amount of common potential deviation (hereinafter referred to as “common potential deviation amount”) increases in the order of position C, position B, and position A.

  Here, as the pixel corresponding to the position where the amount of deviation from the potential LCcom is large, the difference in voltage applied between the positive polarity driving period and the negative polarity driving period is larger, and as a result, the liquid crystal capacitance 120 has more direct current components. Will be applied. In other words, the larger the common potential shift amount, the easier the liquid crystal deteriorates. In the display panel 10 where deterioration has progressed, symptoms such as flicker, burn-in, or bleeding are more likely to occur than in other areas. Furthermore, it is also conceivable that the previous symptom is promoted by sweeping impurity ions generated by aging deterioration to a position where the deterioration has progressed. The display quality of the display panel in which such a phenomenon occurs decreases.

In view of the above-described circumstances, in the liquid crystal device 1 according to the first embodiment, the DC component applied to the liquid crystal capacitor 120 due to the common potential shift is reduced, and the deterioration speed in the plane of the display panel 10 is reduced. In order to reduce the variation, the drive for correcting the common potential deviation is performed based on the common potential deviation amounts at a plurality of positions in the common electrode 108.
In this drive, the duty ratio indicating the ratio between the length of the positive polarity drive period and the length of the negative polarity drive period is appropriately switched, and the control circuit 52 reads the set value stored in the duty ratio setting storage unit 83. Then, the display panel 10 is driven by changing the duty ratio with time based on the set value.

Although not specifically shown, the display panel 10 has a configuration in which a pair of substrates of an element substrate and a counter substrate are bonded together with a certain gap therebetween, and liquid crystal is sealed in the gap. Among these, the scanning line 112, the data line 114, the TFT 116, and the pixel electrode 118 are formed on the element substrate together with the scanning line driving circuit 130 and the data line driving circuit 140, while the common electrode 108 is formed on the counter substrate. These electrode forming surfaces are bonded together with a certain gap so as to face each other. For this reason, in this embodiment, the liquid crystal capacitor 120 is configured by sandwiching the liquid crystal 105 between the pixel electrode 118 and the common electrode 108.
In this embodiment, if the effective voltage value held in the liquid crystal capacitor 120 is close to zero, the transmittance of light passing through the liquid crystal capacitor is maximized to display white, while the effective voltage value increases. The normally white mode in which the amount of transmitted light decreases and finally the black display with the minimum transmittance is set.

In this configuration, a selection voltage is applied to the scanning line 112 to turn on the TFT 116, and a voltage corresponding to the gradation (brightness) is applied to the pixel electrode 118 via the data line 114 and the on-state TFT 116. When the data signal (gradation potential) is supplied, the effective voltage value corresponding to the gradation is held in the liquid crystal capacitor 120 corresponding to the intersection of the scanning line 112 to which the selection voltage is applied and the data line 114 to which the data signal is supplied. Can be made.
Therefore, the light transmitted through the liquid crystal capacitor 120 can be different for each pixel, whereby an image is formed in the display region 100. The formed image is viewed directly by the user or enlarged and projected as in a projector described later.

  Note that when the scanning line 112 becomes a non-selection voltage, the TFT 116 is turned off (non-conducting). However, since the off resistance at this time is not ideally infinite, the charge accumulated in the liquid crystal capacitor 120 is small. Leak. In order to reduce the influence of off-leakage, a storage capacitor 109 is formed for each pixel. One end of the storage capacitor 109 is connected to the pixel electrode 118 (the drain of the TFT 116), while the other end is commonly connected to the capacitor line 107 over all pixels. The capacitor line 107 is maintained at a constant potential, for example, the same potential LCcom as the potential applied to the common electrode 108.

  The scanning line driving circuit 130 supplies scanning signals G1, G2, G3,..., G480 to the scanning lines 112 in the 1, 2, 3,. Here, the scanning line driving circuit 130 sets the scanning signal to the selected scanning line to the H level corresponding to the voltage Vdd, and the scanning signals to the other scanning lines to L corresponding to the non-selection voltage (ground potential Gnd). Level.

FIG. 5 is a timing chart showing the scanning signals G1 to G480 output from the scanning line driving circuit 130 in relation to the start pulses Dya and Dyb and the clock signal Cly.
As shown in the figure, each scanning line 112 is selected twice in one frame period. Here, the frame means a period required to display one image on the display panel 10, but the display data Video is supplied with a period of 16.7 milliseconds as described above. Corresponds to 16.7 milliseconds of this period.
The control circuit 52 outputs a clock signal Cly having a duty ratio of 50% for 480 periods equal to the number of scanning lines over a period of one frame. In FIG. 5, a period of one cycle of the clock signal Cly is denoted as H.
The control circuit 52 outputs start pulses Dya and Dyb having a pulse width corresponding to one cycle of the clock signal Cly when the clock signal Cly rises to the H level as follows. That is, the control circuit 52 outputs the start pulse Dya at the beginning of one frame period (that is, at the beginning of the first field), while outputting the start pulse Dyb for 240 cycles of the clock signal Cly after outputting the start pulse Dyb. Is output at a timing T at which a half period of one frame has passed.

The period from the start pulse Dya output until the start pulse Dyb is output is set as the first field in the period of one frame, and the next start pulse Dya is output after the start pulse Dyb is output. The period until is the second field.
Here, the start pulses Dya and Dyb are alternately output, and among these, the start pulse Dya is output at the start timing of one frame, that is, every 16.7 milliseconds. For this reason, when the start pulse Dya is specified, the start pulse Dyb is inevitably specified, and therefore, in FIG. 1, FIG. 2, etc., there is a case where they are described as the start pulse Dy without particularly distinguishing both.

By the way, the control circuit 52 may output the start pulse Dyb to the front side or the rear side in time by the amount of the period of the clock signal Cly as a unit with respect to the timing T. Hereinafter, the process of changing the duty ratio in this way is referred to as duty ratio correction. FIG. 6 (a) shows a duty ratio of 1: 1, FIG. 6 (b) shows a duty ratio of 0.49 to 0.51, and FIG. 6 (c) shows a duty ratio of 0.51 to 0.49. .
The example shown in FIG. 6B shows the duty ratio correction for the position where the potential of the common electrode 108 is lowered by ΔV from the common potential LCcom to become the potential L1. As described above, the product of the voltage applied to the liquid crystal at the corresponding position of the common electrode 108 in the positive polarity driving period and the length of the positive polarity driving period is the voltage applied to the liquid crystal at the corresponding position in the negative polarity driving period. When the value is larger than the product of the length of the negative drive period, the duty ratio correction is performed so that the negative drive period becomes longer than the positive drive period so that the product values approach each other. .
The example shown in FIG. 5C shows the duty ratio correction for the position where the potential of the common electrode 108 is increased by ΔV from the common potential LCcom to become the potential L2. As described above, the product of the voltage applied to the liquid crystal at the corresponding position of the common electrode 108 in the positive polarity driving period and the length of the positive polarity driving period is the voltage applied to the liquid crystal at the corresponding position in the negative polarity driving period. When the value is smaller than the product of the length of the negative drive period, the duty ratio is corrected so that the positive drive period is longer than the negative drive period so that the product values are close to each other. .

  In the following description, a value calculated by the product of the voltage applied to the liquid crystal capacitor 120 and the length of the period in each polarity drive period is referred to as an “area value”. The duty ratio correction is a correction for bringing the area value closer in the positive polarity driving period and the negative polarity driving period. In this example, the area value in the positive polarity driving period and the area value in the negative polarity driving period are also made equal.

Hereinafter, setting values stored in the duty ratio setting storage unit 83 will be described. First, in the first embodiment, when the liquid crystal device 1 is manufactured, potentials at a plurality of positions are measured in the plane of the common electrode 108 to which the common potential LCcom is supplied, and the common potential shift is detected from the measured values. Is the minimum position (position C in the example shown in FIG. 4) and the common potential deviation amount at the position where the common potential deviation is maximum (position A in the example shown in FIG. 4).
When the common potential deviation amount is the maximum, the product value of the voltage applied to the liquid crystal capacitor 120 in the positive polarity driving period and the length of the positive polarity driving period and the liquid crystal capacitance 120 in the negative polarity driving period. The duty ratio is determined such that the value of the product of the applied voltage and the length of the negative drive period approaches, and the setting value related to the duty ratio is stored in the duty ratio setting storage unit 83.
Similarly, when the common potential deviation amount is minimum, the product value of the voltage applied to the liquid crystal capacitor 120 in the positive polarity driving period and the length of the positive polarity driving period, and the liquid crystal capacitance 120 in the negative polarity driving period. The duty ratio is determined such that the value of the product of the voltage applied to and the length of the negative drive period approaches, and the set value related to the duty ratio is stored in the duty ratio setting storage unit 83.
Here, the “set value” is a value that specifies the output timing of the start pulse Dyb, and can be classified into a first set value that is a negative integer value and a second set value that is a positive integer value. .

In the duty ratio setting storage unit 83, for example, a setting value related to the duty ratio specified by the method described above is stored.
Note that a specific value of the duty ratio may be specified using a conventional technique well known to those skilled in the art according to the common potential deviation amount. For example, the duty ratio is changed by 1% for a deviation of 1 mV from the common potential LCcom. Here, if the common potential shift is such that the voltage applied to the liquid crystal capacitor 120 in the one polarity driving period becomes small, the duty ratio is set so that the one polarity driving period is lengthened and the other polarity driving period is shortened. To change.

Returning to FIG. The scanning line driving circuit 130 outputs the scanning signals G1 to G480 shown in FIG. 5 from the start pulses Dya and Dyb and the clock signal Cly described above. That is, when the start pulse Dya is supplied to the scanning signals G1 to G480, the scanning line driving circuit 130 sequentially sets the clock signal Cly to the H level during the L level period, while when the start pulse Dyb is supplied. The clock signal Cly is sequentially set to the H level during the H level period.
For this reason, by supplying the start pulse Dya, the scanning line is shifted in the order of the first, second, and second fields of a frame in the order of 1, 2, 3, 4,. On the other hand, by supplying the start pulse Dyb, the scanning line is moved downward from the second field of a certain frame to the first field of the next frame toward the bottom of the screen. 4,..., In the order of the 480th row, they are selected between selections triggered by the supply of the start pulse Dya.

  The data line driving circuit 140 includes a sampling signal output circuit 142 and n-channel TFTs 146 provided corresponding to the data lines 114, respectively. As shown in FIGS. 7 and 8, the sampling signal output circuit 142 selects one of the scanning lines 112 according to the control signal Ctrl-x from the control circuit 52, and the scanning signal supplied to the scanning line is at the H level. In this period, sampling signals S1, S2, S3,..., S640 that sequentially become H level exclusively are output so as to correspond to each of the data lines 114. Note that the control signal Ctrl-x is actually a start pulse or a clock signal, but is not directly related to the present invention, so the description is omitted. Further, the period during which the scanning signal is at the H level is actually slightly narrower than the half-period period of the clock signal Cly, as shown in FIGS.

Meanwhile, the D / A conversion circuit 56 in FIG. 1 converts display data Video for one row of pixels located on the scanning line 112 selected by the scanning line driving circuit 130 into sampling signals S1 to S640 by the sampling signal output circuit 142. The data signal Vid having the following polarity is converted according to the output.
In other words, the D / A conversion circuit 56 is positive for the data signal Vid of the pixel located in the selected row when the clock signal Cly is at the L level, and is selected when the clock signal Cly is at the H level. The data signal Vid of the pixel located at is converted into a negative polarity.

The control circuit 52 reads the set value from the duty ratio setting storage unit 83 and sets the duty ratio according to the set value. Specifically, the control circuit 52 includes a register (not shown) that stores the above-described setting value, and changes the output timing of the start pulse Dyb according to the setting value stored in the register.
Hereinafter, the output timing of the start pulse Dyb will be described.

  First, the control circuit 52 stores display data Video supplied from an external host device in a frame memory (not shown) of the display data processing circuit 54, and then selects a scanning line in a row on the display panel 10. The sampling data is read via the control signal Ctrl-x so that the display data of the row is read at a speed twice the storage speed and the sampling signals S1 to S640 are sequentially set to the H level in accordance with the reading of the display data. The output circuit 142 is controlled. The read display data is converted into an analog data signal Vid by the D / A conversion circuit 56.

Here, the control circuit 52 supplies the start pulse Dyb at timing T when the value stored in the register is “0”. When supplying the start pulse Dyb at the timing T, the control circuit 52 selects the scanning lines 112 in the order of the 241, 242, 2, 243, 3,..., 480, and 240 th rows in the first field. . Therefore, the control circuit 52 controls the scanning line driving circuit 130 so that the scanning line 112 in the 241st row is selected first. Further, the control circuit 52 causes the display data processing circuit 54 to read the display data Video corresponding to the 241st row stored in the memory at double speed, and causes the D / A conversion circuit 56 to read the negative data signal. The sampling signal output circuit 142 is controlled so that the sampling signals S1 to S640 are exclusively set to the H level in this order in accordance with the reading. When the sampling signals S1 to S640 are sequentially set to the H level, the TFTs 146 are sequentially turned on, and the data signals Vid supplied to the image signal lines 171 are sequentially sampled on the data lines 114 in the 1st to 640th columns.
On the other hand, when the scanning line 112 in the 241st row is selected and the scanning signal G241 becomes the H level, all the TFTs 116 in the pixels 110 located in the 241st row are turned on. Therefore, the negative voltage of the data signal Vid sampled on the data line 114 is applied to the pixel electrode 118 as it is. For this reason, the negative voltage corresponding to the gradation specified by the display data Video is written in the liquid crystal capacitor 120 in the pixels of the 241st row and the columns 1, 2, 3, 4,..., 639, 640. Will be held.

Next, the control circuit 52 controls the scanning line driving circuit 130 so that the scanning line 112 in the first row is selected. In addition, the control circuit 52 causes the display data processing circuit 54 to read the display data Video corresponding to the first row stored in the memory at double speed, and causes the D / A conversion circuit 56 to output a positive data signal. The sampling signal output circuit 142 is controlled so that the sampling signals S1 to S640 are exclusively set to the H level in this order in accordance with the reading.
When the scanning line 112 in the first row is selected and the scanning signal G1 becomes H level, all the TFTs 116 in the pixels 110 located in the first row are turned on, whereby the voltage of the data signal Vid sampled on the data line 114 is turned on. Is applied to the pixel electrode 118. Therefore, a positive voltage corresponding to the gradation specified by the display data Video is written and held in the liquid crystal capacitor 120 in the pixels in the first row and in the 1st to 640th columns.

Hereinafter, in the first field, the same voltage writing operation is executed in the order of the 242nd, 2nd, 24th, 3rd,..., 480th, and 240th rows. Thereby, a positive voltage corresponding to the gradation is written to the pixels in the first to 240th rows, and a negative voltage corresponding to the gradation is written to the pixels in the 241st to 480th rows. Each will be held.
In the case where the start pulse Dyb is supplied at the timing T, the scanning lines 112 are referred to as rows 1, 241, 2, 242, 3, 243, 4, 244,..., 240, 480 in the second field. While being selected in order, the write polarity in the same row is inverted. Therefore, a negative voltage corresponding to the gradation is written to the pixels in the first to 240th rows, and a positive voltage corresponding to the gradation is written to the pixels in the 241st to 480th rows. Each will be held.

FIG. 7 shows an example of a voltage waveform of the data signal Vid in a period in which the (i + 240) th scanning line and the i-th scanning line in the first field are selected.
In this figure, voltages Vb (+) and Vb (−) are positive and negative voltages corresponding to the black of the lowest gradation, respectively, and have a symmetrical relationship with respect to the common potential LCcom. In the present embodiment, when the decimal value of the gradation value designated by the display data Video is “0”, black of the lowest gradation is designated, and thereafter, a bright gradation is designated as the decimal value increases. Is normally white mode, so if the voltage of the data signal Vid is converted to positive polarity, it becomes a voltage swung from the voltage Vb (+) to the lower side as the gradation value increases, and the negative polarity In the case of converting to V, the voltage is swung from the voltage Vb (−) to the higher side.

In the first field, since the (i + 240) -th scanning line is selected before the i-th row, for example, the sampling signal S1 is at the H level during the period in which the scanning signal G (i + 240) is at the H level. During this period, the data signal Vid becomes a negative voltage corresponding to the gradation of the pixel in the i row and the first column, and the pixels in the second, third, fourth,. The voltage changes to a negative polarity voltage corresponding to the gradation.
In the i-th row that is subsequently selected, since positive polarity writing is designated, the data signal Vid is i during the period in which the scanning signal Gi is at the H level, for example, the period in which the sampling signal S1 is at the H level. It becomes a positive voltage according to the gradation of the pixel in the row 1 column, and thereafter changes to a positive voltage according to the gradation of the pixel in the 2, 3, 4,... .
In the second field, since the (i + 240) -th scanning line is selected after the i-th row, the scanning signal Gi first goes to the H level and the writing polarity is inverted, so that the data signal Vid The voltage waveform is as shown in FIG.
In FIG. 7 and FIG. 8, the vertical scale indicating the voltage of the data signal Vid is enlarged as compared with the vertical scales of other signals for convenience. In addition, the voltage corresponding to black is obtained during the period from when the sampling signal S640 changes to the L level to when the sampling signal S1 changes to the H level. This is because it does not contribute to the display even if it is written on.

Next, FIG. 9 is a diagram showing the writing state of each row with the lapse of time over successive frames when the start pulse Dyb is supplied at the timing T. FIG. As shown in this figure, in the present embodiment, in the first field, negative polarity writing is performed on the pixels of 241, 242, 243,. In the pixel, positive writing is performed and held until the next writing, while in the second field, negative writing is performed in the pixels in the first, second, third,..., 240th rows, and 241, 242, 243, ... The pixel in the 480th row is written with a positive polarity, and similarly held until the next writing.
When the register value is “0” and the start pulse Dyb is supplied at the timing T, the period of the first and second fields is 240 periods of the clock signal Cly. The period in which the positive voltage is held and the period in which the negative voltage is held are halved as shown in FIG.

  When the start pulse Dyb is supplied at the timing T, the periods of the first and second fields are equal to each other. The period in which the positive voltage is held in the liquid crystal capacitor 120 and the period in which the negative voltage is held in each pixel. Since it becomes half of the period of the frame, no direct current component should be applied to the liquid crystal capacitor 120. However, in reality, as described above, the common potential shift occurs in different amounts in each position in the plane of the common electrode 108, so that different amounts of DC components are applied to the liquid crystal capacitors 120 corresponding to the respective positions. Will be. Therefore, in order to correct this common potential shift, the timing of the start pulse Dyb is changed according to the value of the set value stored in the register, and the application of the DC component to the liquid crystal capacitor 120 is controlled.

  For example, when the value stored in the register is “−1”, the control circuit 52 causes the start pulse Dyb to be earlier than the timing T by one cycle of the clock signal Cly as shown in FIG. Change to (-1) and output. Then, the period of the first field is 239 periods of the clock signal Cly, while the period of the second field is 241 periods of the clock signal Cly. Accordingly, as shown in FIG. 11, the holding period of the negative voltage written by the selection triggered by the supply of the start pulse Dyb is the holding of the positive voltage written by the selection triggered by the supply of the start pulse Dya. Longer than the period. Therefore, in the pixel, the effective voltage value held at the negative voltage is increased, and the effective voltage value held at the positive voltage is lowered.

  When the voltage effective value held at the negative voltage becomes higher than the voltage effective value held at the positive voltage, the pixel becomes brighter when holding the negative voltage, and darkened when holding the positive voltage. Change. If the value stored in the register is “−2”, the control circuit 52 changes the start pulse Dyb to a timing earlier than the timing T by two cycles of the clock signal Cly and outputs the result. Then, in the pixel, the voltage effective value held at the negative voltage is further increased and the voltage effective value held at the positive voltage is further reduced as compared with the case where the value stored in the register is “−1”.

  On the other hand, if the value stored in the register is “+1”, the control circuit 52 causes the start pulse Dyb to be delayed by one cycle of the clock signal Cly from the timing T, as shown in FIG. Change to 1) and output. Then, the period of the first field is 241 periods of the clock signal Cly, while the period of the second field is 239 periods of the clock signal Cly. Thus, as shown in FIG. 13, the holding period of the negative voltage written by the selection triggered by the supply of the start pulse Dyb is the holding of the positive voltage written by the selection triggered by the supply of the start pulse Dya. Shorter than the period. Therefore, in the pixel, the effective voltage value held at the positive voltage is increased, and the effective voltage value held at the negative voltage is lowered.

  When the effective voltage value held at the positive voltage becomes higher than the effective voltage value held at the negative voltage, the pixel becomes brighter when holding the positive voltage and darker when holding the negative voltage. To do. If the value stored in the register is “+2”, the control circuit 52 changes the start pulse Dyb to a timing later than the timing T by two cycles of the clock signal Cly and outputs it. Then, in the pixel, the effective voltage value held at the positive polarity is further increased and the effective voltage value held at the negative polarity is further reduced as compared with the case where the value stored in the register is “+1”.

  In the first embodiment, the above-described correction for the common potential shift is executed so that the deterioration progresses uniformly in the plane of the display panel 10. FIG. 14 is a diagram illustrating the concept of driving in the first embodiment. FIG. 15 shows a concept of driving a liquid crystal device according to the prior art as a comparative example. The positions A, B, and C shown in these figures correspond to the positions denoted by the same reference numerals shown in FIG. 4, the position A shows the position where the common potential deviation is the largest, and the position C shows the largest common potential deviation. A small position is shown, and a position B shows a position of a common potential shift larger than the common potential shift at the position A and smaller than the common potential shift at the position B.

  FIGS. 14A and 15A show a shift in area value between a positive drive period and a negative drive period when the duty ratio is 50% (hereinafter, simply referred to as a shift in area value). Is shown. As shown in FIG. 15B, if the duty ratio is set so that the deviation of the area value is zero at the position C where the common potential deviation is the smallest, the DC component is not applied to the liquid crystal at the position C. The rate at which the liquid crystal deteriorates can be reduced. On the other hand, at the position A where the common potential deviation is the largest, the deviation of the area value is not eliminated. For this reason, at the position C, the deterioration of the liquid crystal proceeds faster than the position A.

  On the other hand, as shown in FIG. 14B, the control circuit 52 according to the first embodiment sets the deviation of the area value at the position C among the set values stored in the duty ratio setting storage unit 83 to zero. Driving with a duty ratio (time 0 to time t1, time t2 to t3) and driving with a duty ratio (time 1 to time t2, time t3 to t4) at which the deviation of the area value at position A is zero are alternately performed. And the display panel 10 is driven.

  By driving by switching the duty ratio in this way, the deviation of the area value at the position C becomes zero at the time 0 to the time t1 and the time t2 to t3, while the deviation of the area value at the position A becomes large. Further, from time 1 to time t2 and from time t3 to t4, the deviation of the area value at the position A becomes zero, while the deviation of the area value at the position C becomes large. When the deviation of the area value is large, a direct current component is applied to the liquid crystal and the deterioration of the liquid crystal is promoted. Can be brought closer. As a result, it is possible to extend the life of the liquid crystal panel.

  FIG. 16 is a diagram showing an effect of duty ratio correction (hereinafter simply referred to as a correction effect or effect) at each position in the plane of the common electrode 108. Here, the effect of correction means the degree of action for eliminating the common potential deviation. In the figure, the darker the black density is, the more strongly the position is corrected. As shown in the figure, the duty ratio switching drive by the control circuit 52 makes the effect of correcting the common potential shift substantially uniform through a plurality of fields in the plane of the display panel 10.

As described above, according to the first embodiment, the direct current component applied to the liquid crystal capacitance due to the common potential shift is reduced, and variation in the deterioration progress rate in the surface of the display panel 10 is reduced. A liquid crystal device, an electronic device, and a driving method of the liquid crystal device can be provided.
That is, according to the first embodiment, it is possible to prevent only the common potential shift at a specific position in the plane of the common electrode 108 from being particularly strongly corrected, and further, the correction effect is obtained at a position far from the specific position. Can be suppressed. Therefore, variation in the deterioration of the liquid crystal element in the surface of the display panel 10 is suppressed. As a result, the time until display failure occurs in the display panel 10 is extended, and the product life is increased.

[Second Embodiment]
Hereinafter, a liquid crystal device according to a second embodiment of the present invention will be described. The liquid crystal device 1 according to the second embodiment has the same configuration as the liquid crystal device 1 of the first embodiment shown in FIG. 1 except for the setting values stored in the duty ratio setting storage unit 53 and the operation of the control circuit 52. Has been.
In the first embodiment, the display panel 10 is alternately switched between driving at a duty ratio where the deviation of the area value at the position C is zero and driving at a duty ratio where the deviation of the area value at the position A is zero. However, in the second embodiment, driving with a duty ratio in which the deviation of the area value at the position C is zero and driving with a duty ratio in which the deviation of the area value at the position A is zero. In the meantime, driving is performed at a duty ratio in which the deviation of the area value at position B is zero. Therefore, the duty ratio setting storage unit 53 stores setting values corresponding to the position B in addition to the setting values corresponding to the position A and the position C.

FIG. 17 is a diagram illustrating the concept of driving in the second embodiment. As shown in the figure, the control circuit 52 performs the driving at the duty ratio (time 0 to time t1, time t3 to t4) at which the deviation of the area value at the position C is zero, and then the area value at the position B. The driving is switched to the duty ratio (time t1 to time t2, time t4 to t5) with zero deviation, and further the duty ratio driving (time t2 to time t3, where the deviation of the area value at the position A is zero). Switching from time t5 to t6).
FIG. 18 is a diagram showing the effect of correction for the common potential shift at each position in the plane of the common electrode 108. In the figure, the darker the black density is, the more strongly the position is corrected. As shown in the figure, in addition to the duty ratio correction based on the position A and the position C, the duty ratio correction based on the position B is executed, so the degree of reduction of the DC component applied to the liquid crystal is The display panel 10 is further made uniform in the plane, and the progress of deterioration is further made uniform.
In the second embodiment, driving for switching three types of duty ratios has been described as an example. However, the present invention is not limited to this, and driving for switching four or more types of duty ratios may be performed. . In this way, correction can be performed more continuously as the number of duty ratios to be switched is increased. When the duty ratio changes greatly, it becomes easy for humans to detect, but by increasing the number of duty ratios, it can be made difficult to see and display quality is improved.

[Third Embodiment]
The liquid crystal device according to the third embodiment of the present invention will be described below. The liquid crystal device 1 according to the third embodiment is the same as the liquid crystal according to the first embodiment shown in FIG. 1 except for the point except the duty ratio setting storage unit 83 and the detailed configuration of the control circuit 52 and the display data processing circuit 54. The configuration is the same as that of the device 1. In the liquid crystal device 1 according to the third embodiment, the correction of the potential of the data signal supplied to the pixel electrode 118 is performed in addition to the above-described duty ratio correction as a correction for the common potential shift, whereby the surface of the display panel 10 is corrected. The variation in the progress speed of the deterioration is further reduced.

  FIG. 19 is a block diagram illustrating detailed configurations of the control circuit 52 and the display data processing circuit 54 according to the third embodiment. As shown in the figure, the control circuit 52 includes a common potential deviation amount storage unit 520 that stores a maximum deviation amount LCmax having the largest common potential deviation amount and a minimum deviation amount LCmin having the smallest common potential deviation amount, and a register setting unit 521. And a timing generation unit 522. The display data processing circuit 54 includes a frame memory 541 and an image adjustment unit 542.

  The register setting unit 521 reads the common potential shift amount of each pixel from the common potential shift amount storage unit 520, and specifies the maximum shift amount LCmax having the largest common potential shift amount and the minimum shift amount LCmin having the smallest common potential shift amount. These are set in the registers of the timing generation unit 522 and the image adjustment unit 542. The timing generation unit 522 controls the timing of reading the display data Video from the frame memory 541 and generates the start pulse Dy based on the maximum deviation amount LCmax and the minimum deviation amount LCmin set by the register setting unit 521. Thereby, the duty ratio which is a ratio between the positive polarity drive period and the negative polarity drive period is adjusted.

In addition, the timing generation unit 522 outputs a synchronization signal indicating the read timing of the display data Video to the image adjustment unit 542. The image adjustment unit 542 corrects the display data Video output from the frame memory 541 based on the maximum shift amount LCmax and the minimum shift amount LCmin supplied from the register setting unit 521, and outputs the correction data to the D / A conversion circuit 56. . Specifically, the image adjustment unit 542 is a position other than the reference position for duty ratio correction in each drive period (for example, in the example illustrated in FIGS. 14 and 20, the positions A and B in the periods 0 to t1, and the periods t1 to t2). The display data Video is corrected for the positions B and C, the positions A and B in the periods t2 to t3, and the positions B and C in the periods t3 to t4). Thereby, as shown in FIG. 20, the deviation of the area values for the positions A, B, and C in each driving period is eliminated.
In other words, the product of the voltage applied to the liquid crystal at each position of the common electrode 108 and the length of the positive drive period during the positive polarity driving period, and the voltage applied to the liquid crystal at each position of the common electrode 108 The display data Video is corrected so that the value of the product with the length of the negative drive period approaches.

As shown in FIG. 20, in order to eliminate the deviation of the area values for the positions A, B, and C in each driving period, the image adjustment unit 542 has the correction effect by the duty ratio correction and the potential of the display data Video. It is necessary to correct the potential of the display data Video so that the sum of the correction effects by the correction is constant at each position.
According to the third embodiment, the progress of deterioration in the surface of the display panel 10 is further suppressed, and if the effect of suppressing the display defect in the display panel 10 is different, the duty ratio correction and the correction of the potential of the display data are performed. By using together, generation | occurrence | production of the display defect resulting from a specific cause is suppressed.

[Application example]
The liquid crystal device 1 exemplified in the embodiment described above can be used in various electronic devices. FIG. 21 is a schematic diagram of a projection display device (three-plate projector) 4000 to which the liquid crystal device 1 is applied. The projection display device 4000 includes three liquid crystal devices 1 (1R, 1G, 1B) corresponding to different display colors (red, green, blue). The illumination optical system 4001 supplies the red component r of the light emitted from the illumination device (light source) 4002 to the liquid crystal device 1R, the green component g to the liquid crystal device 1G, and the blue component b to the liquid crystal device 1B. . Each liquid crystal device 1 functions as a light modulator (light valve) that modulates each monochromatic light supplied from the illumination optical system 4001 in accordance with a display image. The projection optical system 4003 synthesizes the emitted light from each liquid crystal device 1 and projects it on the projection surface 4004.

[Modification]
The present invention is not limited to the above-described embodiments, and for example, various modifications described below are possible. Moreover, it is also possible to combine each embodiment and each modification suitably.
(1) Modification 1
In each of the above-described embodiments, the area value that is the product of the voltage applied to the liquid crystal at the position C of the common electrode 108 at which the common potential shift is minimized and the length of the positive drive period, and the position C The first drive in which the length of the positive drive period and the length of the positive drive period are set so that the area value of the negative drive period approaches (preferably equal), and the common electrode 108 that maximizes the common potential deviation. The length of the positive polarity drive period and the length of the positive polarity drive period are set so that the area value of the positive polarity drive period at the position A and the area value of the negative polarity drive period at the position A are close (preferably equal). The display panel 10 was operated by switching to the second drive. That is, paying attention to the minimum and maximum common potential deviation, the duty ratio, which is the ratio of the length of the positive drive period to the length of the positive drive period, is switched. The present invention is not limited to this, and the duty ratio is set such that the area value of the positive polarity driving period and the area value of the negative polarity driving period at the first position of the common electrode 108 are close (preferably equal). And the second drive having a duty ratio set so that the area value of the positive polarity driving period and the area value of the negative polarity driving period at the second position of the common electrode 108 are close (preferably equal). And the display panel 10 may be operated. Even in this case, the effect of correcting the duty ratio is made uniform in the plane of the liquid crystal panel as compared with the case where driving with the duty ratio corrected based on the potential at one position is executed. Accordingly, the direct current component applied to the liquid crystal is reduced by correcting the duty ratio, and the degree of reduction is also made uniform in the plane of the liquid crystal panel as compared with the prior art. Thereby, the variation in the progress of the deterioration of the liquid crystal in the surface of the display panel 10 is also reduced, and the product life is increased.

(2) Modification 2
In each of the above-described embodiments, the length of the positive polarity driving period and the length of the positive polarity driving period are set according to the common potential deviation amount. This is because the first position of the common electrode 108 (preferably the common potential deviation is minimum). The duty ratio may be determined on the basis of the first potential at the position of the common electrode 108, and the duty ratio may be determined based on the second potential of the common electrode 108 at the second position (preferably the position where the common potential shift is maximized). The common potential deviation amount represents a deviation between a reference value and a potential at a predetermined position on the common electrode 108, and the reference value is fixed. Therefore, it is equivalent to determine the duty ratio according to the common potential deviation amount at the predetermined position and to determine the duty ratio based on the potential of the common electrode 108 at the predetermined position.

(3) Modification 3
In each of the above-described embodiments, it is assumed that the common potential deviation amount of the common electrode 108 is measured in advance, but the present invention is not limited to this, and the common potential deviation amount is measured. There may be.
FIG. 22 is a block diagram of a liquid crystal device according to the third modification. The liquid crystal device 1 is the same as the liquid crystal device 1 of the first embodiment shown in FIG. 1 except that the common electrode potential specifying unit 70 is provided instead of the duty ratio setting storage unit 83 and the control circuit 52 includes a ROM 52r. It is constituted similarly.
The common electrode potential specifying unit 70 specifies voltages at a plurality of positions in the common electrode 108 to which the common potential LCcom is applied. For example, when the liquid crystal device 1 is a projector, the common electrode potential specifying unit 70 includes an imaging device 71 and an analysis unit 72. The imaging device 71 captures an image of the display panel 10 projected on a screen (not shown), generates image data, and outputs the image data to the analysis unit 72. The analysis unit 72 analyzes the image data generated by the imaging device 71 and identifies the common potential deviation amount at a plurality of positions in the common electrode 108. In this example, the maximum deviation amount LCmax and the minimum deviation amount LCmin are specified.
As a technique for specifying the potential at each position of the common electrode 108 included in the liquid crystal panel based on the image of the display panel 10, a conventional technique well known to those skilled in the art may be used.

The control circuit 52 sets a common potential deviation amount, a set value (start pulse Dyb) that specifies a duty ratio that is determined so that the area value of the positive polarity driving period and the area value of the negative polarity driving period are close (preferably equal). ROM (Read Only Memory) 52r for storing the output value in association with each other.
The control circuit 52 reads the setting values associated with the maximum deviation amount LCmax and the minimum deviation amount LCmin acquired by the common electrode potential specifying unit 70 from the ROM 52r, and sets the duty ratio according to the setting values.
According to the third modification, even if the potential distribution of the common electrode 108 changes due to secular change, the duty ratio can be corrected following this, so that the product life can be further improved.

(4) Modification 4
In each of the embodiments and the modifications described above, a period in which the grayscale potential supplied to the data line with the common potential as a reference is a high potential side is a positive polarity driving period, and a period in which the gradation potential is a low potential side is a negative polarity driving period. However, the present invention is not limited to this, and the period in which the gradation potential supplied to the data line is on the high potential side with reference to the predetermined potential is the positive drive period, and the period in which the gradation potential is on the low potential side. It may be a negative drive period.
In the embodiment described above, the common potential LCcom has been described on the assumption that the common potential LCcom is set to coincide with the central potential of the gradation potential supplied to the data line. However, the common potential LCcom does not necessarily match the central potential of the gradation potential. It is not necessary to set the value of the common potential LCcom.
For example, in the case where the TFT 116 serving as a switching element is an n-channel transistor, when considering the occurrence of a phenomenon in which the potential of the pixel electrode 118 drops in synchronization with the off state (a phenomenon called field-through or push-down), Therefore, the value of the common potential LCcom is set so that the center potential of the gradation potential is higher than the common potential LCcom. That is, the value of the common potential LCcom may be set as appropriate according to various conditions, and does not need to be set to coincide with the center potential of the gradation potential. Note that the above-described field-through (push-down) phenomenon is considered to be caused by various parasitic capacitances related to the TFT 116.
Further, the above-described embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements. For example, even if some constituent requirements are deleted from all the constituent requirements shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and the effect described in the column of the effect of the invention can be achieved. In the case of being obtained, a configuration from which this configuration requirement is deleted can also be extracted as an invention.

DESCRIPTION OF SYMBOLS 1 ... Liquid crystal device, 10 ... Display panel, 105 ... Liquid crystal, 107 ... Capacitor line, 108 ... Common electrode, 109 ... Storage capacitor, 110 ... Pixel, 112 ... Scan line, 114 ... Data line, 116 ... TFT, 118 ... Pixel Electrode, 120 ... Liquid crystal capacitor, 130 ... Scan line driving circuit, 140 ... Data line driving circuit, 142 ... Sampling signal output circuit, 171 ... Image signal line, 50 ... Processing circuit, 52 ... Control circuit, 521 ... Register setting unit, 522... Timing generator 54. Display data processing circuit 541 Frame memory 542 Image adjuster 56 Conversion circuit 70 Common electrode potential specifying unit 71 Imaging device 72 Analyzing unit 81 Common Potential storage unit, 83... Duty ratio setting storage unit.

Claims (6)

A pixel electrode provided at the intersection of the scanning line and the data line, to which a grayscale potential is applied via the data line, and a common potential applied to the pixel electrode via a liquid crystal and a common potential applied A liquid crystal panel comprising electrodes,
A positive polarity driving period in which a potential higher than a predetermined potential is supplied to the data line as the gradation potential, and a negative polarity driving in which a potential lower than the predetermined potential is supplied to the data line as the gradation potential. A drive unit for switching the period and driving the liquid crystal panel;
A control unit for controlling the drive unit,
The product of the voltage applied to the liquid crystal at the first position of the common electrode in the positive polarity driving period and the length of the positive polarity driving period, and the liquid crystal at the first position in the negative polarity driving period. The length of the positive polarity driving period and the negative polarity driving period are based on the first potential which is the potential of the first position so that the product value of the applied voltage and the length of the negative polarity driving period approaches. The drive in which the length is set as the first drive,
The product of the voltage applied to the liquid crystal at the second position of the common electrode in the positive polarity driving period and the length of the positive polarity driving period, and the liquid crystal at the second position in the negative polarity driving period. Based on the second potential that is the potential at the second position, the length of the positive polarity driving period and the negative polarity driving so that the value of the product of the applied voltage and the length of the negative polarity driving period approaches. When the drive that sets the length of the period is the second drive,
The control unit controls the driving unit to perform at least the first driving and the second driving;
An electro-optical device. A first ratio that is a ratio of a length of the positive polarity driving period corresponding to the first driving and a length of the negative polarity driving period; and a length of the positive polarity driving period corresponding to the second driving and the negative polarity A storage unit storing a second ratio that is a ratio to the length of the sex drive period;
The control unit reads the first ratio and the second ratio stored in the storage unit, and controls the drive unit to execute at least the first drive and the second drive.
The electro-optical device according to claim 1. A potential included in a range above the first potential and below the second potential is defined as a third potential,
When the third potential is applied to the previous common electrode, the product value of the voltage applied to the liquid crystal in the positive drive period and the length of the positive drive period, and the negative drive period The driving in which the length of the positive polarity driving period and the length of the negative polarity driving period are set so as to approach the product value of the voltage applied to the liquid crystal and the length of the negative polarity driving period is the third driving. When
The control unit controls the drive unit to execute at least the first drive, the second drive, and the third drive;
The electro-optical device according to claim 1. The first position is a position where the potential distributed to the common electrode is minimized, and the second position is a position where the potential distributed to the common electrode is maximized. 4. The electro-optical device according to claim 1.   The said control part correct | amends the said gradation electric potential according to the ratio of the length of the said positive polarity drive period and the length of the said negative polarity drive period, The any one of the Claims 1 thru | or 4 characterized by the above-mentioned. The electro-optical device according to Item.   An electronic apparatus comprising the electro-optical device according to any one of claims 1 to 6.