JP2015069619A - Image processing apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the size of a descriptor when image data is processed by use of a block descriptor and a band descriptor.SOLUTION: Image data is processed by use of m×n block areas BL formed by arranging m block areas BL in a main-scanning direction and n block areas BL in a sub-scanning direction, and a plurality of band areas BA formed by arranging, in the sub-scanning direction D2, band areas BA having larger number of pixels in the main-scanning direction D1 than in the block areas BL 1. A plurality of band descriptors are allocated to each of the band areas BA. The block descriptors allocated to an arbitrary block area BL in the m×n block areas BL are generated by combining the descriptors in the main-scanning direction and the descriptors in the sub-scanning direction.

Description

  The present invention relates to processing of image data using a descriptor.

  When image data (for example, image data obtained by reading a document with a scanner) is stored in the main memory, if the image data is large, a storage area of continuous addresses cannot be secured. Therefore, the memory space is efficiently used by dividing the image data into a plurality of pieces and storing them in a storage area where the addresses are discontinuous. In this case, a descriptor is used so that data stored in storage areas with discontinuous addresses can be connected and restored to the original image data (see, for example, Patent Document 1).

  In order to efficiently use the memory space, a large number (for example, thousands) of descriptors are assigned to one image data. If the access time to the target descriptor can be shortened, the image data can be processed efficiently (for example, the access time to the data of each pixel stored in the main memory).

  Therefore, the following technique has been proposed (see, for example, Patent Document 2). A plurality of block descriptors are assigned to each of a plurality of block areas arranged in the main scanning direction and the sub-scanning direction. A plurality of band descriptors are respectively assigned to a plurality of band regions arranged in the sub-scanning direction. By combining the block descriptor and the band descriptor, it is possible to shorten the access time to the target band descriptor.

Japanese Patent Laying-Open No. 2005-250996 (paragraphs 0023 to 0026, FIGS. 2 and 3) JP 2011-248447 A (summary)

  The plurality of block descriptors each have coordinate values in the main scanning direction and sub-scanning direction for the first pixel of the allocated block area, and the number of pixels in the main scanning direction and sub-scanning direction for the allocated block area. Contains information. These pieces of information are duplicated between the block descriptors and are redundant.

  An object of the present invention is to provide an image processing apparatus capable of reducing the size of a descriptor when image data is processed using a block descriptor and a band descriptor.

  An image processing apparatus according to the present invention that achieves the above object includes m × n block areas in which m block areas are arranged in the main scanning direction and n block areas are arranged in the sub scanning direction, and the number of pixels is larger than that of the block areas. An image processing apparatus that processes image data using a plurality of band regions in which a large number of band regions in the main scanning direction are arranged in the sub-scanning direction, wherein a plurality of image data stored in the main memory are stored in the main memory. A processing unit that divides the data into a plurality of band region data corresponding to each of the band regions, divides the band region data into a plurality of divided data, and stores the data in the main memory with different addresses. A division processing unit that executes processing for each of the plurality of band region data, and a plurality of bands assigned to each of the plurality of band regions. A processing unit for processing a descriptor, wherein when the image data is stored in the main memory, a plurality of the band descriptors assigned to the band region corresponding to the band region data A plurality of band descriptors including a process of adding to the main memory an address on the main memory of the data of the first pixel of each of the divided data and dividing data information indicating the number of pixels of each of the plurality of divided data Each of the plurality of band descriptors is ordered, and each of the plurality of band descriptors stored in the main memory is in the following order: Add the band descriptor on the main memory An address on the main memory of the band descriptor assigned to the band area including the head pixel of the block area is a band descriptor-related address, and further, the head pixel of the block area Are provided for the block region having the same coordinate value in the main scanning direction and the number of pixels in the main scanning direction of the block region, and include m pieces of information including the coordinate value and the number of pixels common in the main scanning direction. The main scanning direction descriptor, the coordinate value in the sub-scanning direction of the first pixel of the block region, and the number of pixels in the sub-scanning direction of the block region are provided for the block region, and the common in the sub-scanning direction. Contains information on coordinate values, the number of pixels, and the band descriptor association address A main / sub-scanning direction descriptor processing unit that stores in a predetermined storage area when the image data is stored in the main memory, and the sub-scanning direction descriptor, and stores in the storage area A block descriptor assigned to an arbitrary block area of the m × n block areas is generated by combining the m main scanning direction descriptors and the n sub-scanning direction descriptors. A block descriptor generation unit.

  In the image processing apparatus according to the present invention, a block descriptor assigned to an arbitrary block area of m × n block areas by combining m main scanning direction descriptors and n sub-scanning direction descriptors. Is generated. Accordingly, since it is not necessary to prepare m × n block descriptors in advance, the descriptor size (data amount) can be reduced.

  The sub-scanning direction descriptor constituting the block descriptor includes information on a band descriptor association address. Therefore, the address of the band descriptor assigned to the band area including the first pixel of the block area can be known from the block descriptor assigned to the block area.

  Each of the plurality of band descriptors stored in the main memory includes the address information on the main memory of the next band descriptor, so that the target band descriptor can be obtained without using the block descriptor. Access to. However, in this case, the band descriptors must be searched in order from the first band descriptor. According to the present invention, by using a block descriptor, it is possible to start a search from an intermediate band descriptor and access a target band descriptor. Therefore, the access time to the band descriptor can be shortened.

  In the above configuration, the division processing unit, the band descriptor processing unit, the block descriptor generation unit, and an SRAM in which m main scanning direction descriptors and n sub scanning direction descriptors are stored Including the ASIC including the bus, and the bus connecting the ASIC and the main memory, the storage area is the SRAM, and the block descriptor generation unit includes the m pieces of the pieces of data stored in the SRAM. Holding each address of the main scanning direction descriptor and each address of the n sub-scanning direction descriptors, reading out the main scanning direction descriptor and the sub-scanning direction descriptor from the SRAM; Allocated to an arbitrary block area of the n block areas To generate the block descriptor that.

  The total size of the m main scanning direction descriptors and the n sub scanning direction descriptors is considerably smaller than the total size of the m × n block descriptors. Can be stored. Thereby, it is not necessary to include the address information on the main memory of the main scanning direction descriptor in the order of reading next in each of the m main scanning direction descriptors. Similarly, it is not necessary to include the address information on the main memory of the sub-scanning direction descriptor in the next reading order in each of the n sub-scanning direction descriptors. Accordingly, it is possible to further reduce the size of all of the m main scanning direction descriptors and the n sub scanning direction descriptors.

  In the above configuration, the number of pixels and the coordinate value included in the main scanning direction descriptor and the sub scanning direction descriptor constituting each block descriptor generated by the block descriptor generation unit are allocated With respect to an image formed based on the image data stored in the main memory, the block area information is information on the number of pixels in the main scanning direction and the sub-scanning direction and the coordinates of the leading pixel for the block area. A coordinate calculation unit that calculates the coordinates in the main scanning direction and the sub-scanning direction in which the second (N is a positive integer) pixel is calculated based on the number of pixels in the main scanning direction of the image, and the coordinate calculation unit. The coordinates of the Nth pixel and each block data generated by the block descriptor generator Based on the block area information included in the crypter, the block area specifying unit for specifying the block area to which the Nth pixel belongs among the m × n block areas and the block area specifying unit are specified. A band descriptor reading unit for reading out the band descriptor stored in the band descriptor association address included in the block descriptor from the main memory for the block descriptor assigned to the block area; Prepare.

  According to this configuration, when the Nth pixel data stored in the main memory is accessed using the band descriptor, the Nth pixel data is allocated to the band region including the first pixel of the block region to which the Nth pixel belongs. You can start with a band descriptor.

  Here, when the pixels arranged in the main scanning direction in the image are rows, the Nth pixel is counted from the first pixel in the first row to the last pixel in the first row, and then the first pixel in the second row. To the last pixel in the second row, and the third and subsequent rows are counted in the same manner.

  According to the present invention, when image data is processed using a block descriptor and a band descriptor, the size of the descriptor can be reduced.

It is a block diagram which shows the hardware constitutions of the image processing apparatus which concerns on one Embodiment of this invention. It is a conceptual diagram of the block area | region and band area | region used by this embodiment. FIG. 3 is a diagram showing a plurality of band descriptors assigned to each of a plurality of band regions shown in FIG. 2. It is a figure which shows four (m pieces) main scanning direction descriptors. It is a figure which shows four (n pieces) subscanning direction descriptors. It is a figure which shows the band area data M22 which is image data corresponding to band area BA22 among the image data stored in a main memory. It is a flowchart explaining the process which stores image data in the main memory using the image processing apparatus which concerns on this embodiment. It is a flowchart explaining the access to the data of the Nth pixel contained in the image data stored in the main memory using the image processing apparatus which concerns on this embodiment. It is a block diagram which shows the hardware constitutions of the image processing apparatus which concerns on the modification of this embodiment.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing a hardware configuration of an image processing apparatus 1 according to an embodiment of the present invention. The image processing apparatus 1 is applied to a multifunction machine, a copier, and the like, and includes a CPU (Central Processing Unit) 3, a main memory 7, a read-only memory 9, and an ASIC (Application Specific Integrated Circuit) 11. These are connected by a bus 13. Further, the image processing apparatus 1 includes a line sensor 5 and is connected to the ASIC 11 through a dedicated bus 14.

  The CPU 3 executes control necessary for operating the image processing apparatus 1 on the hardware constituting the image processing apparatus 1. The line sensor 5 is an element constituting the scanner of the image processing apparatus 1, reads an image of a document, and outputs image data. The line sensor 5 is realized by, for example, a CCD (Charge Coupled Device) sensor.

  The main memory 7 is a RAM (Random Access Memory), and is used for temporary storage of data generated during execution of software, storage of application software, and the like. The main memory 7 is realized by, for example, a DRAM (Dynamic Random Access Memory).

  The read-only memory 9 is a ROM (Read Only Memory) and stores software and the like necessary for controlling the operation of the image processing apparatus 1. The read-only memory 9 is realized by a flash memory or the like.

  The ASIC 11 is dedicated to image processing and is used for various types of processing (filters and the like) of image data. FIG. 1 shows functional blocks related to the present embodiment. The ASIC 11 includes a division processing unit 21, a band descriptor processing unit 23, a main / sub scanning direction descriptor processing unit 25, and a pixel data access unit 27. As a premise for understanding these, a band region, a block region, a band descriptor, a main scanning direction descriptor, and a sub scanning direction descriptor will be described.

  FIG. 2 is a conceptual diagram of a block area and a band area used in this embodiment. A plurality of, for example, 16 block regions BL1 to BL16 are arranged in the main scanning direction D1 and the sub-scanning direction D2. When it is necessary to distinguish a plurality of block areas, they are described as block areas BL1 to BL16, and when it is not necessary to distinguish between them, they are described as block areas BL. Four block areas BL are arranged in the main scanning direction D1, and four block areas BL are arranged in the sub scanning direction D2. The number of pixels in the main scanning direction D1 of each block region BL is the same, and the number of pixels in the sub-scanning direction D2 of each block region BL is also the same. Therefore, the number of pixels (size) in each block region BL is the same. In the present embodiment, the main scanning direction D1 can also be referred to as the x direction and the sub scanning direction D2 as the y direction.

  As described above, m × n block regions BL in which m block regions BL are arranged in the main scanning direction and n block regions BL are provided in the sub scanning direction are provided. m and n are integers of 2 or more. m and n may be equal or different.

  A plurality of band areas BA are arranged side by side along the sub-scanning direction D2. When it is necessary to distinguish a plurality of band areas, they are described as band areas BA1, BA2,..., And when it is not necessary to distinguish between them, they are described as band areas BA.

  The band area BA is a band-like area extending in the main scanning direction D1, and has more pixels in the main scanning direction D1 than the block area BL. Of the image data output from the line sensor 5, image data obtained by scanning a predetermined number of scanning lines (for example, 64 scanning lines) corresponds to one band area BA. Accordingly, the number of pixels in the main scanning direction D1 of the band area BA is the same as the number of pixels in the main scanning direction D1 of the image data, and the number of pixels in the sub-scanning direction D2 of the band area BA is equal to the predetermined scanning line. It is the same as the number (for example, 64).

  The band area BA is a band-shaped area extending in the main scanning direction D1, and may have a larger number of pixels in the main scanning direction D1 and a smaller number of pixels in the sub-scanning direction D2 than the block area BL.

  The image processing apparatus 1 processes image data using m × n block areas BL and a plurality of band areas BA.

  FIG. 3 is a diagram showing a plurality of band descriptors assigned to each of the plurality of band areas BA shown in FIG. When it is necessary to distinguish a plurality of band descriptors, they are described as band descriptors BAD1, BAD2,..., And when there is no need to distinguish between them, they are described as band descriptors BAD.

  The order of the plurality of band descriptors BAD is determined according to the order in which the plurality of band areas BA are arranged in the sub-scanning direction D2. For example, the first band descriptor BAD1 is a band descriptor assigned to the band area BA1, the second band descriptor BAD2 is a band descriptor assigned to the band area BA2, and the 22nd The band descriptor BAD22 is a band descriptor assigned to the band area BA22.

  When the image data is stored in the main memory 7, the plurality of band descriptors BAD are stored in the main memory 7. For each of the plurality of band descriptors BAD, an address on the main memory 7 is determined in advance. For example, an address Add51 on the main memory 7 is assigned in advance to the band descriptor BAD1 assigned to the band area BA1.

  Each band descriptor BAD includes the address information on the main memory 7 of the band descriptor BAD in the next order, and the divided data information (the address on the main memory 7 of the data of the first pixel of each of a plurality of divided data). Information and information on the number of pixels of each of the plurality of divided data). The divided data information will be described later.

  FIG. 4 is a diagram showing the main scanning direction descriptor MSD. When it is necessary to distinguish the four main scanning direction descriptors MSD, they are described as main scanning direction descriptors MSD1 to MSD4, and when it is not necessary to distinguish them, they are described as main scanning direction descriptors MSD. FIG. 5 is a diagram showing the sub-scanning direction descriptor VSD. When it is necessary to distinguish the four sub-scanning direction descriptors VSD, they are described as sub-scanning direction descriptors VSD1 to VSD4, and when they are not necessary to be distinguished, they are described as sub-scanning direction descriptors VSD.

  By combining the four main scanning direction descriptors MSD and the four sub scanning direction descriptors VSD, block descriptors assigned to the 16 block regions BL are generated. For example, a combination of the main scanning direction descriptor MSD1 and the sub scanning direction descriptor VSD1 becomes a block descriptor assigned to the block area BL1. A combination of the main scanning direction descriptor MSD1 and the sub scanning direction descriptor VSD2 becomes a block descriptor assigned to the block area BL5. A combination of the main scanning direction descriptor MSD4 and the sub scanning direction descriptor VSD4 is a block descriptor assigned to the block area BL16.

  The main scanning direction descriptor MSD will be described in detail. The main scanning direction descriptor MSD is provided for the block region BL in which the coordinate value in the main scanning direction D1 of the first pixel of the block region BL and the number of pixels in the main scanning direction D1 of the block region BL are common, and the main scanning direction D1. The information on the coordinate value and the number of pixels common to each other is included. The coordinate value of the first pixel in the main scanning direction D1 refers to the value in the main scanning direction D1 among the coordinates of the first pixel P in the block region BL5 as described in the block region BL5 shown in FIG.

  Referring to FIG. 2, the block areas BL1, BL5, BL9, and BL13 have the same coordinate value in the main scanning direction D1 and the number of pixels in the main scanning direction D1 of the top pixel. Accordingly, a main scanning direction descriptor MSD1 is provided for the block regions BL1, BL5, BL9, and BL13.

  In the block regions BL2, BL6, BL10, and BL14, the coordinate value of the leading pixel in the main scanning direction D1 and the number of pixels in the main scanning direction D1 are common. Therefore, the main scanning direction descriptor MSD2 is provided for the block regions BL2, BL6, BL10, and BL14.

  Similarly, a main scanning direction descriptor MSD3 is provided for the block regions BL3, BL7, BL11, and BL15, and a main scanning direction descriptor MSD4 is provided for the block regions BL4, BL8, BL12, and BL16. ing.

  In the present embodiment, since four block regions BL are arranged in the main scanning direction D1, the number of main scanning direction descriptors MSD is four. Therefore, if m block regions BL are arranged in the main scanning direction D1, the number of main scanning direction descriptors MSD is m.

  When the image data is stored in the main memory 7, m main scanning direction descriptors MSD are generated and stored in the main memory 7. An address on the main memory 7 is assigned in advance for each of the m main scanning direction descriptors MSD. For example, the address Addx31 on the main memory 7 is assigned in advance to the main scanning direction descriptor MSD1.

  Each of the m main scanning direction descriptors MSD includes address information on the main memory 7 of the next main scanning direction descriptor MSD, the coordinate value of the main pixel in the main scanning direction D1, and the main scanning direction D1. Including the number of pixels. Such information will be described by taking the main scanning direction descriptor MSD1 as an example. The address on the main memory 7 of the main scanning direction descriptor MSD in the next order is the address Addx32 on the main memory 7 of the main scanning direction descriptor MSD2.

  The coordinate value of the first pixel in the main scanning direction D1 is the coordinate value of the first pixel in the block region BL1 in the main scanning direction D1. The number of pixels in the main scanning direction D1 is the number of pixels in the main scanning direction D1 of the block region BL1. In the present embodiment, the number of pixels in the main scanning direction D1 of the block regions BL1 to BL16 is the same. However, in the main scanning direction D1, the number of pixels in the block region BL1 (block regions BL5, BL9, BL13), the number of pixels in the block region BL2 (block regions BL6, BL10, BL14), and the block region BL3 (block regions BL7, BL11, The number of pixels of BL15) and the number of pixels of the block region BL4 (block regions BL8, BL12, BL16) may be different.

  The sub-scanning direction descriptor VSD will be described in detail. The sub-scanning direction descriptor VSD is provided for the block region BL in which the coordinate value in the sub-scanning direction D2 of the first pixel of the block region BL and the number of pixels in the sub-scanning direction D2 of the block region BL are common, and the sub-scanning direction D2 The information on the coordinate value and the number of pixels common to each other is included. The coordinate value of the first pixel in the sub-scanning direction D2 indicates the value in the sub-scanning direction D2 among the coordinates of the first pixel P of the block region BL5, as described in the block region BL5 shown in FIG.

  Referring to FIG. 2, the block areas BL1, BL2, BL3, and BL4 have the same coordinate value in the sub-scanning direction D2 and the number of pixels in the sub-scanning direction D2 of the top pixel. Therefore, the sub-scanning direction descriptor VSD1 is provided for the block areas BL1, BL2, BL3, and BL4.

  In the block regions BL5, BL6, BL7, and BL8, the coordinate value of the top pixel in the sub-scanning direction D2 and the number of pixels in the sub-scanning direction D2 are common. Accordingly, the sub-scanning direction descriptor VSD2 is provided for the block areas BL5, BL6, BL7, and BL8.

  Similarly, a sub-scanning direction descriptor VSD3 is provided for the block areas BL9, BL10, BL11, and BL12, and a sub-scanning direction descriptor VSD4 is provided for the block areas BL13, BL14, BL15, and BL16. ing.

  In the present embodiment, since the four block areas BL are arranged in the sub-scanning direction D2, the number of sub-scanning direction descriptors VSD is four. Therefore, if n block regions BL are arranged in the sub-scanning direction D2, the number of sub-scanning direction descriptors VSD is n.

  When image data is stored in the main memory 7, n sub-scanning direction descriptors VSD are generated and stored in the main memory 7. An address on the main memory 7 is assigned in advance for each of the n sub-scanning direction descriptors VSD. For example, the address Addy31 on the main memory 7 is assigned in advance to the sub-scanning direction descriptor VSD1.

  Each of the n sub-scanning direction descriptors VSD includes address information on the main memory 7 of the next sub-scanning direction descriptor VSD, coordinate values of the first pixel in the sub-scanning direction D2, and pixels in the sub-scanning direction D2. Information on the number and band descriptor association address. Such information will be described using the sub-scanning direction descriptor VSD1 as an example. The address on the main memory 7 of the sub-scanning direction descriptor VSD in the next order is the address Addy32 on the main memory 7 of the sub-scanning direction descriptor VSD2.

  The coordinate value of the first pixel in the sub-scanning direction D2 is the coordinate value of the first pixel in the block region BL1 in the sub-scanning direction D2. The number of pixels in the sub-scanning direction D2 is the number of pixels in the sub-scanning direction D2 of the block region BL1. In the present embodiment, the number of pixels in the sub-scanning direction D2 of the block regions BL1 to BL16 is the same. However, in the sub-scanning direction D2, the number of pixels in the block area BL1 (block areas BL2, BL3, BL4), the number of pixels in the block area BL5 (block areas BL6, BL7, BL8), and the block area BL9 (block areas BL10, BL11, The number of pixels of BL12) and the number of pixels of the block region BL13 (block regions BL14, BL15, BL16) may be different.

  The band descriptor association address information is address information on the main memory 7 of the band descriptor BAD assigned to the band area BA including the first pixel of the block area BL. More specifically, as shown in FIG. 2, since the first pixel P of the block area BL5 is located in the band area BA22, the band descriptor BAD22 (FIG. 3) assigned to the band area BA22 on the main memory 7 It means the address Add72. The above is the description of the block area BL, the band area BA, the band descriptor BAD, the main scanning direction descriptor MSD, and the sub scanning direction descriptor VSD.

  The division processing unit 21 included in the ASIC 11 illustrated in FIG. 1 divides the image data stored in the main memory 7 into a plurality of band area data corresponding to each of the plurality of band areas BA illustrated in FIG. Part. The division processing unit 21 performs a process of dividing the band area data into a plurality of divided data and storing the data in the main memory 7 with different addresses for each of the plurality of band area data.

  The processing in the division processing unit 21 will be described using the band area BA22 as an example. FIG. 6 is a diagram showing band area data M22 which is image data corresponding to the band area BA22 among the image data stored in the main memory 7. The band area data corresponds to the band area BA. For example, the band area data M1 (not shown) corresponds to the band area BA1, and the band area data M2 (not shown) corresponds to the band area BA2. When it is necessary to distinguish a plurality of band area data, it is described as band area data M1, M2,..., And when it is not necessary to distinguish, it is described as band area data M.

  The division processing unit 21 divides the band area data M22 into a plurality of divided data, for example, five divided data m1 to m5, and stores them in the main memory 7 with different addresses. As described above, by dividing the image data finely and storing the data in empty addresses in the main memory 7, the memory space of the main memory 7 can be used effectively.

  The band descriptor processing unit 23 processes a plurality of band descriptors BAD assigned to each of the plurality of band areas BA shown in FIG. Specifically, when the image data is stored in the main memory 7, the band descriptor processing unit 23 performs divided data on the band descriptor BAD assigned to the band area BA corresponding to the band area data M. The process of adding information and storing it in the main memory 7 is executed in each of the plurality of band descriptors BAD.

  As described above, when the image data is stored in the main memory 7, the band descriptor processing unit 23 generates the band descriptor BAD that does not include the divided data information, and adds the divided data information to the main memory 7. 7 is stored.

  The divided data information is information indicating the address on the main memory 7 of the data of the first pixel of each of the plurality of divided data and the number of pixels of each of the plurality of divided data. This will be described using the band region data M22 shown in FIG. 6 as an example. Let the top pixels of the divided data m1 to m5 be the top pixels p1 to p5, respectively. Here, the leading pixel p1 of the divided data m1 matches the leading pixel P of the block area BL5 shown in FIG. 2, and matches the leading pixel of the band area BA22 (not shown).

  The divided data information of the band area data M22 includes the address on the main memory 7 where the data of the first pixel p1 of the divided data m1 is stored, the number of pixels in the area corresponding to the divided data m1 (for example, 10000), and the divided data m2 Stores the address of the main memory 7 where the data of the first pixel p2 is stored and the number of pixels in the area corresponding to the divided data m2 (for example, 20000),..., The data of the first pixel p5 of the divided data m5. An address on the main memory 7 and the number of pixels in an area corresponding to the divided data m5 are configured.

  As shown in FIG. 3, each band descriptor BAD has address information and divided data information on the main memory 7 of the band descriptor in the next order. Therefore, the band descriptor BAD1 is read out, and based on the divided data information included in the band descriptor BAD1, a plurality of pieces of divided data are connected to form band area data M1, and then the band descriptor BAD2 is read out to obtain the band data. Based on the divided data information included in the scripter BAD2, a plurality of pieces of divided data are connected to form the band area data M2, and the same processing is repeated for the remaining band descriptor BAD. The image data can be restored.

  The main / sub-scanning direction descriptor processing unit 25 shown in FIG. 1 includes four (m) main scanning direction descriptors MSD shown in FIG. 4 (n) sub-scanning direction descriptors VSD shown in FIG. 5 are generated and stored in the main memory 7 (an example of a storage area).

  The pixel data access unit 27 illustrated in FIG. 1 performs access processing to pixel data that is data of each pixel constituting an image, with respect to image data that is divided into divided data and stored in the main memory 7. The pixel data access unit 27 includes a main / sub-scanning direction descriptor reading unit 29, a block descriptor generation unit 31, a coordinate calculation unit 33, a block region specifying unit 35, a band descriptor reading unit 37, a band region specifying unit 41, a pixel A number calculation unit 43, a divided data specifying unit 45, and an address specifying unit 47 are provided.

  The main / sub scanning direction descriptor reading unit 29 reads the main scanning direction descriptor MSD and the sub scanning direction descriptor VSD stored in the main memory 7.

  The block descriptor generator 31 combines 16 (m × n) blocks by combining 4 (m) main scanning direction descriptors MSD and 4 (n) sub-scanning direction descriptors VSD. A block descriptor assigned to an arbitrary block area BL in the area BL is generated.

  For example, when generating a block descriptor assigned to the block region BL1, the block descriptor generating unit 31 sends the main scanning direction descriptor MSD1 and the sub scanning direction descriptor to the main / sub scanning direction descriptor reading unit 29. The VSD 1 is read from the main memory 7. A combination of the main scanning direction descriptor MSD1 and the sub scanning direction descriptor VSD1 is a block descriptor assigned to the block area BL1. Further, for example, when generating a block descriptor assigned to the block region BL5, the block descriptor generating unit 31 sends the main scanning direction descriptor MSD1 and the sub scanning direction to the main / sub scanning direction descriptor reading unit 29. A process of reading the descriptor VSD2 from the main memory 7 is performed. A combination of the main scanning direction descriptor MSD1 and the sub scanning direction descriptor VSD2 is a block descriptor assigned to the block area BL5.

  Each block descriptor includes block area information for the allocated block area BL. The block area information is information on the number of pixels in the main scanning direction and the sub-scanning direction and the coordinates of the top pixel for the block area BL. For example, in the case of the block region BL5, as described above, a combination of the main scanning direction descriptor MSD1 and the sub scanning direction descriptor VSD2 is a block descriptor. The coordinate value in the main scanning direction of the first pixel in the block region BL1, the number of pixels in the main scanning direction in the block region BL1, the coordinate value in the sub scanning direction of the first pixel in the block region BL5, and the pixel in the sub scanning direction of the block region BL5 The number becomes block area information.

  The coordinate calculation unit 33 calculates the coordinates in the main scanning direction D1 and the sub-scanning direction D2 for the pixels corresponding to the pixel data to be accessed. That is, the coordinate calculation unit 33 performs main scanning direction D1 and sub-scanning direction D2 in which the Nth pixel (N is a positive integer) is located in an image formed based on image data stored in the main memory 7. Are calculated based on the number of pixels in the main scanning direction D1 of the image.

  The block area specifying unit 35 specifies the block area BL to which the Nth pixel belongs. More specifically, the block area specifying unit 35 is based on the coordinates of the Nth pixel calculated by the coordinate calculation unit 33 and the block area information included in the block descriptor generated by the block descriptor generation unit 31. Thus, the block region BL to which the Nth pixel belongs is specified among the m × n block regions BL.

  The band descriptor reading unit 37, for the block descriptor assigned to the block area BL specified by the block area specifying unit 35, is stored in the band descriptor association address included in the block descriptor. BAD is read from the main memory 7.

  The band area specifying unit 41 specifies the band area BA to which the Nth pixel belongs among the plurality of band areas BA, and the position of the Nth pixel in the band area BA in the sub-scanning direction D2.

  The pixel number calculation unit 43 calculates the number of pixels from the first pixel to the Nth pixel of the band area BA to which the Nth pixel specified by the band area specifying unit 41 belongs.

  The divided data specifying unit 45 specifies divided data to which the data of the Nth pixel belongs among the plurality of divided data in the divided data information included in the band descriptor BAD read by the band descriptor reading unit 37.

  The address specifying unit 47 specifies the address on the main memory 7 of the Nth pixel data from the address on the main memory 7 of the data of the first pixel of the divided data specified by the divided data specifying unit 45.

  Next, processing for storing image data in the main memory 7 using the image processing apparatus 1 according to the present embodiment will be described. FIG. 7 is a flowchart for explaining this process. By scanning the document in the main scanning direction D1 by the line sensor 5 shown in FIG. 1 and reading the document one scanning line at a time, image data of the document is output from the line sensor 5 (step S1).

  The main / sub scanning direction descriptor processor 25 generates four main scanning direction descriptors MSD shown in FIG. 4 and four sub scanning direction descriptors VSD shown in FIG. The stored address is stored (step S3).

  In step S1, image data obtained by scanning a predetermined number of scanning lines (for example, 64 scanning lines) among the image data output from the line sensor 5 corresponds to the band region data M. The image data output from the line sensor 5 is sent to the division processing unit 21. When the band area data M1 (corresponding to the band area BA1) is accumulated in the buffer of the division processing unit 21, the division processing unit 21 divides the band area data M1 into a plurality of division data and sets the address to the main memory 7 differently. The process of storing is performed (step S5).

  The band descriptor processing unit 23 generates a band descriptor BAD1 that does not include the divided data information, adds the divided data information related to the plurality of divided data constituting the band area data M1, to the main memory 7 Store (step S7).

  The division processing unit 21 determines whether the next band area data M (here, band area data M2) is stored in the buffer of the division processing unit 21 (step S9). If the division processing unit 21 determines that the next band area data M is accumulated (Yes in step S9), the process returns to step S5. On the other hand, if the division processing unit 21 determines that the next band area data M is not accumulated (No in step S9), that is, the last band area data M is processed in steps S5 and S7. In this case, the process for storing the image data in the main memory 7 ends.

  As described above, according to the image processing apparatus 1 according to the present embodiment, when the image data is divided into divided data and stored in the main memory 7, four (m) main scanning direction descriptors MSD, Four (n) sub-scanning direction descriptors VSD and a plurality of band descriptors BAD are stored in the main memory 7. As shown in FIG. 5, the sub-scanning direction descriptor VSD constituting the block descriptor includes information on the band descriptor association address. Therefore, the address of the band descriptor BAD assigned to the band area BA including the first pixel of the block area BL can be known from the block descriptor assigned to the block area BL.

  Each of the plurality of band descriptors BAD stored in the main memory 7 includes address information on the main memory 7 of the band descriptor BAD of the next order, so that the purpose can be achieved without using a block descriptor. The band descriptor BAD can be accessed. However, in this case, the band descriptor BAD must be searched in order from the first band descriptor BAD. According to the present embodiment, by using a block descriptor, it is possible to start a search from an intermediate band descriptor BAD and access the target band descriptor BAD. Therefore, the access time to the band descriptor BAD can be shortened.

  Next, access to data of the Nth pixel (N is a positive integer) included in the image data stored in the main memory 7 will be described. FIG. 8 is a flowchart for explaining this access. Here, the Nth pixel is the 700,000th pixel, the number of pixels in the main scanning direction D1 of the image data (in other words, the number of pixels in the main scanning direction D1 of the band area BA) is 500, and the scanning line corresponding to the band area data M The number is 64.

  The coordinate calculation unit 33 uses the coordinates in the main scanning direction D1 and the sub-scanning direction D2 where the 700,000th pixel is located for the image formed by the image data stored in the main memory 7, and the main scanning direction D1 of the image data. Is calculated based on the number of pixels (500) (step S21).

700,000 ÷ 500 = 1400
1400 means that the coordinate (x coordinate) in the main scanning direction D1 is 0, and the coordinate (y coordinate) in the sub scanning direction D2 is 1400. Therefore, as shown in FIG. 2, the coordinates where the 700,000th pixel Q is located are (0, 1400).

  The block area specifying unit 35 determines in order from the block area BL1 which block area BL the pixel Q belongs to (step S23). The block descriptor generation unit 31 causes the main / sub scanning direction descriptor reading unit 29 to perform a process of reading the main scanning direction descriptor MSD1 and the sub scanning direction descriptor VSD1 from the main memory 7. A combination of the main scanning direction descriptor MSD1 and the sub scanning direction descriptor VSD1 is a block descriptor assigned to the block area BL1.

  According to this block descriptor, as shown in FIGS. 4 and 5, for the block region BL1, the coordinate value “0” of the top pixel in the main scanning direction, the coordinate value “0” of the top pixel in the sub scanning direction, The number of pixels in the scanning direction is “125”, and the number of pixels in the sub-scanning direction is “1344”. Therefore, the block region BL1 is a region where the coordinate value in the main scanning direction is “0” to “124” and the coordinate value in the sub-scanning direction is “0” to “1343”. Therefore, the block area specifying unit 35 determines that the pixel Q (0, 1400) does not belong to the block area BL1.

  The block area specifying unit 35 similarly determines whether or not the pixel Q belongs to the block area BL for the block areas BL after the block area BL1. In the present embodiment, it is determined that the pixel Q belongs to the block region BL5. explain in detail. The block descriptor generation unit 31 causes the main / sub scanning direction descriptor reading unit 29 to perform processing of reading the main scanning direction descriptor MSD1 and the sub scanning direction descriptor VSD2 from the main memory 7. A combination of the main scanning direction descriptor MSD1 and the sub scanning direction descriptor VSD2 is a block descriptor assigned to the block area BL5.

  According to this block descriptor, with respect to the block region BL5, the coordinate value “0” of the top pixel in the main scanning direction, the coordinate value “1344” of the top pixel in the sub scanning direction, the number of pixels “125” in the main scanning direction, The number of pixels in the scanning direction is “1344”. Accordingly, the block region BL5 is a region where the coordinate value in the main scanning direction is “0” to “124” and the coordinate value in the sub-scanning direction is “1344” to “2687”. Therefore, the block area specifying unit 35 determines that the pixel Q (0, 1400) belongs to the block area BL5.

  Next, the band descriptor reading unit 37 relates the band descriptors included in the sub-scanning direction descriptor VSD2 constituting the block descriptor with respect to the block descriptor assigned to the block area BL5 specified in step S23. The band descriptor BAD22 stored at the address Add72 is read from the main memory 7 (step S25).

  Next, the band area specifying unit 41 specifies the band area BA to which the 700,000th pixel Q belongs among the plurality of band areas BA, and the position of the 700,000th pixel Q in the band area BA in the sub-scanning direction D2. (Step S27). The position of the 700,000th pixel Q in the sub-scanning direction D2 means the row where the 700,000th pixel Q is located in the band area BA. The identification in step S27 is executed based on the number of pixels 64 in the sub-scanning direction D2 of the band area BA and the coordinates 1400 in the sub-scanning direction D2 of the 700,000th pixel Q calculated in step S21.

1400 ÷ 64 = 21.875
21.875 means 21 band areas BA + 0.875 band areas BA. Therefore, the 700,000th pixel Q belongs to the band area BA22 which is the 22nd band area BA. The position of the 700,000th pixel in the band area BA22 in the sub-scanning direction D2 is the 56th (= 64 × 0.875) line of the band area BA22.

  Next, the number-of-pixels calculation unit 43 counts the number of pixels from the head pixel of the band area BA22 to which the 700,000th pixel Q specified in step S27 belongs (that is, the head pixel p1 of the divided data m1) to the 700,000th pixel Q. Is calculated (step S29). This calculation is based on the coordinate 0 in the main scanning direction D1 of the 700,000th pixel Q calculated in step S21, the position in the sub-scanning direction D2 specified in step S27 (line 56), and the main scanning direction of the image data. The processing is performed based on the number of pixels D1 (in other words, the number of pixels in the main scanning direction D1 of the band area BA) 500.

0 + 500 × 56 = 28000
28000 is the number of pixels calculated in step S29.

  Next, using the divided data information included in the band descriptor BAD22 shown in FIG. 3 read in step S25, the divided data specifying unit 45 performs the 700,000th pixel data among the plurality of divided data m1 to m5. The divided data to which Q belongs is specified (step S31). The identification is executed based on the number of pixels (FIG. 6) of each of the plurality of divided data m1 to m5 included in the divided data information of the band descriptor BAD22 and the number of pixels 28000 calculated in step 31. .

10000 (number of pixels of the divided data m1) <28000
The data of the 700,000th pixel Q does not belong to the divided data m1.

10000 + 20000 (number of pixels of the divided data m2)> 28000
Therefore, the data of the 700,000th pixel Q belongs to the divided data m2 as shown in FIG.

  Next, the address specifying unit 47 specifies the address on the main memory 7 of the data of the 700,000th pixel Q from the address on the main memory 7 of the data of the first pixel p2 of the divided data m2 (step S33). This specification is executed based on the number of pixels 28000 calculated in step S29.

  Here, the address on the main memory 7 of the data of the 18000 (= 28000−10000) th pixel from the address of the data of the top pixel p2 on the main memory 7 is the address of the data of the 700,000th pixel Q.

  As described above, according to the present embodiment, when the N-th pixel data stored in the main memory 7 is accessed using the band descriptor BAD, the block descriptor is used. The band descriptor BAD assigned to the band area BA including the first pixel of the block area BL to which the Nth pixel belongs can be started. On the other hand, if the block descriptor is not used, the band descriptor BAD corresponding to the Nth pixel data must be searched in order from the first band descriptor BAD to access the Nth pixel data. Since the number of band descriptors BAD is, for example, thousands, it is considerably larger than the number of block descriptors (for example, 10 to several tens). Therefore, according to the present embodiment, the access time to the data of the Nth pixel can be shortened compared with the case where no block descriptor is used.

  A modification of this embodiment will be described. FIG. 9 is a block diagram illustrating a hardware configuration of the image processing apparatus 2 according to a modification of the present embodiment. Among the elements constituting the image processing apparatus 2 according to the modification, the same elements as those constituting the image processing apparatus 1 according to the present embodiment shown in FIG.

  In the image processing apparatus 1 according to the present embodiment shown in FIG. 1, m main scanning direction descriptors MSD and n sub scanning direction descriptors VSD are stored in the main memory 7. On the other hand, in the image processing apparatus 2 according to the modified example, m main scanning direction descriptors MSD and n sub scanning direction descriptors VSD are stored in the SRAM 51 provided in the ASIC 11.

  In the SRAM 51, for example, image data output from the line sensor 5 is temporarily stored.

  The block descriptor generation unit 31 holds the addresses of m main scanning direction descriptors MSD and the addresses of n sub scanning direction descriptors VSD stored in the SRAM 51. The block descriptor generation unit 31 reads the main scanning direction descriptor MSD and the sub scanning direction descriptor VSD from the SRAM 51, and sets the block descriptor assigned to any block area BL of the m × n block areas BL. Generate.

  The total size of m main scanning direction descriptors MSD and n sub scanning direction descriptors VSD is considerably smaller than the total size of m × n block descriptors. The data can be stored in the SRAM 51 of the ASIC 11. Thereby, it is not necessary to include the address information on the main memory 7 of the main scanning direction descriptor MSD of the next reading order in each of the m main scanning direction descriptors MSD. Similarly, it is not necessary to include address information on the main memory 7 of the sub-scanning direction descriptor VSD in the next reading order in each of the n sub-scanning direction descriptors VSD. Accordingly, it is possible to further reduce the size of all the m main scanning direction descriptors MSD and the n sub scanning direction descriptors VSD.

1, 2 Image processing device 7 Main memory (an example of storage area)
51 SRAM (an example of a storage area)
BL, BL1 to BL16 Block area BA, BA1, BA2, BA21, BA22 Band area MSD, MSD1 to MSD4 Main scanning direction descriptor VSD, VSD1 to VSD4 Sub scanning direction descriptor BAD, BAD1 to BAD3, BAD21 to BAD23 Band descriptor P First pixel of block area BL5 M22 Band area data m1 to m5 Divided data Q 700,000th pixel

Claims (3)

A plurality of m × n block areas in which m block areas are arranged in the main scanning direction and n block areas are arranged in the sub scanning direction, and a band area having a larger number of pixels in the main scanning direction than the block areas are arranged in the sub scanning direction. An image processing apparatus that processes image data using the band region of
Main memory,
A processing unit that processes image data stored in the main memory by dividing it into a plurality of band area data corresponding to each of the plurality of band areas, and dividing the band area data into a plurality of divided data. A division processing unit that performs processing for storing the different addresses in the main memory for each of the plurality of band area data;
A processing unit for processing a plurality of band descriptors assigned to each of the plurality of band areas, wherein when the image data is stored in the main memory, the band area corresponding to the band area data is stored in the band area; To the allocated band descriptor, the division data information indicating the address on the main memory of the data of the first pixel of each of the plurality of division data and the number of pixels of each of the plurality of division data is added, and A band descriptor processing unit that executes processing to be stored in the main memory in each of the plurality of band descriptors,
The plurality of band descriptors are ordered, and each of the plurality of band descriptors stored in the main memory includes information on an address on the main memory of a band descriptor in the next order,
An address on the main memory of the band descriptor assigned to the band area including the first pixel of the block area is a band descriptor association address,
further,
The coordinate value in the main scanning direction of the first pixel of the block area and the number of pixels in the main scanning direction of the block area are provided for the block area, and the coordinate value and the number of pixels common in the main scanning direction The m main scanning direction descriptors including information, the coordinate value in the sub-scanning direction of the first pixel of the block area, and the number of pixels in the sub-scanning direction of the block area are provided for the block area. When the image data is stored in the main memory with respect to the n sub-scanning direction descriptors including information on the coordinate value and the number of pixels common to the scanning direction and the band descriptor-related address. A main / sub-scanning direction descriptor processing unit for storing in a predetermined storage area;
The m number of main scanning direction descriptors stored in the storage area and the n number of sub scanning direction descriptors are combined and assigned to an arbitrary block area of m × n block areas. An image processing apparatus comprising: a block descriptor generation unit that generates a block descriptor. An ASIC including an SRAM in which the division processing unit, the band descriptor processing unit, the block descriptor generation unit, and m main scanning direction descriptors and n sub scanning direction descriptors are stored; ,
A bus connecting the ASIC and the main memory;
The storage area is the SRAM;
The block descriptor generation unit holds addresses of m main scanning direction descriptors and addresses of n sub scanning direction descriptors stored in the SRAM, and stores the addresses from the SRAM. The image processing apparatus according to claim 1, wherein the main processing direction descriptor and the sub scanning direction descriptor are read to generate the block descriptor assigned to an arbitrary block area of the m × n block areas. . The number of pixels and the coordinate values included in the main scanning direction descriptor and the sub scanning direction descriptor constituting each block descriptor generated by the block descriptor generation unit are assigned to the block area to which the block descriptor is assigned. Block area information that is information on the number of pixels in the main scanning direction and the sub-scanning direction and the coordinates of the top pixel
For an image formed based on the image data stored in the main memory, the coordinates of the main scanning direction and the sub-scanning direction where the Nth (N is a positive integer) pixel is located are used as the main scanning of the image. A coordinate calculation unit that calculates based on the number of pixels in the direction;
Based on the coordinates of the Nth pixel calculated by the coordinate calculation unit and the block area information included in each block descriptor generated by the block descriptor generation unit, mxn blocks A block area specifying unit for specifying the block area to which the Nth pixel belongs in the area;
For the block descriptor assigned to the block area specified by the block area specifying unit, the band descriptor stored in the band descriptor association address included in the block descriptor is transferred from the main memory. The image processing apparatus according to claim 1, further comprising: a band descriptor reading unit for reading.

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