JP2014229850A - Method for manufacturing solar cell - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing solar cells capable of manufacturing high-performance solar cells.SOLUTION: A method for manufacturing solar cells comprises: a step S5 of generating plasma using a pretreatment gas containing hydrogen and performing pretreatment for a substrate; a step S6 of forming a thin film on the substrate after the pretreatment by generating plasma using a material gas; a step S7 of forming a conductive pattern with respect to the substrate on which the thin film is formed; and a step S8 of forming an electrode by annealing the conductive pattern at a temperature not more than 600°C.

Description

  The present invention relates to a method for manufacturing a solar cell.

  Plasma processing apparatuses are used in processes such as film formation, etching, and ashing because of the advantage that high-precision process control is easy in the manufacturing process of semiconductor devices. As a plasma processing apparatus, parallel plate type plasma CVD (Chemical Vapor Deposition) is known.

  A configuration of a general plasma CVD film forming apparatus is shown in FIG. As shown in FIG. 11, the plasma CVD film forming apparatus includes a vacuum chamber 110, parallel plate electrodes 111 for discharging, a high-frequency power source 113, and a matching box 114 for matching impedance. . Further, the plasma CVD film forming apparatus has a gas supply mechanism 115 for discharge and a gas exhaust mechanism 116.

  The gas supply mechanism 115 supplies a certain amount of reaction gas. The gas exhaust mechanism 116 has a gas pressure regulating valve. A gas pressure regulating valve keeps the pressure in the vacuum chamber 110 constant during the process. The parallel plate electrode 111 has a high-frequency electrode 117 and a counter electrode 118. A high frequency from a high frequency power supply 113 is supplied to the high frequency electrode 117 via a matching box 114. Therefore, when the reaction gas is supplied, a discharge is generated between the parallel plate electrodes. The reactive gas is changed into a plasma state by the discharge.

  The counter electrode 118 serves as a substrate holder on which the substrate is placed. Therefore, a thin film can be formed on the substrate by reacting excited species in the plasma on the substrate surface. A silicon nitride thin film is used as an antireflection film for a crystalline silicon solar cell. Patent Document 1 discloses a film forming apparatus that uses a low frequency power source of 100 to 400 kHz as a high frequency power source. Further, in Patent Document 1, an antireflection film is formed after hydrogen gas or ammonia gas is introduced and passivation treatment is performed (paragraph 0047). Moreover, the film-forming apparatus of patent document 1 is generating discharge using a hollow cathode.

JP 2009-272428 A

  In such a method for manufacturing a solar cell, after forming an antireflection film, the electrode is patterned by screen printing of an Ag paste. And an electrode is formed by baking Ag paste. However, Patent Document 1 does not disclose any temperature when firing the Ag paste. For example, depending on the annealing temperature during firing, there is a problem that the carrier lifetime is deteriorated.

  This invention is made | formed in view of said problem, and it aims at providing the manufacturing method of the solar cell which can manufacture a high performance solar cell.

  In the method for manufacturing a solar cell according to the first aspect of the present invention, plasma is generated using a pretreatment gas containing hydrogen and a substrate is pretreated before film formation. Even when the electrode is formed at a temperature of 600 ° C. or lower, the carrier lifetime can be prevented from deteriorating. Therefore, a high performance solar cell can be manufactured.

  For example, by annealing at 600 ° C. or lower, the conductive pattern can be electrically connected to the impurity layer, and the conductive pattern can be used as an electrode. It is possible to manufacture at a relatively low annealing temperature.

  The thin film is, for example, an antireflection film provided on the impurity layer or a passivation film provided on a surface opposite to the surface on which the impurity layer is provided. Further, the thin film is, for example, a silicon nitride film.

  In the step of performing the pretreatment and the step of depositing the thin film, the vacuum is generated in a state where the supply of the pretreatment gas is stopped after the pretreatment is performed by generating plasma while supplying the pretreatment gas. The chamber is evacuated. Further, after evacuating the vacuum chamber, a thin film may be formed by generating plasma while supplying a film forming gas. By doing in this way, it can process reliably.

  According to the present invention, an object of the present invention is to provide a solar cell manufacturing method capable of manufacturing a high-performance solar cell.

It is a figure which shows an example of the cross-section of a solar cell. It is a flowchart which shows the manufacturing method of the solar cell concerning this Embodiment. 1 is a diagram schematically showing a configuration of a plasma processing apparatus according to a first exemplary embodiment. It is a figure for demonstrating the generation process of the plasma in a plasma processing apparatus. It is a figure for demonstrating the generation process of the plasma in a plasma processing apparatus. It is a figure for demonstrating the generation process of the plasma in a plasma processing apparatus. It is a figure for demonstrating the generation process of the plasma in a plasma processing apparatus. It is a figure for demonstrating the plasma state in a plasma processing apparatus, and the shape of a cathode. It is a flowchart which shows the pre-process and the film-forming process in a plasma processing apparatus. It is a figure which shows typically the structure of the plasma processing apparatus concerning Embodiment 2. FIG. It is the schematic which shows the structure of a plasma processing apparatus.

(Solar cell)
An example of a solar cell will be described. FIG. 1 is a diagram showing a cross-sectional structure of a substrate of a solar cell. In the cross-sectional structure shown in FIG. 1, the upper surface is described as the front surface, and the lower surface is described as the back surface. That is, a photovoltaic force is generated by light incident from the surface side. FIG. 1 shows a cross-sectional structure of a solar cell using a p-type silicon substrate.

  As shown in FIG. 1, the solar cell includes a p-type semiconductor layer 11, an n-type diffusion layer 12, a p + -type diffusion layer 13, an antireflection film 14, front surface electrodes 15a and 15b, and back surface electrodes 16a and 16b. And.

The n-type diffusion layer 12 is disposed on the surface of the p-type semiconductor layer 11. The n-type diffusion layer 12 is an impurity layer containing impurities. The surface diffusion concentration of the n-type diffusion layer 12 is, for example, 1.0 × 10 ^{18 to} 1.0 × 10 ²² / cm ³ . An antireflection film 14 is provided on the p-type semiconductor layer 11. The antireflection film 14 prevents incident light from being reflected. The refractive index of the antireflection film 14 is, for example, 1.8 to 3.0. The film thickness of the antireflection film 14 is, for example, 50 nm to 150 nm.

  The surface electrodes 15 a and 15 b are disposed on the surface of the n-type diffusion layer 12. The surface electrodes 15 a and 15 b penetrate the antireflection film 14 and are electrically connected to the p-type semiconductor layer 11. Further, the solder layers 17a and 17b are disposed on the surface electrodes 15a and 15b, respectively.

  A p + -type diffusion layer 13 is disposed on the back surface of the p-type semiconductor layer 11. On the back surface of the p + -type diffusion layer 13, back surface electrodes 16 a and 16 b are disposed. The back electrodes 16 a and 16 b are in contact with the p + type diffusion layer 13. Furthermore, solder layers 18a and 18b are disposed on the back surfaces of the back electrodes 16a and 16b, respectively.

The p-type semiconductor layer 11 and the n-type diffusion layer 12 constitute a pn junction. That is, the interface between the p-type semiconductor layer 11 and the n-type diffusion layer 12 becomes a pn junction interface. For example, a silicon nitride film (Si ₃ N ₄ film) can be used as the antireflection film 14. The antireflection film 14 is formed using a plasma processing apparatus described later. Silver (Ag), aluminum (Al), or the like can be used as the front surface electrodes 15a and 15b and the back surface electrodes 16a and 16b.

  When light is incident on the pn junction surface of the solar cell, conduction electrons and holes are generated. Then, conduction electrons and holes are taken out from the surface electrodes 15a and 15b and the back electrodes 16a and 16b, respectively. By doing so, an electromotive force is generated. Here, the lifetime of a carrier (electron and hole) is mentioned as a performance of a solar cell. For example, the longer the carrier lifetime, the greater the output. Therefore, it is desired to manufacture a solar cell having a long carrier lifetime.

In the above description, a p-type silicon substrate is used, but an n-type silicon substrate can also be used. In this case, the conductivity type of each layer is reversed. That is, in each layer, the p-type and n-type are interchanged. When an n-type silicon substrate is used instead of the p-type silicon substrate, the p-type diffusion layer corresponding to the n-type diffusion layer 12 has, for example, a surface diffusion concentration of 1.0 × 10 ^{18 to} 1.0 × 10. ²² / cm ³ .

(Method for manufacturing solar cell)
Next, a method for manufacturing a solar cell according to the embodiment will be described with reference to the flowchart of FIG.

  First, a p-type silicon substrate is prepared and surface treatment is performed (step S1). For example, the surface treatment is performed by etching with an alkaline aqueous solution, a reactive ion etching (RIE) method, or the like. Thereby, a fine uneven structure is formed on the surface of the p-type silicon substrate. Reflection of light on the surface of the p-type silicon substrate can be suppressed.

Next, the n-type dopant is diffused (step S2). For example, a vapor phase diffusion method using phosphorus oxychloride (POCl ₃ ), a coating diffusion method using phosphoric acid (P ₂ O ₅ ), or an ion implantation method for directly diffusing phosphorus (P) ions is performed. By doing so, phosphorus (P) can be diffused from the surface of the p-type silicon substrate as an n-type dopant. Thereby, the n-type diffusion layer 12 shown in FIG. 1 can be formed. The surface diffusion concentration of the n-type diffusion layer 12 is, for example, 1.0 × 10 ^{18 to} 1.0 × 10 ²² / cm ³ .

  Then, an etching process is performed on the back surface of the p-type silicon substrate in which the n-type dopant is diffused (step S3). That is, the n-type diffusion layer provided on one surface of the p-type silicon substrate is etched. As a result, the n-type diffusion layer is removed from the back surface of the p-type silicon substrate, and the n-type diffusion layer 12 is formed only on the front surface. In step S3, when the n-type diffusion layer is formed only on the surface, step S3 can be omitted.

  Further, a p-type dopant is diffused (step S4). For example, an Al paste is applied on the back surface of a p-type silicon substrate having an n-type diffusion layer etched, and heat treatment is performed. By so doing, a p-type dopant such as aluminum (Al) diffuses from the back side of the p-type silicon substrate. Thereby, the p + -type diffusion layer 13 can be formed on the back surface side of the p-type semiconductor layer 11.

  Next, before forming the antireflection film 14, a pretreatment using hydrogen gas is performed (step S5). Then, the antireflection film 14 is formed on the n-type diffusion layer 12 (step S6). For example, a silicon nitride film can be used as the antireflection film 14. It is preferable to use a silicon nitride film having a refractive index of 1.9 to 2.4 and a film thickness of about 70 to 100 nm as an antireflection film and a passivation film of a crystalline solar cell. Performances such as conversion efficiency of solar cells vary depending on the quality of the silicon nitride film. That is, a high-quality silicon nitride film has high conversion efficiency.

  After performing a pretreatment using hydrogen gas, a silicon nitride film is formed on the n-type diffusion layer 12. Thus, the antireflection film 14 is formed on the n-type diffusion layer 12. The pretreatment process using plasma using hydrogen gas and the film formation process of the antireflection film 14 will be described later. In addition, a protective film may be formed on the back surface of the p + -type diffusion layer 13 before or after the antireflection film 14 is formed. A silicon nitride film can be used as the protective film. The protective film is formed by the same process as that of the antireflection film 14.

  Then, electrode patterning is performed (step S7). For example, an Ag paste containing Ag powder, a binder, and a frit is screen-printed on a p-type silicon substrate. Thereby, patterning of the Ag paste is performed. The Ag paste is formed, for example, in a comb pattern in order to increase the efficiency of the solar cell. Ag paste patterns are formed on the surface of the antireflection film 14 and on the back surface of the p + -type diffusion layer 13, respectively.

  Next, the printed Ag paste is baked to form an electrode (step S8). Here, the fire-through method can be used. For example, the silicon substrate on which the Ag paste is formed is annealed at a temperature of 600 ° C. or lower. Thereby, Ag paste is baked. Further, Ag penetrates the silicon nitride and is electrically connected to the n-type diffusion layer 12. Thereby, the surface electrodes 15 a and 15 b can be formed on the antireflection film 14. The surface electrodes 15 a and 15 b penetrate the antireflection film 14 and are electrically connected to the n-type diffusion layer 12. Therefore, the surface electrodes 15 a and 15 b are electrically connected to the n-type diffusion layer 12. Therefore, carriers generated at the pn junction surface can be taken out from the surface electrodes 15a and 15b.

  In this step, the back electrodes 16 a and 16 b are also formed on the p + -type diffusion layer 13. The back electrodes 16 a and 16 b are electrically connected to the p + type diffusion layer 13. Therefore, carriers generated on the pn junction surface can be taken out from the back surface electrodes 16a and 16b. Note that when a protective film is formed on the p + -type diffusion layer 13, Ag penetrates through the silicon nitride similarly to the surface side. Therefore, the p + type diffusion layer 13 and the back electrode 16a can be made conductive.

  Then, solder layers 17a and 17b and solder layers 18a and 18b are formed (step S9). For example, the solder layer 18a and the solder layer 18b are respectively formed on the back surfaces of the back electrode 16a and the back electrode 16b by using a solder dipping method. Similarly, solder layers 17a and 17b are formed on the surfaces of the surface electrode 15a and the surface electrode 15b, respectively. The order of forming the solder layers 17a and 17b and the solder layers 18a and 18b is not particularly limited. In this way, a crystalline solar cell is manufactured.

(Plasma processing equipment)
A plasma processing apparatus according to this embodiment will be described with reference to FIG. FIG. 3 is a diagram schematically showing the configuration of the plasma processing apparatus for forming an antireflection film in step S6. Moreover, in the plasma processing apparatus shown in FIG. 3, the pre-processing of step S5 is also performed. The plasma processing apparatus shown in FIG. 3 is a vertical plasma processing apparatus. That is, it has parallel plate electrodes arranged in the vertical direction. Then, plasma processing such as film formation processing and preprocessing is performed in a state where the silicon substrate 40 is disposed along the vertical direction.

  As shown in FIG. 3, the plasma processing apparatus includes a process chamber 30, a gas introduction nozzle 31, an exhaust port 32, an exhaust speed adjustment valve 33, a pressure sensor 34, a high frequency power source 35, a cathode 36, and an anode. 37, a heater 44, and a matching box 46.

  The process chamber 30 houses a cathode 36, an anode 37, and a heater 44. The anode 37 serves as a substrate holding unit that holds the silicon substrate 40. The anode 37 is, for example, a metal plate provided along the vertical direction. The anode 37 holds the silicon substrate 40 in a state along the vertical direction. Here, two anodes 37 are accommodated in the process chamber 30. A silicon substrate 40 is disposed on the opposing surfaces of the two anodes 37.

  A cathode 36 is disposed between the two anodes 37. In other words, the cathode 36 and the anode 37 are arranged to face each other so that the anode 37 is arranged on both sides of the cathode 36. A silicon substrate 40 is disposed on the surface of the two anodes 37 on the cathode 36 side. The cathode 36 is a metal plate provided along the vertical direction. Accordingly, the cathode 36 and the anode 37 are parallel plate electrodes. A high frequency electric field is generated in the process space between the cathode 36 and the anode 37. The cathode 36 has a plurality of through holes 39.

  The cathode 36 is connected to a high frequency power source 35. A matching box 46 for matching impedance is provided between the high frequency power supply 35 and the cathode 36. The high frequency power supply 35 outputs high frequency power of 100 kHz to 400 kHz. The anode 37 is connected to the ground. The high frequency power supply 35 supplies high frequency AC power between the parallel plates. Then, plasma 38 is generated in the process space between the cathode 36 and the anode 37. Accordingly, plasma processing is performed on the silicon substrate 40 in the process space between the cathode 36 and the anode 37.

  A heater 44 is provided on the opposite side of the anode 37 from the cathode 36. The anode 37 may include a heater 44. By heating the heater 44, plasma processing can be performed in a state where the silicon substrate 40 is at a predetermined temperature.

  The process chamber 30 is a vacuum chamber and has an exhaust port 32. The exhaust port 32 is connected to a vacuum pump (not shown). Accordingly, the gas in the process chamber 30 is exhausted from the exhaust port 32. The exhaust port 32 is provided with an exhaust speed adjustment valve 33 for adjusting the exhaust speed. That is, the process pressure in the process chamber 30 can be adjusted by changing the opening rate by the exhaust speed adjusting valve 33.

A gas introduction nozzle 31 for supplying a desired gas is attached to the process chamber 30. A process gas such as NH ₃ , N ₂ , H ₂ , SiH ₄ or the like is introduced from the gas introduction nozzle 31. When forming the silicon nitride film, a gas such as monosilane, ammonia, nitrogen, hydrogen, argon, or helium is used as a reaction gas. In addition, during the pretreatment before forming the silicon nitride film, a pretreatment gas containing hydrogen gas is supplied. Two or more gas introduction nozzles 31 are preferably arranged in parallel. And mixed gas which mixed all the process gas is supplied from each system.

  Further, a pressure sensor 34 for measuring the pressure in the process chamber 30 is attached to the process chamber 30. The pressure sensor 34 is, for example, a capacitance gauge. Using the pressure sensor 34, the exhaust speed adjustment valve 33 is adjusted so as to be a predetermined process pressure in the process chamber 30.

  Here, a gas introduction nozzle 31 is provided below the process chamber 30. An exhaust port 32 is provided on the upper side of the process chamber 30. Accordingly, during the process, the process gas ejected from the gas introduction nozzle 31 is exhausted from the exhaust port 32 through the parallel plates. Further, it is preferable to arrange the gas introduction nozzle 31 and the exhaust port 32 symmetrically so that the pressures in the process spaces on both sides of the cathode 36 are equal.

  As described above, the cathode 36 is provided with a plurality of through holes 39. Accordingly, the process spaces on both sides of the cathode 36 communicate with each other through the through holes 39. That is, gas or the like existing in the process space on the left side of the cathode 36 moves through the through hole 39 to the process space on the right side of the cathode 36. By providing the through hole 39 in the cathode 36, hollow cathode discharge can be utilized. The plasma 38 is also generated in the through hole 39.

  By using the hollow cathode structure, high-density and uniform plasma can be generated on both sides of the cathode 36. Therefore, a plurality of silicon substrates can be processed at a time, and productivity can be improved. Furthermore, a low frequency band can be used by using a multi-hollow cathode electrode. Uniform high-density plasma equivalent to or higher than that obtained when a VHF band RF electrode of 13.56 MHz or the like is used can be obtained.

  Then, pretreatment and film formation are performed by the plasma processing apparatus. In the pretreatment, the silicon substrate is pretreated by generating plasma using a pretreatment gas containing hydrogen. On the other hand, in the film formation process, plasma is generated using a material gas which is a material of a thin film to be formed. Here, the thin film formed on the substrate can be a silicon nitride film. That is, pre-treatment using hydrogen gas is performed when an antireflection film or a protective film made of silicon nitride is formed on a silicon substrate.

(Hollow cathode discharge)
Next, the principle of hollow cathode discharge in the plasma CVD apparatus will be described with reference to FIGS. FIGS. 4 to 7 are views for explaining the generation of plasma by hollow cathode discharge, and are enlarged sectional views each showing the configuration around the through hole 39.

  When the high frequency power supply 35 applies a high frequency voltage between the anode 37 and the cathode 36, plasma is generated. Specifically, as shown in FIG. 4, the process space between the anode 37 and the cathode 36 becomes a glow discharge region 41. That is, glow discharge occurs between parallel plates formed by the cathode 36 and the anode 37. On the other hand, the space in the through hole 39 becomes a hollow discharge region 42. Further, the vicinity of the conductors such as the anode 37 and the cathode 36 is a sheath 43.

  As shown in FIG. 5, the ions 50 that have entered the through hole 39 are accelerated by the sheath 43 and collide with the wall surface of the cathode 36. That is, the ions 50 collide with the inner wall of the through hole 39. Then, as shown in FIG. 6, secondary electrons 51 are emitted from the wall surface of the cathode 36. The secondary electrons 51 are accelerated in a direction perpendicular to the wall surface by the electric field of the sheath 43. The secondary electrons 51 that have been accelerated by the sheath electric field and have obtained sufficient energy collide with the neutral gas molecules 52. When the secondary electrons 51 collide with the gas molecules 52, an avalanche is caused and the electron density rapidly increases.

  As shown in FIG. 7, the secondary electrons 51 radiated from the inner wall surface of the through hole 39 are confined in the through hole 39. Specifically, the secondary electrons 51 generated on the inner wall surface of the through hole 39 are repelled by the electric field of the opposite sheath 43 and pushed back into the plasma. That is, the secondary electrons 51 repeat rebound and recoil without entering the opposing inner wall surfaces. Due to the cathode fall generated on the inner wall of the through hole 39, electrons are shielded by the Debye without entering and disappearing on the inner wall. Due to the pendulum effect repelled by the inner wall surfaces of the through holes 39 facing each other, the probability of existence of electrons in the through holes 39 is dramatically increased. By these actions, the inside of the through hole 39 is maintained at a high electron density. Therefore, the hollow discharge region 42 has a plasma structure different from that of the glow discharge region 41 formed between the parallel plates.

  Specifically, when gas molecules 52 enter the hollow discharge region 42 in a high electron density state, electrons collide with the gas molecules 52. Electrons collide with gas molecules 52 inelastically to maintain and promote ionization. These electrons are scattered in all directions by collision with the gas molecules 52 and the like, and repeat ionization amplification and cumulative ionization. The gas molecules 52 repeat ionization and recombination. In addition, when the gas molecules 52 are recombined, light emission with high luminance is observed. The precursor generated in the high density plasma is a radical species 53. Since the radical species 53 are neutral, they diffuse outside the through hole 39 regardless of the electrode potential. The radical species 53 contributes to the formation of a thin film on the surface of the silicon substrate 40 on the anode 37 side.

  The spaces on both sides of the cathode 36 communicate with each other through a through hole 39. Therefore, the shading is automatically corrected by the nature of the ambipolar diffusion of the plasma. Therefore, the difference in plasma density on both sides of the cathode can be reduced. That is, the plasma density on both sides of the cathode 36 is kept uniform. In addition, the process gas introduced from the periphery of the electrode and the high-energy high-density electrons confined in the through hole 39 maintain the plasma generation.

  Here, in order to efficiently obtain a uniform high electron density, it is necessary to make the through hole 39 an appropriate shape and size. The diameter of the through hole 39 is considered from the mean free path of pressure, temperature, gas type and its electrons. Further, based on the above principle, it is desirable that the inner wall surface of the through hole 39 be made of a material having a good secondary electron 51 emission rate. Furthermore, it is desirable to perform surface treatment on the cathode 36 so that the emission rate of secondary electrons is good. An aluminum alloy in which a metal oxide film is easily formed is a material suitable for the cathode 36. Of course, copper, copper alloy, stainless steel alloy or the like may be used as the cathode 36.

Here, the behavior of electrons is considered in order to determine the spatial dimension for forming an efficient hollow discharge. First, the mean free path of electrons is determined by the ambient temperature, pressure, and the size of gas molecules. When the temperature is T [K], the pressure is P [Pa], and the molecule diameter is D [m], the mean free path λg of the gas molecule is 3.11 × 10 ⁻²⁴ × T4 / (P × D ² ) Become. The electron mean free path λe = λg × 4 × 2 ^1/2 . In a predetermined space, it is necessary to efficiently generate a hollow discharge using the electronic pendulum effect.

  Here, with reference to FIG. 8, the suitable dimension of the through-hole 39 is demonstrated. FIG. 8 is a schematic diagram showing a partial structure of the process chamber 30. As shown in FIG. 8, the discharge in the process chamber 30 has a positive column 61, a Faraday dark part 62, an anode glow 63, an anode dark part 64, a negative glow 65, a cathode dark part 66, a cathode glow 67, and an Aston dark part 68. It has a structure.

  As shown in FIG. 8, the diameter of the through hole 39 is d, the Debye length is ld, the electron mean free path is b, and the distance between the anode and the cathode is s. The length of the through hole, that is, the thickness of the cathode 36 is t. d = a + 2ld = c + 2b + 2ld. c = d-2b-2ld.

  When c = 0, it is not possible to secure a moving space for electrons having sufficient kinetic energy. Therefore, a plasma generation space cannot be secured inside the through hole 39.

  When c> 5, the high-density plasma is generated so as to stick to the wall surface, and the plasma density in the central portion of the through hole 39 becomes dilute. That is, the vicinity of the central axis of the through hole 39 becomes a lean plasma space.

  Therefore, it is preferable that 0 <c ≦ 5. By doing so, an electron moving space having sufficient kinetic energy is secured, and a high-density plasma generating space having a sufficient volume is secured. Of course, it is preferable that c is greater than 0 and less than or equal to 5 both during pretreatment and during film formation. In addition, c can be made into an optimal value by setting process pressure, temperature, etc. appropriately.

  Further, it is preferable to increase the density of the through holes 39 to increase the aperture ratio. When the aperture ratio is increased, the aperture ratio may be determined so that the electrode plate to be the cathode 36 can be maintained at a sufficient strength.

(Plasma treatment)
Next, a processing method in the plasma processing apparatus will be described with reference to FIG. FIG. 9 is a flowchart showing processing in the plasma processing apparatus. As shown in FIG. 9, the processing in the plasma processing apparatus is roughly divided into pre-processing and film formation processing.

First, a robot or the like transports the silicon substrate 40 to the process chamber 30 (step S11). For example, the silicon substrate 40 heated to a predetermined temperature in the heater chamber is transferred to the process chamber 30. When the silicon substrate 40 is transferred, the gas introduction nozzle 31 supplies H ₂ gas to the process chamber 30 (step S12). In step S12, a mixed gas containing H ₂ gas and other gases may be used as the pretreatment gas. Then, the pressure in the process chamber 30 is adjusted (step S13). For example, by setting the exhaust speed adjustment valve 33 to a predetermined opening ratio, the H ₂ gas becomes constant at a predetermined process pressure. The process pressure of the pretreatment can be set to 60 Pa to 100 Pa, for example.

When the pressure adjustment is completed, the high frequency power supply 35 is turned on (step S14). Thereby, a high frequency electric field is formed between the anode 37 and the cathode 36, and hydrogen plasma is generated. Therefore, pretreatment with hydrogen plasma can be performed. That is, dangling bonds on the surface of the silicon substrate 40 are terminated with hydrogen. For example, the high frequency power density can be 1800 mW / cm ² . In addition, the substrate temperature in the process chamber 30 can be 400 degreeC-500 degreeC, for example.

  When a predetermined process time has elapsed, the high frequency power supply 35 is turned off (step S15). Here, the process time is set to about 5 seconds. Thereby, the preprocessing process is completed. Next, the process chamber 30 is evacuated to a high vacuum (step S16). That is, the hydrogen gas remaining in the process chamber 30 is exhausted from the exhaust port 32 in a state where the gas introduction from the gas introduction nozzle 31 is stopped. The gas in the process chamber 30 is exhausted for a predetermined time, and when the pressure sensor 34 becomes a predetermined pressure or less, the process proceeds to a film forming process.

Next, the gas introduction nozzle 31 supplies a film forming gas to the process chamber 30 (step S17). The gas introduction nozzle 31 supplies a material gas, which is a material for the thin film, for example, a mixed gas of SiH ₄ or NH _{3 to} the process chamber 30. Then, the pressure in the process chamber 30 is adjusted (step S18). For example, by setting the exhaust speed adjustment valve 33 to a predetermined opening ratio, the mixed gas becomes constant at a predetermined process pressure. The process pressure of the film forming process is approximately the same as the pretreatment, and can be set to 60 Pa to 100 Pa, for example.

When the pressure adjustment is completed, the high frequency power supply 35 is turned on (step S19). A high frequency electric field is formed between the anode 37 and the cathode 36 to generate plasma. Thereby, film formation starts. A silicon nitride film is deposited on the silicon substrate 40 to form the antireflection film 14. The high frequency power density at the time of film formation is lower than the high frequency power density of the pretreatment. For example, the high frequency power density can be 1400 mW / cm ² . The substrate temperature can be the same as in the pretreatment.

  When a predetermined process time has elapsed, the high frequency power supply 35 is turned off (step S20). Here, the process time is set to about 5 seconds. This completes the film formation. In this way, the antireflection film 14 having a desired film thickness can be formed. Next, the process chamber 30 is evacuated (step S21). That is, the gas introduction from the gas introduction nozzle 31 is stopped, and the film forming gas remaining in the process chamber 30 is exhausted from the exhaust port 32. When the gas in the process chamber 30 is exhausted for a predetermined time, the processed substrate is unloaded. Then, the plasma processing apparatus waits until the next silicon substrate 40 is transferred.

  In the same process chamber 30 of the plasma processing apparatus, the pretreatment and the film forming treatment are continuously performed. By doing so, the processing time can be shortened. Further, a pretreatment using hydrogen gas is performed before the film forming treatment. That is, plasma using hydrogen gas is generated to terminate dangling bonds on the silicon substrate surface. Then, a film forming process is performed after the pre-processing. By doing so, a solar cell having a long carrier lifetime can be manufactured. Further, as a result of various experiments, the inventors of the present patent application have found that the electrode can be formed at a low temperature by performing pretreatment. Even when annealing is performed at a low temperature to form an electrode, it is possible to prevent the carrier lifetime from being shortened. Therefore, firing at a low temperature is possible, and the degree of freedom of the manufacturing process can be improved.

  Specifically, the surface of the silicon substrate before film formation is exposed to hydrogen plasma. By doing so, hydrogen radicals in the hydrogen plasma are bonded to dangling bonds of the substrate. Thereby, the passivation effect of the silicon substrate can be enhanced, and the carrier lifetime in the silicon substrate can be extended. Therefore, the conversion efficiency of the solar cell can be improved, and a high-performance solar cell can be manufactured. Furthermore, a long carrier lifetime can be obtained even when firing at a low temperature. Accordingly, it is not necessary to perform firing at a temperature higher than 600 ° C., and thus production efficiency can be improved. Low-temperature firing is possible, and the degree of freedom in the manufacturing process can be improved.

(Experimental result)
Hereinafter, an example of the results of experiments by the inventors of the present patent application will be described. Here, the correlation between the annealing temperature and the carrier lifetime will be described when pretreatment using hydrogen gas is performed. Further, a case where pretreatment before film formation is not performed and a case where pretreatment is performed using ammonia gas will be described. In addition, the experimental result demonstrated here is a result at the time of using the plasma processing apparatus of the above-mentioned hollow cathode structure.

  In the experiment, silicon nitride films are formed on both sides of the single crystal silicon substrate. That is, the processes in steps S5 and S6 are performed on both surfaces of the single crystal silicon substrate. In this experiment, the n-type diffusion layer 12 and the p + -type diffusion layer 13 are not formed. The carrier lifetime when the annealing temperature is changed is measured. Specifically, the carrier lifetime when the annealing temperature of the silicon substrate is changed to 800 ° C., 700 ° C., and 600 ° C. is measured. Furthermore, the carrier lifetime of a silicon substrate that has not been annealed is measured. Microwave is used to measure the carrier lifetime. That is, the microwave is irradiated onto the silicon substrate, and the microwave reflected by the silicon substrate is detected. Since the reflected microwave changes according to the carrier, the carrier lifetime can be measured.

The preconditioning process conditions are a pressure of 67 Pa, a processing time of 5 seconds, a power density of the high-frequency power source 35 of 1800 mW / cm ² , and a frequency of 250 kHz. At the time of film formation, the power density is set to 1400 mW / cm ² .

When the pretreatment is performed using H ₂ gas as in this embodiment, the carrier lifetime is 5581 μmsec without annealing, 4933 μmsec at annealing temperature 600 ° C., 5647 μmsec at annealing temperature 700 ° C., 3688 μmsec at 800 ° C. annealing. is there. Thus, the carrier lifetime at the annealing temperature of 600 ° C. is longer than that at the annealing temperature of 700 ° C. Furthermore, the carrier lifetime without annealing is almost the same as when the annealing temperature is 700 ° C. Therefore, even if the electrode is baked at an annealing temperature of 600 ° C. or lower, the deterioration of the carrier lifetime can be prevented.

When pretreatment is performed using NH ₃ gas, that is, when pretreatment is performed without using H ₂ gas, the carrier lifetime is 2585 μmsec without annealing, 6121 μmsec at annealing temperature 600 ° C., and 6806 μmsec at annealing temperature 700 ° C. Annealing is 3688 μmsec at 800 ° C. As described above, when the annealing temperature is 600 ° C. or without annealing, the carrier lifetime is deteriorated as compared with the case where the annealing temperature is 700 ° C. Therefore, it is presumed that the carrier lifetime deteriorates as the annealing temperature is lowered.

  Further, when no pretreatment is performed, the carrier lifetime is 1234 μmsec without annealing and 1141 μmsec at an annealing temperature of 700 ° C. The carrier lifetime when no preprocessing is performed is lower than the carrier lifetime when preprocessing is performed.

Thus, by performing the pretreatment using H ₂ gas, it is possible to prevent the deterioration of the carrier lifetime even when the annealing temperature is lowered. That is, even when the annealing temperature is 600 ° C. or lower, the carrier lifetime is maintained with almost no change. Therefore, an electrode formation process (fire-through process) for conducting the impurity layer and the conductive pattern can be performed at an annealing temperature of 600 ° C. or lower. Thereby, the freedom degree of the process in a manufacturing method can be made high.

Embodiment 2. FIG.
In the second embodiment, a plasma processing apparatus having a structure different from that of the first embodiment is used. This plasma processing apparatus will be described with reference to FIG. FIG. 10 is a diagram schematically showing the configuration of the plasma processing apparatus. Note that the description overlapping with the first embodiment is omitted as appropriate.

  The plasma processing apparatus includes a process chamber 30, a gas introduction nozzle 31, an exhaust port 32, an exhaust speed adjustment valve 33, a pressure sensor 34, a high frequency power source 35, a cathode 36, an anode 37, and a matching box 46. It is equipped with. A cathode 36 and a cathode 36 are accommodated in the process chamber 30. Further, an exhaust port 32 and a gas introduction nozzle 31 are connected to the process chamber 30.

  The plasma processing apparatus according to the present embodiment is different from the first embodiment in that the silicon substrate 40 is arranged in the lateral direction (horizontal direction). That is, the plasma processing apparatus according to the second embodiment is a horizontal plasma CVD apparatus. Therefore, the anode 37 and the cathode 36 are disposed along the horizontal direction. The anode 37 serves as a substrate stage that holds a silicon substrate. That is, a silicon substrate is placed on the anode 37. The cathode 36 is disposed above the silicon substrate 40. The anode 37 and the cathode 36 are parallel plate electrodes.

  The anode 37 has a built-in heater. Therefore, the silicon substrate 40 in process can be maintained at a predetermined temperature. The cathode 36 is connected to a high-frequency power source 35 through a matching box 46. The cathode 36 and the process chamber 30 are connected to the ground. Therefore, a high-frequency electric field for generating plasma is generated in the process space between the cathode 36 and the anode 37.

  A hollow portion 36 a is provided inside the cathode 36. The hollow portion 36 a is connected to the gas introduction nozzle 31. Therefore, the gas from the gas introduction nozzle 31 is supplied to the hollow portion 36a. A recess 45 is formed on the lower surface of the cathode 36. The recess 45 is formed in a long cylindrical shape. In the cathode 36, a plurality of recesses 45 are arranged in a lattice pattern. And the hole 45a connected to the hollow part 36a is provided in the bottom face of the some recessed part 45. As shown in FIG.

  Accordingly, the process gas supplied to the hollow portion 36 a is ejected from the recess 45. As a result, the process gas is supplied to the process space between the cathode 36 and the anode 37. The exhaust port 32 exhausts the gas in the process chamber 30. The exhaust port 32 is provided with an exhaust speed adjusting valve 33 as in the first embodiment. Therefore, the pressure in the process chamber 30 can be set to a predetermined process pressure. Accordingly, plasma for performing pretreatment or film formation is generated in the process space between the cathode 36 and the anode 37.

  In the plasma processing apparatus having such a configuration, pretreatment with hydrogen plasma is performed before forming the antireflection film 14 or the passivation film. By so doing, electrode formation can be performed at 600 ° C. or lower as in the first embodiment. Therefore, the freedom degree of a manufacturing process can be made high.

  Note that the present invention is not limited to the above-described embodiment, and can be changed as appropriate without departing from the spirit of the present invention.

11 p-type semiconductor layer, 12 n-type diffusion layer, 13 p + -type diffusion layer 14 antireflection film, 15a surface electrode, 15b surface electrode 16a back surface electrode 16b back surface electrode, 17a solder layer, 17b solder layer 18a solder layer 18b solder layer 30 Process chamber, 31 Gas introduction nozzle, 32 Exhaust port 33 Exhaust speed adjustment valve, 34 Pressure sensor, 35 High frequency power supply 36 Cathode, 37 Anode, 38 Plasma, 39 Through hole 40 Silicon substrate, 41 Glow discharge area, 42 Hollow discharge area 43 Sheath, 44 heater, 45 holes, 46 matching box 50 ions, 51 secondary electrons, 52 gas molecules, 53 radical 110 vacuum chamber, 111 parallel plate electrode, 113 high frequency power supply 114 matching box, 115 gas supply mechanism, 116 gas exhaust machine 117 high-frequency electrode, 118 the counter electrode

Claims (5)

Generating a plasma using a pretreatment gas containing hydrogen to pretreat the substrate;
Forming a thin film on the substrate after performing the pretreatment by generating plasma using a material gas;
Forming a conductive pattern on the substrate on which the thin film is formed;
And a step of using the conductive pattern as an electrode at 600 ° C. or lower. Under the thin film, an impurity layer containing n-type or p-type impurities is provided,
2. The method for manufacturing a solar cell according to claim 1, wherein the conductive pattern is made conductive with the impurity layer by annealing at 600 ° C. or less, and the conductive pattern is used as an electrode.   The thin film is an antireflection film provided on the impurity layer or a passivation film provided on a surface opposite to the surface on which the impurity layer is provided. Solar cell manufacturing method.   The method for manufacturing a solar cell according to claim 1, wherein the thin film is a silicon nitride film. In the step of performing the pretreatment and the step of forming the thin film,
In the state where the substrate is transferred to the vacuum chamber, the pretreatment is performed by generating plasma while supplying the pretreatment gas,
After the pretreatment is finished, the vacuum chamber is evacuated with the supply of the pretreatment gas to the vacuum chamber stopped.
The method for manufacturing a solar cell according to claim 1, wherein after the vacuum chamber is evacuated, plasma is generated while supplying the material gas to form the thin film.

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