JP2014216541A - Wiring board and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board which enables fine wiring to be formed in high density while improving the adhesion of a wiring layer, and to provide a manufacturing method of the wiring board.SOLUTION: A wiring board 1 according to the invention comprises: a substrate 11 where a recessed part 13 is formed on a surface; an adhesion layer 14 formed by a microstructure group; and a wiring layer 12 formed by a conductor. The adhesion layer and the wiring layer are disposed in a region of the substrate where the recessed part 13 is formed.

Description

  The present invention relates to a wiring board and a method for manufacturing the same, which have a high ability to retain the outer shape (shape at the outer edge) of a wiring layer and can achieve finer and higher density wiring.

  In recent years, with miniaturization and high density of semiconductor elements, further miniaturization and high density are required for wiring in an interposer that functions as a connection member for electronic elements and wiring boards.

  As a method for forming wiring on the substrate, a zinc oxide (ZnO) film is formed on the entire surface of the glass substrate catalyzed in three stages by using a chemical method, and then a catalyst is applied to the zinc oxide film, and then no coating is performed. There is known a method of forming a wiring made of a copper film on a zinc oxide film by depositing copper (Cu) by an electrolytic plating method. Here, the zinc oxide film functions as an adhesion layer for adhering the glass substrate and the copper film (Non-Patent Document 1). Moreover, the author of this nonpatent literature 1 is disclosing the method of performing an electrolytic copper plating, after giving electroless copper plating as a formation method of the copper film applicable in that case (patent literature 1). Furthermore, it has also been proposed that a copper film can be formed thick by an electrolytic plating method on a copper film formed by an electroless plating method.

  In addition, after depositing zinc oxide (ZnO) on the entire surface of the wafer by spray pyrolysis or dip coating, a catalyst is applied to a portion of the zinc oxide film where a wiring pattern made of a Cu film is to be formed. An electroless plating method for forming a wiring pattern made of a film is also known (Non-Patent Document 2).

  The inventors of the present invention formed wiring on a glass substrate using the former method (Non-Patent Document 1 and Non-Patent Document 2), and evaluated the formed wiring. As a result, it was found that the zinc oxide film was damaged at the outer edge portion of the wiring, and there was a portion where the pattern shape of the wiring was not maintained. The inventors have investigated the wiring in which damage has occurred and estimated the cause. As a result, the zinc oxide film formed on the glass substrate is particulate and columnar, and is expected to be weak against stress received from the lateral direction (side direction of the film). For example, when the columnar particles fall or bend, it is considered that defects such as peeling of the wiring from the glass substrate or collapse of the wiring pattern occur. As a result, there is a possibility that the disconnection or short circuit of the wiring may occur, and it is considered extremely difficult to immediately adopt the above-described manufacturing method for the wiring board.

JP 2009-24203 A

Surface technology, Vol. 58, no. 12, 2007, 751 pages Surface technology, Vol. 45, no. 5, 1994, 498 pages

  In the present invention, when a structure in which an adhesion layer and a wiring layer are sequentially stacked on a substrate is formed, the holding ability of the outer shape (shape at the outer edge) of the wiring layer is high, and the wiring is miniaturized and densified. An object of the present invention is to provide a wiring board and a method for manufacturing the same.

In order to solve the above-mentioned problem, the wiring board according to claim 1 includes a substrate having a concave portion formed on a surface thereof, an adhesion layer made of a micro structure group, and a wiring layer made of a conductor. And the wiring layer is arranged in a region where the concave portion of the substrate is formed.
According to a second aspect of the present invention, in the wiring board according to the first aspect, the microstructure group is in the form of particles.
According to a third aspect of the present invention, in the wiring substrate according to the first aspect, the microstructure group is columnar.
According to a fourth aspect of the present invention, in the wiring board according to any one of the first to third aspects, the substrate includes a through hole formed from a region where the concave portion of the substrate is formed toward the back surface of the substrate. The adhesion layer and the wiring layer are also formed on the inner wall of the through hole.

In order to solve the above-mentioned problem, a method of manufacturing a wiring board according to claim 5 includes a step of forming a recess on a substrate having a smooth surface, a step of forming the metal oxide film only in the recess, It has the process of providing a catalyst on a metal oxide film, and the plating process of forming an electroless-plated metal film on the metal oxide film to which the said catalyst was provided, It is characterized by the above-mentioned.
The method for manufacturing a wiring board according to claim 6 is the method for manufacturing a wiring board according to claim 5, wherein all of the recesses are formed between the step of forming the recesses and the step of forming the metal oxide film. A step of catalyzing the region.

  According to the present invention, in the wiring substrate formed by forming a structure in which the adhesion layer and the wiring layer are sequentially stacked on the substrate, the outer shape of the wiring layer (the shape at the outer edge portion) is not easily damaged by stress, It is possible to provide a wiring board and a method for manufacturing the wiring board that have a high capability of retaining the outer shape and can achieve finer and higher density wiring.

BRIEF DESCRIPTION OF THE DRAWINGS It is typical sectional drawing which shows an example of the wiring board which concerns on this invention, (a) is a figure which shows all the schematic structures of a wiring board, (b) and (c) each expands the one part. FIG. 5 is a cross-sectional view schematically showing a process of the first manufacturing method of the wiring board 1. FIG. 6 is a cross-sectional view schematically showing a process of a second manufacturing method of the wiring board 2. FIG. It is a longitudinal cross-sectional schematic diagram which shows schematic structure of the wiring board provided with the penetration wiring. It is typical sectional drawing which shows another example (example provided with the penetration wiring) of the wiring board which concerns on this invention, (a) is a figure which shows all the schematic structures of a wiring board, (b) and (c) FIG. 4 is an enlarged view of a part of each. It is sectional drawing which showed typically an example of the manufacturing method of the wiring board provided with the penetration wiring. 6 is a cross-sectional view schematically showing a process of a method for manufacturing a wiring board of Comparative Example 1. FIG. 10 is a cross-sectional view schematically showing a process of a method for manufacturing a wiring board of Comparative Example 2. FIG. It is a cross-sectional schematic diagram for demonstrating collapse of the close_contact | adherence layer in the edge part of an close_contact | adherence layer, (a) is the case of the comparative examples 1 and 2, (b) is the case of the wiring board which concerns on this invention.

Next, the present invention will be described in more detail with reference to the drawings with reference to embodiments and examples. However, the present invention is not limited to these embodiments and examples.
Also, in the description using the following drawings, it should be noted that the drawings are schematic and the ratio of each dimension and the like are different from the actual ones, and are necessary for the description for easy understanding. Illustrations other than the members are omitted as appropriate.

(1) Configuration of Wiring Board (1.1) Overall Configuration of Wiring Board FIG. 1 is a schematic cross-sectional view showing an example of a wiring board according to the present invention, and FIG. It is a figure which shows a schematic structure, FIG.1 (b) and FIG.1 (c) are figures which each expand and show the part.

More specifically, FIG. 1A shows a wiring structure of a wiring board 1 in which an adhesion layer 14 made of a micro structure group and a wiring layer 12 made of a conductor are arranged including a region where the concave portion 13 of the board 11 is formed. It is a cross-sectional schematic diagram which shows. FIG. 1B shows a case where the second particle group S2a (S2) provided between the adhesion layer 14 and the wiring layer 12 is arranged locally (in the form of agglomerates). FIG. 1C shows a case where the second particle group S2b (S2) provided between the adhesion layer 14 and the wiring layer 12 represents the case where the second particle group is arranged in the whole area (in a thin film shape). Yes.
The wiring substrate 1 includes a substrate 11 having a recess 13 formed on the surface, an adhesion layer 14 formed by densely forming minute hexagonal columnar particles as an example of a microstructure group, and a wiring layer 12 made of a plated metal conductor. And.

A recess 13 is formed on the surface of the substrate 11. An adhesion layer 14 made of a metal oxide is formed on the inner bottom surface 13 a and the inner wall 13 b of the recess 13, and a wiring layer 12 is formed on the adhesion layer 14.
The first bottom surface 13a and the inner side wall 13b of the recess 13 contain a particulate metal of 100 nm or less in order to form the adhesion layer 14 (for example, simple metal, metal oxide, metal hydroxide, etc.) first particle group S1 Is arranged.
The surface of the adhesion layer 14 includes a particulate metal having a particle size of 100 nm or less as a catalyst for plating the wiring layer 12 (for example, a simple metal, a metal oxide, a metal hydroxide, etc.) second particle group S2 (S2a, S2b) is arranged.

  More specifically, FIG. 1A shows the wiring structure of the wiring board 1 in which the laminated structure of the adhesion layer 14 made of a micro structure group and the wiring layer 12 made of a conductor is arranged in the recess 13 of the board 11. It is a cross-sectional schematic diagram. FIG. 1B shows the case where the second particle group S2a (S2) provided between the adhesion layer 14 and the wiring layer 12 is locally (in the form of agglomerates), and FIG. A case where the second particle group S2b (S2) provided between the adhesion layer 14 and the wiring layer 12 is arranged in the entire region (in a thin film shape) is shown. What is necessary is just to select 2nd particle group S2a and 2nd particle group S2b suitably according to the material, formation conditions, etc. of the wiring layer 12 provided on it.

(1.2) Substrate The substrate 11 functions as a support member and an insulating member of the wiring substrate 1 and is formed from an inorganic material having heat resistance and insulating properties. Suitable substrate materials include semiconductor materials such as silicon, glass, fine ceramics, and the like. When a semiconductor material is used for the substrate 11, it is necessary to insulate the inner surface (inner bottom surface, inner surface) of the recess 13 by performing a thermal oxidation process or the like after forming the recess 13.
It is effective to select the substrate material so that the linear expansion coefficient of the substrate 11 is substantially the same as the linear expansion coefficient of the wiring board or the electronic element, in order to prevent warping or deformation of the electronic element or the like. It is.

  Specifically, for example, when considering the ease of processing of the through hole P as an interposer that functions as a connecting member for an electronic element and a wiring board, the substrate 11 is formed by forming the substrate from glass or silicon. It is easy to increase the aspect of the hole P. Further, when glass is used, it becomes possible to form three-dimensional micro holes having branching and bending portions by femtosecond laser-assisted etching, which will be described later, and the wiring can be further densified.

  The size of the substrate 11 is not particularly limited, and can be appropriately selected according to the desired function and size of the substrate 1. The thickness of the substrate 11 is usually in the range of about 0.01 to 0.8 mm, and preferably in the range of about 0.01 to 0.60 mm.

(1.3) Concave part It is preferable that the concave part 13 formed on the surface of the substrate 11 has a depth of 10% to 2000% of the thickness of the adhesion layer 14 described later. As a method for forming the recess 13, a wet etching method, a dry etching method, or the like can be used, but a dry etching method capable of etching with high anisotropy is preferable. In addition, what is necessary is just to use a well-known prescription for the specific conditions of an etching.

(1.4) 1st particle group 1st particle group S1 functions as a catalyst at the time of forming the contact | glue layer 14 mentioned later by electroless plating. As the catalyst, for example, palladium (Pd) is preferable, but a known catalyst capable of forming the adhesion layer 14, for example, silver (Ag) can also be used. Moreover, it can replace with silver (Ag) single-piece | unit and can use the thing in the state where palladium (Pd) and silver (Ag) were mixed.
Further, the first particle group S1 may include a plurality of metal elements in one particle and is composed of a single metal element, but the metal particles of the first particle group S1 are composed of a plurality of types. May be.
The first particle group S1 is not necessarily required for the present invention. When the adhesion layer 14 is formed by a method other than the electrolytic plating method or the electroless plating method (for example, spray pyrolysis method or dip coating method), the first particle group S1 The adhesion layer 14 can be formed without arranging the particle group S1.

The first particle group S1 preferably has an average particle diameter of 1 to 100 nm, and the arrangement interval is preferably equal to or less than the pitch of the micro-columnar structure formed in the adhesion layer 14 described later.
Further, the first particle group S1 may also be disposed in the vicinity of the recess 13. By arranging the first particle group S <b> 1 in the vicinity of the recess 13, it is possible to form the wiring layer 12 made of plated metal also in the vicinity of the recess 13. As a result, the recess 13 has a structure in which the adhesion layer 14 is covered with the wiring layer 12 made of plated metal, and chemical resistance can be improved.

(1.5) Adhesion layer The adhesion layer 14 is formed by electroless plating of zinc oxide (ZnO) as an example of a metal oxide. Specifically, the plating solution is formed with a low zinc nitrate concentration to form a fine hexagonal columnar particle structure. More specifically, it is formed as an adhesion layer having a nanoporous structure in which narrow pores (pores) exist between hexagonal columnar particles. With the structure of the columnar particles, the anchor effect of the wiring layer 12 made of the plating metal with respect to the adhesion layer 14 works and the adhesion of the wiring layer 12 made of the plating metal is improved.
The thickness of the adhesion layer 14 is preferably in the range of 0.05 to 1 μm in terms of an average value (which is managed as an average value because of the micro-columnar structure). The column diameter in the cross-sectional direction of the minute columnar particles is preferably in the range of 0.05 to 1 μm as an average value.

(1.6) 2nd particle group 2nd particle group S2 functions as a catalyst at the time of forming the wiring layer 12 which consists of a metal plating mentioned later by electroless plating. As the catalyst, for example, palladium (Pd) is preferable, but a known catalyst capable of forming the wiring layer 12 made of a plating metal can be used.
Further, by disposing the second particle group S2 on the surface of the adhesion layer 14, the surface area of contact with the wiring layer 12 made of a plated metal, which will be described later, dramatically increases, so that a physical anchor effect is exhibited. The adhesion of the wiring layer 12 made of a plated metal can be improved.

The second particle group S2 may include a plurality of metal elements in one particle, and is composed of a single metal element, but the metal atoms of the second particle group S2 may be composed of a plurality of types. good.
The second particle group S2 preferably has an average particle size in the range of 1 to 100 nm, and the arrangement interval is preferably not more than the pitch of the micro-columnar structure formed in the adhesion layer 14.

(1.7) Wiring layer made of plated metal The wiring layer 12 made of plated metal is formed by electroless plating of copper (Cu), for example, which functions as a conductor. The copper wiring may contain a conductive material such as nickel or chromium. By concentrating nickel and chromium in the vicinity of the interface with the adhesion layer 14, the adhesion of the wiring layer 12 made of a plated metal can be further improved.
Further, when the wiring layer 12 made of the plating metal is oxidized in the vicinity of the interface with the adhesion layer 14, the metal constituting the wiring layer 12 and the adhesion layer 14 are more firmly adhered by covalent bonding. May be. Furthermore, the anchor effect of the wiring layer 12 made of the plating metal acts on the adhesion layer 14, and the adhesion of the wiring layer 12 made of the plating metal is improved.

(2) Action / Effect (2.1) Substrate of Comparative Example FIG. 7 is a cross-sectional view schematically showing the process of the method for manufacturing the wiring substrate 100 of Comparative Example 1. According to the wiring substrate 100 of Comparative Example 1, the surface of the degreased glass substrate 110 is adsorbed with a high concentration of a catalyst made of tin (Sn) -silver (Ag) -palladium (Pd) by a three-step catalyst application process. Then, a ZnO film is chemically formed as an adhesion layer 140 from an aqueous solution. As described in Non-Patent Document 1, this ZnO film can be, for example, zinc oxide (ZnO) having a nanoporous structure in which pores (pores) exist between hexagonal columnar particles.

  Next, palladium (Pd) is applied as a catalyst on the ZnO film, and a copper (Cu) thin film as a wiring layer made of a plating metal is formed by electroless plating. Then, a resist mask is formed in a portion where the Cu wiring pattern is to be formed, and Cu and ZnO are removed with an etching solution to form a necessary Cu wiring pattern.

FIG. 8 is a cross-sectional view schematically showing the process of the method for manufacturing the substrate 200 of Comparative Example 2. According to the substrate 200 of Comparative Example 2, a ZnO film is formed as the adhesion layer 240 using a spray pyrolysis method or dip coating, and then a resist mask is formed in a portion where a wiring pattern is to be formed to pattern the ZnO film. . As described in Non-Patent Document 1, this ZnO film can be, for example, zinc oxide (ZnO) having a nanoporous structure in which pores (pores) exist between hexagonal columnar particles.
Next, after providing palladium (Pd) as a catalyst on the patterned ZnO film, a necessary wiring pattern is formed by performing electroless plating of Cu.

When such a wiring formation method is used, it is possible to uniformly form ZnO inside the surface through-hole by using, for example, dip coating as a ZnO formation method when forming the through-hole as an interposer. .
On the other hand, when using a dip coating method that forms in a liquid on a substrate having a through hole with a high aspect ratio, it is necessary to maintain good circulation of the liquid inside the through hole, even in the vicinity of the end face of the through hole. There was a possibility that liquid flow might occur and the formed wiring might be damaged (collapsed).

  Furthermore, in any of the comparative example 1 and the comparative example 2, in the formation process of the wiring layer made of the plated metal, a cleaning process using ultrasonic waves or the like is interposed between the respective processes, so that the surface is smooth. Damage (collapse) of the end of the ZnO film as an adhesion layer formed on the substrate (for example, when the wiring layer is linear, it means “end” of either the front end or the side end) As a result, the wiring may be damaged (collapsed) [see FIG. 9A].

(2.2) Wiring Board of the Present Embodiment As shown in FIG. 1A, the wiring board 1 according to the present embodiment includes a recess 13 on the surface of the substrate 11, and a region including the recess 13 is a metal. An adhesion layer 14 made of an oxide is formed, and a wiring layer 12 is further formed on the adhesion layer 14. As described in Non-Patent Document 1, the adhesion layer 14 is, for example, zinc oxide (ZnO) having a nanoporous structure in which pores (pores) exist between hexagonal columnar particles.

  In particular, as shown in FIG. 1B and FIG. 1C, in order to form the adhesion layer 14 on the inner bottom surface 13a, the inner side wall 13b, and the penetrating portion surface Pa of the through hole P of the recess 13, the thickness is 100 nm or less. A catalyst for plating the wiring layer 12 made of a plating metal on the surface of the adhesion layer 14 in which the first particle group S1 including particulate metal (metal simple substance, metal oxide, metal hydroxide, etc.) is disposed. The second particle group S2 containing a particulate metal of 100 nm or less (metal simple substance, metal oxide, metal hydroxide, etc.) is arranged.

  More specifically, FIG. 1B shows a case where the second particle group S2a (S2) provided between the adhesion layer 14 and the wiring layer 12 is locally (in the form of agglomerates). c) shows a case where the second particle group S2b (S2) provided between the adhesion layer 14 and the wiring layer 12 is arranged in the whole area (in a thin film shape). What is necessary is just to select 2nd particle group S2a and 2nd particle group S2b suitably according to the material, formation conditions, etc. of the wiring layer 12 provided on it.

  That is, since the concave portion 13 is formed on the surface of the substrate 11, the inner wall 13 b of the concave portion 13 is formed on the periphery of the adhesion layer 14. For this reason, the adhesion layer 14 having a columnar particle structure is affected by stress from the side thereof, and the columnar particle is prevented from collapsing (meaning “folding or falling”), and thus It is possible to suppress the wiring from being damaged.

In addition, by disposing the second particle group S2 on the surface of the adhesion layer 14, the surface area where the wiring layer 12 made of the plating metal contacts the adhesion layer 14 is dramatically increased, so that a physical anchor effect is exhibited. Thus, the adhesion of the wiring layer 12 made of plated metal can be improved.
Furthermore, a first particle group S1 made of a particulate metal or metal oxide of 100 nm or less that functions as a catalyst for forming the adhesion layer 14 is disposed on the inner bottom surface 13a and the inner wall 13b of the recess 13. When the through-hole P is formed as an interposer, the adhesion layer 14 is more uniformly formed on the through-hole surface Pa of the through-hole P where ZnO as a reaction object is easily depleted.

  As shown in FIG. 1A, the wiring board 1 according to the present embodiment has a recess 13 formed on the surface of the substrate 11, and an adhesion layer 14 made of a metal oxide on the inner bottom surface 13 a and the inner wall 13 b of the recess 13. And the wiring layer 12 may be laminated in order.

  In addition, the inner bottom surface 13a and the inner side wall 13b of the recess 13 contain a particulate metal of 100 nm or less in order to form the adhesion layer 14 (metal simple substance, metal oxide, metal hydroxide, etc.) first particle group S1. The surface of the adhesion layer 14 contains a particulate metal of 100 nm or less as a catalyst for plating the wiring layer 12 made of a plating metal (metal simple substance, metal oxide, metal hydroxide, etc.) Two particle groups S2 are arranged.

  As a result, the inner wall 13b of the recess 13 is formed at the periphery of the adhesion layer 14, and the minute columnar particles formed on the adhesion layer 14 from the periphery are collapsed (meaning "break or fall"). The adhesion layer 14 can be selectively patterned (see FIG. 9B).

  As described above, in the substrate 1 according to the present embodiment, the wiring layer 12 made of the plating metal can be formed finely and at a high density while improving the adhesion of the wiring layer 12 made of the plating metal.

(3) Wiring Board Manufacturing Method FIG. 2 is a cross-sectional view schematically showing the process of the first manufacturing method related to the wiring board 1, and FIG. 3 schematically shows the process of the second manufacturing method related to the wiring board 1. FIG.
Hereinafter, the manufacturing method of the wiring board 1 and the wiring board 2 will be described with reference to FIGS. 2 and 3, respectively.

(3.1) First manufacturing method (see FIG. 2)
As shown in FIG. 2, first, a substrate 11 having a smooth surface is prepared (a).
Next, after cleaning the surface of the substrate 11 with an acid, alkali, organic solvent or the like, a mask pattern is formed on the surface of the substrate 11 with a resist or the like (b). In the mask pattern, a portion to be a surface wiring is opened in advance.

  Next, the recess 13 is formed on the surface of the substrate 11 using the mask pattern formed in the step (b) (c). When a semiconductor substrate such as a silicon substrate is used as the material of the substrate 11, the previously formed resist mask is once peeled to form an insulating film, and then a mask pattern is formed again at the same location.

Next, in order to form the adhesion layer 14 having a micro-columnar structure, catalysis with Pd is performed (d). Note that Pd as a catalyst is applied not only to the recess 13 but also to the mask pattern.
Next, the mask pattern is peeled off and Pd as a catalyst is applied to the recess 13 (e).

Next, a metal oxide film (ZnO) as an adhesion layer 14 made of minute columnar particles is formed in the recess 13 by electroless plating (f). Thereafter, a catalyst (Pd) is applied on the adhesion layer 14 to form a wiring layer made of plated metal (g). Further, for the catalyst application, an etchant that can apply the catalyst only to the adhesion layer 14 is used.
It should be noted that after applying the catalyst to the entire surface of the substrate 11, it is possible to activate the applied catalyst only in a necessary region by, for example, irradiating with ultraviolet rays, and remove other regions by washing.

  Then, a metal film (Cu) is deposited on the adhesion layer 14 provided with a catalyst by electroless plating or electroplating to form a wiring layer 12 made of plated metal (h). In addition, since the catalyst (Pd) is attached only on the ZnO film as the adhesion layer 14, a metal film (Cu) is selectively deposited on the ZnO film. Thereby, a wiring board in which the wiring layer 12 made of the plating metal is formed on the adhesion layer 14 is obtained.

  In the above-described process, the mask pattern formed in the step (b) may be peeled off after depositing a catalyst on the adhesion layer 14 and before depositing the plated metal film functioning as the wiring layer 12. After forming 14 by electroless plating, it may be peeled off before applying the catalyst onto the adhesion layer 14.

(3.2) Second manufacturing method (see FIG. 3)
As shown in FIG. 3, the second manufacturing method is a first method in which ZnO is formed by electroless plating in that a dip coating method is used as a method for forming a metal oxide film (ZnO) as the adhesion layer 14. Different from the manufacturing method. Therefore, detailed description of the same process as the first manufacturing method is omitted.

A mask pattern is formed with a resist or the like on the surface of the substrate 11 having a smooth surface, and a recess 13 is formed on the surface of the substrate 11 using the mask pattern (c).
Thereafter, a metal oxide film (ZnO) is formed as an adhesion layer 14 in an aqueous solution (d). If a liquid phase method is used, a metal oxide film (ZnO) can be formed only by immersing the substrate 11 in an aqueous solution. Moreover, you may perform the process which improves crystallinity using well-known methods, such as high temperature baking, as needed.

Next, a mask pattern is formed on the surface of the substrate 11 with a resist or the like, and only the recess 13 is not opened (e). Thereafter, the formed ZnO film is etched to form a ZnO pattern in the recess 13 and the resist is peeled off (f).
Thereafter, a catalyst (Pd) is applied on the ZnO pattern (g), and a metal film (Cu) is deposited on the adhesion layer 14 provided with the catalyst by an electroless plating method or an electrolytic plating method to form the wiring layer 12. (H).
After the completion of (h), a metal layer is formed again on the entire surface by sputtering or the like, and electroplating is performed by a known method such as a subtractive method or a semi-additive method to increase the thickness of the wiring layer 12. It doesn't matter.

(4) Wiring board with through wiring and manufacturing method thereof (4.1) Overall configuration of wiring board with through wiring FIG. 4 is a schematic longitudinal sectional view showing a schematic structure of a wiring board with through wiring. is there. FIG. 5 is an enlarged view showing the vicinity of one opening of the through hole in the wiring board shown in FIG. 4, and shows another example of the wiring board according to the present invention (an example having a through wiring). It is typical sectional drawing. (A) is a figure which shows all the schematic structures of a wiring board, (b) and (c) are each the figures which expand and show the part.

  The wiring board 10 provided with the through wiring shown in FIGS. 4 and 5 is used for, for example, an interposer application. Such a wiring board (interposer) 10 functions as a connecting member for electronic elements and other wiring boards, and includes a substrate 11 in which a through hole P is formed in the thickness direction and a through hole P. And a wiring layer 12 made of a plated metal film, which is formed on the inner side surface and both end faces of the through hole P.

A through hole P is provided between the front surface and the back surface of the substrate 11, and any opening of the through hole P is formed in the inner bottom surface 13 a of the recess 13 disposed on the front surface and the back surface of the substrate 11. Is formed. An adhesion layer 14 made of a metal oxide and a wiring layer 12 are sequentially stacked on the inner bottom surface 13a, the inner wall 13b, and the inner surface of the through hole P of the recess 13 to form a through wiring. Yes.
In order to form the adhesion layer 14, the inner bottom surface 13a, the inner wall 13b of the recess 13 and the surface Pa of the through hole P contain particulate metal of 100 nm or less (metal simple substance, metal oxide, metal hydroxide) Etc.) The first particle group S1 is arranged.

  On the surface of the adhesion layer 14, as a catalyst for forming the wiring layer 12 made of a plated metal film by a plating method, a particulate metal having a size of 100 nm or less is contained (metal simple substance, metal oxide, metal hydroxide, etc.) ) The second particle group S2 is arranged.

  The wiring board 10 provided with the through wiring is the same in that the concave portions 13 are formed on both surfaces of the substrate 11 in the wiring substrate 1 described above, but the inner bottom surface 13a of the concave portion 13 formed on both the front and back surfaces of the substrate. The substrate 1 is different from the above-described substrate 1 in that the through hole P is formed so as to pass through each other and the wiring layer 12 is formed on the inner surface Pa of the through portion. Therefore, the detailed description of the same configuration as the substrate 1 is omitted.

(4.2) Through hole The through hole P can be formed by various methods generally used in the field of semiconductor devices and the like.
For example, when a silicon substrate is used as the substrate 11, a plurality of through holes P having a size of about φ30 to 300 μm are formed in a required pattern by a YAG laser or an excimer laser. The thickness of the silicon substrate is not particularly limited, but is generally about 50 μm. After thinning to such a thickness, the surface is smoothed by polishing. In addition, in a silicon substrate, since sufficient insulation may not be obtained, it is necessary to form an insulating layer separately by, for example, thermal oxidation.

Further, when a glass substrate is used, the through hole P can be drilled by etching using a mask, or can be drilled by sandblasting using a mask, but femtosecond laser-assisted etching is preferable. It is.
A femtosecond laser is a laser having a femtosecond (fs) pulse width. By compressing energy and emitting light within a few femtoseconds to hundreds of femtoseconds, it becomes possible to irradiate a strong laser in a fine range in a short time. For this reason, the irradiated femtosecond laser changes the physical properties of the substrate 11 that is the object to be processed at the focal point, and finely forms the modified portion that becomes the through hole P. Note that the pulse width is not limited to a few femtoseconds to several hundred femtoseconds, and a similar modified portion can be formed if the pulse width is about several femtoseconds to about 10 ps.
Even if the substrate 11 that is a material to be processed is a transparent material such as a glass material, the modified portion can be formed.

  The substrate 11 in which the region to be the through hole P is modified through the modified portion forming step is immersed in an etching solution (chemical solution), the modified portion is wet-etched, and the modified portion is removed from the substrate 11. To do. A group of through holes P are three-dimensionally formed in the substrate 11 from which the modified portion has been removed.

(4.3) Manufacturing method of wiring board provided with through wiring FIG. 6 is a cross-sectional view schematically showing an example of a manufacturing method of a wiring board provided with through wiring.
First, as shown in FIG. 6A, a substrate 11 having a through hole P is prepared. The through hole P is formed by etching the silicon substrate when the substrate 11 is a silicon substrate. For the etching, a technique generally used for etching a silicon wafer, for example, plasma etching, sputter etching, reactive ion etching (RIE), or the like can be used.

Further, in place of such a dry etching process, a wet etching process using an etching solution may be used.
Further, the through hole P may be formed by laser processing using, for example, a CO ₂ laser or a YAG laser.
When the substrate 11 is a glass substrate, the through hole P can be formed by femtosecond laser-assisted etching as described above.

Hereinafter, the above-described manufacturing process of the wiring substrate 1 is sequentially applied to the substrate 11 on which the through hole P is formed, and the concave portion 13 including both end surfaces of the through hole P is formed on the surface of the substrate 11. An adhesion layer 14 made of a metal oxide is formed in the included region. Next, by forming the wiring layer 12 made of a plated metal on the adhesion layer 14, the wiring substrate 10 provided with the through wiring can be manufactured.
As shown in FIG. 5, also in the manufacturing method of the wiring board provided with the through wiring, when the adhesion layer 14 is formed on the substrate 11, the first particle group S1 is provided on the substrate 11 in advance. When the wiring layer 12 made of a plated metal is formed on the adhesion layer 14, the second particle group S2 (S2a, S2b) is provided on the adhesion layer 14 in advance.

  More specifically, FIG. 5A shows an inner wall of a through-hole in which the laminated structure of the adhesion layer 14 made of a micro structure group and the wiring layer 12 made of a conductor passes through the recess 13 of the substrate 11 and the inner bottom surface of the recess. FIG. 2 is a schematic cross-sectional view showing a wiring structure of a wiring board 1 disposed on the board. FIG. 5B shows the case where the second particle group S2a (S2) provided between the adhesion layer 14 and the wiring layer 12 is locally (in the form of agglomerates), and FIG. A case where the second particle group S2b (S2) provided between the adhesion layer 14 and the wiring layer 12 is arranged in the entire region (in a thin film shape) is shown. What is necessary is just to select 2nd particle group S2a and 2nd particle group S2b suitably according to the material, formation conditions, etc. of the wiring layer 12 provided on it.

  In the wiring substrate 10 provided with the through wiring according to the present embodiment, the inner wall 13b of the recess 13 is formed on the periphery of the adhesion layer 14, and the adhesion made of minute columnar particles formed on the adhesion layer 14 from the periphery. It is possible to suppress the collapse of the layer 14 (meaning “break or fall”) and selectively pattern the adhesion layer 14.

  DESCRIPTION OF SYMBOLS 1 Wiring board, 10 Wiring board provided with through wiring, 11 board | substrate, 12 wiring layer, 13 recessed part, 13a inner bottom face (recessed part), 13b inner side wall (recessed part), 14 adhesion layer, P through-hole, S1 1st particle group , S2 second particle group.

Claims (6)

A substrate having a recess formed on the surface;
An adhesion layer comprising a microstructure group;
A wiring layer made of a conductor, and
The wiring board, wherein the adhesion layer and the wiring layer are arranged in a region where a concave portion of the substrate is formed.   The wiring board according to claim 1, wherein the microstructure group is in the form of particles.   The wiring board according to claim 2, wherein the micro structure group is columnar.   A through hole formed from a region where the concave portion of the substrate is formed toward the back surface of the substrate is provided, and the adhesion layer and the wiring layer are also formed on an inner wall of the through hole. The wiring board as described in any one of Claims 1 thru | or 3. Forming a recess on a substrate having a smooth surface;
Forming the metal oxide film only in the recess;
Providing a catalyst on the metal oxide film;
And a plating step of forming an electroless plating metal film on the metal oxide film provided with the catalyst. Between the step of forming the recess and the step of forming the metal oxide film,
6. The method for manufacturing a wiring board according to claim 5, further comprising the step of catalyzing the entire region of the recess.

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