JP2014209812A - Semiconductor element and wiring structure of power conversion device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve a problem occurring when gate wiring is composed of wide plate-like conductors and the plate-like conductors of the gate wiring and plate-like conductors of main wiring are laminated in the same direction with each other, that the gate wiring is interfered with an influence of a magnetic field generated by a current that flows in the main wiring and an induced current flows in the gate wiring to cause malfunction of a power semiconductor element.SOLUTION: In a wiring structure of semiconductor elements, which is included in a power conversion device, gate wiring is arranged in a manner such that a lamination direction of the gate wiring composed of plate-like conductor pairs becomes almost orthogonal to a lamination direction of main wiring which is a plate-like conductor.

Description

  The present invention relates to a power conversion device, and more particularly to a structure of a gate wiring for connecting a semiconductor element and a driving device for the semiconductor element.

  In power converters such as inverters that convert DC power into AC power, converters that convert AC power into DC power, or DC chopper circuits that boost or step down DC voltage, power semiconductor elements such as IGBTs are widely used. ing. This power semiconductor element is driven by an on / off signal from a gate driving device. This gate driving device is controlled by a signal from a control logic unit which is a controller of the power conversion device. The power semiconductor element and the gate driving device are connected by a wiring called a gate wiring.

  In general, the gate wiring is preferably configured to have as low an inductance as possible so that a delay does not occur in the gate drive signal from the gate drive device to the power semiconductor element. For this reason, Patent Document 1 and Patent Document 2 disclose a method of forming a gate wiring with a wide flat-plate conductor in contrast to a conventional structure in which two wirings are provided.

Japanese Patent Laid-Open No. 61-227661 JP 2006-21805 A

However, the disclosed prior art has the following problems.
In general, in power converters that handle large amounts of power, such as power converters for railways, the main wiring connected to the main terminals (collector terminals and emitter terminals in IGBTs) through which the main current of the power semiconductor element flows is also low in inductance. In order to reduce the inductance as much as possible, it is arranged over the entire surface of the power semiconductor element in order to reduce the inductance as much as possible.
The current flowing through the conductor of the main wiring is a large current of several hundred A to several thousand A, and this large current generates a large magnetic field around the conductor of the main wiring.

  Since the above-described gate wiring is laid out immediately below the conductor of the main wiring, it is easily affected by this magnetic field. In particular, in the gate wiring structure of the known technology disclosed in Patent Documents 1 and 2 which are the prior art documents described above, the gate wiring is a flat conductor structure, and therefore, it is affected by the magnetic field from the conductor of the main wiring. There is a concern that current may be induced in the gate wiring by the magnetic field. However, in the above-described known technology, this mutual interference is not taken into consideration, and if it is carried out as it is, there is a possibility that an induced current flows through the gate wiring due to electromagnetic induction by the generated magnetic field, causing the power semiconductor element to malfunction.

  The present invention solves the above-described problems, and an object thereof is to provide a gate wiring that is not subject to interference caused by a current flowing in the main wiring.

In order to achieve the above-mentioned object, the following technical means were taken for the gate wiring of the power converter of the present invention. That is,
(1) The stacking direction of the flat conductors of the gate wiring is arranged to be approximately 90 ° different from the stacking direction of the flat conductors of the main wiring.
(2) In the power conversion device described above, the gate wiring is bent below the control terminal of the power semiconductor element, and the gate wiring is arranged so as to be always lower than the control terminal when viewed from the surface of the cooling device.
(3) When a plurality of gate wirings are arranged in one place, they are arranged in the vertical direction as viewed from the cooler.

  According to the present invention, the gate wiring is not affected by the magnetic field generated by the current flowing through the conductor of the main wiring, and the malfunction of the power semiconductor element can be prevented.

Bird's-eye view of Embodiment 1 of the present invention Top view structural diagram of lower layer of Example 1 of the present invention FIG. 3 is a top structural view of the uppermost layer according to the first embodiment of the present invention. Left side structure diagram of Example 1 of the present invention Front structural diagram of Embodiment 1 of the present invention The figure which shows the electric current path | route when the upper arm IGBT turns on and commutates in Example 1 of this invention. The figure which shows the dimension of the height direction of IGBT Bird's-eye view of embodiment 2 of the present invention Bird's eye view of Embodiment 3 of the present invention

  For the purpose of preventing the gate wiring made of a flat conductor for low inductance from being affected by the magnetic field generated by the current flowing in the main wiring of the flat conductor, This was realized by arranging the flat conductors of the main wiring so that the lamination directions were substantially orthogonal.

  FIG. 1 is a bird's-eye view showing one phase of the two-level power conversion device according to the first embodiment of the present invention. FIG. 2 shows a lower-layer conductor bar layout in which the uppermost conductor bar is removed from the top view of FIG. FIG. 3 is a top view of FIG. 1 showing the arrangement of the uppermost conductor bars, FIG. 4 is a left side view of FIG. 1, and FIG. 5 is a front view of FIG.

  1 to 5, 4 is an upper arm IGBT module of a two-level power converter, 5 is a lower arm IGBT module, 403 to 405 are collector terminals of the upper arm IGBT module, and 406 to 408 are emitter terminals of the upper arm IGBT module. , 503 to 505 are collector terminals of the lower arm IGBT, 506 to 508 are emitter terminals of the lower arm IGBT, and 301 is a positive conductor plate for connecting the collector terminals 403 to 405 of the upper arm IGBT to a positive power source (not shown). , 303 is a negative conductor plate for connecting the emitter terminals 506 to 508 of the lower arm IGBT module to a negative power source (not shown), and 302 is an emitter terminal 406 to 408 of the upper arm IGBT module. From 503 to 505 The intermediate conductor plate to be connected, 321 is an output connection terminal for connecting the intermediate conductor plate 302 to an output wiring (not shown), 401 and 402 are gate terminals of the upper arm IGBT, 501 and 502 are gate terminals of the lower arm IGBT, 101, 102 is a gate wiring conductor of the upper arm IGBT, 201 and 202 are gate wiring conductors of the lower arm IGBT, 1 is a gate wiring conductor pair of the stacked upper arm IGBT, 2 is a gate wiring conductor pair of the stacked lower arm IGBT, 6 is a gate driving device, and 7 is a cooling device for the IGBT modules 4 and 5.

  The feature of the first embodiment is that the stacking direction of the gate wiring conductors 101 and 102 of the upper arm IGBT and the gate wiring conductors 201 and 201 of the lower arm IGBT configured by a pair of parallel flat conductors is determined by the conductor of the main wiring. This is a point arranged with an angle of about 90 degrees (substantially orthogonal) with respect to the stacking direction of a certain positive conductor plate 301, intermediate conductor plate 302, and negative conductor plate 303.

  The operation of this embodiment will be described with reference to FIG. 6, taking as an example the operation when the upper arm IGBT module 4 is turned on. FIG. 6 shows how current flow lines change before and after the IGBT module 4 is turned on, and the same components as those in FIGS. 1 to 5 are denoted by the same reference numerals. In FIG. 6, 801 indicates a current stream line before the upper arm IGBT is turned on, and 802 indicates a current stream line after the upper arm IGBT 4 is turned on.

  Before the upper arm IGBT module 4 is turned on, a current is flowing from the negative conductor plate 303 to the output connection terminal 321 via the intermediate conductor plate 302 through a built-in diode of the lower arm IGBT module 5 (not shown). Assuming This current flow line is represented by 801.

  When the IGBT module 4 is turned on by a command from the gate driving device 6, the current represented by the current flow line 801 is changed from the positive terminal (not shown) of the positive conductor plate 301 to the collector terminal 403 of the upper arm IGBT module. ˜405, flows through the intermediate conductor plate 302 via the emitter terminals 406 to 408 of the upper arm IGBT module, and is commutated to the current flowing out to the output connection terminal 321. This current flow line is represented by 802 in FIG. A gate driving current for driving the upper arm IGBT module 4 flows from the gate driving device 6 to the gate control terminals 401 and 402 through the gate wirings 101 and 102.

  At this time, a large current of several hundred to several thousand amperes flows through the positive-side conductor plate 301, the intermediate conductor plate 302, and the negative-side conductor plate 303, and this current changes in a short time of several hundred ns to several μs. Therefore, a very strong magnetic field is generated around each conductor plate.

  In the first embodiment, the arrangement direction of the gate wiring conductors 101 and 102 differs from the arrangement direction of the positive, intermediate, and negative side conductor plates 301 to 303 by approximately 90 °, and therefore is affected by the magnetic field. It becomes difficult, and it can prevent that the induced current by a magnetic field flows into the gate wirings 101-102. This is because the magnetic fields generated by the positive, intermediate and negative conductor plates 301 to 303 are parallel to the positive, intermediate and negative conductor plates 301 to 303. This is because if the gate wiring conductors 101 and 102 are stacked in a direction perpendicular to the magnetic field, it is difficult for the magnetic field to pass between the gate wiring conductors 101 and 102. In general, the laminated conductor plates are not easily affected by an external magnetic field unless an external magnetic field passes between the conductor plates. If the conductors are laminated in the direction shown in the first embodiment, the positive side, intermediate, negative It becomes possible to eliminate the influence of the magnetic field by the conductor plates 301 to 303 on the side.

  In addition, in an IGBT that is generally used in a power conversion device that controls a large amount of power such as a railway vehicle, the IGBT control terminal and the main control terminal are connected between the IGBT base surface connected to the cooling device and the IGBT control terminal to ensure insulation. It is known to have a wider distance than between terminals. Specifically, an IGBT with a 3.3 kV withstand voltage 1200 A rating will be described as an example with reference to FIG.

  FIG. 7 is a diagram showing dimensions of the IGBT module, and the same components as those in FIGS. 1 to 6 are denoted by the same reference numerals. As shown in FIG. 7, the distance between the IGBT gate terminals 401 and 402 from the base surface is 28 mm, but the distance between the gate terminals 401 and 402 and the main terminals 403 to 408 is only 10 mm in the height direction. Therefore, as shown in the first embodiment of FIG. 1, when the gate wiring conductors 101 and 102 of the IGBT are bent downward as viewed from the cooling device 7, the width of the gate wiring conductors 101 and 102 can be increased. This is preferable from the viewpoint of reducing the inductance.

  Further, as shown in the first embodiment of FIG. 1, when the gate wirings of a plurality of IGBTs must be arranged in a concentrated manner, such as in the immediate vicinity of the gate driving device 6, the currents flowing through the respective gate wiring conductors In order to prevent mutual interference due to the above, it is necessary to make the gap between the gate wiring conductor pairs 1 and 2 wider than the gap between the stacked layers. This is because when mutual interference occurs between the pair of gate wirings, a current is induced in the other gate by one gate drive current, causing malfunction.

  As a specific configuration, in FIG. 1, the interval between the stacked upper arm gate wiring conductor pairs 1 and 2 is made wider than the interval between 101 and 102 and the interval between 201 and 202. (See also the front view of FIG. 5).

  In the first embodiment, the stacking direction of the gate wiring conductor pairs 1 and 2 differs from the stacking direction of the positive, intermediate and negative conductor plates 301 to 303 by about 90 ° which is most effective in preventing mutual interference. Although the arrangement is exemplified, the arrangement is not strictly limited to 90 °, and the lamination direction of the gate wiring conductors 101 and 102 and the lamination direction of 201 and 202, and the lamination of the above-described positive side, intermediate, and negative side conductor plates 301 to 303 are illustrated. It will be apparent to those skilled in the art that if the directions are not parallel, similar effects can be obtained at angles other than 90 °. For example, a significant effect cannot be expected at 10 ° and 20 °, but a corresponding effect can be expected at 45 ° or more.

  FIG. 8 shows a second embodiment of the present invention. In FIG. 8, the same components as those in FIGS. In FIG. 8, the positive side, intermediate, and negative side conductor plates 301 to 303 are omitted for convenience of explanation.

  The second embodiment is characterized in that the stacked gate wiring conductor pairs 1 and 2 are arranged in the vertical direction as shown in FIG. When arranged side by side in the vertical direction, interference between the gate wiring conductor pairs 1 and 2 is reduced, and current induction to the other gate wiring conductor pair can be prevented by the driving current of one gate.

  FIG. 9 shows a third embodiment according to the present invention. In FIG. 9, the same components as those in FIGS. In FIG. 9, 904 is an upper arm IGBT module connected in parallel to the upper arm IGBT module 4, 905 is a lower arm IGBT module connected in parallel to the lower arm IGBT module 5, and 911 is a gate wiring whose width is partially reduced in the middle A conductor 912 is a gate wiring conductor of the parallel-connected upper arm IGBT module.

  In FIG. 9, the positive side, intermediate, and negative side conductor plates 301 to 303 are omitted. For convenience of explanation, the gate wiring 911 is translated upward and displayed.

  The feature of the third embodiment is that, in a large-capacity power conversion device in which IGBT modules are connected in parallel, the impedances of the gate wiring conductors of the IGBT modules connected in parallel are equalized.

  In general, it is known that when the IGBTs are used in parallel connection, it is necessary to equalize the length of the gate wiring. This is because when the length of the gate wiring is different, the impedance of the gate wiring is different, and the operation of the IGBT connected to the wiring having a large impedance (long wiring) is delayed with respect to the command signal from the gate driving device. This is because an imbalance occurs between the IGBTs. For this reason, the gate wiring closer to the gate driving device is made longer, and the lengths of the gate wirings of the IGBTs used in parallel are made uniform by detouring the wiring or bundling it.

In the third embodiment, the impedance is increased by partially narrowing the width of the gate wiring conductor of the IGBT module 4 closer to the gate driving device 6, and the gate wiring conductor is not lengthened. The same impedance as that of the gate wiring conductor 912 of the IGBT module 904 farther from the driving device 6 is used to eliminate the imbalance of IGBTs operating in parallel.
In FIG. 9, the gate wiring inductance is increased by narrowing the conductor width of the gate wiring conductor 911 of the IGBT module 4 close to the gate driving device 6, but the same may be achieved by providing a slit in the middle of the gate wiring 911. The effect of can be obtained.

1: Gate wiring conductor pair of stacked upper arm IGBT 2: Gate wiring conductor pair of stacked lower arm IGBT 4: Upper arm IGBT module 5: Lower arm IGBT module 6: Gate driving device 7: IGBT modules 4 and 5 Cooling device 101, 102: gate wiring conductor 201, 202 of upper arm IGBT: gate wiring conductor 301 of lower arm IGBT 301: positive side conductor plate 302: intermediate conductor plate 303: negative side conductor plate 321: output connection terminals 401, 402 : Upper arm IGBT gate terminals 403, 404, 405: Upper arm IGBT module collector terminals 406, 407, 408: Upper arm IGBT module emitter terminals 501, 502: Lower arm IGBT gate terminals 503, 504, 505: Lower Arm IGBT collector terminals 506 and 507 508: Lower arm IGBT emitter terminal 801: Current flow line 802 before upper arm IGBT is turned on 802: Current flow line 904 after upper arm IGBT 4 is turned on 904: Upper arm IGBT module 905 connected in parallel: Parallel connection Lower arm IGBT module 911: Gate wiring conductor 912 having a partially narrowed width: Gate wiring conductor of upper arm IGBT module connected in parallel

Claims (7)

In a wiring structure of a semiconductor element having a pair of main terminals and a pair of control terminals,
A flat first conductor connected to one main terminal of the semiconductor element;
A flat second conductor connected to the other main terminal of the semiconductor element;
A plate-like third conductor connected to one control terminal of the semiconductor element;
A flat fourth conductor connected to the other control terminal of the semiconductor element;
The first and second conductors are stacked close to each other in parallel,
The third and fourth conductors are stacked in close proximity to each other in parallel;
A wiring structure of a semiconductor element, wherein a stacking direction of the first and second conductors and a stacking direction of the third and fourth conductors are substantially orthogonal to each other. The wiring structure of a semiconductor device according to claim 1,
When the distance between the base surface of the module constituting the semiconductor element and the control terminal is wider than between the control terminal and the main terminal, the third and fourth conductors are directed from the control terminal to the base surface. A wiring structure of a semiconductor element, wherein the conductor width is widened by bending. As the wiring structure of the first semiconductor element having a pair of main terminals and a pair of control terminals,
A flat first conductor connected to one main terminal of the first semiconductor element;
A flat second conductor connected to the other main terminal of the first semiconductor element;
A plate-like third conductor connected to one control terminal of the first semiconductor element;
A flat fourth conductor connected to the other control terminal of the first semiconductor element;
The first and second conductors are stacked close to each other in parallel,
The third and fourth conductors are stacked in close proximity in parallel as a first conductor pair;
An upper arm semiconductor element having a wiring structure in which the lamination direction of the first and second conductors and the lamination direction of the first conductor pair are substantially orthogonal;
As the wiring structure of the second semiconductor element having a pair of main terminals and a pair of control terminals,
A flat fifth conductor connected to one main terminal of the second semiconductor element;
A plate-like sixth conductor connected to the other main terminal of the second semiconductor element;
A plate-like seventh conductor connected to one control terminal of the second semiconductor element;
It consists of a plate-shaped eighth conductor connected to the other control terminal of the second semiconductor element,
The fifth and sixth conductors are stacked in close proximity in parallel;
The seventh and eighth conductors are stacked in close proximity in parallel as a second conductor pair;
In the power conversion device comprising a lower arm semiconductor element having a wiring structure in which the lamination direction of the fifth and sixth conductors and the lamination direction of the second conductor pair are substantially orthogonal to each other,
The laminating direction of the first conductor pair and the laminating direction of the second conductor pair are the same direction,
And the distance between the first conductor pair and the second conductor pair is the distance between the third and fourth conductors constituting the first conductor pair and the second conductor pair. A wiring structure for a power converter, characterized in that it is wider than the distance between the seventh and eighth conductors. As the wiring structure of the first semiconductor element having a pair of main terminals and a pair of control terminals,
A flat first conductor connected to one main terminal of the first semiconductor element;
A flat second conductor connected to the other main terminal of the first semiconductor element;
A plate-like third conductor connected to one control terminal of the first semiconductor element;
A flat fourth conductor connected to the other control terminal of the first semiconductor element;
The first and second conductors are stacked close to each other in parallel,
The third and fourth conductors are stacked in close proximity in parallel as a first conductor pair;
An upper arm semiconductor element having a wiring structure in which the lamination direction of the first and second conductors and the lamination direction of the first conductor pair are substantially orthogonal;
As the wiring structure of the second semiconductor element having a pair of main terminals and a pair of control terminals,
A flat fifth conductor connected to one main terminal of the second semiconductor element;
A plate-like sixth conductor connected to the other main terminal of the second semiconductor element;
A plate-like seventh conductor connected to one control terminal of the second semiconductor element;
It consists of a plate-shaped eighth conductor connected to the other control terminal of the second semiconductor element,
The fifth and sixth conductors are stacked in close proximity in parallel;
The seventh and eighth conductors are stacked in close proximity in parallel as a second conductor pair;
In the power conversion device comprising a lower arm semiconductor element having a wiring structure in which the lamination direction of the fifth and sixth conductors and the lamination direction of the second conductor pair are substantially orthogonal to each other,
The electric power characterized in that the first conductor pair and the second conductor pair are arranged such that the direction of both of them is perpendicular to the stacking direction of each of the first and second conductor pairs. Wiring structure of the conversion device. In the wiring structure of the power converter according to claim 3 or 4,
When the distance between the base surface of each module constituting the first and second semiconductor elements and the control terminal is wider than between the control terminal and the main terminal, the first and second conductor pairs are A wiring structure of a power conversion device, wherein the conductor width is increased by bending the control terminal toward a base surface. In the wiring structure of the power converter according to claim 3 or 4,
Another upper arm semiconductor element and another lower arm semiconductor element connected in parallel to each of the upper arm semiconductor element and the lower arm semiconductor element;
Similarly, when the physical distance from each control terminal of the upper arm semiconductor element or the other upper arm semiconductor element to the gate driving device is different, each of the lower arm semiconductor element or the other lower arm semiconductor element When the physical distance from the control terminal to the gate driving device is different, the conductor pair corresponding to the first conductor pair of the semiconductor element on the side close to the gate driving device, similarly, the second conductor pair A wiring structure of a power conversion device, wherein a width of a part of a conductor pair corresponding to is narrowed. In the wiring structure of the power converter according to claim 3 or 4,
Another upper arm semiconductor element and another lower arm semiconductor element connected in parallel to each of the upper arm semiconductor element and the lower arm semiconductor element;
Similarly, when the physical distance from each control terminal of the upper arm semiconductor element or the other upper arm semiconductor element to the gate driving device is different, each of the lower arm semiconductor element or the other lower arm semiconductor element When the physical distance from the control terminal to the gate driving device is different, the conductor pair corresponding to the first conductor pair of the semiconductor element on the side close to the gate driving device, similarly, the second conductor pair A wiring structure of a power conversion device, wherein a slit is provided in a part of a conductor pair corresponding to.

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