JP2013207432A - Electronic camera - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve imaging performance.SOLUTION: When a shutter button 28sh is depressed full, raw image data of continuous seven frames representing a scene captured by an imager 16 are acquired. A CPU 26 creates image data of six frames for preview corresponding to raw image data of preceding six frames in parallel with acquisition processing of image data and then creates image data for preview corresponding to raw image data of a seventh frame. The image data of the seventh frame are created through distortion correction and image data of the preceding six frames are created without through distortion correction, on the other hand. The created image data for preview are displayed in a substitutive manner on an LCD monitor 40 in the order of creation. Further, the CPU 26 records the raw image data of seven frames acquired from the imager 16 onto a recording medium 44 after distortion correction.

Description

  The present invention relates to an electronic camera, and more particularly to an electronic camera that creates a preview image and a recorded image based on an electronic image output from an imaging apparatus.

  An example of this type of camera is disclosed in Patent Document 1. According to this background art, when the WIDE side detection switch detects that the zoom movable lens group is on the wide-angle side, distortion aberration that appears in the output of the image sensor due to the zoom movable lens group is caused by the distortion correction circuit. It is corrected. The preview image displayed on the liquid crystal monitor through the distortion correction is updated at a time interval corresponding to the processing time of the distortion correction circuit. As a result, the quality of the preview screen can be improved without increasing the circuit scale.

JP 2007-5912 A

  However, in the background art, there is a limit in imaging performance because the update period of the preview image and thus the acquisition period of the image from the imaging sensor depend on the processing capability of the distortion correction circuit.

  Therefore, a main object of the present invention is to provide an electronic camera that can improve imaging performance.

  The electronic camera according to the present invention (10: reference numeral corresponding to the embodiment; the same applies hereinafter) acquires K electronic images (K: an integer of 2 or more) from the imaging means (16) when a recording operation is accepted. Means (S27 to S33), a process of creating K-1 preview images respectively corresponding to the preceding K-1 electronic images out of the K electronic images acquired by the acquiring means without undergoing distortion correction The first creation means (S65 to S71, S77) that executes the image in parallel with the processing of the acquisition means, and the preview image corresponding to the last electronic image among the K electronic images acquired by the acquisition means is subjected to distortion correction. Second creating means (S79 to S81) to be created, display means (S55, S73 to S75, S83 to S85) for alternatively displaying the K preview images created by the first creating means and the second creating means in the order of creation; And K electronic images acquired by the acquisition means. A third generating means for generating via a distortion correction corresponding K number of recorded images, respectively (S37 ~ S45).

  Preferably, the imaging means has an imaging surface for capturing an optical image through the lens (12), and the distortion correction corresponds to a process of correcting distortion caused by lens aberration.

  Preferably, correction means (34) for correcting the distortion of the designated electronic image among the electronic images acquired by the acquisition means is further provided, and the second creation means specifies the last electronic image and activates the correction means, The third creation means designates each of the K electronic images and activates the correction means.

  Preferably, the display means includes first preview image display means (S73 to S75) for displaying the preceding K-1 preview images among the K preview images in parallel with the processing of the first creation means.

  Preferably, an activation means (S37) for activating the third creation means after the display object of the display means reaches the last preview image is further provided.

  The imaging control program according to the present invention obtains K (K: an integer of 2 or more) electronic images from the imaging means (16) when a recording operation is accepted by the processor (26) of the electronic camera (10). (S27 to S33), a process of creating K-1 preview images respectively corresponding to the preceding K-1 electronic images out of the K electronic images acquired in the acquisition step without undergoing distortion correction. First creation step (S65 to S71, S77) executed in parallel with the processing of the acquisition step, a preview image corresponding to the last electronic image among the K electronic images acquired by the acquisition step is generated through distortion correction A second creation step (S79 to S81), a display step (S55, S73 to S75, S83 to S85) for displaying K preview images created by the first creation step and the second creation step in the order of creation, and Acquisition This is an imaging control program for executing a third creation step (S37 to S45) for creating K recorded images respectively corresponding to the K electronic images acquired by the step through distortion correction.

  The imaging control method according to the present invention is an imaging control method executed by the electronic camera (10). When a recording operation is accepted, K electronic images (K: an integer of 2 or more) are taken from the imaging means (16). Acquisition steps (S27 to S33) to be acquired, and K-1 preview images respectively corresponding to the preceding K-1 electronic images among the K electronic images acquired by the acquisition step are not subjected to distortion correction. First creation step (S65 to S71, S77) for executing the process to be created in parallel with the process of the acquisition step, the preview image corresponding to the last electronic image among the K electronic images acquired by the acquisition step is distorted A second creation step (S79 to S81) created through correction, and a display step (S55, S73 to S75, S83 to display substitute images of the K preview images created by the first creation step and the second creation step in the order of creation) S85) And a third generating step of generating the K recorded images corresponding respectively to the obtained K-number of electronic image by obtaining step through the distortion correction (S37 ~ S45).

  An external control program according to the present invention is an external control program supplied to an electronic camera (10) including a processor (26) that executes processing according to an internal control program stored in a memory (46), and accepts a recording operation. Acquisition step (S27 to S33) for acquiring K (K: integer greater than or equal to 2) electronic images from the imaging means (16), and preceding K-1 among the K electronic images acquired by the acquisition step A first creation step (S65 to S71, S77), in which a process of creating K-1 preview images corresponding to each of the electronic images without distortion correction is performed in parallel with the process of the acquisition step; In the second creation step (S79 to S81), the first creation step, and the second creation step, the preview image corresponding to the last electronic image among the K electronic images acquired by the above step is created through distortion correction. Display step (S55, S73 to S75, S83 to S85) for alternative display of the K preview images created in the order of creation, and K records corresponding to the K electronic images obtained in the acquisition step, respectively. It is an external control program for causing a processor to execute a third creation step (S37 to S45) for creating an image through distortion correction in cooperation with the internal control program.

  An electronic camera (10) according to the present invention includes a capturing unit (48) that captures an external control program, and a processor that executes processing according to the external control program captured by the capturing unit and the internal control program stored in the memory (46). (26) The external control program obtains K (K: an integer of 2 or more) electronic images from the imaging means (16) when a recording operation is received (S27 to S33). ), A process of generating K-1 preview images respectively corresponding to the preceding K-1 electronic images among the K electronic images acquired in the acquisition step without performing distortion correction. Creation step (S65 to S71, S77) executed in parallel with the preview image, the preview image corresponding to the last electronic image among the K electronic images obtained by the obtaining step A second creation step (S79 to S81) for creating the image through distortion correction, and a display step (S55, S73 to S75, for displaying the K preview images created by the first creation step and the second creation step in the order of creation) In cooperation with the internal control program, S83 to S85) and a third creation step (S37 to S45) for creating K recorded images respectively corresponding to the K electronic images obtained by the obtaining step through distortion correction Corresponds to the program to be executed.

  According to the present invention, the preceding K-1 preview images are created in parallel with the acquisition process of K electronic images and without undergoing distortion correction. This shortens the time required to acquire K electronic images. Also, a preview image corresponding to the last electronic image is created through distortion correction, and K preview images are alternatively displayed in the order of creation. This improves the apparent quality of the preview image. Furthermore, K recorded images are created through distortion correction. This improves the quality of the recorded image. Thus, the imaging performance is improved.

  The above object, other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments with reference to the drawings.

It is a block diagram which shows the basic composition of one Example of this invention. It is a block diagram which shows the structure of one Example of this invention. FIG. 3 is an illustrative view showing one example of a mapping state of an SDRAM applied to the embodiment in FIG. 2; (A) is a timing diagram showing an example of a still image capturing operation under the single shooting mode, and (B) is a timing diagram showing an example of a preview image creation & display operation under the single shooting mode. FIG. 6C is a timing chart showing an example of a still image recording operation under the single shooting mode. (A) is a timing diagram showing an example of a still image capturing operation under the continuous shooting mode, and (B) is a timing diagram showing an example of a preview image creation and display operation under the continuous shooting mode. FIG. 6C is a timing chart showing an example of a still image recording operation under the continuous shooting mode. It is a flowchart which shows a part of operation | movement of CPU applied to the FIG. 2 Example. It is a flowchart which shows a part of other operation | movement of CPU applied to the FIG. 2 Example. FIG. 11 is a flowchart showing still another portion of behavior of the CPU applied to the embodiment in FIG. 2; FIG. 10 is a flowchart showing yet another portion of behavior of the CPU applied to the embodiment in FIG. 2; It is a flowchart which shows a part of other operation | movement of CPU applied to the FIG. 2 Example. It is a block diagram which shows the structure of the other Example of this invention.

Embodiments of the present invention will be described below with reference to the drawings.
[Basic configuration]

  Referring to FIG. 1, the electronic camera of this embodiment is basically configured as follows. The acquisition unit 1 acquires K (K: an integer of 2 or more) electronic images from the imaging unit 6 when a recording operation is received. The first creation means 2 creates K-1 preview images respectively corresponding to the preceding K-1 electronic images among the K electronic images acquired by the acquisition means 1 without undergoing distortion correction. The process is executed in parallel with the process of the acquisition unit 1. The second creating means 3 creates a preview image corresponding to the last electronic image among the K electronic images obtained by the obtaining means 1 through distortion correction. The display means 4 displays the K preview images created by the first creating means 2 and the second creating means 3 in the order of creation. The third creating means 5 creates K recorded images respectively corresponding to the K electronic images acquired by the acquiring means 1 through distortion correction.

The preceding K-1 preview images are created in parallel with the K electronic image acquisition process and without distortion correction. This shortens the time required to acquire K electronic images. Also, a preview image corresponding to the last electronic image is created through distortion correction, and K preview images are alternatively displayed in the order of creation. This improves the apparent quality of the preview image. Furthermore, K recorded images are created through distortion correction. This improves the quality of the recorded image.
[Example]

  Referring to FIG. 2, the digital camera 10 of this embodiment includes a focus lens 12 and an aperture unit 14 driven by drivers 18a and 18b, respectively. The optical image that has passed through these members is irradiated onto the imaging surface of the imager 16 and subjected to photoelectric conversion. Thereby, a charge corresponding to the optical image is generated.

  When the power is turned on, the CPU 26 instructs the driver 18c to repeat the pre-exposure operation and the thinning-out reading operation under the main task in order to start the moving image capturing, and the display control task in order to start the post-processing for the moving image. The post-processing circuit 36 is activated below, and the LCD driver 36 is activated under the display control task to start image display.

  The driver 18c performs pre-exposure on the imaging surface in response to a vertical synchronization signal Vsync periodically generated from an SG (Signal Generator) (not shown), and a part of the charge generated on the imaging surface is raster-scanned. read out. From the imager 16, low-resolution raw image data based on the read charges is periodically output.

  The preprocessing circuit 20 performs processing such as digital clamping, pixel defect correction, and gain control on the raw image data output from the imager 16. The raw image data subjected to these processes is written into the raw image area 32a (see FIG. 3) of the SDRAM 32 through the memory control circuit 30.

  The post-processing circuit 36 reads the raw image data stored in the raw image area 32a through the memory control circuit 30, and performs a series of processes of color separation processing, white balance adjustment processing, and YUV conversion processing on the read raw image data. Apply. The YUV format image data thus generated is written into the display image area 32b (see FIG. 3) of the SDRAM 32 by the memory control circuit 30. The LCD driver 38 repeatedly reads the image data stored in the display image area 32b through the memory control circuit 30, and drives the LCD monitor 40 based on the read image data. As a result, a moving image representing a scene captured on the imaging surface is displayed on the monitor screen.

  Banks A and B are formed in the display image area 32b. The CPU 26 switches the data write destination of the post-processing circuit 36 between the banks A and B every time the vertical synchronization signal Vsync is generated, and the data read destination of the LCD driver 38 is changed to the banks B and B every time the vertical synchronization signal Vsync is generated. Switch between A. That is, the data writing destination and the data reading destination are specified alternately and complementarily.

  The pre-processing circuit 20 shown in FIG. 2 executes a simple Y conversion process that simply converts raw image data into Y data in addition to the processes described above. An evaluation area (not shown) is assigned to the imaging surface.

  The AE evaluation circuit 22 integrates part of the Y data generated by the preprocessing circuit 20 belonging to the evaluation area every time the vertical synchronization signal Vsync is generated, and outputs the integration value as an AE evaluation value. The AF evaluation circuit 24 integrates the high frequency component of Y data belonging to the evaluation area among the Y data generated by the preprocessing circuit 20 every time the vertical synchronization signal Vsync is generated, and outputs the integrated value as an AF evaluation value. To do.

  When the shutter button 28sh provided in the key input device 28 is in a non-operating state, the CPU 26 executes a simple AE process referring to the AE evaluation value output from the AE evaluation circuit 22 under the main task, and sets the appropriate EV. Calculate the value. The aperture amount and exposure time that define the calculated appropriate EV value are set in the drivers 18b and 18c, whereby the luminance of the raw image data output from the imager 16 is roughly adjusted.

  When the shutter button 28sh is half-pressed, the CPU 26 executes a strict AE process with reference to the AE evaluation value under the main task, and calculates an optimum EV value. The aperture amount and the exposure time that define the calculated optimum EV value are also set in the drivers 18b and 18c, whereby the luminance of the raw image data output from the imager 16 is strictly adjusted. The CPU 26 also executes AF processing with reference to the AF evaluation value output from the AF evaluation circuit 24 under the main task. The focus lens 12 is moved in the optical axis direction by the driver 18a in order to search for a focal point, and is arranged at the focal point found by this. As a result, the high frequency component of the raw image data increases.

  When the shutter button 28sh is fully pressed, the CPU 26 instructs the driver 18c to stop the pre-exposure operation and the thinning-out reading operation in order to interrupt the moving image capturing process under the main task. The CPU 26 also gives a corresponding command to the post-processing circuit 36 to stop the post-processing for moving images under the display control task. As a result, the output process of the low-resolution raw image data is stopped, and the corresponding YUV format image data generation process is also stopped.

  Further, the CPU 26 instructs the driver 18c to execute the main exposure operation and the all-pixel reading operation in order to execute the still image capturing process under the recording control task. The driver 18c performs main exposure on the imaging surface in response to the vertical synchronization signal Vsync, and reads out all the charges generated thereby in a raster scanning manner.

  The imaging mode is switched between the single shooting mode and the continuous shooting mode by the mode switch 28md. The maximum value Kmax is set to “1” corresponding to the single shooting mode, and is set to “7” corresponding to the continuous shooting mode.

  The main exposure operation and the all pixel readout operation by the driver 18c are executed by the number of times corresponding to the maximum value Kmax. As a result, the raw image data of the Kmax frame having a high resolution is output from the imager 16. The output raw image data is written into the raw image area 32c (see FIG. 3) of the SDRAM 32 through the preprocessing circuit 20 and the memory control circuit 30.

  If the current imaging mode is the single-shot mode, the CPU 26 instructs the post-processing circuit 36 to execute the reduction & post-processing on one frame of raw image data stored in the raw image area 32c under the display control task. To do. The post-processing circuit 36 reads desired raw image data from the raw image area 32c through the memory control circuit 30, reduces the resolution of the read raw image data, and converts the raw image data having the reduced resolution into the YUV format. The image data is converted, and the converted image data is written into the YUV image area 32d (see FIG. 3) through the memory control circuit 30.

  The CPU 26 also instructs the distortion correction circuit 34 to execute distortion correction processing on the YUV format image data under the display control task. The distortion correction circuit 34 reads desired image data from the YUV image area 32d through the memory control circuit 32, corrects distortion of the read image data (distortion: distortion caused by the aberration of the focus lens 12), and correction. The subsequent image data is written into the designated bank of the display image area 32b through the memory control circuit 30.

  The bank designation is updated in response to the next vertical synchronization signal Vsync. Therefore, the image data stored in the display image area 32b is displayed on the LCD monitor 40 as a preview image in the period after the next frame. As a result, when the still image capturing process is executed at the timing shown in FIG. 4A, the preview image is created and displayed at the timing shown in FIG.

  When the preview image is displayed, the CPU 26 instructs the post-processing circuit 36 to execute post-processing on the raw image data of one frame stored in the raw image area 32c, and the image data in the YUV format created by the post-processing. Is executed to the distortion correction circuit 34.

  The post-processing circuit 36 reads out desired raw image data from the raw image area 32c through the memory control circuit 30, converts the read raw image data into YUV format image data, and performs memory control on the converted image data. The data is written into the YUV image area 32e (see FIG. 3) through the circuit 30. The distortion correction circuit 34 reads desired image data from the YUV image area 32 e through the memory control circuit 30, performs distortion correction on the read image data, and the image data with the distortion corrected through the memory control circuit 30. Is written in the YUV image area 32f (see FIG. 3).

  Thereafter, the CPU 26 instructs the memory I / F 42 to execute the recording process. The memory I / F 42 reads the image data stored in the YUV image area 32f through the memory control circuit 30, and records the read image data on the recording medium 44 in a file format. When the preview image is displayed at the timing shown in FIG. 4B, the YUV conversion processing, distortion correction processing, and recording processing for the recording raw image data are executed at the timing shown in FIG.

  If the current imaging mode is the continuous shooting mode, the CPU 26 executes reduction / post-processing on the raw image data of the preceding six frames stored in the raw image area 32c to the post-processing circuit 36 under the display control task. Command.

  The post-processing circuit 36 sequentially reads out desired 6 frames of raw image data from the raw image area 32d through the memory control circuit 30, converts the read raw image data into YUV format image data having a low resolution, and The converted image data is written into the designated bank of the display image area 32b through the memory control circuit 30.

  The bank designation is updated every time reduction & post-processing corresponding to one frame is completed, and 6 frames of image data are alternately written in banks A and B. The LCD driver 38 alternately reads the image data written in the banks A and B in this way. As a result, 6-frame preview images in which distortion due to the aberration of the focus lens 12 appears are sequentially displayed on the monitor screen.

  Thereafter, the CPU 26 instructs the post-processing circuit 36 to execute reduction & post-processing on the raw image data of the seventh frame stored in the raw image area 32c under the display control task. The post-processing circuit 36 reads the raw image data of the seventh frame from the raw image area 32c through the memory control circuit 30, reduces the resolution of the read raw image data, and converts the raw image data having the reduced resolution to the YUV. The image data is converted into image data in the format, and the converted image data is written into the YUV image area 32d through the memory control circuit 30.

  The CPU 26 also instructs the distortion correction circuit 34 to execute distortion correction processing on the image data of the seventh frame according to the YUV format. The distortion correction circuit 34 reads the image data of the seventh frame from the YUV image area 32 d through the memory control circuit 32, corrects the distortion of the read image data, and displays the corrected image data through the memory control circuit 30. Write to the specified bank in the image area 32b.

  The bank designation is updated in response to the next vertical synchronization signal Vsync. Therefore, the image data of the seventh frame whose distortion has been corrected is displayed on the LCD monitor 40 as a preview image in the period after the next frame. When the still image capturing process is executed at the timing shown in FIG. 5A, a preview image is created and displayed at the timing shown in FIG.

  When the preview image of the seventh frame is displayed on the LCD monitor 40, the CPU 26 instructs the post-processing circuit 36 to execute post-processing on the seven-frame raw image data stored in the raw image area 32c. The distortion correction circuit 34 is instructed to execute distortion correction processing on the generated seven frames of image data.

  The post-processing circuit 36 reads the raw image data of each frame from the raw image area 32 c through the memory control circuit 30, converts the read raw image data into YUV format image data, and stores the converted image data in the memory Data is written into the YUV image area 32e (see FIG. 3) through the control circuit 30. The distortion correction circuit 34 reads the image data of each frame from the YUV image area 32 e through the memory control circuit 30, performs distortion correction on the read image data, and passes the image data whose distortion is corrected through the memory control circuit 30. The data is written in the YUV image area 32f (see FIG. 3) of the SDRAM 32.

  When 7 frames of image data with corrected distortion are secured in the YUV image area 32f, the CPU 26 commands the memory I / F 42 to execute the recording process. The memory I / F 42 reads the YUV image data of each frame stored in the YUV image area 32f through the memory control circuit 30, and records the read image data on the recording medium 44 in a file format.

  When the preview image is displayed at the timing shown in FIG. 5B, the YUV conversion processing, distortion correction processing, and recording processing for the recording raw image data are executed at the timing shown in FIG.

  The CPU 26 performs a plurality of tasks including the main task shown in FIG. 6, the still image acquisition control task shown in FIGS. 7 to 8, and the display control task shown in FIGS. 9 to 10 in parallel under the control of the multitask OS. Run. Note that control programs corresponding to these tasks are stored in the flash memory 46.

  Referring to FIG. 6, in step S1, the driver 18c is instructed to repeat the pre-exposure operation and the thinning-out reading operation in order to start the moving image capturing process. As a result, low-resolution raw image data is repeatedly output from the imager 16. In step S3, it is determined whether or not the shutter button 28sh is half-pressed. As long as the determination result is NO, the simple AE process is repeated in step S5. As a result, the luminance of the raw image data output from the imager 16 is roughly adjusted.

  When the determination result in step S3 is updated from NO to YES, a strict AE process and an AF process are executed in step S7. The luminance of the raw image data is strictly adjusted by the strict AE process, and the high frequency component of the raw image data is increased by the AF process.

  In step S9, it is determined whether or not the shutter button 28sh is fully pressed. In step S11, it is determined whether or not the operation of the shutter button 28sh is released. If the determination result of step S11 is YES, it will return to step S3, and if the determination result of step 9 is YES, it will progress to step S13.

  In step S13, the driver 18c is instructed to stop the pre-exposure operation and the thinning-out reading operation in order to interrupt the moving image capturing process. As a result, the output of the low-resolution raw image data is stopped. In step S15, a recording control task is activated, and in step S17, it is determined whether or not a recording process in step S45 described later has been completed. When the determination result is updated from NO to YES, the same process as step S1 described above is executed in step S19, and then the process returns to step S3.

  Referring to FIG. 7, in step S21, it is determined whether the current imaging mode is the single shooting mode or the continuous shooting mode. If the current imaging mode is the single shooting mode, the maximum value Kmax is set to “1” in step S23, and if the current imaging mode is the continuous shooting mode, the maximum value Kmax is set to “7” in step S25.

  In step S27, the variable K is set to “1”, and in step S29, the driver 18c is instructed to execute the main exposure operation and the all-pixel reading operation to execute the still image capturing process. As a result, the raw image data of the Kth frame having high resolution is output from the imager 16. The output raw image data is written into the raw image area 32 c via the preprocessing circuit 20 and the memory control circuit 30.

  In step S31, it is determined whether or not the variable K has reached the maximum value Kmax. If the determination result is NO, the variable K is incremented in step S33, and the process returns to step S29. As a result, Kmax frame raw image data is secured in the raw image area 32c.

  When the determination result in step S31 is updated to YES, the process waits for the completion of the process in step S85 described later in step S35, and then the variable K is set to “1” in step S37. In step S39, the post-processing circuit 36 is instructed to execute post-processing on the raw image data of the Kth frame, and in step S41, the distortion correction circuit 34 is instructed to execute distortion correction processing on the image data of the K-th frame according to the YUV format. . The K-th frame raw image data is converted into YUV format image data by the post-processing circuit 36, and the K-th frame image data according to the YUV format is subjected to distortion correction by the distortion correction circuit 34.

  In step S43, it is determined whether or not the variable K has reached the maximum value Kmax. If the determination result is NO, the variable K is incremented in step S45, and the process returns to step S41. As a result, the image data of the Kmax frame whose distortion has been corrected is secured in the YUV image area 32f.

  When the determination result in step S43 is updated from NO to YES, the memory I / F 42 is commanded to execute the recording process in step S47. The memory I / F 42 reads the image data of each frame stored in the YUV image area 32f through the memory control circuit 30, and records the read image data on the recording medium 44 in a file format. When the recording is completed, the process returns to step S21.

  Referring to FIG. 9, in step S51, the bank setting of display image area 32b is initialized. By the initialization, the bank A is designated as the data writing destination of the post-processing circuit 36 and the bank B is designated as the data reading destination of the LCD driver 38. In step S53, the post-processing circuit 36 is instructed to start moving image post-processing, and in step S55, the LD driver 38 is instructed to start image display.

  The post-processing circuit 36 repeatedly reads out the raw image data stored in the raw image area 32a through the memory control circuit 30, converts the read raw image data into image data in the YUV format, and converts the converted image data. Data is written to the designated bank through the memory control circuit 30. The LCD driver 38 repeatedly reads out the image data stored in the designated bank through the memory control circuit 30 and displays an image based on the read image data on the LCD monitor 40.

  In step S57, it is determined whether or not the shutter button 28sh has been fully pressed. In step S59, it is determined whether or not the vertical synchronization signal Vsync has been generated. If the determination result in step S57 is NO and the determination result in step S59 is YES, the bank setting is updated in step S61. Specifically, the data write destination of the post-processing circuit 36 is switched between the banks A and B, and the data read destination of the LCD driver 38 is switched between the banks B and A. When the update is completed, the process returns to step S57. As a result, the moving image is displayed on the LCD monitor 40 unless the shutter button 28sh is fully pressed.

  When the determination result in step S57 is updated from NO to YES, the process proceeds to step S63, and the post-processing circuit 36 is commanded to interrupt the moving image post-processing. In step S65, it is determined whether or not the raw image data of the first frame after the shutter button 28sh is fully pressed is secured in the raw image area 32c. When the determination result is updated from NO to YES, the variable L is set to “1” in step S67, and it is determined whether or not the variable L has reached the maximum value Kmax. If the determination result is NO, the process proceeds to step S71, and if the determination result is YES, the process proceeds to step S77.

  In step S71, the post-processing circuit 36 is instructed to execute reduction & post-processing on the Lth frame. The post-processing circuit 36 reads the raw image data of the Lth frame stored in the raw image area 32c through the memory control circuit 32, converts the read raw image data into low-resolution image data according to the YUV format, and The converted image data is written into the designated bank of the display image area 32b through the memory control circuit 30.

  In step 73, it is determined whether or not the vertical synchronization signal Vsync is generated. When the determination result is updated from NO to YES, the same process as step S61 described above is executed in step S75. As a result, the image data of the Lth frame is read by the LCD driver 38, and the still image of the Lth frame is displayed on the LCD driver 40 as a preview image. When the process of step S75 is completed, the variable L is incremented in step S77, and then the process returns to step S69.

  In step S79, the post-processing circuit 36 is instructed to execute reduction & post-processing on the Lth frame, and in step S81, the distortion correction circuit 34 is instructed to execute distortion correction processing on the Lth frame.

  The post-processing circuit 36 reads the raw image data of the Lth frame stored in the raw image area 32d through the memory control circuit 30, converts the read raw image data into low-resolution image data according to the YUV format, and The converted image data is written into the YUV image area 32d through the memory control circuit 30.

  The distortion correction circuit 34 reads the image data of the Lth frame stored in the YUV image area 32d through the memory control circuit 32, corrects the distortion of the read image data, and stores the corrected image data in the memory control circuit. 30 is written to the designated bank of the display image area 32b.

  In step 83, it is determined whether or not the vertical synchronization signal Vsync is generated. When the determination result is updated from NO to YES, a process similar to step S61 described above is executed in step S85. As a result, the image data of the Lth frame is read by the LCD driver 38 and the preview image of the Lth frame is displayed on the LCD driver 40.

  In step S87, it is determined whether or not the recording process in step S45 described above has been completed. When the determination result is updated from NO to YES, in step S89, the LCD driver 38 is instructed to interrupt the display process, and thereafter, the process returns to step S51.

  As can be seen from the above description, when the shutter button 28sh is fully pressed in a state where the continuous shooting mode is selected, the CPU 26 acquires continuous seven frames of raw image data representing a scene captured by the imager 16 ( S27 ~ S33). The CPU 26 also creates 6 frames of preview image data corresponding to the preceding 6 frames of raw image data of the acquired 7 frames of raw image data in parallel with the process of acquiring the 7 frames of image data. (S65 to S71, S77), and then image data for preview corresponding to the raw image data of the seventh frame is created (S79 to S81). Here, the image data of the seventh frame is created through distortion correction, while the image data of the preceding 6 frames is created without undergoing distortion correction. The image data for preview created in this way is displayed as an alternative on the LCD monitor 40 in the order of creation (S55, S73 to S75, S83 to S85). The CPU 26 further records the raw image data of 7 frames acquired from the imager 16 on the recording medium 44 through distortion correction (S37 to S45).

  The preceding 6-frame preview image is created in parallel with the 7-frame raw image data acquisition process and without distortion correction. As a result, the time required for obtaining the raw image data of 7 frames can be shortened. A preview image corresponding to the raw image data of the seventh frame is created through distortion correction, and the preview image of the seventh frame is alternatively displayed in the order of creation. This improves the apparent quality of the preview image. Further, the raw image data of 7 frames is recorded after distortion correction. This improves the quality of the recorded image.

  In this embodiment, the multitask OS and control programs corresponding to a plurality of tasks executed thereby are stored in the flash memory 46 in advance. However, as shown in FIG. 11, a communication I / F 48 is provided in the digital camera 10 and some control programs are prepared in the flash memory 46 from the beginning as internal control programs, while other control programs are prepared as external control programs. May be acquired from an external server. In this case, the above-described operation is realized by cooperation of the internal control program and the external control program.

  In this embodiment, the process executed by the CPU 26 is divided into a plurality of tasks. However, each task may be further divided into a plurality of small tasks, and a part of the divided plurality of small tasks may be integrated with other tasks. Further, when each task is divided into a plurality of small tasks, all or part of the tasks may be acquired from an external server.

  Further, in this embodiment, the processing of the CPU 26 is divided into a main task, a recording control task, and a display control task. However, the processing of the CPU 26 may be divided into a main task, a raw image data import task, and a preview image creation / display task. In this case, post-processing, distortion correction processing, and recording processing are executed under the main task.

DESCRIPTION OF SYMBOLS 10 ... Digital camera 16 ... Imager 20 ... Pre-processing circuit 26 ... CPU
32 ... SDRAM
36 ... Post-processing circuit 40 ... LCD monitor

Claims (9)

Acquisition means for acquiring K (K: an integer of 2 or more) electronic images from the imaging means when a recording operation is received;
The process of the acquisition unit is a process of creating K-1 preview images respectively corresponding to the preceding K-1 electronic images among the K electronic images acquired by the acquisition unit without undergoing distortion correction. First creation means for executing in parallel with
Second creation means for creating a preview image corresponding to the last electronic image among the K electronic images obtained by the obtaining means, through the distortion correction;
Display means for alternatively displaying the K preview images created by the first creation means and the second creation means in the order of creation, and K records corresponding respectively to the K electronic images obtained by the acquisition means An electronic camera comprising third creation means for creating an image through the distortion correction. The imaging means has an imaging surface for capturing an optical image through a lens,
The electronic camera according to claim 1, wherein the distortion correction corresponds to a process of correcting distortion caused by aberration of the lens. A correction unit for correcting distortion of the designated electronic image among the electronic images acquired by the acquisition unit;
The second creating means activates the correcting means by designating the tail electronic image,
The electronic camera according to claim 1, wherein the third creating unit activates the correction unit by designating each of the K electronic images.   The display means includes first preview image display means for displaying the preceding K-1 preview images of the K preview images in parallel with the processing of the first creation means. An electronic camera according to any one of the above.   5. The electronic camera according to claim 1, further comprising an activation unit that activates the third creation unit after the display target of the display unit reaches the last preview image. 6. In the electronic camera processor,
An acquisition step of acquiring K (K: an integer of 2 or more) electronic images from the imaging means when a recording operation is received;
The process of the acquisition step is a process of creating K-1 preview images respectively corresponding to the preceding K-1 electronic images of the K electronic images acquired by the acquisition step without undergoing distortion correction. A first creation step executed in parallel with
A second creation step of creating a preview image corresponding to the last electronic image among the K electronic images obtained by the obtaining step through the distortion correction;
A display step of alternatively displaying the K preview images created in the first creation step and the second creation step in the order of creation; and K recordings respectively corresponding to the K electronic images obtained in the acquisition step An imaging control program for executing a third creation step of creating an image through the distortion correction. An imaging control method executed by an electronic camera,
An acquisition step of acquiring K (K: an integer of 2 or more) electronic images from the imaging means when a recording operation is received;
The process of the acquisition step is a process of creating K-1 preview images respectively corresponding to the preceding K-1 electronic images of the K electronic images acquired by the acquisition step without undergoing distortion correction. A first creation step executed in parallel with
A second creation step of creating a preview image corresponding to the last electronic image among the K electronic images obtained by the obtaining step through the distortion correction;
A display step of alternatively displaying the K preview images created in the first creation step and the second creation step in the order of creation; and K recordings respectively corresponding to the K electronic images obtained in the acquisition step An imaging control method comprising a third creation step of creating an image through the distortion correction. An external control program supplied to an electronic camera including a processor that executes processing according to an internal control program stored in a memory,
An acquisition step of acquiring K (K: an integer of 2 or more) electronic images from the imaging means when a recording operation is received;
The process of the acquisition step is a process of creating K-1 preview images respectively corresponding to the preceding K-1 electronic images of the K electronic images acquired by the acquisition step without undergoing distortion correction. A first creation step executed in parallel with
A second creation step of creating a preview image corresponding to the last electronic image among the K electronic images obtained by the obtaining step through the distortion correction;
A display step of alternatively displaying the K preview images created in the first creation step and the second creation step in the order of creation; and K recordings respectively corresponding to the K electronic images obtained in the acquisition step An external control program for causing the processor to execute a third creation step of creating an image through the distortion correction in cooperation with the internal control program. An electronic camera comprising a capturing unit that captures an external control program, and a processor that executes processing according to the external control program captured by the capturing unit and the internal control program stored in a memory,
The external control program is
An acquisition step of acquiring K (K: an integer of 2 or more) electronic images from the imaging means when a recording operation is received;
The process of the acquisition step is a process of creating K-1 preview images respectively corresponding to the preceding K-1 electronic images of the K electronic images acquired by the acquisition step without undergoing distortion correction. A first creation step executed in parallel with
A second creation step of creating a preview image corresponding to the last electronic image among the K electronic images obtained by the obtaining step through the distortion correction;
A display step of alternatively displaying the K preview images created in the first creation step and the second creation step in the order of creation; and K recordings respectively corresponding to the K electronic images obtained in the acquisition step An electronic camera corresponding to a program that executes a third creation step of creating an image through the distortion correction in cooperation with the internal control program.

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