JP2013081696A - Endoscope apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To automatically construct an image signal processing circuit suited to a video scope to be connected, without being associated with complicated work.SOLUTION: The video scope 10 includes memories 17A and 17B for storing configuration data, and a processor 20 includes an image signal processing circuit 22, the programming of which is constructed by FPGA. When the video scope 10 is connected to the processor 20, the configuration data corresponding to PAL method or NTSC method are transmitted to the processor 20 and the image signal processing circuit 22 is constructed.

Description

  The present invention relates to an endoscope system capable of imaging a subject such as an inner wall of an organ with a scope and displaying an observation image on a monitor, and more particularly to an image signal processing circuit in which a processing function is set by programming.

  In an electronic endoscope apparatus, image signal processing can be executed in a video scope having an image sensor at the tip, and an image signal processing circuit for processing pixel signals read from the image sensor is provided in the video scope. . The image signal processing circuit generates video signals such as R, G, and B signals and outputs them to the processor.

  In order to change the image signal processing function in accordance with the diagnosis target, application, etc., an image signal processing circuit such as an FPGA (Field Programmable Gate Array) capable of changing programming settings can be provided in the video scope. There, a plurality of configuration data is stored in advance in a memory such as a ROM in the processor. Then, the FPGA of the video scope connected to the processor constructs an image signal processing circuit by programming configuration data according to the processing content desired by the user (see Patent Document 1).

Japanese Patent Laying-Open No. 2005-066871

  The contents of image signal processing in the videoscope vary depending on the characteristics of the videoscope itself (for example, the resolution of the image sensor), the video standard, and the like. Therefore, even when programming an image signal processing circuit with the same function, prepare a lot of configuration data according to the type of video scope that can be connected, or adjust the contents of the configuration data to the video scope connection. Need to be changed.

  Therefore, it is required to easily construct an image signal processing circuit that realizes a desired image signal processing function from the connection relationship between the video scope and the processor without complicated work.

  An endoscope apparatus according to the present invention includes a video scope having an image sensor, and a processor having an image signal processing circuit that is connected to the video scope and processes a pixel signal read from the image sensor. A memory for storing data and a data communication control unit for transmitting configuration data to the processor when the videoscope is connected to the processor.

  In the present invention, the processor is provided with an image signal processing circuit constituted by a PLD (Programmable Logic Device) that can rewrite the circuit. For example, an image signal processing circuit is configured by an FPGA or the like. The operation content of the image signal processing circuit is set based on the configuration data of the video scope to be connected.

  The configuration data indicates a data structure expressed by a program list described in, for example, HDL, or the like, and includes, for example, a net list at a physical level, a scheme at a logical level, a scenario, and the like. The image data processing circuit is programmed based on the configuration data, and the processing operation content is determined.

  In the present invention, for example, when the endoscope apparatus is shipped, the configuration data is stored in the memory in the video scope, and the image signal processing circuit that executes the image signal processing on the pixel signal from the image sensor is provided in the processor. . As a result, an image signal processing circuit adapted to the videoscope characteristics is programmed in the processor in accordance with the videoscope connection. When a video scope having new configuration data is connected, an image signal processing circuit adapted to the video scope characteristics can be constructed.

  The configuration data for setting the operation content of the image signal processing varies depending on the video standard defined for the processor even if the operation data performs the same function. For example, the configuration data differs depending on the NTSC or PAL system.

  Therefore, it is desirable to provide the video scope with a plurality of memories for storing a plurality of configuration data according to a plurality of video-related standards. In this case, the data communication control unit determines the video-related standard of the processor, and transmits configuration data corresponding to the video-related standard of the processor to the processor.

  For example, in the case of the TV video standard, a first memory that stores first configuration data according to the first TV video standard (NTSC, etc.) and a second configuration according to the second TV video standard (PAL, etc.). A second memory for storing the operation data may be provided. The data communication control unit determines the video standard of the processor and transmits the first or second configuration data corresponding to the video standard of the processor to the processor.

  For example, when the TV video standard is determined by the I / O port, the port state is not changed thereafter. That is, the video scope is only compatible with a specific video standard thereafter. Therefore, it is desirable to store data related to the video scope (such as the type of image sensor) in a memory that stores configuration data that has not been transmitted among a plurality of configuration data, and to effectively use the memory.

  A video scope according to another aspect of the present invention is connected to a processor that includes an image sensor, a memory that stores configuration data, and an image signal processing circuit that performs image signal processing on pixel signals read from the image sensor. A data communication control unit that transmits configuration data to the processor, and the image signal processing circuit includes a PLD (Programmable Logic Device), and is programmed based on the configuration data. .

  As described above, according to the present invention, it is possible to automatically construct an image signal processing circuit suitable for a video scope to be connected without complicated work.

It is a block diagram of the endoscope apparatus which is this embodiment. It is the flowchart which showed the operation setting process of the image signal processing circuit.

  Below, the endoscope system which is this embodiment is demonstrated with reference to drawings.

  FIG. 1 is a block diagram of an endoscope apparatus according to this embodiment.

  The endoscope apparatus includes a video scope 10 whose insertion portion is inserted into the body and a processor 20, and the video scope 10 is detachably connected to the processor 20. Various types and types of video scopes are prepared, and a predetermined video scope 10 is selectively connected to the processor 20 in accordance with the endoscopic work. A monitor 50 is connected to the processor 20.

  The processor 20 includes a lamp 32, and illumination light emitted from the lamp 32 is incident on the light guide 11 provided in the video scope 10 via the condenser lens 31. The light incident on the light guide 11 exits from the scope tip 10T and is irradiated toward the subject (observation target) through the light distribution optical system 13.

  The illumination light reflected by the subject is imaged by the objective lens 15 provided at the scope tip 10T, whereby a subject image is formed on the light receiving surface of the image sensor 12, such as a CCD. In the image sensor 12, an image signal for one frame (field) is read at a predetermined frame time interval. For example, in the case of the NTSC system, data is read at intervals of 1/30 (1/60) seconds, and in the case of the PAL system, data is read at intervals of 1/25 (1/5) seconds. The image sensor 12 is provided with a complementary color filter in which color elements composed of Cy, Ye, G, Mg or R, G, B are arranged in a mosaic pattern.

  The read series of pixel signals is sent to the image signal processing circuit 22 of the processor 20 via the scope controller 16. The image signal processing circuit 22 performs various signal processing such as digitization processing on the pixel signal, and further white balance processing (gain processing) and gamma correction processing. As a result, R, G, and B image signals are generated. The R, G, B image signals are temporarily stored in the image memory 24 and then output to the monitor 50 via the output circuit 27. As a result, the observation image is displayed on the monitor 50.

  A diaphragm 33 that adjusts the amount of illumination light is disposed between the condenser lens 31 and the light guide 11. The dimming circuit 35 controls the motor 36 based on the luminance signal sent from the image signal processing circuit 22, and the aperture 33 opens and closes so as to maintain the brightness of the subject image at an appropriate brightness.

  A system control circuit 26 including a CPU, a ROM, etc. outputs control signals to the timing controller 28, the lamp power supply 34, etc., and controls the operation of the entire processor 20. The system control circuit 26 detects an operation of a switch button (not shown) on the front panel 29. A program related to the operation control of the processor is stored in the ROM in advance. The system control circuit 26 communicates with a scope controller 16 provided in the video scope 10 and can receive and transmit various data.

  When the video scope 10 is connected to the processor 20, power is supplied from the processor 20 to the video scope 10. A scope controller 16 including a CPU 15 and a ROM (not shown) is composed of an IC chip, and controls the operation of the video scope 10 and communicates with the processor 20. Further, the video scope 10 is provided with a first memory 17A and a second memory 17B, both of which are constituted by an overwritable nonvolatile memory such as an EEPROM.

  The image signal processing circuit 22 of the processor 20 is configured by a PLD (Programmable Logic Device) whose setting can be changed by programming, and an FPGA is applied here. Configuration data used for programming the image signal processing circuit 22 is stored in the first memory 17A and the second memory 17B.

  The configuration data is data having information for setting circuit operation, and a programming list, a net list, and the like described in HDL are stored in the first and second memories 17A and 17B as data. The first memory 17A stores configuration data compatible with the PAL system as a TV video standard, and the second memory 17B stores configuration data compatible with the NTSC system.

  The CPU 15 of the scope controller 16 mounted on the IC chip is provided with I / O ports 19A and 19B. The scope controller 16 determines whether the video standard of the processor is the PAL system or the NTSC system based on the level of the port input voltage to the I / O ports 19A and 19B.

  When the video scope 10 is shipped or maintenance of the video scope 10 is performed, programming construction of the image signal processing circuit 22 is performed through connection between the video scope 10 and the processor 20. The processing operation setting of the image signal processing circuit will be described below.

  FIG. 2 is a flowchart showing the operation setting process of the image signal processing circuit. When the video scope 10 is connected to the processor 20, it is automatically started.

  In steps S101 and S102, it is determined whether the video standard of the processor 20 is the PAL system or the NTSC system based on the input voltage levels of the I / O ports 19A and 19B. The input voltage level to the I / O ports 19A and 19B is determined according to the video standard of the processor 20.

  When it is determined that the video standard of the processor 20 is the PAL system, the PAL configuration data stored in the first memory 17 </ b> A is read and transmitted to the processor 20. In the processor 20, an image signal processing circuit 22 corresponding to the PAL system is constructed in accordance with the received PAL configuration data (S105, S106).

  On the other hand, when it is determined that the video standard of the processor 20 is the NTSC system, the NTSC configuration data stored in the second memory 17B is read (S103). In the processor 20, the image signal processing circuit 22 corresponding to the NTSC system is constructed according to the configuration data for NTSC (S104).

  In step S107, data setting processing relating to the video scope model is performed. Here, the memory that does not correspond to the video standard of the processor 20 among the first and second memories 17A and 17B is used as a memory for storing data relating to scope characteristics (such as the type of the image sensor). When the user performs a keyboard operation or the like, the data is overwritten on a memory storing configuration data that is not being used.

  As described above, according to the present embodiment, the memories 17A and 17B storing the configuration data are provided in the video scope 10, and the processor 20 is provided with the image signal processing circuit 22 that is programmed by the FPGA. ing. When the video scope 10 is connected to the processor 20, configuration data corresponding to the PAL system or the NTSC system is transmitted to the processor 20, and the image signal processing circuit 22 is configured.

  A reconfigurable image signal processing circuit is provided in the processor instead of the video scope, while a configuration data storage memory is provided in the video scope, so that when the video scope is connected to the processor, an image signal suitable for the video scope is provided. A processing circuit is automatically formed. Since its own configuration data is prepared in the video scope, there is no need to change the configuration data. Since the video scope is not provided with an image signal processing circuit, the cost can be reduced.

  In addition, since PAL or NTSC format configuration data is prepared as a video standard, it is possible to set the PAL or NTSC system to the video scope at the time of shipment, and the video scope is completed by dividing the video standard at the time of manufacture. There is no need, and the substrate can be shared without providing a PAL substrate or NTSC substrate in the video scope.

  Further, when the PAL system or the NTSC system is set, video scope model data is stored in a memory that stores configuration data that will not be used thereafter. Thereby, the prepared memory can be used effectively.

  In the present embodiment, the image signal processing circuit 22 is configured by an FPGA, but other types of PLDs may be used. In addition, when the video scope and the processor are connected, configuration data suitable for the video standard of the processor may be transmitted.

DESCRIPTION OF SYMBOLS 10 Video scope 16 Scope controller 17A 1st memory 17B 2nd memory 19A, 19B I / O port 20 Processor 22 Image signal processing circuit

Claims (5)

A video scope having an image sensor;
A processor connected to the video scope and having an image signal processing circuit for processing a pixel signal read from the image sensor;
The video scope is
Memory for storing configuration data;
A data communication control unit for transmitting configuration data to the processor when the videoscope is connected to the processor;
The endoscope apparatus, wherein the image signal processing circuit includes a PLD (Programmable Logic Device), and is programmed based on the configuration data. The memory has a plurality of memories for storing a plurality of configuration data according to a plurality of video-related standards,
The endoscope apparatus according to claim 1, wherein the data communication control unit determines a video-related standard of the processor and transmits configuration data corresponding to the video-related standard of the processor to the processor. . The memory includes a first memory that stores first configuration data according to a first TV video standard, and a second memory that stores second configuration data according to a second TV video standard. ,
The said data communication control part discriminate | determines the video standard of the said processor, and transmits the 1st or 2nd configuration data corresponding to the video standard of the said processor to the said processor. Endoscopic device. The data communication control unit has an I / O port for determining a video-related standard of the processor;
The endoscope apparatus according to claim 2, wherein data relating to a connected videoscope is stored in a memory in which configuration data that has not been transmitted among the plurality of configuration data is stored. . An image sensor;
Memory for storing configuration data;
A data communication control unit configured to transmit configuration data to the processor when connected to a processor including an image signal processing circuit that performs image signal processing on a pixel signal read from the image sensor;
The video scope of an endoscope apparatus, wherein the image signal processing circuit includes a PLD (Programmable Logic Device) and is programmed based on the configuration data.

Images