JP2012204923A - Digital amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a digital amplifier that improves a distortion factor by extending a correction range of pulse duty in digital pulse width modulation.SOLUTION: A digital amplifier 200 comprises: a voltage value conversion block 220 for converting a digital value of digital pulse width in a digital modulation block 210 to a voltage value; and an integration circuit block 230 for generating a triangular wave from a master clock and modulating the generated triangular wave according to a signal depending on the value of modulation width of digital pulse width modulation. The digital amplifier 200 includes a low pass filter 265 (low pass filter <3>) for low-pass-filtering a signal power-amplified by a drive circuit 250 to output an analog audio voltage, and an error amplifier 290 for operationally amplifying a difference between a voltage from a low pass filter 280 (low pass filter <1>) and the voltage from the low pass filter 265 (low pass filter <3>). Every section has a circuit configuration having analog local feedback as a whole.

Description

  The present invention relates to a digital amplifier for audio equipment.

  The class D amplifier can obtain extremely good power conversion efficiency as compared with an analog linear amplifier such as a class AB amplifier. Since the amount of heat radiation is small, it is often adopted as a speaker driving amplifier. The class D amplifier performs an input signal such as an audio signal by performing a switching operation by an amplification active element such as a transistor. The class D amplifier digitally modulates a PWM (Pulse Width Modulation) signal based on the input audio signal, performs power amplification on the PWM signal, and supplies the amplified PWM signal to the speaker.

  Patent Document 1 describes a digital amplifier that drives a speaker. The digital amplifier described in Patent Document 1 obtains a digital pulse output by performing signal processing on a digital audio signal and performing digital pulse width modulation. This digital amplifier corrects the distortion by feeding back the state of the output stage with respect to the edge delay of the pulse waveform, and reduces distortion in the portion where the digital pulse for driving the speaker is converted into an analog signal.

  The digital amplifier described in Patent Document 1 is demodulated from the digital amplifier output to an analog signal by passing through a low-pass filter. The above-described method is adopted as a method for improving distortion of an analog signal for driving a speaker.

JP-T-2001-517393

  The digital amplifier described in Patent Document 1 is a method in which the pulse width can be corrected only within the edge delay correction range up to half of the minimum pulse width. For this reason, when digital pulse width modulation is performed, the distortion correction amount is up to the minimum pulse width. Therefore, there is a problem that the correction amount is only within a correction range up to one level above or below the digital pulse width, and distortion that must be corrected beyond one level above or below the digital pulse width value cannot be corrected. There is. That is, in the case of PWM output, there is a problem that the distortion rate can be corrected only at one level of the digital pulse when the delay is maximum.

  An object of the present invention is to provide a digital amplifier capable of extending the correction range of the duty of the pulse in the digital pulse width modulation and improving the distortion rate.

The digital amplifier of the present invention is a digital amplifier that inputs a digital signal and drives a speaker with the digital signal as it is, a digital modulation circuit that converts digital audio data into digital pulse width modulation, and the digitally modulated pulse voltage A first analog audio output unit that outputs an analog audio voltage, a triangular wave generation circuit that generates an amplitude-modulated triangular wave based on a modulation width value of the digital pulse width modulation, and the triangular wave generation A drive circuit for amplifying an output voltage from the circuit, a third analog audio output unit for low-pass filtering the signal amplified by the drive circuit and outputting an analog audio voltage, and a voltage of the first analog audio output unit And an error amplifier for calculating and amplifying the difference between the voltages of the third analog audio output unit Wherein the triangular wave generating circuit, said a digital pulse width modulated signal corresponding to the value of the modulation width of a configuration to regenerate the digital pulse width modulated waveform by adding the error from the error amplifier.

  The present invention allows any pulse width of digital pulse width modulation to be corrected beyond one level above or below the digital pulse width value. As a result, the duty of the digital pulse width modulation can be corrected by changing from 0% to 100%, and the distortion of the digital amplifier generated after the drive circuit is changed from 0 to the maximum value of the modulation width of the digital pulse width modulation. Can be corrected. Therefore, the distortion contained in the analog signal demodulated by passing the digital pulse width modulation signal for driving the speaker through the low-pass filter can be greatly improved.

The figure which shows the basic composition of the digital amplifier for demonstrating the principle of this invention The figure which shows the structure of the digital amplifier which concerns on one embodiment of this invention Circuit diagram showing a specific configuration of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG. The figure which shows the operation waveform of each part of the digital amplifier of FIG.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Principle explanation)
First, the basic concept of the present invention will be described.

A conventional digital amplifier for driving a speaker uses a PWM signal as it is without feedback, or a feedback path limited to a low frequency, or is limited by the minimum pulse width of the PWM signal even if there is a feedback path It is. For this reason, there is a limitation in the ability to cope with distortion generated in the switching circuit, the LPF circuit for driving the speaker, and the speaker load.

  In view of the fact that conventional digital amplifiers are limited in the method of adding and subtracting with pulses, and that feedback control is not possible, the number of levels of the quantizer that quantizes the digital signal is switched to the integration constant of the triangular wave generation circuit. The idea was to generate triangular waves according to the number of levels. The triangular wave generation circuit has a circuit configuration having analog local feedback. As a result, distortion is reduced, and when there is no distortion, the digital signal remains as it is.

  FIG. 1 is a diagram illustrating a basic configuration of a digital amplifier that inputs a digital signal and drives a speaker without changing the digital signal.

  In FIG. 1, a digital amplifier 100 includes a 1-bit quantizer 110, a level adaptive triangular wave generation circuit 120, a drive circuit 130, a low-pass filter 140 (low-pass filter <2>) (second analog audio output unit). , 150 (low-pass filter <1>) (first analog audio output unit), a comparator 160, and a speaker 170.

  The 1-bit quantizer 110 quantizes the digital signal.

  The level adaptive triangular wave generation circuit 120 converts the pulse signal from the 1-bit quantizer 110 into a triangular wave, and amplitude-modulates the generated triangular wave in accordance with the modulation width value of the digital pulse width modulation. The level adaptive triangular wave generation circuit 120 uses a DC potential corresponding to the number of levels of the 1-bit quantizer 110 superimposed on the triangular wave to generate a triangular wave corresponding to the number of levels.

  The drive circuit 130 power amplifies the PWM signal from the level adaptive triangular wave generation circuit 120.

  The low-pass filter 140 (low-pass filter <2>) and the low-pass filter 145 (low-pass filter <3>) demodulate the pulse power amplified by the drive circuit 130 into audio power in the audio band. To do.

  The low-pass filter 150 (low-pass filter <1>) outputs an analog audio voltage from the pulse voltage modulated by the digital pulse width by the 1-bit quantizer 110.

  The comparator 160 calculates and amplifies the voltage of the difference between the low-pass filter 150 and the low-pass filter 140.

  The speaker 170 converts the power of the analog audio signal into acoustic energy.

  In the above configuration, the digital amplifier 100 converts the pulse signal from the 1-bit quantizer 110 into a triangular wave by the level adaptive triangular wave generation circuit 120 and outputs it to the driving circuit 130.

  When the digital amplifier 100 outputs the signal converted into the triangular wave by the level adaptive triangular wave generation circuit 120 to the driving circuit 130, the digital amplifier 100 converts the output from the 1-bit quantizer 110 into an analog signal by the low-pass filter 150. The data is converted and guided to the comparator 160. Comparator 160 also directs the signal from low pass filter 140. The comparator 160 calculates and amplifies the voltage of the difference between the low-pass filter 150 and the low-pass filter 140. The level adaptive triangular wave generation circuit 120 modulates the triangular wave based on the difference.

  In this way, a low-distortion speaker drive output can be obtained by using a circuit configuration having analog local feedback.

(Embodiment)
FIG. 2 is a diagram showing a configuration of a digital amplifier according to an embodiment of the present invention based on the above basic concept. This embodiment is an example applied to a digital amplifier that drives a speaker.

As shown in FIG. 2, the digital amplifier 200 includes a digital modulation block 210, a voltage value conversion block 220, an integration circuit block 230, a comparator 240, a drive circuit 250, a low-pass filter 260 (low-pass filter <2>), Low-pass filter 265 (low-pass filter <3>), speaker 270, low-pass filter 280 (low-pass filter <3>
1>), and an error amplifier 290.

  The digital amplifier 200 receives a master clock 201, a bit clock 202, an LR clock 203, digital serial data 204, and a reference potential 205.

  The master clock 201 is a clock for calculating digital pulse width modulation and a digital value of the digital pulse width. The master clock 201 is connected to the digital modulation block 210 and the integration circuit block 230 and is a master clock for obtaining the digital pulse width modulation output and the digital pulse width value of the digital modulation block 210 and is also connected to the integration circuit block 230. Then, the integration circuit block 230 generates a triangular wave signal.

  The bit clock 202 is connected to the digital modulation block 210 and latches the digital serial data 204 in the digital modulation block 210.

  The LR clock 203 is connected to the digital modulation block 210 and distinguishes the L channel and the R channel of the data latched by the bit clock 202. The LR clock 203 is a clock for switching the L channel data and the R channel data of the digital serial data 204 at the timing when the L channel data and the R channel data arrive alternately, and distinguishing the L channel data and the R channel data.

  The digital serial data 204 is 2's complement format digital audio data expressing amplitude. The digital serial data 204 is connected to the digital modulation block 210 and sampled at the LR clock period.

  A reference potential 205 is a reference potential of the comparator 240.

  The digital modulation block 210 includes, for example, a timing generator that generates the timing of each unit, a quantizer that re-quantizes the PCM signal into a digital 1-bit signal, and the like, and includes a master clock 201, a bit clock 202, an LR clock 203, and Digital serial data 204 is connected.

  The digital modulation block 210 converts digital audio data into digital pulse width modulation. The digital modulation block 210 outputs the digital pulse width modulation voltage to the voltage value conversion block 220, and outputs the digital value of the digital pulse width to the low-pass filter 280 (low-pass filter <1>).

  The voltage value conversion block 220 is connected to the digital modulation block 210 and converts the digital value of the digital pulse width of the digital modulation block 210 into a voltage value.

  The integration circuit block 230 is connected to the master clock 201, the voltage value conversion block 220, and the error amplifier 290, and outputs a voltage obtained by amplitude-modulating the triangular wave voltage generated from the master clock 201.

Specifically, the integration circuit block 230 generates a triangular wave by the master clock 201, and converts the generated triangular wave into a modulation width value of digital pulse width modulation converted into a voltage value from the voltage value conversion block 220. Modulate based on the corresponding signal. Here, in particular, the voltage output from error amplifier 290 is added to the voltage obtained by converting the modulation width value of digital pulse width modulation into a voltage value. The integration circuit block 230 adds an error from the error amplifier to a signal corresponding to the value of the modulation width of the digital pulse width modulation to regenerate a digital pulse width modulation waveform.
The comparator 240 is connected to the integration circuit block 230 and the reference potential 205, and outputs electric power as a result of comparing the output voltage of the integration circuit block 230 with the voltage of the reference potential 205. The comparator 240 corrects the duty of the pulse in the voltage value conversion block 220 and the integration circuit block 230 by outputting electric power as a result of comparing the voltage of the reference potential 205.

  The drive circuit 250 amplifies the power of digital pulse width modulation from the comparator 240.

  The low-pass filter 260 (low-pass filter <2>) and the low-pass filter 265 (low-pass filter <3>) receive the power output of the drive circuit 250 and output analog audio power. Specifically, the low-pass filter 265 (low-pass filter <3>) demodulates the pulse power obtained by power-amplifying the signal from the comparator 240 by the drive circuit 250 into analog power in the audio band, and outputs analog audio power. Is output. Analog audio power is input to the power input terminal of the speaker 270. The low-pass filter 260 (low-pass filter <2>) is input to the voltage input terminal of the error amplifier 290.

  The speaker 270 receives the power output of the low-pass filter 265 (low-pass filter <3>) and converts it into acoustic energy. Specifically, the speaker 270 passes through the audio band of the electric power from the drive circuit 250 by the low-pass filter 265 (low-pass filter <3>) and attenuates an unnecessary high band to obtain analog audio. A signal is input, and the input power is converted into acoustic energy.

  The low-pass filter 280 (low-pass filter <1>) is an apparatus for obtaining an analog audio signal by passing an audio band and attenuating an unnecessary high-frequency band. The low-pass filter 260 (low-pass filter 260 Having the same frequency characteristics as the device <2>).

  The low-pass filter 280 (low-pass filter <1>) outputs an analog audio voltage from the digital pulse width modulated pulse voltage. The low-pass filter 280 (low-pass filter <1>) has a voltage input terminal that performs low-pass filtering from the output voltage of the digital modulation block 210 and digital pulse width modulation voltage output and obtains an analog audio voltage output. Connect and output analog audio voltage.

  The error amplifier 290 connects the output voltage of the low-pass filter 280 (low-pass filter <1>) to the first voltage input terminal, and outputs the output voltage of the low-pass filter 260 (low-pass filter <2>). Connected to the second voltage input terminal, the voltage of the difference between the low-pass filter 280 (low-pass filter <1>) and the low-pass filter 260 (low-pass filter <2>) is calculated and amplified. To do.

  FIG. 3 is a circuit diagram showing a specific configuration of the digital amplifier 200. The same components as those in FIG. 2 are denoted by the same reference numerals.

  The present embodiment is an example in which the digital pulse level value of the digital pulse width modulation is five levels of level value 0, level value 1, level value 2, level value 3, and level value 4.

  As shown in FIG. 3, the digital modulation block 210 includes a digital pulse width modulation conversion circuit 211 that converts digital audio data into digital pulse width modulation, and a digital pulse width value conversion circuit that converts digital audio data into digital pulse width values. 212 and a level value information storage unit 213 that stores level value information 1 to 4.

  The voltage value conversion block 220 includes an operational amplifier 221 and resistors R1 to R5.

  The integrating circuit block 230 includes a frequency divider 231, operational amplifiers 232 and 233, a capacitor 234, and resistors R6 to R10. The operational amplifier 232, the capacitor 234, and the resistor R6 constitute an integrator.

  The comparator 240 includes an operational amplifier 241.

  In the present embodiment, the level of digital pulse width modulation is not limited to 5 levels, but can be implemented at any other level.

  Hereinafter, the operation of the digital amplifier 200 configured as described above will be described. The operation itself is the same for both channels.

  The digital modulation block 210 inputs the master clock 201, the bit clock 202, the LR clock, and the digital serial data 204 of data, and outputs the digital pulse width modulation and the modulation width value of the digital pulse width modulation.

  The voltage value conversion block 220 is connected to the digital modulation block 210 and converts the digital value of the digital pulse width from the digital modulation block 210 into a voltage value corresponding to the digital value of the digital pulse width.

  The voltage value conversion block 220 converts the value of the modulation width of the digital pulse width modulation output from the digital modulation block 210 into a voltage value.

  The integration circuit block 230 receives the master clock 201 and converts the divided pulse into a triangular wave. The integrating circuit block 230 has an input terminal for performing amplitude modulation on the triangular wave and a terminal for inputting the result of the error amplifier 290, and modulates the triangular wave with a voltage to output a triangular wave signal.

  The comparator 240 outputs power as a result of comparing the triangular wave signal from the integration circuit block 230 with the voltage of the reference potential 205.

  The drive circuit 250 amplifies the regenerated digital pulse width modulation signal from the comparator 240 to power for driving the speaker 270.

  The low-pass filter 260 (low-pass filter <2>) demodulates the signal whose power is amplified by the drive circuit 250 into analog power in the audio band, and outputs analog audio power.

  The speaker 270 receives an analog audio signal, converts the input power into acoustic energy, and outputs the sound.

  Here, the digital amplifier 200 inputs the digital pulse width modulation output output from the digital modulation block 210 to an input of a low-pass filter 280 (low-pass filter <1>) that is not connected to another speaker 270 with less distortion. Connect with. Further, the output signal demodulated into the analog signal of the low-pass filter 280 (low-pass filter <1>) is connected to the plus terminal of the comparison signal input terminal of the error amplifier 290. Further, the output signal demodulated into the analog signal of the low-pass filter 260 (low-pass filter <2>) is connected to the minus terminal of the comparison signal input terminal of the error amplifier 290.

  With the above connection, the difference between the analog signal of the low-pass filter 280 (low-pass filter <1>) and the analog signal of the low-pass filter 260 (low-pass filter <2>) is amplified from the error amplifier 290. Get voltage. The integration circuit block 230 adds the voltage output from the error amplifier 290 to the voltage converted into the voltage value by the voltage value conversion block 220.

  As a result, the analog signal output from the low-pass filter 260 (low-pass filter <2>) is automatically controlled to be equal to the output of the low-pass filter 280 (low-pass filter <1>). The distortion rate of the analog signal output from the low-pass filter 260 (low-pass filter <2>) is improved.

  This will be described in detail.

  The voltage connected from the error amplifier 290 to the integration circuit block 230 is the voltage difference between the low-pass filter 280 (low-pass filter <1>) and the low-pass filter 260 (low-pass filter <2>). Since it is an amplified voltage, the voltage at which the low-pass filter 280 (low-pass filter <1>) and the error amplifier 290 are connected, the low-pass filter 260 (low-pass filter <2>), and the error amplifier If there is no difference between the voltages to which 290 is connected, the voltage output from the error amplifier 290 is equal to the reference potential 205. In this case, the integration circuit block 230 undergoes amplitude modulation only with the voltage obtained by converting the digital pulse width into the voltage value from the voltage value conversion block 220 that converts the digital pulse width into the voltage value. The connected voltage becomes the same voltage as the digital pulse width modulation output from the digital modulation block 210 for obtaining the digital pulse width modulation output and the digital pulse width value. That is, when there is no distortion of the digital amplifier 200 (particularly distortion in the drive circuit 250 and the low-pass filter 260), the error amplifier 290 does not output an error component, so that the integrator (not shown) of the integration circuit block 230 is medium. Point operation is performed, and the same waveform is restored and output from the integration circuit block 230.

  On the other hand, in the voltage connected from the error amplifier 290 to the integrating circuit block 230, a signal obtained by connecting the low-pass filter 280 (low-pass filter <1>) and the error amplifier 290, and the low-pass filter 260 (low-pass filter 260 (low-pass filter 260) The voltage connected from the error amplifier 290 to the integrating circuit block 230 when there is a difference between the signal connected to the filter <2>) and the error amplifier 290 is as follows.

  The integration circuit block 230 is a voltage obtained by adding the signal connected from the error amplifier 290 to the integration circuit block 230 to the voltage obtained by converting the digital pulse width from the voltage value conversion block 220 that converts the digital pulse width into a voltage value. Receives amplitude modulation at. For this reason, the voltage connected from the comparator 240 to the drive circuit 250 becomes a pulse width modulation voltage in which an error is corrected with respect to the digital pulse width modulation output from the digital modulation block 210. In other words, the distortion of the digital amplifier 200 (particularly, the distortion in the drive circuit 250) can be corrected by generating an inverse component of the distortion component with a circuit configuration having analog local feedback.

The comparator 240 compares the pulse width modulation voltage whose error has been corrected with the reference potential 205. The regenerated pulse width modulated power obtained by comparison by the comparator 240 can exceed one level above or below the digital value of the digital pulse width. Therefore, it is possible to obtain a pulse width modulated power with a pulse width corrected in the range of 0% to 201% as the duty of the pulse width modulation.

  As described above, it is possible to obtain a greater correction effect than the conventional example for distortion correction of a digital amplifier that performs digital pulse width modulation. The distortion correction range can be expanded, and higher performance can be achieved than the circuit described in the patent document.

  Next, the digital modulation block 210, the voltage value conversion block 220, the integration circuit block 230, and the comparator 240 will be described with specific examples.

  4 to 25 are diagrams illustrating operation waveforms of the respective units.

[Output Waveform from Digital Modulation Block 210 According to Digital Pulse Width Modulation Level]
FIG. 4 shows an output waveform when the level value is 0 output from the digital modulation block 210. As shown in FIG. 4, in the digital pulse width modulation period 1005, a waveform 1100 is obtained and the voltage 1010 is output at a constant value.

  FIG. 5 shows an output waveform when the level value is 1 output from the digital modulation block 210. As shown in FIG. 5, in the digital pulse width modulation period 1005, a waveform 1101 is obtained, and the voltage starts from the waveform 1010. Output in descending waveform.

  FIG. 6 shows an output waveform at the level value 2 output from the digital modulation block 210. As shown in FIG. 6, in the digital pulse width modulation period 1005, a waveform 1102 is obtained, and the voltage starts from the waveform 1010 and rises up to the voltage 1011 with the width of the waveform 1002 around the center of the period 1005 and again to the voltage 1010 Output in descending waveform.

  FIG. 7 shows an output waveform at the level value 3 output from the digital modulation block 210. As shown in FIG. 7, in the digital pulse width modulation period 1005, a waveform 1103 is obtained, and the voltage starts from the waveform 1010. Output in descending waveform.

  FIG. 8 shows an output waveform at the level value 4 output from the digital modulation block 210. As shown in FIG. 8, a waveform 1104 is obtained in the digital pulse width modulation period 1005, and the voltage is output with the waveform 1011 constant within the width of the waveform 1004.

[Waveform of output potential of digital pulse width value information output from digital modulation block 210]
FIG. 9 is a waveform of the low voltage value of the output potential of the digital pulse width value information output from the digital modulation block 210. As shown in FIG. 9, the waveform of the low voltage value of the output potential of the digital pulse width value information is a waveform output at a voltage 1010 and a period 1005.

  FIG. 10 is a waveform of the high voltage value of the output potential of the digital pulse width value information output from the digital modulation block 210. As shown in FIG. 10, the waveform of the high voltage value of the output potential of the digital pulse width value information is a waveform output with the voltage 1011 and the period 1005.

  Here, the level value information (level value information 1, level value information 2, level value information 3, and level value information 4) in the digital modulation block 210 varies depending on the digital pulse width value.

  The values of the level value information (level value information 1, level value information 2, level value information 3, and level value information 4) in the digital modulation block 210 are all shown in FIG. 9 when the level value of the digital pulse width is zero. It becomes the waveform.

  The level value information (level value information 1, level value information 2, level value information 3, and level value information 4) in the digital modulation block 210 is level value information when the level value of the digital pulse width is 1. 1 has the waveform of FIG. 9, and the level value information 2, the level value information 3, and the level value information 4 have the waveforms of FIG.

  The level value information (level value information 1, level value information 2, level value information 3, and level value information 4) in the digital modulation block 210 is level value information when the level value of the digital pulse width is 2. 1 and level value information 2 have the waveforms shown in FIG. 9, and level value information 3 and level value information 4 have the waveforms shown in FIG.

  The level value information (level value information 1, level value information 2, level value information 3, and level value information 4) in the digital modulation block 210 is level value information when the level value of the digital pulse width is 3. 1, level value information 2 and level value information 3 have the waveforms of FIG. 9, and level value information 4 has the waveform of FIG.

  The level value information (level value information 1, level value information 2, level value information 3, and level value information 4) in the digital modulation block 210 is the level value information when the level value of the digital pulse width is 4. 1, level value information 2, level value information 3, and level value information 4 all have the waveforms of FIG.

[Output Waveform According to Level Value of Digital Pulse Width Modulation Level Output from Voltage Value Conversion Block 220]
11 shows an output waveform when the level value of the digital pulse width modulation level output from the voltage value conversion block 220 is 0, FIG. 12 shows an output waveform when the level value is 1, and FIG. 13 shows the level 14 shows an output waveform when the level value is 3, FIG. 14 shows an output waveform when the level value is 3, and FIG. 15 shows an output waveform when the level value is 4.

  As shown in FIG. 3, level value information 1, level value information 2, level value information 3, and level value information 4 are connected to the level value information input terminal of the voltage value conversion block 220, and the voltage value conversion block. A reference potential 205 is connected to 220.

  From the output terminal of the voltage value conversion block 220, based on the voltages of the level value information 1, the level value information 2, the level value information 3, and the level value information 4, according to the level value of the digital pulse width modulation, the following Output waveform is output.

  When the digital pulse width modulation level value is 0, it is converted into a waveform 2100 by the voltage 2020 in FIG. When the digital pulse width modulation level value is 1, it is converted into a waveform 2101 by the voltage 2021 in FIG. When the digital pulse width modulation level value is 2, it is converted into a waveform 2102 by the voltage 2022 in FIG. When the digital pulse width modulation level value is 3, it is converted into a waveform 2103 by the voltage 2023 of FIG. When the digital pulse width modulation level value is 4, the voltage 2024 in FIG. Here, the midpoint potential of the voltages 1011 and 1010 is equal to the reference potential 205.

[Waveforms Output from Integration Circuit Block 230, Comparator 240, and Drive Circuit 250]
16 shows a voltage value conversion block 220, an integration circuit block 230, a comparator 240, a drive circuit 250, a low-pass filter 260 (low-pass filter <2>), and a low-pass filter 280 (low-pass filter) shown in FIG. <1>) shows waveforms output from the integration circuit block 230, the comparator 240, and the drive circuit 250 when the digital pulse width modulation level value is 0 when there is no distortion. Similarly, FIG. 17 shows an output waveform when the level value is 1, FIG. 18 shows an output waveform when the level value is 2, FIG. 19 shows an output waveform when the level value is 3, and FIG. Show the output waveforms when the level value is 4.

  The voltage value conversion block 220 converts the digital value of the digital pulse width of the digital modulation block 210 into a voltage value based on the digital pulse width modulation level value information. The output result from the integration circuit block 230 when the voltage from the error amplifier 290 is the reference potential 205 has a waveform 3020 shown in FIG. 16A when the digital pulse width modulation level value is zero. Further, the output from the comparator 240 has a waveform 4100 shown in FIG. 16B, and the output from the drive circuit 250 has a waveform 5100 shown in FIG.

  When the digital pulse width modulation level value is 1, the waveform 3021 shown in FIG. The output from the comparator 240 has a waveform 4101 shown in FIG. 17B, and the output from the drive circuit 250 has a waveform 5101 shown in FIG.

  When the digital pulse width modulation level value is 2, the waveform 3022 shown in FIG. Further, the output from the comparator 240 has a waveform 4102 shown in FIG. 18B, and the output from the drive circuit 250 has a waveform 5102 shown in FIG.

  When the digital pulse width modulation level value is 3, the waveform 3023 shown in FIG. Further, the output from the comparator 240 has a waveform 4103 shown in FIG. 19B, and the output from the drive circuit 250 has a waveform 5103 shown in FIG. 19C.

  When the digital pulse width modulation level value is 4, the waveform 3024 shown in FIG. Further, the output from the comparator 240 has a waveform 4104 shown in FIG. 20B, and the output from the drive circuit 250 has a waveform 5104 shown in FIG.

  As illustrated in FIG. 20, the waveform 5100 is a waveform with the same duty that is different from the waveform 1100 in voltage. A waveform 5101 is a waveform having the same duty and a voltage different from that of the waveform 1101. A waveform 5102 is a waveform having the same duty and a voltage different from that of the waveform 1102. A waveform 5103 is a waveform having the same duty and a voltage different from that of the waveform 1103. It can be seen that the waveform 5104 has the same duty and a different voltage from the waveform 1104.

[From the voltage value conversion block 220, the integration circuit block 230, the comparator 240, the drive circuit 250, the low-pass filter 260 (low-pass filter <2>), and the low-pass filter 280 (low-pass filter <1>) Waveform when there is no output distortion)
21 and 22 show a voltage value conversion block 220, an integration circuit block 230, a comparator 240, a drive circuit 250, a low-pass filter 260 (low-pass filter <2>), and a low-pass filter 280 (low-pass filter). The waveform when there is no distortion in the device <1>). FIG. 22 is a waveform with a voltage different from the waveform 8020 obtained by passing the output from the digital modulation block 210 through the low-pass filter 280 (low-pass filter <1>) with respect to the waveform of FIG. is there. Waveform 6020 and waveform 8020 are fixed values set to an arbitrary ratio.

[From the voltage value conversion block 220, the integration circuit block 230, the comparator 240, the drive circuit 250, the low-pass filter 260 (low-pass filter <2>), and the low-pass filter 280 (low-pass filter <1>) Waveform when distortion occurs
23 shows a voltage value conversion block 220, an integration circuit block 230, a comparator 240, a drive circuit 250, a low-pass filter 260 (low-pass filter <2>), and a low-pass filter 280 (low-pass filter <1). The waveform when distortion output from>) occurs.

  As shown in FIG. 23, when distortion occurs in each block, a distortion signal appears as a waveform 9020 from the error amplifier 290 as the total distortion of each block. This result is connected to the integration circuit block 230, and the integration circuit block 230 automatically performs an operation of subtracting distortion so that the waveform 6020 has a voltage-difference similar to that of the waveform 8020.

  An example in which the distortion of the waveform 6020 is corrected will be described. As a correction result when the digital pulse width modulation level value is 2, the output from the error amplifier 290 is the voltage 9020 in FIG.

[Waveform output from comparator 240]
FIG. 24 shows the voltage value conversion block 220, the integration circuit block 230, the comparator 240, the drive circuit 250, and the low-pass filter 260 (low-pass filter <2>) when the level value of the digital pulse width modulation is 2. From the comparator 240 when the total distortion and the distortion at the output of the low-pass filter 280 (low-pass filter <1>) are different, and the level value of the digital pulse width modulation is corrected to the positive side The output waveform is shown.

  As shown in FIG. 24, when the distortion is corrected in the direction in which one or more modulation level values of digital pulse width modulation are added, which is closer to the voltage 9011 than the average value of the voltage 9011 and the voltage 9010 shown in FIG. The resulting output from the comparator 240 is shown in waveform 4102a.

  FIG. 24 shows the voltage value conversion block 220, the integration circuit block 230, the comparator 240, the drive circuit 250, and the low-pass filter 260 (low-pass filter <2>) when the level value of the digital pulse width modulation is 2. From the comparator 240 when the total distortion and the distortion in the output of the low-pass filter 280 (low-pass filter <1>) are different, and the level value of the digital pulse width modulation is corrected to the negative side The output waveform is shown.

  As shown in FIG. 25, with the correction result when the digital pulse width modulation level value is 2, the output from the error amplifier 290 is the voltage 9020 in FIG. 23 and a voltage higher than the average value of the voltages 9011 and 9010. An output result from the comparator 240, which is obtained when the distortion is corrected in the direction in which the level is close to 9010 and the modulation level value of digital pulse width modulation is subtracted by 1 or more, is shown in a waveform 4102b.

  As described above, a greater correction effect than the conventional example can be obtained for distortion correction of a digital amplifier that performs digital pulse width modulation. Since the distortion correction range can be expanded, higher performance can be achieved.

As described above, according to the present embodiment, the digital amplifier 200 generates a triangular wave by the voltage value conversion block 220 that converts the digital value of the digital pulse width of the digital modulation block 210 into a voltage value, and the master clock, And an integration circuit block 230 that modulates the generated triangular wave based on a signal corresponding to a modulation width value of the digital pulse width modulation. The digital amplifier 200 outputs a low-pass filter 280 (low-pass filter <1>) that outputs an analog audio voltage from a digital pulse width modulated pulse voltage, and outputs an output voltage of the voltage value conversion block 220 and a reference potential voltage. A comparator 240 that compares and outputs power according to the comparison result and a drive circuit 250 that amplifies the power of the digital pulse width modulation from the comparator 240 are provided. The digital amplifier 200 includes a low-pass filter 260 (low-pass filter <2>) that demodulates the pulse power amplified by the drive circuit 250 into analog power in the audio band, and a low-pass filter 280 (low-pass filter). And an error amplifier 290 that calculates and amplifies the voltage of the difference between the voltage of the filter <1>) and the low-pass filter 260 (low-pass filter <2>). Each of the above parts has a circuit configuration with analog local feedback as a whole.

  The integrating circuit block 230 generates a triangular wave that is amplitude-modulated in accordance with the value of the modulation width of the digital pulse width modulation. At this time, the error from the error amplifier is added to the signal corresponding to the value of the modulation width of the digital pulse width modulation to regenerate the digital pulse width modulation waveform.

  With this configuration, the distortion correction effect that occurs when the speaker is driven with a pulse generated by digital pulse width modulation, and the correction effect for any digital pulse width value at the time of digital pulse generation are expressed in the level representation of the digital pulse width value. It is possible to obtain distortion correction in the range from 0 to the maximum, that is, the duty range from 0% to 100%. In other words, the digital pulse width value of the digital pulse width modulation can be changed from 0 to the maximum digital pulse width value.

  Thereby, in the digital pulse width modulation digital amplifier, the pulse duty correction range in the digital pulse width modulation can be expanded as compared with the conventional digital amplifier, and the distortion rate can be greatly improved as compared with the digital amplifier.

  The above description is an illustration of a preferred embodiment of the present invention, and the scope of the present invention is not limited to this. For example, although the said embodiment is an example applied to various audio | voice apparatuses, if it amplifies a sound, it can apply similarly to what kind of apparatus.

  Moreover, although the name “digital amplifier” is used in each of the above embodiments, this is for convenience of explanation, and it goes without saying that a power amplifier circuit, a class D amplifier, or the like may be used.

  Furthermore, the type, number, connection method, and the like of each circuit unit constituting the digital amplifier, such as a quantizer and a low-pass filter, are not limited to the above-described embodiments.

  The digital amplifier according to the present invention is effective for audio applications in which a digital signal is input and the speaker is driven with the digital signal supplied to a load including the speaker. Further, the present invention is not only suitable for application to digital amplifiers in various acoustic devices, but can also be widely applied to digital amplifiers in electronic devices other than acoustic devices.

100, 200 Digital amplifier 110 1-bit quantizer 120 Level adaptive triangular wave generation circuit 130 Drive circuit 140, 260 Low-pass filter (low-pass filter <2>)
145, 265 Low-pass filter (Low-pass filter <3>)
150, 280 Low-pass filter (Low-pass filter <1>)
160 Comparator 170, 270 Speaker 210 Digital modulation block 211 Digital pulse width modulation conversion circuit 212 Digital pulse width value conversion circuit 213 Level value information storage unit 220 Voltage value conversion block 221, 232, 233, 241 Operational amplifier 230 Integration circuit block 231 Frequency divider 234 Capacitor 240 Comparator 250 Drive circuit 290 Error amplifier

Claims (5)

A digital amplifier that inputs a digital signal and drives a speaker with the digital signal as it is, a digital modulation circuit that converts digital audio data into digital pulse width modulation, and
A first analog audio output unit for low-pass filtering the digitally modulated pulse voltage and outputting an analog audio voltage;
A triangular wave generating circuit that generates an amplitude-modulated triangular wave based on the value of the modulation width of the digital pulse width modulation;
A drive circuit for amplifying an output voltage from the triangular wave generation circuit;
A third analog audio output unit for low-pass filtering the signal amplified by the drive circuit and outputting an analog audio voltage;
An error amplifier that calculates and amplifies the difference between the voltage of the first analog audio output unit and the voltage of the third analog audio output unit;
The triangular wave generation circuit is a digital amplifier that regenerates a digital pulse width modulation waveform by adding an error from the error amplifier to a signal corresponding to a modulation width value of the digital pulse width modulation.   The digital circuit according to claim 1, further comprising a comparator that compares an output voltage of the triangular wave generation circuit with a voltage of a predetermined reference potential, and the drive circuit amplifies the power of the digital pulse width modulation based on a comparison result of the comparator. Amplifier.   The digital amplifier according to claim 1, wherein the triangular wave generation circuit includes a voltage value conversion circuit that converts a signal corresponding to a modulation width value of the digital pulse width modulation into a voltage value.   The said triangular wave generation circuit is provided with the integration circuit which generates a triangular wave with a master clock, and modulates the generated triangular wave based on the signal according to the value of the modulation width of the digital pulse width modulation. Digital amplifier. The digital modulation circuit includes a quantizer that quantizes a digital signal;
2. The digital amplifier according to claim 1, wherein the triangular wave generation circuit generates a triangular wave corresponding to the number of levels by using a direct current potential corresponding to the number of levels of the quantizer superimposed on the triangular wave.