JP2012093434A - Driving method of display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a driving method of a display device capable of maintaining the white balance and the gradation characteristics even when the display brightness is changed.SOLUTION: A driving method is of a display device comprising: pixels each of which has a light-emitting device, a driving transistor, a retention volume and light emission period control means; data lines; and reference voltage lines. In the driving method, data voltage is supplied from the data lines to each pixel every frame period, written in the retention volume, and then either of predetermined first and second reference voltages different from each other is supplied from the reference voltage lines sequentially followed by the other. One frame period includes a first period in which light is emitted in a first light emission level corresponding to the data voltage and the first reference voltage, and a second period in which light is emitted in a second light emission level corresponding to the data voltage and the second reference voltage. The light emission period control means changes the first and the second periods at the same ratio, and thereby changes the display brightness of the light-emitting device.

Description

  The present invention relates to a display device in which self-luminous elements are arranged in a matrix. In particular, the present invention relates to a display device that emits light at two different light emission levels for one image data in each frame.

  A self-luminous display device typified by an organic EL or the like is configured by arranging a plurality of pixels made of self-luminous elements on a substrate in a matrix. In order to accurately apply gradation to each pixel in the drive circuit of the self-luminous display device, the amount of current or voltage flowing through the self-luminous element of each pixel must be accurately controlled. In general, a self-luminous display device has an active matrix configuration in which a switching element (active element) such as a thin film transistor (TFT) is provided for each pixel. In order to cause the light emitting element of each pixel to emit light with a desired luminance, gradation display data corresponding to the light emission amount is generally programmed into each pixel once per frame.

  Since TFTs have variations in characteristics such as threshold voltage (Vth) and mobility (μ), a difference occurs in light emission luminance for each pixel, resulting in display luminance unevenness and streaks, and image quality is degraded. As a technique for suppressing variation in TFT characteristics, Patent Document 1 proposes a display device in which a threshold cancel circuit is provided in all display pixels in order to avoid the influence of variation in Vth.

JP 2004-341144 A

  However, the pixel circuit disclosed in Patent Document 1 can cancel the variation in Vth of the TFT, but cannot cancel the variation in mobility. Furthermore, if the time for Vth cancellation is short, it cannot be canceled sufficiently. For this reason, there has been a problem that the display luminance unevenness cannot be sufficiently suppressed.

  As a result of repeated studies, the present inventors have newly found that display unevenness in brightness can be suppressed by emitting light at two different brightness levels.

  By the way, especially in the case of a display device used for a portable device, there is a demand for changing the maximum display luminance of the display device according to the use situation, such as when used indoors or outdoors. If driving is performed to emit light at two different brightness levels, the maximum display brightness can be easily changed by adjusting the light emission period of each light emission level of each light emitting element. Here, the maximum display luminance means luminance when displaying white, and in order to display white, R (red element), G (green element), and B (blue element) constituting the pixel. It is necessary to emit light at a certain luminance ratio according to the chromaticity of the image (hereinafter, expressed as “maintaining white balance”).

  In the driving method for emitting light at two different luminance levels, when reducing the maximum display luminance, only the light emission period of one of the two emission levels is shortened in consideration of maintaining white balance. There was a problem that it could not be maintained.

  SUMMARY An advantage of some aspects of the invention is that it provides a driving method of a display device that can maintain white balance and gradation characteristics even when display luminance is changed.

  In order to solve the above problems, the present invention includes a light emitting element, a driving transistor that supplies a current corresponding to the potential of the gate electrode to the light emitting element, a storage capacitor that holds the potential of the gate electrode of the driving transistor, A plurality of pixels including a light emission period control means for controlling a period during which the light emitting element emits light, a plurality of data lines for supplying a data voltage corresponding to image data to the gate electrode of the driving transistor, and a reference voltage for the reference voltage A display device having a plurality of reference voltage lines to be supplied to a gate electrode of a driving transistor, wherein the data voltage is supplied from the data line to each pixel for each frame period; After writing, the first reference voltage and the second reference voltage, which are different from each other in advance, are supplied from the reference voltage line in order, one frame period A first period of light emission at a first light emission level according to the data voltage and the first reference voltage, and a second period of light emission at a second light emission level according to the data voltage and the second reference voltage; The display device driving method is characterized in that the display luminance of the light emitting element is changed by changing the first period and the second period at the same ratio by the light emission period control means. To do.

  According to the present invention, it is possible to provide a method of driving a display device that can maintain white balance and gradation characteristics even when display luminance is changed.

It is a figure which shows an example of the display apparatus which concerns on this invention. It is a figure which shows an example of the pixel circuit used suitably for this invention. It is a figure which shows an example of the drive method of the pixel circuit in 1st Embodiment. It is a figure which shows the relationship between the gradation and the brightness | luminance in the conventional light emission pattern. It is a figure which shows the relationship between the gradation in the light emission pattern of this invention, and a brightness | luminance. It is a figure explaining the change method of the display brightness in two types of light emission levels. It is a figure which shows an example of the light emission current for every color at the time of white balance adjustment. It is a figure at the time of reducing only the light emission period with respect to a 2nd light emission current. This is a gradation characteristic when only the light emission period for the second light emission current is reduced. It is a gradation characteristic when the light emission period for the first and second light emission currents is changed. It is a figure explaining the change of the display brightness | luminance in a single light emission level. It is a figure which shows another example of the pixel circuit used suitably for this invention. It is a figure which shows an example of the drive method of the pixel circuit in 2nd Embodiment. It is a figure explaining the change method of the display brightness in two types of light emission levels. It is a figure explaining another change method of the display brightness in two kinds of luminescence levels. A digital still camera system using a display device according to the present invention.

  Hereinafter, the present invention will be described by taking an organic EL display device using an organic EL element (OLED) as a light emitting element as an example. However, the display device according to the present invention is not limited thereto, Any device that can control light emission is preferably applied. Further, the present invention will be described with the value obtained by dividing the light emission amount (integrated light emission amount) in one frame period divided by one frame period as the average light emission level (average luminance).

[First Embodiment]
FIG. 1 is an example of the display device of the present embodiment, and shows the overall configuration of the display device. The display device of FIG. 1 includes an image display unit (hereinafter also referred to as “display region”) in which pixels 1 are arranged in a matrix of m rows × n columns (m and n are natural numbers). The pixel 1 includes an organic EL element having the number of RGB primary colors, a driving transistor that supplies a current corresponding to the potential of the gate electrode to the organic EL element, and one end connected to the gate electrode of the driving transistor to hold the potential of the gate electrode. It has a capacity | capacitance and the light emission period control means which controls light emission. A pixel circuit (see FIG. 2) is configured by the organic EL element, the drive transistor, the storage capacitor, the light emission period control means, and the like.

  1 includes a data line 7 for supplying a data voltage corresponding to image data to the gate electrode of the driving transistor (also used as a reference voltage line for supplying a reference voltage to the gate electrode of the driving transistor). In FIG. 1, the data line 7 also serves as a reference voltage line, but the data line 7 and the reference voltage line may be provided separately.

  1 controls the row control circuit 3 that controls the control signals P1 and P2 supplied to the control lines 5 and 6, and the data voltage supplied to the data line 7 and the reference voltage supplied to the reference voltage line. A column control circuit 4 and a driver IC 10 that controls the row control circuit 3 and the column control circuit 4 are provided. The display device according to the present invention may not have the configuration shown in FIG. 1 as long as it has the same functions as those of the row control circuit 3, the column control circuit 4, and the driver IC 10.

  A control signal is input to the row control circuit 3 from the driver IC 10, and a plurality of control signals P1 (1) to P1 (m) and P2 (1) for controlling the operation of the pixel circuit 2 from each output terminal of the row control circuit 3 are used. ~ P2 (m) is output. P1 which is one of the control signals output from each output terminal of the row control circuit 3 is input to the pixel circuit 2 of each row via the control line 5, and P2 which is another control signal is input via the control line 6. Are input to the pixel circuits 2 in each row. A reference voltage, which is a light emission luminance control signal for emitting light at two light emission levels, may be input to the pixel circuit 2 via the control lines 5 and 6, or may be input to the pixel circuit 2 via the data line 7. May be. In FIG. 1, the number of control lines output from each output terminal of the row control circuit 3 is two. However, the number is not limited to two. Depending on the configuration of the pixel circuit 2, the number of control lines may be one or three. That's all.

  Image data is input to the column control circuit 4 from the driver IC 10, and a data voltage Vdata that is gradation display data corresponding to the image data is output from each output terminal of the column control circuit 4. The data voltage Vdata output from the column control circuit 4 is input to the pixel circuit 2 in each column via the data line 7. In FIG. 1, the column control circuit 4 is drawn in the vicinity of the display area, but may be on a separate substrate such as a COG as long as it is electrically connected.

  FIG. 2 is an example of a pixel circuit including a self-luminous element such as an organic EL element preferably used in the display device of this embodiment. The pixel circuit 2 in FIG. 2 includes an organic EL element, a current supply circuit unit that is a circuit that supplies current corresponding to gradation display data to the organic EL element, and a plurality of signal input wirings connected to the current supply circuit unit (Control lines 5 and 6, data line 7) and power supply wiring (+ VCC wiring, CGND wiring).

  The current supply circuit unit includes a drive transistor Tr2 for supplying a current corresponding to the potential of the gate electrode to the organic EL element, a pixel circuit selection unit for selecting the pixel circuit 2 to be written, and a threshold compensation unit for the drive transistor Tr2. A transistor Tr1 is also provided. In addition, it has a storage capacitor C1 that holds the potential of the gate electrode of the driving transistor Tr2, a transistor Tr3 that is a light emission period control means, and a reference voltage line that is a light emission luminance control means.

  The data line 7 for supplying the data voltage Vdata is a reference voltage line / data line that also serves as a reference voltage line for supplying the reference voltage (Vref) to the gate electrode of the driving transistor Tr2. The reference voltage line and the data line 7 may be switched as separate wirings. In FIG. 2, a P-type transistor (PMOS) is used as the drive transistor Tr2, but an N-type transistor (NMOS) may be used. Moreover, although NMOS is used as the transistors Tr1 and Tr3, PMOS may be used. TFTs are preferably used as the drive transistor Tr2 and the transistors Tr1 and Tr3.

  The transistor Tr1 is a switching unit that connects the drain and gate of the drive transistor Tr2, but is not limited to this as long as the connection between the drain and gate of the drive transistor Tr2 can be controlled. Even when the drive transistor Tr2 is NMOS, the transistor Tr1 connects the drain and gate of the drive transistor Tr2. The transistor Tr3 is a switching unit that connects the drain of the driving transistor Tr2 and the anode of the organic EL element, but is not limited to this as long as the connection between the drain of the driving transistor Tr2 and the anode of the organic EL element can be controlled.

  The control lines 5 and 6 control the operation of the transistors Tr1 and Tr3, but the number of control lines is not limited to two as long as the operation of each transistor can be controlled. The control line 5 for supplying the scanning and auto-zero signal P1 is connected to the gate of the transistor Tr1, and the control line 6 for supplying the light emission period control signal P2 is connected to the gate of the transistor Tr3.

  One end of the storage capacitor C1 is connected to the data line 7 that supplies the data voltage Vdata, and the other end is connected to the gate of the driving transistor Tr2 and the source of the transistor Tr1. The anode of the organic EL element is connected to the source of the transistor Tr3, and the cathode of the organic EL element is connected to the CGND wiring. The + VCC wiring is connected to the source of the driving transistor Tr2.

  FIG. 3 is an example of a timing chart showing a driving method of the pixel circuit of FIG. 2 in the present embodiment. With the same time axis, the potential change of the data line 7, the potential change of the control lines 5 and 6, the light emission pattern ( Light emission state). This driving method is a driving method in which one frame period is divided into four periods: (A) a precharge period, (B) a writing period, (C) another row writing period, and (D) a light emitting period.

  In FIG. 3, the data voltage V (i) is written into the pixel at the same time as the threshold value of the driving transistor Tr2 in the pixel circuit is canceled in the periods (A) and (B). In the period (A), the current flows through the organic EL element regardless of the data voltage during the precharge operation, and the light is emitted for a moment, but the light emission does not affect the gradation display. In the period (C), similarly, the data voltage is written simultaneously with the cancellation of the threshold value to the pixels in the row after the corresponding row. Thereafter, during the period (D), two types of reference voltages are applied to the data line 7, and a current corresponding to the current driving capability of the driving transistor Tr2 is simultaneously supplied to the organic EL element in all rows.

  Thus, within one frame period, a constant current corresponding to the gradation display data programmed according to the current drive capability of the drive transistor Tr2 is supplied to the organic EL element in the period (D). Become. As shown in the light emission pattern of FIG. 3, the organic EL element continues to emit light at two light emission levels within one frame period.

(A) Precharge Period In this period, the transistor Tr1 and the transistor Tr3 are set to “on”, thereby lowering the gate potential of the drive transistor Tr2 and setting it to “on”. The data line 7 is set to the data voltage Vdata (V (i)), and the data voltage is applied to the data line 7 side of the storage capacitor C1. The specific operation is as follows.

  When the control lines 5 and 6 are set to “High”, the transistors Tr1 and Tr3 are turned “on”, and the drain and gate of the drive transistor Tr2 are connected by the transistor Tr1 to be temporarily in a diode connection state. That is, the drive transistor Tr2 is turned on. At this time, current flows through the organic EL element to emit light, but since it is instantaneous light emission, it is difficult to confirm by visual observation. In FIG. 3, description of the light emission pattern during this period is omitted. The data line 7 is set to the data voltage Vdata (V (i)).

(B) Write Period In this period, the threshold voltage is set to the gate of the drive transistor Tr2 by setting the transistor Tr3 to “off”. The holding capacitor C1 holds a difference voltage between the gate voltage of the driving transistor Tr2 and the data voltage applied to the electrode on the data line 7 side of the holding capacitor C1. The specific operation is as follows.

  The control line 6 is set to “Low”, and the transistor Tr3 is set to “off”. After a lapse of a certain time, Vgs (gate-source voltage) of the drive transistor Tr2 becomes the threshold voltage of the drive transistor Tr2, and the storage capacitor C1 is a difference voltage between the data voltage and the gate voltage (threshold voltage) of the drive transistor Tr2. (Auto zero voltage) is stored. This operation provides a voltage at which a constant drive current can be obtained regardless of the threshold voltage change or threshold voltage variation of the drive transistor Tr2.

(C) Other Row Write Period In this period, by setting the transistor Tr1 to “off”, the potential difference held in the storage capacitor C1 is maintained even if the potential of the data line 7 changes to the data voltage of the other row. To do. The specific operation is as follows.

  The control line 5 is set to “Low”, and the sampling period of the program target row (i row) ends. Thereafter, the data line 7 becomes the data voltage (V (i + 1)) of the next row (i + 1 row), and the program of the next row (i + 1 row) is immediately started. At this time, the potential difference held in the holding capacitor C1 is held because there is no movement of charge on the driving transistor Tr2.

(D) Light-Emitting Period In this period, since the potential difference applied to both ends of the storage capacitor C1 is maintained, the gate potential of the driving transistor Tr2 is set to a desired voltage by setting the voltage of the data line 7 to the reference voltage Vref. Set. Then, by setting the transistor Tr3 to “on”, a current corresponding to the drive voltage of the drive transistor Tr2 is supplied to the organic EL element. At this time, as the light emission luminance control means, the reference voltage Vref is changed within the light emission period, so that the light emission in the light emission period (D) is emitted at the two light emission levels of the first light emission level and the second light emission level. Reduces brightness unevenness. The specific operation is as follows.

  The voltage of the data line 7 changes from the data voltage V (n) of the last row to Vref2. Since the potential difference applied to both ends of the storage capacitor C1 is maintained, the gate potential of the driving transistor Tr2 is set to a voltage for performing desired gradation display corresponding to the voltage written during the writing period.

  Further, the control line 6 is set to “High”, and the transistor Tr3 is set to “ON”. Therefore, the current supplied by the drive transistor Tr2 flows through the organic EL element. That is, the drive transistor Tr2 functions as a constant current source.

  In the first half of the light emission period (D), the voltage Vdata of the data line 7 is set to Vref2. This is because Vref2 is set so that the gate voltage of the drive transistor Tr2 is slightly higher than the gate voltage for performing a desired gradation display, that is, the current is slightly reduced. As a result, the organic EL element emits light at the second light emission level.

  In the second half of the light emission period (D), the voltage Vdata of the data line 7 is set to Vref1. As a result, the organic EL element emits light at a first light emission level different from the second light emission level. Since the brightness of the second light emission level is slightly lower, the brightness of the first light emission level is set larger than the brightness of the second light emission level.

  As described above, in this embodiment, the data voltage is supplied to each pixel from the data line and written in the storage capacitor every frame period, and then the first reference voltage Vref1 and the second reference different from each other are determined in advance. One of the voltages Vref2 is supplied from the reference voltage line in order. Within one frame period, there is a first period of light emission at a first light emission level corresponding to the data voltage and the first reference voltage, and a second period of light emission at a second light emission level corresponding to the data voltage and the second reference voltage. . As will be described later, the display luminance of the light emitting element is changed by changing the first period and the second period at the same ratio by the light emission period control means.

  In FIG. 3, the light emission timing at the first light emission level is the last time during the light emission period, but it is not always necessary, and it may be at the beginning or during the light emission period. In addition, regarding the method of slightly lowering the second light emission level, which is the luminance in the first half of the light emission period, as compared with the luminance when light is emitted at a constant level for performing desired gradation display, the voltage of Vref2 is slightly higher. It is not necessary to set so as to be. For example, the data voltage Vdata may be calculated in advance so as to make the current slightly smaller and written to the pixel.

  As described above, by performing gradation display with light emission at two light emission levels in the light emission period (D), luminance unevenness can be suppressed in this embodiment.

  Note that Vref1 and Vref2 are input to the pixel via the data line 7, and Vref1 or Vref2 may be changed depending on the emission color of the pixel. As a result, the white balance can be adjusted optimally, and the luminance of the first light emission level and the second light emission level can be changed. For example, with respect to blue light emission in which uneven brightness is difficult to be visually recognized, uneven brightness may not be visually recognized even if the brightness difference between two light emission levels is reduced or a conventional light emission level is displayed. . In such a case, it is preferable to change the first light emission level and the second light emission level for the blue pixel as compared with other light emission colors. This is because if the luminance at the first light emission level is too high, the power consumption may increase.

  Next, a mechanism for suppressing luminance unevenness by emitting light at two light emission levels will be described with reference to FIGS.

  FIG. 4 is a graph showing the gradation characteristics of unevenness that is observed after the TFT threshold variation is canceled to some extent. The horizontal axis represents gradation, and the vertical axis represents luminance. When replaced with transistor characteristics, the horizontal axis can be regarded as the gate voltage and the vertical axis as the drain current. The curve in the graph is one transistor characteristic itself.

  Here, the current variation in transistor characteristics is considered. In a region where the current is large, since the average current of the transistor current variation is large, the variation amount ratio is relatively small. On the contrary, in the region where the current is small, the absolute value of the current variation is small, but the average current is also small, and as a result, the variation amount ratio tends to be large.

  Consider the visibility of luminance unevenness of a display device using such a transistor. The luminance of a self-luminous element such as an organic EL element is substantially proportional to the flowing current. For this reason, the magnitude of the luminance unevenness is substantially proportional to the variation in the amount of current. In the high gradation region of the image data, that is, the region (C) where the amount of current is large, the current variation ratio is small, and the luminance unevenness is difficult to be visually recognized as a display device.

  In the middle gradation area of the image data, that is, the area (B) where the amount of current is slightly small, where the brightness is slightly reduced, the current variation ratio is large, and the brightness unevenness is easily perceived as a display device.

  In the low gradation region of the image data, that is, the region (A) where the amount of current is very small, the absolute value of the current is very small although there is a variation in current. As a result, the display device has a display with very low brightness, and the brightness difference of brightness unevenness is small, making it difficult to be visually recognized as brightness unevenness.

  FIG. 5 is a diagram illustrating the relationship between gradation, luminance, and luminance unevenness when light is emitted at two types of light emission levels. While the curve indicating the light emission level is in a luminance range (hatched area) where current is small and variation is conspicuous, the gradation is such that unevenness is visible. It is assumed that the first light emission level has a higher luminance and a shorter light emission period than the second light emission level. The brightness of these two light emission levels is the brightness that is flashing instantaneously. In other words, it is the same as the average luminance when light is emitted at a light emission duty of 100% at each light emission level.

  As the display device, the luminance obtained by averaging the sum of the light emission amounts of the first light emission level and the second light emission level over time (the combined luminance) is an average luminance, and the dotted line curve (b) in FIG. It becomes like this. Among these, the light emission amount component of the first light emission level is also shown by the dotted curve (c) in FIG. The synthesized luminance L can be expressed by the following formula (1).

L = (L1 × W1 + L2 × W2) / Wf Formula (1)
L1 is a first light emission level, W1 is a light emission period at the first light emission level, L2 is a second light emission level, W2 is a light emission period at the second light emission level, and Wf is one frame period.

  In the lowest gradation area, that is, in the gradation area lower than that in FIG. 5D, the second light emission level is black, and gradation display is performed only with short-time light emission of the first light emission level. In addition, since the luminance of the first light emission level itself is very low as shown in FIG.

  Next, in the gradation region of FIG. 5D, the second light emission level is black, and gradation display is performed only with light emission for a short time at the first light emission level. The luminance of the first light emission level is emitted at a luminance at which the luminance unevenness shown in FIG. 4B can be seen. However, the first light emission level is short, and the visible luminance is indicated by a dotted curve (b). It becomes the synthesized brightness. As a result, the luminance is very small and luminance unevenness is difficult to be visually recognized.

  In the gradation region between FIGS. 5D and 5E, the luminance at the first light emission level emits light with a small luminance unevenness at the level shown in FIG. 4C, as indicated by the curve (a). The visually recognized luminance is a synthesized luminance drawn by a dotted curve (b). As a result, the luminance unevenness is small and the luminance is very small so that the luminance unevenness is not visually recognized.

  Subsequently, the gradation region in FIG. 5E is a region in which unevenness is conspicuous when displayed by single light emission. However, as indicated by the curve (a), the luminance at the first light emission level is light emission at a high luminance in which the luminance unevenness at the level shown in FIG. As shown by the curve (d), the second light emission level is also very low in luminance as shown in FIG. Since these two luminance unevennesses are difficult to be visually recognized, the luminance unevenness is hardly visible even in the synthesized luminance.

  Next, in the gradation region of FIG. 5 (F), the first light emission level is light emission with high luminance in which the luminance unevenness of FIG. The second light emission level emits light at a luminance at which the luminance unevenness shown in FIG. At this time, although the luminance unevenness due to the second light emission level exists in the synthesized luminance, the luminance unevenness ratio is reduced by being combined with the light emission in which the luminance unevenness at the first light emission level is difficult to be visually recognized. . As a result, the luminance unevenness is less likely to be visually recognized with the synthesized luminance.

  Subsequently, in a higher gradation region than that in FIG. 5F, the first light emission level is light emission at a high luminance in which the luminance unevenness of FIG. The second light emission level also emits light with a luminance that is difficult to visually recognize the luminance unevenness of the level in FIG. Since these two luminance unevennesses are difficult to be visually recognized, the luminance unevenness is hardly visible even in the synthesized luminance.

  In this way, even in a drive where there is a gradation where luminance unevenness is conspicuous at a single light emission level, it is possible to reduce luminance unevenness in all gradation regions by emitting light at two types of light emission levels. It is. In other words, the luminance is obtained by emitting light at two different luminance levels and performing gradation display using a region where the current variation of the transistor is small or the current variation is not conspicuous without using the region where the transistor current variation is large. Unevenness can be more effectively suppressed.

  In addition, as an effect of emitting light at two types of light emission levels, the light emission period may be short with only the first light emission level, and the combined luminance may be insufficient as brightness. Alternatively, there is a concern that the instantaneous luminance at the first light emission level becomes very large. In order to compensate for this, by adding light emission of the second light emission level, a desired synthesized luminance can be obtained.

  As described above, according to the present embodiment, gradation display is performed by light emission of two types of light emission levels, thereby using light emission by a large current with small variation and light emission of low luminance in which luminance unevenness is difficult to be visually recognized. Therefore, luminance unevenness can be suppressed.

  Next, a driving method for changing the display luminance will be described.

  FIG. 6 is a timing chart for explaining a driving method for changing the display luminance in the driving method shown in FIG. The display luminance is changed by changing the light emission pattern by controlling the period when the control line 6 in the light emission period (D) is “High”. In the light emission period (D), the period when the voltage Vdata of the data line 7 is Vref1 is the light emission period A (DA), and the period of Vref2 is the light emission period B (DB). In this case, the light emission period A and the light emission period B are controlled to have the same ratio. In FIG. 6, light emission patterns 1 to 4 are examples in which the “High” period of the control line 6 is changed so that the light emission period A and the light emission period B have the same ratio. When the light emission period A and the light emission period B in the light emission pattern 1 are each 100%, in the light emission pattern 2, both the light emission period A and the light emission period B are 75%. In the light emission pattern 3, both the light emission periods A and B are 50%, and in the light emission pattern 4, both the light emission periods A and B are 25%.

  In this way, by controlling the light emission period A and the light emission period B to change the light emission period at the first light emission level and the light emission period at the second light emission level at the same ratio, the display luminance can be changed, and the white balance and Gradation characteristics can be maintained.

  Here, the reason why the white balance and the gradation characteristics can be maintained will be described with reference to FIGS.

  FIGS. 7A to 7C are diagrams illustrating examples of light emission currents of the red pixel (R), the green pixel (G), and the blue pixel (B) in a state where the white balance is adjusted. The first light emission current is a current waveform when the luminance of the first light emission level is output, and the second light emission current is a current waveform when the luminance of the second light emission level is output. The red pixel (R), the green pixel (G), and the blue pixel (B) depending on the desired chromaticity at the time of white display and the light emission efficiency with respect to the current in the red pixel (R), green pixel (G), and blue pixel (B). ) Each light emission current has a different magnitude.

  FIG. 8 is a diagram showing a case where only the light emission period for the second light emission current is reduced when changing the maximum display luminance (display luminance at the time of white display). In the case of FIG. 8, since the ratio of the light emission amounts of the red pixel (R), the green pixel (G), and the blue pixel (B) is different from the case of FIG. 7, unlike the white chromaticity in FIG. Tonal characteristics change. On the other hand, by changing the light emission period for both the first light emission current and the second light emission current as shown in FIG. 7, the ratio of the light emission amount of the red pixel (R), the green pixel (G), and the blue pixel (B). Therefore, the chromaticity of white does not change, and the maximum display luminance can be changed without changing the gradation characteristics.

  The change of each gradation changes the first light emission level and the second light emission level. In each gradation, control is performed such that the luminance is increased by increasing the first light emission level and the second light emission level.

  FIG. 9 is a graph for explaining a change in gradation characteristics. If only the light emission period for the second light emission current is reduced, the period W2 for light emission at the second light emission level represented by the above formula (1) is reduced. For this reason, the synthesized luminance L does not change in the gradation range of only the first light emission level, but the luminance decreases in the gradation range composed of the combination of the first light emission level and the second light emission level, and is indicated by an arrow. Thus, the gradation characteristics change. On the other hand, by changing the light emission period for both the first light emission current and the second light emission current as shown in FIG. 7, the ratio of the light emission amount of the red pixel (R), the green pixel (G), and the blue pixel (B). Can be maintained.

  FIG. 10 is a graph for explaining the gradation characteristics when the display luminance is changed by changing the light emission period for both the first light emission current and the second light emission current. That is, since the period W1 for emitting light at the first emission level and the period W2 for emitting light at the second emission level expressed by the above formula (1) are reduced, the synthesized luminance L as shown in FIG. Luminance decreases uniformly in the range. This uniformly changes the luminance in any of the red pixel (R), green pixel (G), and blue pixel (B). Therefore, the chromaticity of white does not change, and the display luminance can be changed while maintaining the gradation characteristics.

  However, when the light emission period A is reduced, there may be a case where a transitional state such as the rise and fall of the light emission pattern affects the luminance setting. However, at a setting of a certain maximum display luminance or less, light emission at the two light emission levels described above may not be performed, and display may be performed at a single light emission level. In this case, for each frame period, a data voltage is supplied to each pixel from the data line, and after writing into the storage capacitor, only the first reference voltage is supplied from the reference voltage line. There is only a first period of light emission at the first light emission level within one frame period, and the display brightness of the light emitting element is changed by changing the first period by the light emission period control means. That is, as shown in FIG. 11, the “High” period of the control line 6 is reduced to change the display luminance.

When the “High” period of the control line 6 is reduced, luminance unevenness due to current variation is visually recognized at low luminance until a certain maximum display luminance is set. However, below a certain maximum display brightness, display is performed at a very low brightness, the brightness difference of brightness unevenness is small, and it becomes difficult to be visually recognized as brightness unevenness. Experimentally, when the maximum display luminance is about 50 cd / m ² or less, a satisfactory display in which luminance unevenness is not visually recognized is obtained. That is, when the display brightness at the time of white display is 50 cd / m ² or less, light is emitted at a single light emission level, that is, only the first reference voltage is supplied from the reference voltage line, and the length of the first period is changed. More preferred.

  Therefore, with the conventional driving method of emitting light at a single light emission level, display is performed at a single light emission level up to the maximum display luminance where luminance unevenness is not visually recognized, and two types of light emission levels as shown in FIG. Can be displayed. In this method, the white balance setting is changed when the display at the single light emission level and the display at the two light emission levels are switched. By setting the maximum display brightness in this way, it is not necessary to set a state in which the light emission period A in FIG. 6 is small, and thus it is possible to stably change and set the maximum display brightness.

[Second Embodiment]
The display device of this embodiment is the same as that of the first embodiment, but the pixel circuit is different.

  FIG. 12 is an example of a pixel circuit including a self-luminous element such as an organic EL element preferably used in the display device of this embodiment. The same parts as those in FIG. 2 are given the same reference numerals. The difference from FIG. 2 is that transistors Tr4 and Tr5, a control line 8, and a reference voltage line Vref are added. The transistor Tr4 has one of a source and a drain connected to the data line 7, and the other end connected to the storage capacitor C1. The transistor Tr5 has one end of a source and a drain connected to the storage capacitor C1 and the transistor Tr4, and the other end connected to the reference voltage line Vref. The reference voltage line Vref is connected and supplied in common to all pixels. A control line 8 is connected to the gates of the transistors Tr4 and Tr5, and they are alternatively turned on using transistors having different polarities. In FIG. 12, NMOS is used as the transistor Tr4, but PMOS may be used. Further, although PMOS is used as the transistor Tr5, NMOS may be used.

  FIG. 13 is an example of a timing chart showing the driving method of the pixel circuit of FIG. 12 in the present embodiment, and the potential change of the data line 7, the potential change of the control lines 5, 6, 8, and the reference with the same time axis. A change in voltage and a light emission pattern (light emission state) are shown. This driving method operates with one frame period consisting of (A) precharge period and (B) write period (D) own row selection period, (C) other row selection period, and (E) vertical blanking period as a repetition period. Let

(A) Precharge Period The operation during this period is substantially the same as the (A) precharge period described in the first embodiment. By setting the transistors Tr1 and Tr3 to “on”, the gate potential of the driving transistor Tr2 is lowered and set to “on”. The data line 7 is set to the data voltage Vdata (V (i)), and the data voltage is applied to the data line 7 side of the storage capacitor C1. The specific operation is as follows.

  When the control lines 5 and 6 are set to “High”, the transistors Tr1 and Tr3 are turned “ON”, and the transistor Tr1 connects the drain and gate of the drive transistor Tr2 to temporarily enter a diode connection state. That is, the drive transistor Tr2 is turned on. At this time, current flows through the organic EL element to emit light, but since it is instantaneous light emission, visual confirmation is difficult, and in FIG. 13, description of the light emission pattern during this period is omitted. Further, the control line 8 is “High”, the transistor Tr4 is turned “ON”, and the storage capacitor C1 and the data line 7 are connected. One end of the data line 7 and the storage capacitor C1 is set to the data voltage Vdata (V (i)). The transistor Tr5 is in the “off” state.

(B) Write Period The operation during this period is substantially the same as the (B) write period described in the first embodiment. By setting the transistor Tr3 to “off”, a threshold voltage is set to the gate of the drive transistor Tr2. The holding capacitor C1 holds a difference voltage between the gate voltage of the driving transistor Tr2 and the data voltage applied to the electrode on the data line 7 side of the holding capacitor C1. The specific operation is as follows.

  The control line 6 is set to “Low”, and the transistor Tr3 is set to “off”. Since the control lines 5 and 8 are “High”, the transistors Tr1 and Tr4 are “ON”. After a certain time has elapsed, Vgs (gate-source voltage) of the drive transistor Tr2 becomes the threshold voltage of the drive transistor Tr2, and the storage capacitor C1 is a voltage (auto-zero) of the difference between the data voltage and the gate voltage (threshold voltage) of the drive transistor Tr2. Voltage). This operation provides a voltage at which a constant drive current can be obtained regardless of the threshold voltage change or threshold voltage variation of the drive transistor Tr2.

(C) Other Row Selection Period In this period, the gate potential of the drive transistor Tr2 is set to a desired voltage by setting one end of the storage capacitor C1 to the reference voltage Vref while the potential difference applied to both ends of the storage capacitor C1 is maintained. Set to. By setting the transistor Tr3 to “on”, a current corresponding to the drive voltage of the drive transistor Tr2 is supplied to the organic EL element. The specific operation is as follows.

  The control lines 5 and 8 are set to “Low”, and the transistors Tr1 and Tr4 are “off”. Therefore, even if the potential of the data line 7 changes to the data voltage of another row, the potential difference held in the storage capacitor C1 is maintained. On the other hand, the transistor Tr5 is turned on and the reference voltage Vref2 is applied to one end of the holding capacitor C1, and the Vgs of the drive transistor Tr2 is shifted to a voltage for performing a desired gradation display according to the data voltage. When the control line 6 is set to “High”, the transistor Tr3 is turned “ON”, a current corresponding to the data voltage is supplied to the organic EL element, and light is emitted at the second light emission level. The potential difference held in the holding capacitor C1 is held because there is no charge movement on the driving transistor Tr2, and a constant current continues to flow while the transistor Tr3 is “ON”.

(E) Vertical blanking period The operation during this period is substantially the same as the above-described (C) other row selection period, except that the Vref voltage is changed. By changing the Vref voltage, light emission in the vertical blanking period (E) is emitted at a first light emission level different from the second light emission level. The specific operation is as follows.

  The voltage Vref of the reference voltage line is changed from Vref2 to Vref1. By making the potential of Vref1 lower than Vref2, light is emitted at the first light emission level that is higher than the second light emission level at the reference voltage Vref2. Since the reference voltage line is commonly connected to all the pixels, the voltage Vref of the reference voltage line is changed in the vertical blanking period (E) in which no pixel performs the writing operation. Therefore, the light emission level changes for all pixels at once.

  In this way, in the vertical blanking period (E), by performing display with light emission at two light emission levels, it is possible to suppress luminance unevenness. The mechanism for suppressing the luminance unevenness is as described in the first embodiment.

  Next, a driving method for changing the display luminance will be described.

  Basically, similar to the driving method described in the first embodiment, the light emission period at the first light emission level and the light emission period at the second light emission level are changed at the same ratio. FIG. 14 is an example of a timing chart illustrating a driving method for changing display luminance. The display luminance is changed by changing the light emission pattern by controlling the period when the control line 6 is “High” in the other row selection period (C) and the vertical blanking period (E) and the period of Vref1 in the reference voltage line. To do.

  As described above, in this embodiment, the light emission period is controlled by the light emission period control unit, and the period for supplying the first reference voltage from the reference voltage line is controlled, so that the first period and the second period are in the same ratio. By changing, the display luminance of the light emitting element is changed.

  In FIG. 14, P2 (i-1), P2 (i), and P2 (i + 1) indicate the states of the control lines 6 in the (i-1) th row, the ith row, and the (i + 1) th row, respectively. Vref indicates a state in the reference voltage line Vref. The light emission pattern (i-1), the light emission pattern (i), and the light emission pattern (i + 1) are light emission patterns in the (i-1) th row, the ith row, and the (i + 1) th row, respectively. The L1 period indicates a period during which light is emitted at the first light emission level, and the L21 and L22 periods indicate periods during which light is emitted at the second light emission level. In the vertical blanking period (E), the control line 6 is “High” in any row in the state where the reference voltage line Vref is Vref1 (L1 period) and the control line 6 is “High” in the state of Vref2. Is.

  In order to change the display luminance, the L1 period and the (L21 + L22) period are changed at the same ratio. For example, when the display luminance is set to 50%, both the L1 period and the (L21 + L22) period are changed to 50%. When the display brightness is set to 25%, both the L1 period and the (L21 + L22) period are changed to 25%.

  Thus, by controlling the L1 period and the (L21 + L22) period and changing the light emission period at the first light emission level and the light emission period at the second light emission level at the same ratio, the display luminance can be changed, and the white balance and Gradation characteristics can be maintained.

  FIG. 15 is another example of a timing chart illustrating a driving method for adjusting display luminance. The difference from FIG. 11 is the state of the control line 6 in the vertical blanking period (E). In the vertical blanking period (E), the control line 6 is always “High”. In the Vref1 state (L1 period), light is emitted at the first light emission level as in FIG. 14, and in the Vref2 state (L3, L4 period), light is emitted at the second light emission level.

  In order to change the display luminance, the L1 period and the (L21 + L22 + L3 + L4) period are changed at the same ratio. For example, when the maximum display luminance is set to 50%, both the L1 period and the (L21 + L22 + L3 + L4) period are changed to 50%. When the maximum display luminance is set to 25%, both the L1 period and the (L21 + L22 + L3 + L4) period are changed to 25%.

  The control signal P2 can be realized by shifting with a shift register and using the output signal of each stage of the shift register. In that case, the change of the L21 period and the L22 period changes the shift pulse. In the vertical blanking period (E), the shift clock to the shift register is stopped and the state of the shift register is fixed. The output of the shift register can be forcibly set to “High” or “Low” by a separately input control signal, thereby realizing the control signal P2 in the vertical blanking period (E).

  In this way, by controlling the L1 period and the (L21 + L22 + L3 + L4) period to change the light emission period at the first light emission level and the light emission period at the second light emission level at the same ratio, the display luminance is changed, and the white balance and Gradation characteristics can be maintained.

  However, when the L1 period is reduced, a transitional state where the light emission pattern rises and falls may affect the luminance setting. In this case, similarly to the first embodiment, when the setting is equal to or lower than a certain maximum display luminance, the light emission at the two light emission levels may not be performed, and the display may be performed at the single light emission level. In this case, for each frame period, a data voltage is supplied to each pixel from the data line, and after writing into the storage capacitor, only the first reference voltage is supplied from the reference voltage line. One frame period has only a first period of light emission at the first light emission level. The light emission period is controlled by the light emission period control means, and the display luminance of the light emitting element is changed by changing the first period by controlling the period during which the first reference voltage is supplied from the reference voltage line. That is, it is possible to display at a single light emission level by controlling the “High” period of the control line 6 with the reference voltage line Vref as a constant voltage up to the maximum display brightness where luminance unevenness is not visually recognized. Further, at a maximum display luminance higher than that, it is possible to display at two light emission levels by changing the reference power supply line Vref during the vertical blanking period as shown in FIG. In this method, when the display at the single light emission level and the display at the two light emission levels are switched, the white balance setting is changed.

  As described above, by setting the maximum display brightness, it is not necessary to set a state in which the L1 period is small, so that it is possible to stably change and set the maximum display brightness.

[Third Embodiment]
The present embodiment is an example in which the display device of the first and second embodiments is used in an electronic device.

  FIG. 16 is a block diagram of a digital still camera system as an electronic apparatus in which the present invention is used. In the figure, 11 is a digital still camera system, 12 is a photographing unit, 13 is a video signal processing circuit, 14 is a display panel, 15 is a memory, 16 is a CPU, and 17 is an operation unit.

  In FIG. 16, the video image captured by the imaging unit 12 or the video image recorded in the memory 15 can be signal-processed by the video signal processing circuit 13 and viewed on the display panel 14. The CPU 16 controls the photographing unit 12, the memory 15, the video signal processing circuit 13, and the like by input from the operation unit 17 to perform photographing, recording, reproduction, and display suitable for the situation. In addition, the display panel 14 can be used as a display unit of various electronic devices.

  By using the display device according to the present invention, for example, an information display device can be configured. This information display device takes the form of, for example, a mobile phone, a mobile computer, a still camera, or a video camera. Alternatively, it is a device that realizes a plurality of these functions. The information display device includes an information input unit. For example, in the case of a mobile phone, the information input unit includes an antenna. In the case of a PDA or a portable PC, the information input unit includes an interface unit for a network. In the case of a still camera or movie camera, the information input unit includes a sensor unit such as a CCD or CMOS.

  1: Pixel, 2: Pixel circuit, 3: Row control circuit, 4: Column control circuit, 5: Control line, 6: Control line, 7: Data line, 8: Control line, 10: Driver IC, 11: Digital still Camera system

Claims (6)

A light-emitting element; a driving transistor that supplies a current corresponding to the potential of the gate electrode to the light-emitting element; a storage capacitor that holds the potential of the gate electrode of the driving transistor; and a light-emitting period that controls a period during which the light-emitting element emits light A plurality of pixels including control means;
A plurality of data lines for supplying a data voltage corresponding to image data to the gate electrode of the driving transistor;
A plurality of reference voltage lines for supplying a reference voltage to the gate electrode of the driving transistor;
A method for driving a display device comprising:
In each frame period, the data voltage is supplied to each pixel from the data line and written to the storage capacitor, and then the first reference voltage and the second reference voltage which are different from each other are determined first. In order from the reference voltage line,
A first period of light emission at a first light emission level according to the data voltage and the first reference voltage and a second light emission level according to the data voltage and the second reference voltage within one frame period. 2 periods, and
The display device driving method, wherein the light emission period control means changes the display brightness of the light emitting element by changing the first period and the second period at the same ratio.   2. The display device according to claim 1, wherein the first period and the second period are changed at the same ratio by controlling a period during which the first reference voltage is supplied from the reference voltage line. Driving method. For each frame period, to each pixel, the data voltage is supplied from the data line, and after writing into the storage capacitor, only the first reference voltage is supplied from the reference voltage line,
Within one frame period, it has only a first period for emitting light at the first emission level,
The display device driving method according to claim 1, wherein the display luminance of the light emitting element is changed by changing the first period by the light emission period control means.   4. The display device driving method according to claim 3, wherein the first period is changed by controlling a period during which the first reference voltage is supplied from the reference voltage line. 4. The method for driving a display device according to claim 3, wherein the length of the first period is changed when the display luminance during white display is 50 cd / m < ² > or less.   6. A digital still camera comprising a display device that is driven by the driving method according to claim 1.

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