JP2011192137A - Memory card control system, memory card control device and memory card control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem in which it is difficult to extract an appropriate access performance according to a semiconductor memory card. <P>SOLUTION: The memory card control device 100 includes an error correction information generator 108 which generates error correction information on data in recording of the data, and records the data together with the error correction information; an error corrector 104 which acquires, in the event of an error on acquired data, error correction information necessary for the error correction, and corrects the error; and a status information reader 106 which determines whether to operate the error correction information generator 108 and the error corrector 104 based on information about a flash memory 112 or the like in a memory card 110 and information about error correction executable in the memory card 110. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a memory card control system that controls access to a memory card that is a recording medium, and in particular, accesses to a memory card depending on the type of memory card and the presence or absence of error correction in the memory card. The present invention relates to a memory card control system that determines whether error correction is sometimes performed.

  Currently, memory cards, which are card-type recording media with built-in flash memory such as SD cards, are ultra-small and ultra-thin, and are widely used in digital devices such as digital still cameras because of their ease of handling. Yes.

  The flash memory built in the memory card is a memory that includes a large number of physical blocks of a certain size and can erase data in units of physical blocks. In order to respond to the recent demand for larger capacity, flash memory has been commercialized as multi-value flash memory that can store data of 2 bits or more in one cell.

  In a multi-value flash memory, a plurality of states are provided for the threshold voltage Vth to perform multi-value recording for controlling the amount of electrons stored in the flash memory, thereby realizing a large capacity.

  However, with flash memory, the rate at which errors occur at the time of writing and reading increases as flash memory becomes multi-level, and it is required to deal with error correction.

  As a technique related to error correction of a flash memory, there is a technique disclosed in Patent Document 1. In Patent Literature 1, an interface unit that receives transfer data from a host device, a code data generation unit that generates first code data based on the transfer data, and a nonvolatile memory that stores the transfer data and the first code data A memory control unit that transmits and receives transfer data and first code data between the semiconductor memory and the nonvolatile semiconductor memory, transfer data read from the nonvolatile semiconductor memory, and a first data corresponding to the transfer data And an error correction unit capable of correcting an error bit included in the transfer data based on the code data of one, and the interface unit is a memory card that transmits the transfer data including the error bit to the host device. It is disclosed.

  In a memory card equipped with such an error correction circuit, the memory card transmits transfer data including error bits, so that the host device can perform more advanced error correction processing using the transfer data including error bits. Can be realized.

JP 2006-155408 A

  However, in the above conventional technique, the type of flash memory and the presence or absence of an error correction function cannot be distinguished, so the rate of occurrence of errors during writing and reading is low, and binary flash memory that does not require error correction or error The error correction is performed even for the memory card having the correction function, and the transfer data including the error bit is transferred, so that the transfer rate is lowered and the performance of the memory card cannot be sufficiently obtained. is there.

  In order to solve the above problems, a memory card control system is a memory card control system including a semiconductor memory card and a memory card control device that controls access to the semiconductor memory card, and the semiconductor memory card includes: At least one nonvolatile memory, information on the nonvolatile memory, a status information holding unit that holds information on error correction that can be performed in the semiconductor memory card, and an access request from the memory card control device, A control unit that controls access to the nonvolatile memory or the status information holding unit, and the memory card control device includes an interface unit that controls access to the semiconductor memory card, and the interface unit. When recording data, Error correction information generation unit that records the data together with the error correction information and an error necessary for error correction when an error occurs in the data acquired through the interface unit. Based on the error correction unit that acquires correction information through the interface unit and corrects the data, the information about the nonvolatile memory and the information about error correction acquired through the interface unit, the error An error correction determination unit that determines whether to operate the correction information generation unit and the error correction unit.

  With the above configuration, the memory card control system controls access to the memory card according to the type of non-volatile memory in the memory card and the presence or absence of error correction in the memory card. Access performance can be extracted.

The block diagram which shows the structure of the memory card control system in embodiment The block diagram which shows the connection with the memory card in the embodiment The figure which shows the detail of access to the memory card in embodiment The block diagram which shows the structure of the binary memory card in embodiment 1 is a block diagram showing a configuration of a multi-value memory card having an error correction function in an embodiment 1 is a block diagram showing the configuration of a multi-value memory card that does not have an error correction function in an embodiment Flowchart showing reading of status information of memory card in the embodiment Flowchart showing data write to the memory card in the embodiment Flowchart showing data read from the memory card in the embodiment

  Hereinafter, embodiments will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of a memory card control system 1 in the present embodiment. The memory card control system 1 includes a memory card control device 100 and a memory card 110.

  In FIG. 1, the memory card control device 100 includes an external interface unit 101, a command analysis unit 102, and a memory card control unit 103.

  The external interface unit 101 performs transmission / reception of commands and data transfer with the host device.

  The command analysis unit 102 analyzes a command issued from the host device via the external interface unit 101. For example, if the result of analysis is data read from a memory card, the memory card control means 103 is instructed to perform a read operation.

  The memory card control unit 103 includes an error correction unit 104, a data read unit 105, a memory card status information read unit 106, a data write unit 107, an error correction information generation unit 108, and a memory card interface unit 109. Is done.

  The error correction unit 104 reads the error correction information recorded in the memory card 110 when a read error occurs through the data read unit 105, and corrects user data in which the read error has occurred. The error correction means 104 can be turned on / off depending on the internal configuration of the connected memory card 110.

  The data read unit 105 transfers user data read from the memory card 110 via the memory card interface unit 109 to the host device via the external interface unit 101. In addition, when a read error occurs, the data read unit 105 reads error correction information from the memory card 110 via the memory card interface unit 109 according to a command from the error correction unit 104.

  The status information reading means 106 reads out the memory card status information 116 of the memory card 110 and analyzes the memory card status information 116 via the memory card interface means 109, and turns on / off the error correction function of the memory card control means 103. Judging.

  The data write means 107 writes the write data transferred from the host device via the external interface means 101 to the memory card 110 via the memory card interface means 109. In addition, the error correction information generated by the error correction information generation means 108 is written to the memory card 110 via the memory card interface means 109 as with the write data.

  The error correction information generation means 108 generates error correction information from the write data transferred from the host device. M bytes of error correction information are generated for N bytes of write data, and the amount of data written to the memory card 110 is N + M bytes. For this reason, the amount of data writable from the host device is smaller than the capacity of the memory card 110. Note that the error correction information generation unit 108 can turn on / off the function depending on the internal configuration of the memory card 110 to be connected, like the error correction unit 104.

  The memory card interface unit 109 reads and writes data using the interface protocol of the memory card 110.

  The memory card 110 includes a memory controller 111, at least one flash memory, and memory card status information 116. In this embodiment, four flash memories 112 to 115 are incorporated.

  The memory controller 111 analyzes a command issued by the memory card interface unit 109. In the case of reading data, the memory controller 111 reads data from the flash memories 112 to 115 and transfers it to the memory card interface unit 109. In the case of data writing, the transferred write data is written to the flash memories 112 to 115. In the case of reading the status information, the status information is read from the memory card status information 116 and transferred to the memory card interface means 109.

  The flash memories 112 to 115 record the data written by the data write means 107.

  The memory card status information 116 stores the capacity of the memory card 110, the memory type (binary / multi-value) of the built-in flash memories 112 to 115, the presence / absence of error correction means, etc., and is issued from the memory card interface means 109. Read with a dedicated command.

  Next, the connection between the memory card interface unit 109 and the memory card 110 will be described with reference to FIG.

  The memory card interface means 109 and the memory card 110 are connected by signal lines of “command”, “clock”, “data”, and “response”, and the arrows in FIG. 2 indicate the directions of signals. The “command”, “data”, and “response” are all transferred in synchronization with the “clock” output from the memory card interface unit 109, and the memory card 110 is transferred to the “command” output from the memory card interface unit 109. Perform the corresponding action. If the received “command” is a command that requires a response, the memory card 110 returns a response only to the receivable command. That is, the memory card interface unit 109 can know whether the issued command can be handled based on the presence / absence of a response from the memory card 110.

  "Data" is transferred in a certain size unit (hereinafter referred to as N bytes), and a start flag indicating the start of the data is attached to the head of the data to be transferred. The receiving side detects the start flag and receives the data. Start. Further, a status flag indicating the transfer state is attached every N bytes, and it is possible to detect that the transfer has been normally completed by analyzing the status flag.

  FIG. 3 shows details of the interface protocol. FIG. 3A shows a case where the memory card status information 116 of the memory card 110 is read. First, a “status read command” is issued from the memory card interface means 109 to the “command” signal line to the memory card 110. When the memory card 110 supports the “status read command”, the status information read from the memory card status information 116 is output to the “data” signal line. The data to be transferred is accompanied by the start flag described above, followed by N bytes of data including the memory card status information 116, and finally the status flag. When there is an error in the status flag, the memory card control means 103 reads the memory card status information again or performs error processing. Further, the memory card 110 outputs the presence / absence of an error at the time of command reception to the “response” signal line when corresponding to the “status read command”, and to the “data” and “response” signal lines when not corresponding. In contrast, nothing is output.

  FIG. 3B shows a “data read command” used when reading data from the memory card 110. Here, a case where data of 4 * N bytes is read is shown. First, the memory card interface unit 109 issues a “data read command” and a read start address to the “command” signal line to the memory card 110. The memory card 110 reads data from the built-in flash memories 112 to 115, and is accompanied by a start flag and a status flag every N bytes, and from the flash memories 112 to 115 until a “stop command” indicating the end of reading is received. Reading and data transfer to the memory card interface means 109 are continued.

  FIG. 3C shows a “data write command” used when writing data to the memory card 110. Here, a case where data of 4 * N bytes is written is shown. First, the memory card interface unit 109 issues a “data write command” and a write start address to the “command” signal line to the memory card 110. When the memory card interface unit 109 receives a response from the memory card 110, the memory card interface unit 109 transfers a start flag to the head of data to be written every N bytes. The memory card 110 returns busy to write the received N bytes to the flash memories 112 to 115. After the writing is completed, the memory card 110 returns a status flag to the memory card interface means 109 to notify the presence or absence of a writing error. The memory card interface unit 109 analyzes the status flag, and when there is no write error, similarly transfers the N bytes following the previously transferred data. If there is a write error, the memory card interface means 109 performs data retransmission or error processing. The memory card interface means 109 transmits a “stop command” indicating the end of writing after the last data is transferred, and the operation is completed if there is no error in the status flag for the last data transfer.

  Next, the types of memory cards connected to the memory card control means 103 will be described with reference to FIGS.

  In FIG. 4, the memory card 400 includes a memory controller 401, four flash memories 402 to 405, and memory card status information 406. Since the basic function of the memory controller 401 is the same as that of the memory controller 111 described above, description thereof is omitted. The built-in flash memories 402 to 405 are binary types, and the binary type generally has a higher number of rewritable times than the multi-value type, and has high data retention characteristics, and is therefore of high quality. As information stored in the memory card status information 406, the capacity of the memory card 400 (the total capacity of the flash memories 402 to 405), the memory type (binary), and error correction means (none) are stored.

  In FIG. 5, the memory card 500 includes a memory controller 501, four flash memories 504 to 507, and memory card status information 508. Further, the memory controller 501 includes an error correction information generation unit 502 and an error correction unit 503. The error correction information generation unit 502 transfers the command via the memory card interface unit 109 when the command received by the memory card controller 501 is a write. Error correction information is generated from the written data. The generated error correction information is written in the flash memories 504 to 507 in the same manner as the transferred write data.

  When the command received by the memory card controller 501 is a read, the error correction unit 503 reads a read error from the read data read from the flash memories 504 to 507, and the read in which the error recorded in the flash memories 504 to 507 occurs. Error correction information corresponding to the data is read and error correction processing is executed. The data restored by the error correction process is transferred to the memory card interface means 109 as in the case where no read error has occurred. When the error cannot be restored by the error correction process, the memory card interface means 109 is notified of the read error.

  Built-in flash memories 504 to 507 are inferior to the binary type in the number of rewritable times and data retention characteristics, but are multi-valued types that are inexpensive and can be increased in capacity. The error correction information generation unit 502 and the error correction unit 503 of the memory controller 501 described above are intended to improve quality that is inferior to that of the binary type. Since error correction information is written in addition to the write data in the flash memories 504 to 507, the size of the write data that can be transferred from the host device is smaller than the total capacity of the built-in flash memories 504 to 507. For example, if the capacity of one flash memory in the memory card 500 is 1 GB, the total capacity is 4 GB, but when 16 KB error correction information is generated for every 64 KB of write data, the maximum size of write data that can be transferred from the host device Is 3.2 GB. Therefore, as the information stored in the memory card status information 508, the capacity of the memory card 500 (T × (W / (W + E))) (where T: the total capacity of the flash memories 504 to 507, W: error correction information) Write data size required for generation, E: data size of error correction information), memory type (multi-value type), and error correction means (present) are stored.

  In FIG. 6, the memory card 600 includes a memory controller 601, four flash memories 602 to 605, and memory card status information 606. Since the basic function of the memory controller 601 is the same as that of the memory controller 111 described above, description thereof is omitted. Since the built-in flash memories 602 to 605 are the same multi-value type as the flash memories 504 to 507, the description thereof is omitted. The flash memories 602 to 605 are the same multi-value type as that incorporated in the memory card 500, but since there is no writing of error correction information, the total capacity can be allotted to the write data. Therefore, as the information stored in the memory card status information 606, the capacity of the memory card 600 (the total capacity of the flash memories 602 to 605), the memory type (multi-value type), and error correction means (none) are stored.

  When the above-described three types of memory cards are arranged from the left in order of high quality, the memory card 400, the memory card 500, and the memory card 600 are arranged in this order.

  In addition, when arranged from the left in ascending order of cost in the same capacity, the memory card 600, the memory card 500, and the memory card 400 are arranged in this order.

  That is, when the quality of the recording medium is required, the memory card 400, when the large capacity and low cost are required, the memory card 600, when the balance between the capacity and the quality is required, the memory card 500, etc. A memory card according to the request is selected.

  Next, the operation of the memory card control system 1 will be described using the flowcharts of FIGS.

  A detailed operation of reading the memory card status information 116 will be described with reference to FIG. The memory card status information 116 starts to be read (S700) when the memory card control device 100 and the memory card 110 are powered on, immediately before the memory card control device 100 reads or writes the memory card 110 for the first time, This is performed when the memory card 110 is connected to the card controller.

  If any of the above is true, a memory card status information read command is issued from the memory card interface means 109 to the memory card 110 (S701). The memory card interface unit 109 checks whether or not there is a response from the memory card 110 (S702). If there is a response (Yes in S702), the read memory card status information 116 is transferred to the status information reading unit 106. . The status information reading means 106 analyzes the transferred memory card status information 116 (S703).

  The status information reading unit 106 checks the built-in memory type in the memory card status information 116 (S704), and if it is a binary type (Yes in S704), the error correction function built in the memory card control unit 103 is turned off. The setting is made (S709). Further, when the built-in memory type check is not a binary type, that is, a multi-value type (No in S704), the status information reading unit 106 checks whether or not the memory card 110 has an error correction function (S705). .

  When the memory card 110 has an error correction function (Yes in S705), the status information reading means 106 sets the error correction function built in the memory card control means 103 to OFF as in the case of the binary type (S709). ), The operation is completed (S710).

  When the memory card 110 does not respond to the memory card status information read command and the memory card 110 does not return a response within a predetermined time (No in S702), the status information reading unit 106 has a built-in memory type and a built-in error correction function. If not (No in S705), the operation is performed according to the default setting of the memory card control means 103 (S706). Note that the default setting can be changed from the host device via the external interface unit 101. Note that the default setting may be changed by providing a user interface in the memory card control means 103.

  When the default setting is set to turn off the error correction function built in the memory card control unit 103 (Yes in S706), the status information read unit 106 turns off the error correction function built in the memory card control unit 103. (S709) to complete the operation (S710). If the error correction function is set to ON (No in S706), the error correction function built in the memory card control means 103 is set to ON (S707), and the speed by transferring the error correction information After a warning message such as a decrease and a decrease in usable capacity is output (S708), the operation is completed (S710).

  Next, the operation when the memory card control device 100 receives a write command and write data from the host device to the memory card 110 via the external interface means 101 will be described with reference to the flowchart of FIG.

  When the memory card control device 100 receives a write command from the host device to the memory card 110 via the external interface means 101, the operation starts (S800). When write data from the host device to the memory card 110 is received via the external interface unit 101 (S801), the necessity of the error correction function of the memory card control unit 103 is checked, and the error correction function is necessary (S802). Error correction information is generated by the error correction information generation means 108 (S803). The memory card control means 103 issues a write command to the memory card 110 (S804) and transfers the write data and error correction information received from the host device to the memory card (S805).

  The memory card control means 103 may divide the recording area of the memory card 110 by controlling the write address issued to the memory card 110 and record the write data and error correction information in separate areas. . Further, when the memory controller 111 of the memory card 110 divides the recording area and selects the recording area according to the command received by the memory controller 111, the memory card control means 103 separates the write data and the error correction information separately. You may record to the memory card 110 using a command.

  The memory card control means 103 can determine whether the command issued to the memory card 110 is acceptable by checking the response of the command issued to the memory card 110.

  When the transfer of the write data and the error correction information is completed, the memory card control means 103 completes the write command process by notifying the host device via the external interface means 101 of the operation completion using an interrupt or the like (S806) (S806). S807).

  On the other hand, when the error correction function of the memory card control unit 103 is not required (No in S802), the memory card control unit 103 issues only a write command to the memory card after issuing a write command to the memory card (S808). (S809) to complete the operation (S807).

  Next, the operation when the memory card control apparatus 100 receives a read command from the host device to the memory card 110 via the external interface means 101 will be described with reference to the flowchart of FIG.

  When the memory card control device 100 receives a read command from the host device to the memory card 110 via the external interface means 101, the operation starts (S900).

  First, the memory card control means 103 issues a read command to the memory card (S901). When a read error has occurred when the read data is received from the memory card (S902) (Yes in S903), the memory card control means 103 checks whether the error correction function is necessary.

  When the error correction function of the memory card control unit 103 is necessary (Yes in S904), the memory card control unit 103 first checks whether or not error correction is possible and determines that error correction is possible (S905). Yes) issues a read command for reading the error correction information to the memory card 110, and reads the error correction information from the memory card 110 (S906). The memory card control means 103 performs error correction using the read error correction information (S907), then transfers the corrected data to the host device (S908), and notifies the host device of the completion of the operation using an interrupt or the like ( S909) and the read command processing is completed (S910).

  On the other hand, if the error correction function of the memory card control unit 103 is not required (No in S904), the memory card control unit 103 performs error processing such as notifying the host device of an error (S911), interrupting the host device, etc. Is used to notify the operation completion (S909) and the read command processing is completed (S910).

  If no read error has occurred in the read data received from the memory card (No in S903), the memory card control means 103 transfers the data to the host device regardless of the state of the error correction function (S908), and the host device The completion of the operation is notified using an interrupt or the like (S909), and the read command processing is completed (S910).

  In the present embodiment, the control method when the memory card 110 is connected has been described. However, the present invention is applicable to a memory card module in which a plurality of memory cards are combined or a flash memory drive such as an SSD (Solid State Drive). Similar control is possible.

  As described above, the memory card control system 1 includes the memory card 110 and the memory card control device 100 that controls access to the memory card 110. The memory card 110 includes the flash memories 112 to 115 and the flash memory. Memory card status information 116 including information on whether 112 to 115 is a binary or multi-value type and information on whether or not error correction is performed in the memory card 110 is held, and the memory card control device 100 A memory controller 111 that controls access to the flash memory 112 to 115 or the memory card status information 116 in response to an access request from the memory card, and the memory card control device 100 is a memory that controls access to the memory card 110. Card interface When data is recorded via the stage 109 and the memory card interface means 109, error correction information relating to the data is generated, and the error correction information generation means 108 for recording the data together with the error correction information, and the memory card interface means 109 are provided. Error correction means 104 for acquiring error correction information necessary for error correction via the memory card interface means 109 and correcting the data when an error occurs in the data acquired via the data, and memory card interface means The flash memory 112 to 115 is provided with a status information reading unit 106 that determines whether to operate the error correction information generation unit 108 and the error correction unit 104 based on the memory card status information 116 acquired through the memory 109. When the memory card 400 shown in FIG. 4 is a binary type with good data retention characteristics, and when the flash memory 112 to 115 is a multi-value type shown in FIG. The apparatus 100 turns off the error correction unit 104 and the error correction information generation unit 108, and the flash memory 112 to 115 is the multi-value type shown in FIG. 6, and the memory card 600 does not perform error correction processing and error correction is required. When the memory card control device 100 turns on the error correction means 104 and the error correction information generation means 108, the memory card control device 100 can execute access with performance corresponding to the memory card.

  In addition, the memory card control device 100 further includes a notification unit that notifies that the capacity that can be recorded in the memory card 110 is reduced when the error correction information generation unit 108 records data together with the error correction information. Thus, the user can recognize that the recordable capacity is reduced when error correction information is added to improve reliability.

  The memory card control system according to the present embodiment controls the access to the memory card according to the type of nonvolatile memory in the memory card and the presence or absence of error correction in the memory card. Therefore, it can be used for a video camera or the like that requires real-time recording.

DESCRIPTION OF SYMBOLS 1 Memory card control system 100 Memory card control apparatus 101 External interface means 102 Command analysis means 103 Memory card control means 104,503 Error correction means 105 Data read means 106 Status information read means 107 Data write means 108,502 Error correction information generation means 109 Memory card interface means 110, 400, 500, 600 Memory card 111, 401, 501, 601 Memory controller 112, 113, 114, 115 Flash memory 402, 403, 404, 405 Flash memory (binary)
504, 505, 506, 507, 602, 603, 604, 605 Flash memory (multi-value)

Claims (9)

A memory card control system comprising a semiconductor memory card and a memory card control device for controlling access to the semiconductor memory card,
The semiconductor memory card is
At least one non-volatile memory;
A status information holding unit for holding information on the nonvolatile memory and information on error correction that can be performed in the semiconductor memory card;
In response to an access request from the memory card control device, a control unit that controls access to the nonvolatile memory or the status information holding unit;
With
The memory card control device
An interface unit for controlling access to the semiconductor memory card;
When recording data via the interface unit, an error correction information generation unit that generates error correction information about the data and records the data together with the error correction information;
When an error occurs with respect to data acquired through the interface unit, error correction information necessary for error correction is acquired through the interface unit, and the error correction unit corrects the data;
An error correction determination unit that determines whether to operate the error correction information generation unit and the error correction unit based on the information on the nonvolatile memory acquired through the interface unit and the information on the error correction;
A memory card control system comprising: The status information holding unit
As information about the non-volatile memory, information on whether the non-volatile memory is binary or multi-valued is retained,
As information on error correction that can be performed in the semiconductor memory card, holding information on whether to perform error correction in the semiconductor memory card,
The error correction determination unit
When the non-volatile memory is binary compatible, or the non-volatile memory is multi-level compatible and performing error correction, the error correction information generation unit and the error correction unit operate as follows. The memory card control system according to claim 1, wherein the memory card control system is stopped. The memory card control device
In the error correction information generation unit, when the data is recorded together with the error correction information, a notification unit that notifies that the capacity that can be recorded in the semiconductor memory card is reduced,
The memory card control system according to claim 1, further comprising: The memory card control device
When the error correction information generation unit records the data together with the error correction information, the semiconductor memory card is divided into a first area and a second area, and the data is recorded in the first area. The memory card control system according to claim 1, wherein the error correction information is recorded in the second area. An interface unit for controlling access to the semiconductor memory card;
When recording data via the interface unit, an error correction information generation unit that generates error correction information about the data and records the data together with the error correction information;
When an error occurs with respect to data acquired through the interface unit, error correction information necessary for error correction is acquired through the interface unit, and the error correction unit corrects the data;
Based on the information on the nonvolatile memory in the semiconductor memory card acquired through the interface unit and the information on error correction that can be performed in the semiconductor memory card, the error correction information generation unit and the error correction unit are An error correction determination unit that determines whether to operate,
A memory card control device comprising: The error correction determination unit
As information on the nonvolatile memory, information on whether the nonvolatile memory corresponds to binary or multi-value, information on error correction that can be performed in the semiconductor memory card, and error in the semiconductor memory card The information on whether correction is being performed is acquired, and the error correction is performed when the non-volatile memory corresponds to binary or when the non-volatile memory corresponds to multi-value and performs error correction. The memory card control device according to claim 5, wherein the operation of the information generation unit and the error correction unit is stopped. In the error correction information generation unit, when the data is recorded together with the error correction information, a notification unit that notifies that the capacity that can be recorded in the semiconductor memory card is reduced,
The memory card control device according to claim 5 or 6, further comprising: The memory card control device
When the error correction information generation unit records the data together with the error correction information, the semiconductor memory card is divided into a first area and a second area, and the data is recorded in the first area. The memory card control device according to claim 5, wherein the error correction information is recorded in the second area. A memory card control method for controlling access to a semiconductor memory card,
An interface process for controlling access to the semiconductor memory card;
When recording data using the interface step, error correction information related to the data is generated, and the data is recorded together with the error correction information.
When an error occurs with respect to data acquired using the interface process, error correction information necessary for error correction is acquired through the interface process, and the error correction process for correcting the data;
Based on the information on the nonvolatile memory in the semiconductor memory card acquired using the interface step and the information on error correction that can be performed in the semiconductor memory card, the error correction information generation step and the error correction step are performed. An error correction determination step for determining whether to operate, and
Including a memory card control method.

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