JP2011014789A - Nitride-based semiconductor field effect transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a nitride-based semiconductor heterojunction field effect transistor which can attain a normally-off operation, can obtain a sufficient channel current, and can easily control a threshold voltage.SOLUTION: In a field effect transistor with a heterojunction interface of a GaN layer 10 and an AlGaN layer 11 as a channel, a third layer 40 having a negative charge is provided inside a gate insulating film 31 under a gate electrode 34, and negative ions 41 such as fluoride ions Fare implanted into a nitride semiconductor forming a heterojunction, Negative ions such as Clare implanted into the third layer 40. By implanting the suitable quantity of negative ions into the gate insulating film 31 and the AlGaN layer 11, a threshold voltage is increased, a normally-off operation is surely attained and a sufficient channel current can be acquired.

Description

  The present invention relates to a nitride-based semiconductor device, and more particularly, a so-called normally-off type nitride-based semiconductor heterojunction field effect transistor in which a drain current does not flow when a gate voltage is not applied (hetero-junction field effect transistor: HFET).

Group III nitride semiconductors such as GaN, AlGaN, and InGaN have a higher breakdown voltage and higher current density than conventional semiconductors such as Si and GaAs because of the intrinsic characteristics of materials such as a large energy band gap. Operation is possible and application to power devices is expected.
In particular, a GaN-based semiconductor can form a heterojunction such as AlGaN / GaN, and a nitride-based semiconductor heterojunction field effect transistor (HFET), also known as a high electron mobility transistor (HEMT), can be used. Has been developed.

  AlGaN / GaN heterojunction FETs undergo polarization in AlGaN due to spontaneous polarization due to the crystal structure of the nitride semiconductor and piezo polarization due to strain at the interface, resulting in negative charges (electrons) on the GaN side of the AlGaN / GaN interface. Accumulates to form a highly concentrated two-dimensional electron gas. By forming this two-dimensional electron gas, the AlGaN / GaN heterojunction FET has the advantage that the channel resistance (on-resistance of the HFET) can be kept low without doping AlGaN, and a high output operation can be achieved. is there.

However, AlGaN / GaN-based HFETs are normally-on devices in which current flows through the FET even when no gate signal is present, since it is difficult to eliminate the two-dimensional electron gas even when the gate voltage is zero. It is difficult to achieve a so-called normally-off state (enhancement mode) in which no current flows through the FET when it is not included.
When applied to power devices such as power supply circuits and motor control, normally-off operation is essential, and a method for achieving normally-off operation of an AlGaN / GaN-based HFET has been proposed (for example, Non-Patent Document 1, Non-patent document 2, Patent document 1).

Non-Patent Document 1 proposes a method of reducing the effect of polarization by thinning the AlGaN layer. Non-Patent Document 2 proposes a method of negatively charging the AlGaN layer by injecting fluorine ions (F ⁻ ions) into the AlGaN layer by exposing the sample to CF ₄ plasma. Further, Patent Document 1 discloses a floating gate having a negative charge in which a positive charge in the AlGaN layer is canceled and a surplus electron or ion is injected into the gate insulating film between the control gate electrode and the AlGaN layer. By providing a layer, a method of controlling the threshold voltage (V _th ) of the AlGaN / GaN HFET to a positive value and realizing normally-off has been proposed.

JP 2008-130672 A

M.M. A. Kahn et al., Applied Physics Letter, Vol. 68, No. 4, January 1996, pages 514-516. Di Song et al., IEEE Electron Device Letters, Vol. 28, No. 3, March 2007, pages 189-191

However, in the method of Non-Patent Document 1, it is difficult to completely turn off normally, and even if a positive bias is applied to the gate, a forward current flows through the gate, so that a sufficient two-dimensional electron gas concentration, That is, there is a problem that it is difficult to obtain a sufficient channel current. Although a method of suppressing the gate forward current by attaching a thin insulating film such as Al ₂ O ₃ on AlGaN has been studied, it is difficult to reduce the interface state of the Al ₂ O ₃ / AlGaN interface, and electrons are trapped. Therefore, the channel charge cannot be increased.

In the method of Non-Patent Document 2, the controllability is poor because the AlGaN layer is etched by CF ₄ plasma or the AlGaN layer is damaged, and it is difficult to precisely control the threshold voltage to be normally off. There is a problem.
Furthermore, the method of Patent Document 1 can realize normally-off by the amount of negative charge added to a negatively charged layer such as a floating gate between the gate electrode and the AlGaN layer, but a considerable amount of electrons Or there exists a problem that it is necessary to provide a negative ion.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a nitride that can achieve normally-off operation, can obtain a sufficient channel current, and can easily control the threshold voltage. A semiconductor heterojunction field effect transistor is provided.

  In order to solve the above-described problems, the present invention provides a nitride-based semiconductor field effect transistor having a heterojunction interface as a channel. A nitride-based semiconductor field-effect transistor having a negative ion in a nitride semiconductor that is provided between an electrode and a nitride-based semiconductor and that forms the heterojunction.

Here, the third layer having a negative charge is a layer other than the control gate electrode and the nitride-based semiconductor between the control gate electrode and the nitride-based semiconductor.
Accordingly, a third layer having a negative charge is provided between the control gate electrode and the nitride semiconductor, and negative ions in the nitride semiconductor forming the heterojunction cause the nitride semiconductor to The potential for electrons is substantially increased and the channel is depleted. As a result, a normally-off operation can be achieved, and the operation threshold voltage can be controlled to a required positive voltage.

The third layer having a negative charge is made of a conductor layer that is negatively charged by electrons, and the conductor layer is covered with an insulator layer.
Thereby, by confining electrons in the conductor layer as the third layer, the potential of the nitride-based semiconductor adjacent to the conductor layer is substantially increased, and the channel is depleted. This achieves a normally-off operation that prevents current from flowing through the channel when the gate voltage is zero.

The third layer having negative charges is made of polysilicon whose resistance is lowered by implanting ions such as boron B ⁻ and phosphorus P ⁻ by introducing impurities. Here, if the amount of impurities introduced into the polysilicon is increased, lower resistance polysilicon can be obtained.
As a result, similarly to the nonvolatile memory using the Si-MOSFET, the temperature reliability is increased, and the probability that the charge accumulated in the polysilicon is lost due to the leakage current is reduced.

The third layer having a negative charge is formed of a refractory metal selected from Mo, Ta, W, Ti, Cr, Nb, or the like, an alloy material containing these metals as a main component, or a compound material thereof. May be.
This increases resistance to high annealing temperatures and operating temperatures, and improves reliability. Further, processing by chemical etching or the like becomes easy.

Preferably, the insulator layer covering the third layer having a negative charge is a dielectric layer. The dielectric layer may be composed of two different types of dielectric layers such as a Si nitride film, an Al ₂ O ₃ film, or an oxide Si (SiO ₂ ) film.
For example, in the case of an AlGaN / GaN-based HFET, the insulator layer in contact with AlGaN uses an insulator layer that shares atoms with AlGaN, such as a Si nitride film or an Al ₂ O ₃ film, thereby reducing the interface state with AlGaN. Thus, current collapse can be suppressed, and a band gap such as an oxide Si (SiO ₂ ) film is wide in the insulator layer between the third layer having negative charges and the control gate electrode. It is possible to suppress the attenuation of the charge accumulated in the third layer by using a highly insulating insulator layer.

The third layer having a negative charge may be an insulator layer containing negative ions.
Thereby, by confining negative ions in the insulator layer as the third layer, the potential for the electrons of the nitride semiconductor adjacent to the insulator layer is substantially increased, the channel is depleted, and the normally-off operation is performed. Makes it possible to achieve. By adjusting the amount of negative ions, the threshold is controlled so that no current flows in the channel even if some positive charge is applied to the control gate electrode, and a normally-off nitride semiconductor heterojunction field effect transistor Can be obtained.

It is desirable that the negative ions contained in the insulator layer are chlorine ions Cl ⁻ or fluorine ions F ⁻ .
Chlorine ion Cl ⁻ and fluorine ion F ⁻ are the most easily ionized elements belonging to group VII together with bromine ion Br ⁻ . Among them, the chlorine ion Cl ⁻ belongs to the same period as Si and has a slightly larger atomic radius than Si. Therefore, it can be present in a more stable and appropriate amount in the Si nitride film and the Si oxide film. it can.

  According to the present invention, it is possible to provide a nitride-based semiconductor heterojunction field effect transistor that can achieve normally-off operation, can obtain a sufficient channel current, and can easily control the threshold voltage.

Sectional drawing which shows schematic structure of 1 A of nitride type semiconductor field effect transistors which concern on the 1st Embodiment of this invention Sectional drawing (a) which shows schematic structure of 1 A of nitride type semiconductor field effect transistors which concern on 1st Embodiment, energy band figure (b), and figure (c) explaining space charge Explanatory drawing (model a) of the energy band and carrier concentration according to the amount of negative ions implanted into the gate insulating film of the nitride-based semiconductor field effect transistor 1A according to the first embodiment Explanatory drawing (model b) of the energy band and carrier concentration according to the amount of negative ions implanted into the gate insulating film of the nitride semiconductor field effect transistor 1A according to the first embodiment Explanatory drawing of energy band and carrier concentration according to the amount of negative ions implanted into the gate insulating film of the nitride-based semiconductor field effect transistor 1A according to the first embodiment (model c) Explanatory drawing of energy band and carrier concentration when negative ions are implanted into the gate insulating film and AlGaN layer 11 of the nitride semiconductor field effect transistor 1A according to the first embodiment (model d) Explanatory diagram of energy band and carrier concentration when negative ions are implanted into the AlGaN layer 11 of the nitride semiconductor field effect transistor 1A according to the first embodiment (model e) The figure which shows the gate voltage-drain current relationship of 1 A of nitride type semiconductor field effect transistors which concern on 1st Embodiment. The figure which shows the two-dimensional electron gas density | concentration of 1 A of nitride type semiconductor field effect transistors which concern on 1st Embodiment Sectional drawing (a) which shows schematic structure of nitride type semiconductor field effect transistor 1B which concerns on the 2nd Embodiment of this invention, energy band figure (b), and figure (c) which shows space charge

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a cross-sectional view showing a schematic configuration of a nitride-based semiconductor field effect transistor 1A according to the first embodiment of the present invention.

As shown in FIG. 1, a nitride semiconductor field effect transistor 1A (hereinafter referred to as an AlGaN / GaN HFET) according to the first embodiment includes a sapphire substrate 9 and a GaN layer 10 formed on the sapphire substrate 9. And chemical vapor deposition on the operating region between the AlGaN layer 11 formed on the GaN layer 10, the source electrode (S) 21, the drain electrode (D) 22, and the source electrode 21 and the drain electrode 22. It comprises a gate oxide film 31 made of oxidized Si (SiO ₂ ) and a gate electrode (G) 34 deposited by the method (Chemical Vapor Deposition: CVD).

  In this AlGaN / GaN HFET (1 A), a heterojunction interface is formed between the AlGaN layer 11 having a wide band gap and the GaN layer 10 having a narrower band gap than the AlGaN layer 11.

In the AlGaN / GaN-based HFET (1A) of the present invention, negative ions such as fluorine ions F ⁻ are added to the region 40 immediately below the gate electrode 34 of the gate oxide film 31 by ion implantation. Negative ions such as fluorine ion F ⁻ are also added to the AlGaN layer 11.

FIG. 2 is a cross-sectional view (a) showing a schematic structure of the AlGaN / GaN HFET (1A) according to the first embodiment, an energy band diagram (b), and a diagram (c) showing space charges. This figure shows the case where negative ions are added only to the gate oxide film 31.
A cross-sectional view showing a schematic structure of the AlGaN / GaN-based HFET (1A) shown in FIG. 2A is the same as that shown in FIG.

  As shown in FIGS. 2B and 2C, the heterojunction of the GaN layer 10 and the AlGaN layer 11 causes negative polarization in the AlGaN layer 11 due to spontaneous polarization and piezo polarization, and to the gate insulating film 31 side. The positive charge 52 is generated on the GaN layer 10 side.

A negative charge 40 is applied to the gate insulating film 31, and all electric lines of force from the positive charge 52 in the AlGaN layer 11 are directed to the negative charge 40 in the gate insulating film 31, and toward the GaN layer 10 side. Negative charges are never induced.
When the negative charge 40 of the gate insulating film 31 is sufficient to compensate for the positive charge 52 in the AlGaN layer 11, the positive charge 53 is also induced in the GaN layer 10. This positive charge 53 is caused by ionized residual donors or holes induced in the GaN layer 10, and moves the threshold voltage _Vth of the AlGaN / GaN HFET (1A) in the positive direction. Is possible.

3, 4, 5, 6, and 7 are simulation results of energy bands and carrier concentrations that change depending on the amount of negative ions added to the gate insulating film 31 and the AlGaN layer 11.
In this simulation, as shown in FIG. 1, an AlGaN layer 11 having a thickness of 25 nm is formed on a GaN layer 10 having a thickness of 2 μm, and the gate insulating film 31 has a thickness of 10 nm below the gate electrode 34, and has a source electrode 21 and a drain electrode 22. A 50 nm thick AlGaN / GaN-based HFET (1A) was used in the portion covering the film.

3 shows a case where negative ions are not added to the gate insulating film 31 and the AlGaN layer 11 (hereinafter referred to as model a). FIG. 4 shows that −3 × 10 ¹³ negative ions are added only to the gate insulating film 31. When cm ^{−2 is} implanted (hereinafter referred to as model b), FIG. 5 shows the energy when negative ions are implanted into the gate insulating film 31 only at −5 × 10 ¹³ cm ⁻² (hereinafter referred to as model c). It is a simulation result of a band and a carrier concentration.
The above model a, model b, and model c are for implanting negative ions only into the gate insulating film 31, and the gate insulating film of the AlGaN / GaN HFET (1A) according to the first embodiment of the present invention. This will be described for comparison with the case where negative ions are implanted into both 31 and the AlGaN layer 11 (FIG. 6).

As shown in FIG. 3, in the case of model a, negative ions are not implanted into the gate insulating film 31, the potential of the gate insulating film 31 with respect to the electrons of the AlGaN layer 11 is low, and the interface between the AlGaN layer 11 / GaN layer 10 is shown. Many two-dimensional electron gases are generated. The carrier concentration in the vicinity of the AlGaN layer 11 / GaN layer 10 interface is approximately 1 × 10 ²⁰ cm ⁻³ .

On the other hand, when negative ions (for example, fluorine ions F ⁻ ) are implanted into the gate insulating film 31 by −3 × 10 ¹³ cm ⁻² as in the case of the model b shown in FIG. As a result, the potential of the gate insulating film 31 with respect to the GaN layer 10 is increased, a depletion layer is formed in the channel in the GaN layer 10, and the carrier concentration in the vicinity of the AlGaN layer 11 / GaN layer 10 interface is reduced to 5 × 10 ¹⁹ cm ⁻³ . Thereby, it is considered that the threshold voltage _Vth increases.

Furthermore, as in the case of model c shown in FIG. 5, when negative ions (for example, F ⁻ ) are implanted into the gate insulating film 31 by −5 × 10 ¹³ cm ⁻² , the gate insulating film 31 with respect to the electrons of the AlGaN layer 11. Is further increased, a depletion layer is formed in the channel in the GaN layer 10, and the carrier concentration in the vicinity of the AlGaN layer 11 / GaN layer 10 interface is about 1 × 10 ¹⁹ cm ⁻³ .

In FIG. 6, as a first embodiment of the present invention, negative ions (for example, fluorine ions F ⁻ ) are implanted at −3 × 10 ¹³ cm ⁻² into the gate insulating film 31, and the gate electrode 34 of the AlGaN layer 11 is further implanted. It is a simulation result of the energy band and carrier concentration when negative ions (for example, fluorine ions F ⁻ ) are implanted immediately below by −1 × 10 ¹³ cm ⁻² (model d).
As shown in the figure, the potential of the gate insulating film 31 becomes as high as in the case of the model b shown in FIG. 4, and the potential of the AlGaN layer 11 into which negative ions are implanted also becomes high.

In this case, since a considerable amount of negative ions (negative charges) are implanted into the gate insulating film 31 and the AlGaN layer 11, the positive charges 52 in the AlGaN layer 11 are compensated and also in the GaN layer 10. A positive charge is induced and the amount of two-dimensional electron gas is greatly reduced. The carrier concentration in the GaN layer 10 is about 1 × 10 ⁸ cm ⁻³ , and there is no concentration near the interface between the AlGaN layer 11 / GaN layer 10.

For comparison with the first embodiment of the present invention, FIG. 7 shows a case where negative ions (for example, fluorine ions F ⁻ ) are implanted into the AlGaN layer 11 only at −1 × 10 ¹³ cm ⁻² (model e). ) Shows the simulation results of the energy band and carrier concentration.
As shown in the figure, the potential of the gate insulating film 31 is the same as that of the model a shown in FIG. 3, and the potential of the portion of the AlGaN layer 11 into which negative ions are implanted increases.

In this case, there are fewer negative ions (negative charges) than in the case of the model d, and the reduction amount of the two-dimensional electron gas is smaller than that of the model d. The carrier concentration in the vicinity of the AlGaN layer 11 / GaN layer 10 interface is about 1 × 10 ¹⁹ cm ⁻³ .

8 shows a case where negative ions are not implanted into the gate insulating film 31 and the AlGaN layer 11 (model a), and a case where negative ions are implanted only into the gate insulating film 31 at −3 × 10 ¹³ cm ⁻² (model). b) When negative ions are implanted only into the gate insulating film 31 at −5 × 10 ¹³ cm ⁻² (model c), −3 × 10 ¹³ cm ⁻² into the gate insulating film 31 and the gate electrode 34 of the AlGaN layer 11. when injected negative ions -1 × ¹⁰ 13 ^{cm -2} to immediately below (model d), when injected negative ions only -1 × ¹⁰ 13 ^{cm -2} to immediately below the gate electrode 34 of the AlGaN layer 11 ( model e) is a simulation result of a relation between the gate voltage _{V g} and the drain current _{I d} of the AlGaN / GaN-based HFET of (1A). The drain voltage _Vds was 10V.

As shown in FIG. 8, as compared with the case where negative ions are not implanted into the gate insulating film 31 and the AlGaN layer 11 (model a), negative ions are injected only into the gate insulating film 31 at −3 × 10 ¹³ cm. ^-2 injection (model b) shifts the threshold voltage _{Vth in the} positive direction by about 7.5V. However, the threshold voltage _Vth is a negative value, and a normally-off operation cannot be realized.
In addition, when negative ions are implanted only into the gate insulating film 31 at −5 × 10 ¹³ cm ⁻² (model c), the threshold voltage V _th is further shifted in the positive direction, and a substantially normally-off operation can be realized. It is.

From the above simulation results, it can be seen that the threshold voltage V _th increases by about 2.5 V for each negative ion amount of 1 × 10 ¹³ cm ⁻² implanted into the gate insulating film 31.

On the other hand, when negative ions of −3 × 10 ¹³ cm ⁻² and −1 × 10 ¹³ cm ⁻² are implanted directly under the gate electrode 34 of the AlGaN layer 11 into the gate insulating film 31 (model d), the gate insulating film 31. When negative ions of −3 × 10 ¹³ cm ⁻² are implanted into the electrode, the threshold voltage V _th moves in the positive direction of about 7.5 V, and the threshold voltage of about 5 V It can be seen that _Vth is obtained and a normally-off operation can be realized.

Further, the case where negative ions of −1 × 10 ¹³ cm ⁻² are implanted only directly under the gate electrode 34 of the AlGaN layer 11 (model e) is also compared with the case where no negative ions are implanted (model a). Since the threshold voltage V _th is shifted in the positive direction by about 7.5 V, the threshold voltage can be obtained by implanting negative ions of −1 × 10 ¹³ cm ⁻² immediately below the gate electrode 34 of the AlGaN layer 11. It can be seen that _Vth increases by about 7.5V.

Also by adding a negative ion immediately below the gate electrode 34 of the AlGaN layer 11, the slope of the gate voltage _{V g} versus drain current _{I d} is not changed, a large drain current _{I d} is obtained.

As described above, by injecting a negative ion of an appropriate amount just below the gate electrode 34 of the gate insulating film 31 and the AlGaN layer 11, sufficiently threshold voltage _{V g} of the AlGaN / GaN-based HFET (1A) It becomes possible to take a positive value, so that a normally-off operation can be reliably realized, and a sufficient channel current can be obtained.

FIG. 9 shows the simulation result of the two-dimensional electron gas concentration value formed in the GaN layer in the case of the above-described model a, model b, model c, model d, and model e. This is a value when negative ions are implanted into a thickness range of 10 nm immediately below the gate electrode 34 of the AlGaN layer 11.
As shown in the figure, in the case of model d in which negative ions are implanted into both the gate insulating film 31 and the AlGaN layer 11, the two-dimensional electron gas concentration formed in the GaN layer 10 is nearly seven orders of magnitude lower.
As a result, negative ions are implanted into both the gate insulating film 31 and the AlGaN layer 11, thereby suppressing the two-dimensional electron gas and achieving a normally-off operation.

In the model d and model e described above, negative ions are implanted directly under the gate electrode 34 in the AlGaN layer 11. However, the negative ions are not limited to be directly under the gate electrode 34 and are implanted into the AlGaN layer 11. Also good.

  FIG. 10 is a sectional view (a) showing a schematic configuration of an AlGaN / GaN HFET (1B) according to the second embodiment of the present invention, an energy band diagram (b), and an explanatory diagram (c) of space charge. is there.

The AlGaN / GaN HFET (1B) includes a sapphire substrate 9, a GaN layer 10 formed on the sapphire substrate 9, an AlGaN layer 11 formed on the GaN layer 10, a source electrode (S) 21 and a drain. Si oxide (SiO) deposited by chemical vapor deposition (CVD) on the operating region between the electrode (D) 22, the gate electrode (G) 34, and the source electrode 21 and the drain electrode 22. ₂ ), a floating gate layer 33 provided in a region below the gate electrode (G) 34 on the gate oxide film 31, and oxidized Si (SiO ₂ ) deposited on the floating gate layer 33 by CVD. ).

The floating gate layer 33 is formed of, for example, low resistance polysilicon. Further, the floating gate layer 33 may be formed of a refractory metal selected from Ta, W, Ti, Cr, Nb or the like other than Mo, an alloy material mainly composed of these metals, or a compound material thereof. .
The floating gate layer 33 is a third layer having a negative charge provided between the gate electrode 34 and the AlGaN layer 11 which is a nitride-based semiconductor. By covering the floating gate layer 33 with the gate insulating films 31 and 32, electrons are confined in the floating gate layer 32.

By applying a negative charge due to an appropriate amount of electrons to the floating gate layer 33 in advance by an electron beam or the like and further implanting negative ions into the AlGaN layer 11, the threshold voltage V of the AlGaN / GaN HFET (1B) is obtained. It is possible to control _th to a required value. The gate electrode 34 is provided in a region above the floating gate layer 33 on the gate insulating film 32.

  As shown in the energy band diagram of FIG. 10B and the space charge explanatory diagram of FIG. 10C, the heterojunction of the GaN layer 10 and the AlGaN layer 11 causes spontaneous polarization in the AlGaN layer 11. Due to the piezo polarization, a negative charge 51 is generated on the gate insulating film 31 side and a positive charge 52 is generated on the GaN layer 10 side.

A negative charge 40 is applied to the floating gate 33, and all electric lines of force from the positive charge 52 in the AlGaN layer 11 are directed to the negative charge 40 in the gate insulating film 31, and are negative on the GaN layer 10 side. Is not induced.
If the negative charge 40 of the floating gate 33 is sufficient to compensate for the positive charge 52 in the AlGaN layer 11, the positive charge 53 is also induced in the GaN layer 10. This positive charge 53 is caused by ionized residual donors or holes induced in the GaN layer 10, and moves the threshold voltage _Vth of the AlGaN / GaN HFET (1B) in the positive direction. Is possible.

The AlGaN / GaN-based HFET (1B) according to the second embodiment also applies a negative charge to the floating gate layer 33 and the AlGaN layer 11, whereby the AlGaN / GaN-based HFET (1A) according to the first embodiment. As in the case of, the threshold voltage _Vth can be moved in the positive direction, thereby enabling a normally-off operation. In addition, a sufficient channel current can be obtained.

  The present invention is not limited to the embodiment described above, and various modifications are possible, and these are also included in the technical scope of the present invention.

  In each of the above embodiments, an AlGaN / GaN HFET has been described as an example of a nitride semiconductor heterojunction field effect transistor, but the present invention is not limited to this configuration. For example, a first nitride semiconductor having a wide band gap on the gate electrode 34 side and a first nitride system on the sapphire substrate 9 side using a heterojunction interface of nitride semiconductors such as GaN, AlGaN, and InGaN as a channel. The present invention is widely applicable to nitride semiconductor HFETs each having a second nitride semiconductor having a narrower band gap than that of the semiconductor.

The gate insulating film 31 on the AlGaN layer 11 is not limited to SiO ₂ , and the two-dimensional electron gas density (usually about 10 ¹³ cm ^{−2) at} which the interface state density with the AlGaN layer 11 should be induced at the heterointerface. As long as it is controlled to be sufficiently smaller (for example, 10 ¹¹ cm ⁻² or less), a Si nitride film (SiN _x ), an Al ₂ O ₃ film or the like may be used.
Further, in each of the above embodiments, the sapphire substrate 9 is used as the substrate, but a substrate such as SiN, GaN, or Si may be used.
In each of the above embodiments, the present invention can also be applied to a nitride-based semiconductor heterojunction field effect transistor having a structure in which a buffer layer such as AlN is provided between the sapphire substrate 9 and the GaN layer 10.

1A, 1B ... AlGaN / GaN heterojunction field effect transistor (HFET)
9 ......... Sapphire substrate 10 ......... GaN layer 11 ......... AlGaN layer 21 ......... Source electrode (S)
22 ... Drain electrode (D)
31 ......... Gate insulating film 32 ......... Gate insulating film 33 ......... Floating gate 34 ......... Gate electrode (G)
40... Negative ions in the insulating film 41... Negative ions in the AlGaN layer 11

Claims (9)

In a nitride semiconductor field effect transistor having a heterojunction interface as a channel,
A third layer having a negative charge between the control gate electrode and the nitride-based semiconductor;
A nitride semiconductor field effect transistor comprising negative ions in the nitride semiconductor forming the heterojunction.   2. The nitride according to claim 1, wherein the third layer having a negative charge includes a conductor layer negatively charged by electrons, and the conductor layer is covered with an insulator layer. Semiconductor field effect transistor.   3. The nitride-based semiconductor field effect transistor according to claim 1, wherein the third layer having negative charges is made of polysilicon covered with an insulator layer. 4.   The third layer having a negative charge is a refractory metal selected from Mo, Ta, W, Ti, Cr, and Nb, an alloy material containing these metals as a main component, or a compound material thereof. The nitride-based semiconductor field effect transistor according to claim 1 or 2, wherein the nitride-based semiconductor field effect transistor is covered with.   3. The nitride-based semiconductor field effect transistor according to claim 2, wherein the insulator layer covering the third layer having a negative charge is made of a dielectric layer.   6. The nitride semiconductor field effect transistor according to claim 5, wherein the dielectric layer is made of two different types of dielectrics.   2. The nitride-based semiconductor field effect transistor according to claim 1, wherein the third layer having a negative charge comprises an insulator layer containing negative ions. 8. The nitride-based semiconductor field effect transistor according to claim 7, wherein the negative ions contained in the insulator layer are chlorine ions Cl ⁻ or fluorine ions F ⁻ .   8. The nitride-based semiconductor field effect transistor according to claim 7, wherein the insulator layer containing negative ions is a silicon nitride film.

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