JP2011082552A - Compound semiconductor laminated structure - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enhance on-breakdown voltage, improve the I-V characteristics, and suppress a leakage current via a protective layer relating to a compound semiconductor laminated structure. <P>SOLUTION: There are provided a carrier travel layer 2 of GaN, a carrier supply layer 3 of Al<SB>x</SB>Ga<SB>1-x</SB>N (0&lt;x&le;1) formed on the carrier travel layer, and a GaN system protection layer 4 of a first conduction type GaN, which is the same conduction type as the travel carrier formed on the carrier supply layer. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a compound semiconductor multilayer structure, and in particular, for stabilizing characteristics in a HEMT (high electron mobility transistor) type compound semiconductor multilayer structure using a nitride III-V compound semiconductor as a carrier transit layer. The present invention relates to a compound semiconductor multilayer structure characterized by a protective film structure.

  In recent years, there has been active development of electronic devices using sapphire, SiC, GaN, Si, or the like as a substrate, crystal growth of AlGaN / GaN, and GaN as an electron transit layer.

  Although GaN used as an electron transit layer of such an electronic device has a smaller electron mobility than GaAs, its band gap is larger than 3.4 eV and 1.4 eV of GaAs. It is expected to operate at a high withstand voltage.

  For example, a mobile phone base station amplifier is currently required to operate at a high voltage of 50 V, and a high withstand voltage performance is essential. However, current GaAs electronic devices are limited to drive at 12 V. The current situation is that the voltage of 50 V is used in a lowered state, and there is a problem that the efficiency is reduced or distortion occurs.

Here, a conventional GaN-based HEMT will be described with reference to FIG. As shown in FIG. 7A, first, an i-type GaN electron having a thickness of 3 μm is formed on a sapphire substrate 41 having a C-plane as a main surface by using a normal MOCVD method (metal organic chemical vapor deposition method). A traveling layer 42, an i-type Al _0.25 Ga _0.75 N layer 43 with a thickness of 3 nm, an n-type Al _0.25 Ga ₀ .3 with a thickness of 25 nm and an Si doping concentration of 2 × 10 ¹⁸ cm ⁻³ _{. A 75} N electron supply layer 44 and an i-type Al _0.25 Ga _0.75 N protective layer 45 having a thickness of 5 nm are sequentially deposited.

  Next, after depositing a SiN film 46 having a thickness of 20 nm on the entire surface by CVD, an opening is provided in the gate formation region to form a gate electrode 47 made of Ni / Au, and a source / drain contact region The basic structure of the GaN-based HEMT is completed by forming the source electrode 48 and the drain electrode 49 made of Ti / Au by providing openings.

FIG. 7B is a GaN-based band diagram as described above. In a GaN-based semiconductor such as GaN or AlGaN, the GaN-based semiconductor is polarized in the c-axis direction, and the i-type GaN electron transit layer 42 / i-type Al _0.25. by piezoelectric effect due to lattice mismatch in i-type _Al 0.25 _{Ga 0.75} N layer 43 side of the interface of the Ga _0.75 N layer 43, for example, a positive polarization charge of 1 × 10 ¹³ cm ^-2 is Therefore, an electron of about 1 × 10 ¹³ cm ⁻² is induced in the vicinity of the interface of the i-type GaN electron transit layer 42 of the i-type GaN electron transit layer 42 / i-type Al _0.25 Ga _0.75 N layer 43. The two-dimensional electron gas layer 50 is configured.

The electron mobility of the two-dimensional electron gas layer 50 in such an i-type GaN electron transit layer 42 is about 1000 to 1500, but the concentration of the two-dimensional electron gas is about 1 × 10 ¹³ cm ^{−2, which} is GaAs-based two-dimensional. Since it is one digit or more larger than the concentration of the three-dimensional electron gas, it is possible to obtain current drive characteristics comparable to those of a GaAs HEMT and to obtain high breakdown voltage characteristics because of the wide forbidden band width. Incidentally, a value exceeding 200 V has been reported as a withstand voltage when the current is turned off.

Further, by providing the i-type Al _0.25 Ga _0.75 N protective layer 45, the tunnel current to the gate electrode can be reduced and the breakdown voltage can be improved even a little.

JP 2001-085670 A

  However, in the conventional GaN-based HEMT, the withstand voltage when the current is turned on is about 20 V, and there is a problem that high voltage operation cannot be performed. Unlike GaAs-based FETs, it is thought that this is caused by surface problems rather than ionization collisions.

  In other words, since the GaN-based semiconductor has a wide forbidden band, breakdown at the time of on-state due to ionization collision is essentially difficult to occur, and even in view of the behavior of the actually measured IV characteristic, It is not considered.

Further, in such a GaN-based HEMT, the high gate voltage operating under observed large hysteresis in the I-V characteristic, since the transconductance g _m in the high-frequency region is a problem that can not be driven by current decreases, the The situation will be described with reference to FIG.

FIG. 8A is an IV characteristic diagram when the gate width W _{g is set} to W _g = 40 μm and the SiN film is removed in the GaN-based HEMT having the above-described structure. A large hysteresis is seen in the -V characteristic.

FIG. 8B is an IV characteristic diagram when the gate width W _g is W _g = 40 μm in the GaN-based HEMT shown in FIG. It can be understood that a large hysteresis is observed in the characteristics, and no special improvement is obtained with respect to the hysteresis even if the SiN film is provided.

This is thought to be because negative piezoelectric charges appearing on the surface side of the i-type Al _0.25 Ga _0.75 N protective layer 45 affect the IV characteristics. By providing a SiN film, negative piezoelectric charges are obtained. Although the characteristics are somewhat improved by the charge being driven from the surface side to the inside, it still becomes a problem. The situation is the same even if a SiO ₂ film is provided as a surface protective film instead of the SiN film.

  Accordingly, an object of the present invention is to increase the on-breakdown voltage of a GaN-based compound semiconductor device and improve the IV characteristics.

From one disclosed aspect, a carrier running layer of GaN, a carrier supply layer of Al _x Ga _1-x N (0 <x ≦ 1) formed on the carrier running layer, and on the carrier supply layer There is provided a compound semiconductor multilayer structure comprising the formed traveling carrier and a GaN-based protective layer of GaN of the same conductivity type as the first conductivity type.

According to the present invention, the doped GaN-based protective layer is used as the protective layer provided on the Al _x Ga _1-x N carrier supply layer, so that the IV characteristics can be stabilized, and the mobile phone system has high functionality. There is a significant contribution to higher output.

It is explanatory drawing of the compound semiconductor laminated structure of embodiment of this invention. It is explanatory drawing of HEMT of Example 1 of this invention. It is an IV characteristic view of HEMT of Example 1 of this invention. It is explanatory drawing of the impurity concentration dependence of the protective layer of _{BMT gd} of HEMT of Example 1 of this invention. It is a schematic sectional drawing of HEMT of Example 2 of this invention. It is a schematic sectional drawing of HEMT of Example 3 of this invention. It is explanatory drawing of the conventional GaN-type HEMT. It is an IV characteristic diagram of a conventional GaN-based HEMT.

Here, with reference to FIG. 1, the compound semiconductor laminated structure of embodiment of this invention is demonstrated. FIG. 1 is an explanatory diagram of a compound semiconductor multilayer structure according to an embodiment of the present invention, in which a GaN carrier traveling layer 2 and Al _x Ga _1-x N (0 <x ≦) formed on the carrier traveling layer 2 are illustrated. The carrier supply layer 3 of 1) and a GaN-based protective layer 4 of GaN of the same conductivity type as that of the traveling carrier formed on the carrier supply layer 3 are provided.

  Thus, by disposing the GaN-based protective layer 4 on the carrier supply layer 3, the band can be lifted by piezoelectric charges to reduce the tunnel current and improve the Schottky characteristics, and the GaN-based protective layer 4. By using the same conductivity type as the traveling carrier, it is possible to lower the interface potential lifted by the piezoelectric charge and improve the conduction performance, and to cancel the holes induced in the vicinity of the interface and perform screening. , The influence of surface traps due to Al can be eliminated, and stable IV characteristics can be obtained. The definition of screening in this case is 80 or more even when a GaN-based protective layer is used, assuming that the maximum current density in the case of an AlGaN / GaN-FET structure when the GaN-based protective layer 4 is not used is 100. The maximum current density can be obtained.

  Further, a gate recess structure may be adopted, and a leak current does not occur through the GaN-based protective layer 4, thereby making it possible to further increase the breakdown voltage.

  Further, by providing the SiN film 5, holes induced in the vicinity of the interface can be further driven to the inside, thereby preventing the occurrence of hysteresis characteristics and the interface lifted by the piezoelectric charge. Since the potential can be lowered, and the Fermi level is relatively raised, the current density can be increased. Further, by making the GaN-based protective layer 4 the same conductivity type as the traveling carrier, the ohmic property of the source / drain electrode 7 can be enhanced. The substrate 1 may be a sapphire substrate, a GaN substrate, or a SiC substrate.

  In this case, In may be added to at least one of the carrier traveling layer 2 or the GaN-based protective layer 4, and the addition of In reduces the forbidden band width but increases the carrier mobility.

  The layer thickness of the GaN-based protective layer 4 is desirably 10 nm or less, which can increase the generation of leakage current flowing through the GaN-based protective layer 4 and the breakdown voltage of the Schottky electrode.

Moreover, it is desirable that the doping concentration of the GaN-based protective layer 4 is 1 × 10 ¹⁷ cm ⁻² or more, so that screening induced by canceling holes induced in the vicinity of the interface can be performed.

In this case, in order to screen as the sheet density, it is sufficient that the sheet density is 20 to 80% of the piezoelectric charge generated at the interface with the carrier supply layer 3. If the sheet density is too low, the screening effect cannot be obtained. On the other hand, if the sheet concentration is too high, the reverse breakdown voltage BV _gd is lowered and the desired high breakdown voltage characteristics cannot be obtained.

  In order to obtain such a sheet concentration, it is only necessary to dope an atomic layer doping with a conductivity determining impurity on the interface side with the carrier supply layer 3, and in the case of n-type, any one of Si, S, and Se is used. Use it.

  Further, the GaN-based protective layer 4 may have a two-layer structure of a layer having the same conductivity type as that of the traveling carrier and an undoped layer, whereby the outermost surface can be an undoped layer, and thus the IV characteristics. Can be further stabilized.

Further, Al _z Ga _1-z N (z> x) such as AlN may be inserted between the GaN-based protective layer 4 and the carrier supply layer 3, and Al _z Ga _1-z N (z> x). By using as an etching stopper layer, the processing characteristics are enhanced.

Here, with reference to FIG. 2 and FIG. 3, the GaN-based HEMT according to the first embodiment of the present invention will be described. As shown in FIG. 2A, first, an i-type GaN electron transit layer 12 having a thickness of, for example, 3 μm is formed on a sapphire substrate 11 having a C-plane as a main surface by using an ordinary MOCVD method. For example, a 2 nm i-type Al _0.25 Ga _0.75 N layer 13, a thickness of, for example, 25 nm, a Si doping concentration of, for example, 2 × 10 ¹⁸ cm ^{−3, and} an n-type Al _{0. A 25} Ga _0.75 N electron supply layer 14 and an n-type GaN protective layer 15 having a thickness of 10 nm or less, for example, 5 nm, and an Si doping concentration of, for example, 2 × 10 ¹⁸ cm ⁻³ are sequentially deposited.

  Next, after depositing a SiN film 16 having a thickness of 20 nm on the entire surface by CVD, an opening is provided in the gate formation region to form a gate electrode 17 made of Ni / Au, and a source / drain contact region The basic structure of the GaN-based HEMT is completed by forming the source electrode 18 and the drain electrode 19 made of Ti / Au by providing openings. In this case, when the thickness of the n-type GaN protective layer 15 exceeds 10 nm, a leak current is generated, and the gate electrode 17 that is a Schottky electrode has no breakdown voltage. In the figure, the single HEMT is described. However, in the case of integration, element isolation may be performed by ion implantation or mesa etching.

FIG. 2B is a band diagram of the above-described GaN-based HEMT. In a GaN-based semiconductor such as GaN or AlGaN, the i-type GaN electron transit layer 12 / i-type Al _0. The positive polarization charge of, for example, 1 × 10 ¹³ cm ⁻² due to the piezoelectric effect due to lattice mismatch on the i-type Al _0.25 Ga _0.75 N layer 13 side of the interface of the ₂₅ Ga _0.75 N layer 13 Therefore, an electron of about 1 × 10 ¹³ cm ⁻² is induced in the vicinity of the interface between the i-type GaN electron transit layer 12 and the i-type Al _0.25 Ga _0.75 N layer 13, and the two-dimensional electron gas layer 20 is configured.

FIG. 3A is an IV characteristic diagram when the gate width W _{g is set} to W _g = 40 μm. The i-type Al _0.25 Ga _0.75 N protective layer in the conventional GaN-based HEMT is an n-type. As a result of replacement with the GaN protective layer, it was confirmed that good characteristics were obtained.

As a result of using an n-type GaN layer as a protective layer, as shown in FIG.
a. The holes 21 induced at the interface between the n-type GaN protective layer 15 and the n-type Al _0.25 Ga _0.75 N electron supply layer 14 are screened by the electrons of the n-type layer, and the holes 21 have device characteristics. B. Since the ohmic properties of the source electrode 18 and the drain electrode 19 are improved,
c. Since the surface is a GaN layer, the influence of surface traps caused by Al is eliminated, so d. Since the surface becomes a GaN layer, etching resistance is increased compared to AlGaN, so that processing damage is less likely to be introduced to the surface.
it is conceivable that.

In addition, when the band edge of the conduction band of the n-type Al _0.25 Ga _0.75 N electron supply layer 14 is raised, the Fermi level is relatively lowered, thereby reducing the concentration of the two-dimensional electron gas. Although to energization is reduced, and instead, there is also an effect of preventing a decrease in the high frequency region of the transconductance g _m.

FIG. 3B shows an IV characteristic diagram in the case where the SiN film 16 is not provided in the first embodiment of the present invention for reference, and the characteristic when V _gd is applied in four stages. The curves are displayed together. As is apparent from the figure, it can be understood that the characteristic curves at the same gate voltage, which should be overlapped with each other, shift as the gate voltage increases, and a stable IV characteristic cannot be obtained.

FIG. 4A is a characteristic diagram of the reverse breakdown voltage BV _gd when the doping concentration of the n-type GaN protective layer 15 in Example 1 of the present invention is increased to 10 ¹⁹ cm ⁻³ , and the reverse breakdown voltage BV _gd It was confirmed that was reduced to 1 V or less. In this case, the Schottky barrier diode characteristics between the gate and the drain are considered.

FIG. 4B is a band diagram when the doping concentration of the n-type GaN protective layer is 10 ¹⁹ cm ⁻³ , compared with the case of 5 × 10 ¹⁸ cm ^−3. This is probably because the interface potential with the n-type Al _0.25 Ga _0.75 N electron supply layer 14 was lowered, and the Schottky characteristics were lowered.

  Therefore, in order to obtain a high breakdown voltage, it is only necessary to completely screen holes generated at the interface due to the piezoelectric field, and the n-type GaN protective layer 15 is compensated so as to compensate 20 to 80% of the piezoelectric charge. It is necessary to set a doping amount of 50 V, and thereby, a forward breakdown voltage of 50 V and a reverse breakdown voltage of 200 V can be realized.

  Next, a GaN-based HEMT according to Example 2 of the present invention will be described with reference to FIG. FIG. 2 is a schematic cross-sectional view of a HEMT according to Example 2 of the present invention, except that an i-type GaN protective layer 31 having a thickness of, for example, 5 nm is provided on the n-type GaN protective layer 15. This is exactly the same as Example 1.

  Thus, in Example 2 of the present invention, since the conductive region that affects the operating characteristics of the device is away from the outermost surface, the adverse effect caused by the surface state can be further reduced. Can be further enhanced.

Next, a GaN-based HEMT according to Example 3 of the present invention will be described with reference to FIG. FIG. 6 is a schematic cross-sectional view of a HEMT according to Example 3 of the present invention. First, a thickness of, for example, 3 μm is formed on a sapphire substrate 11 having a C-plane as a main surface by using a normal MOCVD method. The i-type GaN electron transit layer 12 has a thickness of, for example, 2 nm, an i-type Al _0.25 Ga _0.75 N layer 13, has a thickness of, for example, 25 nm, and has a Si doping concentration of, for example, 2 × 10 ¹⁸ cm n-type _Al 0.25 _{Ga 0.75} n electron supply layer 14 ^-3, a thickness of, for example, in 2 nm, Si doping concentration, for example, 1 × 10 ¹⁹ cm ^-3 of n-type AlN layer 32 Then, the n-type GaN protective layer 15 having a thickness of 10 nm or less, for example, 5 nm, and a Si doping concentration of, for example, 2 × 10 ¹⁸ cm ⁻³ is sequentially deposited.

  Next, after the n-type GaN protective layer 15 in the gate forming region is isotropically etched, the n-type AlN layer 32 is selectively etched to form a gate recess portion, and then the entire surface is thickened by CVD. After the SiN film 16 having a thickness of 20 nm is deposited, an opening is provided in the gate formation region to form the gate electrode 17 made of Ni / Au, and an opening is provided in the source / drain contact region to make the Ti / Au. By forming the source electrode 18 and the drain electrode 19, the basic structure of the GaN-based HEMT is completed. In this case, the n-type AlN layer 32 functions as a selective etching removal layer when forming the gate recess portion.

  In the third embodiment of the present invention, since the gate recess structure is adopted, a leak current does not occur through the n-type GaN protective layer 15, whereby the breakdown voltage can be further increased.

Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations and conditions described in the embodiments, and various modifications can be made. For example, in the above embodiment, a uniformly doped n-type GaN layer is used as the protective layer, but n-type impurities such as Si, Se, and S may be planarly doped (atomic layer doping). For example, the sheet doping concentration of 5 nm before and after the interface may be about 3.5 × 10 ¹² cm ⁻² .

In each of the above embodiments, an AlN layer is used as an etching stopper layer. However, the AlN layer is not limited to an AlN layer, and an Al composition ratio z is higher than that of an Al _x Ga _1-x N layer serving as an electron supply layer. A large zz> x Al _z Ga _1-z N layer may be used.

In each of the above embodiments, the electron supply layer is composed of an Al _0.25 Ga _0.75 N layer, but the Al composition ratio x in this case is not limited to x = 0.25. X = 0.10 to 0.40.

  In each of the above embodiments, the electron supply layer is formed of an n-type AlGaN layer. However, the electron supply layer does not necessarily have to be a doping layer. In a GaN-based HEMT, piezoelectric generated by polarization due to the crystal structure Since the two-dimensional electron gas is induced by the electric charge, an undoped layer may be used.

  In each of the above embodiments, the electron transit layer is a GaN layer, the electron supply layer is an AlGaN layer, and the protective layer is a GaN layer. However, the present invention is not limited to this configuration. In may be added to at least one of the traveling layer or the protective layer.

  For example, when In is added to the electron transit layer to make InGaN, the electron mobility becomes high, and when In is added to the protective layer to make InGaN, the forbidden band width becomes small. The interface potential of the protective layer / electron supply layer can be lowered as compared with the case of the GaN layer.

  In each of the above embodiments, sapphire is used as the substrate. However, the substrate is not limited to sapphire, and a SiC substrate or a GaN substrate may be used. Since it is excellent in conductivity, it is suitable for an amplifier for a base station of a mobile phone with high voltage operation.

  In each of the above embodiments, the n-channel HEMT is described. However, it goes without saying that the present invention is also applicable to a p-channel HEMT. In this case, the conductivity type in each layer is inverted. You can do it.

DESCRIPTION OF SYMBOLS 1 Substrate 2 Carrier travel layer 3 Carrier supply layer 4 GaN-based protective layer 5 SiN film 6 Gate electrode 7 Source / drain electrode 11 Sapphire substrate 12 i-type GaN electron travel layer 13 i-type Al _0.25 Ga _0.75 N layer 14 n-type Al _0.25 Ga _0.75 N electron supply layer 15 n-type GaN protective layer 16 SiN film 17 gate electrode 18 source electrode 19 drain electrode 20 two-dimensional electron layer 21 hole 31 i-type GaN protective layer 32 n-type AlN layer 41 Sapphire substrate 42 i-type GaN electron transit layer 43 i-type Al _0.25 Ga _0.75 N layer 44 n-type Al _0.25 Ga _0.75 N electron supply layer 45 i-type Al _0.25 Ga _0.75 N Protective layer 46 SiN film 47 Gate electrode 48 Source electrode 49 Drain electrode 50 Two-dimensional electron layer

Claims (6)

A GaN carrier traveling layer;
A carrier supply layer of Al _x Ga _1-x N (0 <x ≦ 1) formed on the carrier travel layer;
A compound semiconductor multilayer structure comprising a traveling carrier formed on the carrier supply layer and a GaN-based protective layer of GaN of the same conductivity type as the first conductivity type.   The compound semiconductor multilayer structure according to claim 1, wherein the first conductivity type is an n-type.   2. The GaN-based protective layer includes a layer having the same conductivity type as a traveling carrier in contact with the carrier supply layer, and an undoped layer provided on the layer having the same conductivity type as the traveling carrier. Or the compound semiconductor laminated structure of Claim 2.   The compound semiconductor multilayer structure according to claim 3, wherein the undoped layer is an i-GaN layer.   5. The compound semiconductor multilayer structure according to claim 1, wherein In is added to at least one of the carrier traveling layer or the GaN-based protective layer.   6. The GaN-based protective layer according to claim 1, wherein a doping concentration of the GaN-based protective layer is a sheet concentration of 20 to 80% of a piezoelectric charge generated at an interface with the carrier supply layer. The compound semiconductor laminated structure of description.

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