JP2010161629A - Solid-state image sensor and method of driving the same, and image capturing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a structure that facilitates carrying out vertical pixel addition in a solid-state image sensor. <P>SOLUTION: The solid-state image sensor has: a plurality of pixels 24 arranged and formed in a two-dimension array on a semiconductor substrate with color filters laminated thereon; a plurality of vertical electric charge transmission paths 25 formed along a plurality of pixel arrays configured by pixels 24, and allowing signal electric charges detected by the pixels 24 to be read out and transmitted therethrough; a horizontal electric charge transmission path 26 formed along a transmission direction end of the plurality of the vertical electric charge transmission paths 25; a branch type electric charge temporary storage part 28 which corresponds to each of the plurality of vertical electric charge transmission paths 25, resides between the transmission direction end 25a of the vertical electric charge transmission paths 25 and the horizontal electric charge transmission path 26, and temporarily stores the signal electric charge transmitted along the vertical electric charge transmission path 25 to transmit it to the horizontal electric charge transmission path 26; and application wiring 36 and 37 for control signals ϕLM1 and ϕLM2 connected separately to each of individual electric charge temporary storage parts 28a and 28b that configure the branch type electric charge temporary storage part 28. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a CCD type solid-state image pickup device (Charge Coupled Device Image Sensor), a driving method thereof, and an image pickup apparatus, and in particular, a CCD having a structure capable of easily realizing horizontal pixel addition and vertical pixel addition inside a solid-state image pickup device. The present invention relates to a solid-state imaging device of a type, a driving method thereof, and an imaging apparatus.

  As described in Patent Document 1, the CCD solid-state imaging device includes a vertical charge transfer path (VCCD) and a horizontal charge transfer path (HCCD). The solid-state imaging device described in Patent Document 1 is a frame interline transfer (FIT) type, and can accumulate signal charges for one screen provided under a light shielding film, with signal charges transferred through a vertical charge transfer path. The storage unit temporarily stores the data. For this reason, there is an advantage that the transfer to the storage unit by the vertical charge transfer path is performed at a high speed, and then the signal charge of the storage unit can be transferred to the horizontal transfer path at a low speed.

  In addition, in the solid-state imaging device described in Patent Document 1, when two pixel columns share one vertical charge transfer path (VCCD) and signal charges are input into the storage unit, It is configured to distribute and transfer. That is, the number of storage units is the same as the number of pixel columns.

  The storage unit uses the term “accumulation”. However, since the signal charge for one screen can be stored, the storage unit actually has a multi-stage configuration like the vertical charge transfer path. In the same manner as described above, the transfer pulses are transferred one by one in the direction of the horizontal charge transfer path. Therefore, it can also be called a charge transfer path in a broad sense.

  Although the above example is a FIT type, other types of CCD type solid-state image sensors such as an interline transfer type solid-state image sensor that does not have a storage unit are also detected by each pixel (photodiode) according to the amount of light received. The signal charge is transferred to the horizontal charge transfer path along the vertical charge transfer path (multi-stage transfer type storage unit in the FIT type), and then transferred along the horizontal charge transfer path.

  In such a CCD type solid-state imaging device, the present applicant has first proposed a solid-state imaging device having a structure in which detection charges of a plurality of pixels mounted with the same color filter provided in the horizontal direction can be added inside the solid-state imaging device. (Patent Documents 2 and 3).

  In the solid-state imaging device described in Patent Document 2, only one charge storage stage is provided at the boundary between the transfer direction end of the vertical charge transfer path and the horizontal charge transfer path, and the potential control of this charge storage stage is performed using the vertical charge. The pixel addition in the horizontal direction is realized by controlling with a control pulse different from the transfer pulse of the transfer path and controlling the phase relationship between the horizontal transfer pulse and the control pulse. Since this charge storage stage is provided for each vertical charge transfer path, it is called a line memory (LM). This specification will also be described using the terminology of the line memory LM.

JP-A-4-341074 JP 2002-112119 A JP 2007-27977 A

  The CCD solid-state imaging device can easily perform horizontal pixel addition of signal charges inside the solid-state imaging device by providing a line memory at the connection portion between the vertical charge transfer path and the horizontal charge transfer path. However, in the conventional line memory, pixel addition in the vertical direction is not easy.

  In order to perform pixel addition, that is, mixing signal charges, inside the solid-state imaging device, the signal charge to be added must be signal charges detected by pixels of the same color, and signal charges detected from pixels of different colors are added. However, this is not possible because color mixing occurs.

  For example, if the color filter array is a vertical stripe, pixels of the same color are arranged along one vertical charge transfer path, so that vertical pixel addition is possible on the vertical charge transfer path. However, in the case of a CCD type solid-state imaging device in which color filters of different colors are alternately provided in the vertical direction, such as a Bayer array or a horizontal stripe, pixels of different colors are arranged along one vertical charge transfer path. Vertical pixel addition is not possible.

  An object of the present invention is to provide a solid-state imaging device having a structure that easily performs horizontal pixel addition and vertical pixel addition inside the solid-state imaging device, a driving method thereof, and an imaging apparatus.

  The solid-state imaging device of the present invention is formed along a plurality of pixels arranged in a two-dimensional array on a semiconductor substrate and laminated with a color filter, and a plurality of pixel columns composed of the pixels, and the pixels are detected. A plurality of vertical charge transfer paths from which signal charges are read and transferred, a horizontal charge transfer path formed along a transfer direction end of the plurality of vertical charge transfer paths, and the plurality of vertical charge transfer paths And the signal charge transferred along the vertical charge transfer path provided between the transfer direction end of the vertical charge transfer path and the horizontal charge transfer path is temporarily stored and transferred to the horizontal charge transfer path. And a control signal applying wiring separately connected to each of the individual charge temporary storage units constituting the branch type charge temporary storage unit.

  In the solid-state imaging device driving method according to the present invention, the individual charge temporary storage units constituting the branch type charge temporary storage unit are detected by pixels having the same color temporary color filter in the same charge temporary storage unit. The signal charge is distributed.

  An image pickup apparatus according to the present invention includes the solid-state image pickup device described above, and image pickup device driving means for supplying a vertical transfer pulse, a horizontal transfer pulse, and the control signal to the solid-state image pickup device.

  According to the present invention, a branch type charge temporary storage unit that branches in parallel is provided in each vertical charge transfer path, and signal charges of different colors are distributed to the individual charge temporary storage units constituting the branch type charge temporary storage unit. Therefore, horizontal pixel addition and vertical pixel addition can be easily realized inside the solid-state imaging device.

It is a functional block diagram of the imaging device concerning one embodiment of the present invention. It is a surface schematic diagram of the CCD type solid-state imaging device shown in FIG. It is a principal part enlarged view of the solid-state image sensor shown in FIG. It is a timing chart explaining operation | movement of the solid-state image sensor shown in FIG. It is a principal part enlarged view of the solid-state image sensor which concerns on another embodiment of this invention. It is a timing chart explaining operation | movement of the solid-state image sensor shown in FIG. It is a principal part enlarged view of the solid-state image sensor which concerns on another embodiment of this invention. It is a timing chart explaining operation | movement of the solid-state image sensor shown in FIG. It is a principal part enlarged view of the solid-state image sensor which concerns on another embodiment of this invention. It is a timing chart explaining operation | movement of the solid-state image sensor shown in FIG. It is a principal part enlarged view of the solid-state image sensor which concerns on another embodiment of this invention. 12 is a timing chart for explaining the operation of the solid-state imaging device shown in FIG. 11. It is a principal part enlarged view of the solid-state image sensor which concerns on another embodiment of this invention. It is a timing chart explaining operation | movement of the solid-state image sensor shown in FIG.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a functional block diagram showing a schematic configuration of a solid-state imaging apparatus (an example shown is a digital still camera) of the present embodiment. The solid-state imaging device 100 includes an imaging unit 1 that captures a subject image, an analog signal processing unit 2 that performs correlated double sampling (CDS) processing and gain control processing on a captured image signal output from the imaging unit 1, and an analog signal. An analog / digital (A / D) conversion unit 3 that converts an analog captured image signal output from the processing unit 2 into a digital signal, and an imaging unit 1 and analog signal processing based on an instruction from a system control unit 9 to be described later 2 and a driving unit (including an image sensor driving unit) 4 that outputs a control pulse to the A / D conversion unit 3.

  The solid-state imaging device 100 further includes a digital signal processing unit (DSP) 6 that performs image processing on a digital captured image signal output from the A / D conversion unit 3, and a captured image signal after image processing as a JPEG image, an MPEG image, or the like. A compression / expansion processing unit 7 that compresses or reversely compresses the image, a display unit 8 provided on the back of the camera that displays a through image or a captured image, and a system control unit (CPU) that performs overall control of the imaging device 100 ) 9, an internal memory 10 such as a frame memory, a media interface 11 for storing JPEG image data or MPEG image data in the recording medium 12, and a system bus 14 for interconnecting them.

  An operation unit 13 such as a shutter button or a menu operation button is connected to the system control unit 9, and the system control unit 9 controls the imaging apparatus 100 based on a user instruction input from the operation unit 13.

  The imaging unit 1 includes an optical system including a photographing lens 12, an aperture, an infrared light cut filter, and an optical low-pass filter, and a CCD type solid-state imaging device that converts a light image from a subject formed through these optical systems into an electrical signal. And an element 22. In some cases, a mechanical shutter is provided in front of the solid-state imaging element 22.

  FIG. 2 is a schematic view of the surface of the CCD type solid-state imaging device 22 shown in FIG. The solid-state imaging device 22 includes a plurality of pixels (photodiodes: PD) 24 arranged in a two-dimensional array form on the surface of the semiconductor substrate, in the illustrated example, in a square lattice form, and pixels 24. A vertical charge transfer path (VCCD) 25 formed along each pixel column, a horizontal charge transfer path (HCCD) 26 formed along the transfer direction end of each vertical charge transfer path 25, and a horizontal charge transfer An amplifier 27 is provided that is provided at an end portion in the transfer direction of the path 26 and outputs a signal corresponding to the amount of signal charge transferred to the analog signal processing unit 2 in FIG. 1 as a captured image signal.

  Each pixel 24 and the vertical charge transfer path 25 adjacent to the left in the example shown in the figure are connected by a readout gate section 24a, and the readout pulse is a signal charge (electrons in this example) accumulated by each pixel 24 according to the amount of received light. When applied, it is read out to the adjacent vertical charge transfer path 25.

  In the solid-state imaging device 22 of this embodiment, primary color filters R (red), green (G), and blue (B) are Bayer arranged on each pixel 24. That is, color filters GBGBGB ... are stacked on the odd pixel rows, and RGRRGRG ... are stacked on the even pixel rows.

  Although the following embodiments will be described by taking the Bayer array as an example, the present invention is not limited to the Bayer array, and the present invention may be a complementary color filter instead of a primary color filter. The color filter may be striped, but a mosaic like a checkered pattern is preferred. Furthermore, the present invention can be applied to a so-called honeycomb pixel arrangement (an arrangement in which even-numbered pixel lines are shifted by 1/2 pixel pitch from odd-numbered pixel lines) instead of a square lattice arrangement.

  The solid-state imaging device 22 of this embodiment shown in FIG. 2 further includes a charge temporary storage unit 28 having one transfer stage between the vertical charge transfer path 25 and the horizontal charge transfer path 26 at the transfer direction end. Is provided. This temporary charge storage section 28 is provided corresponding to each vertical charge transfer path 25, and when describing each single temporary charge storage section 28, it is referred to as a "temporary charge storage section 28". When all the charge temporary storage units 28 are described, they are referred to as line memories (LM) 28.

  As will be described in detail with reference to FIG. 3, the individual charge temporary storage units 28 are branched into two in parallel, and are connected to the horizontal charge transfer path 26 in a two-branched state.

  The solid-state image sensor 22 is driven by an image sensor drive unit 4a that constitutes a part of the drive unit 4 shown in FIG. That is, the drive unit 4 a generates a drive pulse based on an instruction from the system control unit 9, and transfers the vertical transfer pulse φVi (i = 1 to 4: in the case of four-phase drive) constituting the vertical charge transfer path 25. The vertical charge transfer path 25 is applied to the electrodes and driven to transfer. Further, the horizontal charge transfer path 26 is driven to transfer by applying a horizontal transfer pulse φHi (i = 1, 2: in the case of two-phase driving) to the transfer electrodes constituting the horizontal charge transfer path.

  Further, the image sensor driving means 4a applies line memory control pulses φLM1 and φLM2 to the line memory (LM) 28, and controls the potential level of the line memory (LM) 28 as described later.

  Although the terms “vertical” and “horizontal” are used for explanation, this only means “one direction” along the surface of the semiconductor substrate and “a direction substantially orthogonal to the one direction”.

  FIG. 3 is an enlarged view of a main part of the solid-state imaging device shown in FIG. 2, and FIG. 4 is a timing chart showing transfer pulses and control pulses given from the imaging device driving means 4a to the solid-state imaging device.

  FIG. 3 shows two vertical charge transfer paths 25 and pixels 24 in an odd number column (referred to as the left side) and an even number column (referred to as the right side) adjacent to the odd number column (referred to as the right side). An accumulation unit 28 and a horizontal charge transfer path 26 are shown.

  The vertical charge transfer path 24, the charge temporary storage section 28, and the horizontal charge transfer path 26 are formed via an n-type impurity region (buried channel) formed in the surface p-well layer of the semiconductor substrate and a gate insulating film thereon. FIG. 3 mainly shows the electrode film portion.

  The way of viewing FIG. 4 is as follows. When the potential of each pulse signal is high (H), a potential well is formed in the buried channel below it, and signal charges can enter it. When the potential of the pulse signal is low (L), the potential well disappears and becomes a barrier (barrier portion).

  In FIG. 3, potential wells are respectively formed at locations where “G”, “R”, and “B” shown on the left side of the pixel (PD) 24, and “G filter”, “R filter”, and “B” are included therein. The filter shows a state in which signal charges read out and transferred from the stacked pixels are contained. A portion where G, R, and B are not described in the vertical charge transfer path 25 is a portion serving as the above-described barrier (barrier portion).

  A branch portion 25a is provided at an end portion of each vertical charge transfer path 25, and two branching temporary charge storage portions 28a and 28b are connected in parallel to the branch portion 25a to which the transfer pulse φV4 is applied. The respective charge temporary storage units 28 a and 28 b are separated by an element separation band 29. A wiring 36 to which the line memory control pulse φLM1 is applied is applied to the control electrode film of one charge temporary storage unit 28a, and a wiring 37 to which the line memory control pulse φLM2 is applied to the other charge temporary storage unit 28b. Is connected.

  As the transfer electrode of the horizontal charge transfer path 26, two electrodes 26a and 26b are set as a set for one horizontal transfer stage, and this electrode set is continuously provided in the horizontal direction. The electrode 26a has an L-shape, and a short portion thereof is provided to face one vertical charge transfer path, that is, one set of charge storage portions 28a and 28b, and a long portion thereof is orthogonal to the horizontal charge transfer direction. Provided.

  And the electrode 26b is provided in the L-shaped recessed rectangular part. The electrode 26b is provided in the horizontal transfer direction, that is, in the direction of the amplifier 27 with respect to the pair of electrodes 26a. The buried channel formed under each pair of the electrodes 26a and 26b is formed such that when the potential well is formed, the potential well under the electrode 26b is deeper than the potential well under the electrode 26a (so that a large amount of charge is accumulated). In addition, an impurity concentration gradient is provided.

  For each of the electrode sets, the horizontal transfer pulse φH1 is applied to the electrode sets corresponding to the odd-numbered vertical charge transfer paths, and the electrode sets corresponding to the even-numbered vertical charge transfer paths are opposite in phase to φH1. The arrangement connection is such that the horizontal transfer pulse φH2 is applied.

  Next, the operation of the solid-state imaging device 22 will be described according to the timing chart of FIG. The transfer positions of the R, G, and B signal charges shown in FIG. 3 indicate the state at time t in FIG.

  FIG. 3 is a diagram for explaining the case where the signal charges of all the pixels are read out using the solid-state image pickup device 22. The signal charges of GRGRGR... Have been transferred to the vertical charge transfer paths 25 in the odd columns. The signal charges BGBGBBG... Are transferred to the vertical charge transfer paths 25 in even columns.

  If only the vertical charge transfer path 25 (left side) in the odd-numbered column is viewed, the G signal charge and the R signal charge are alternately transferred, and the R signal charge is transferred to the temporary charge storage unit 28a and the R signal charge is transferred to the temporary charge storage unit 28b. G signal charge is temporarily stored.

  The G signal charge in the temporary charge storage unit 28b is transferred in accordance with the vertical transfer pulses φV1, φV2, φV3, and φV4 preceding the time t in FIG. 4 so that the movement of “G” is illustrated in FIG. Transferred along the road. When the transfer pulse φV4 is transferred to the branch section 25a, the control pulse φLM2 is high (H) and the potential well is formed in the temporary charge storage section 28b. At this time, the control pulse φLM1 is low (L). Since the temporary charge storage section 28a is a barrier (barrier section), the G signal charge enters the temporary charge storage section 28b and does not enter the storage section 28a.

  At a timing prior to the transfer of the G signal charge into the storage unit 28b, the R signal charge is transferred along the vertical charge transfer path, and φLM1 is high (H) in the R signal charge transferred to the branch unit 25a. Since φLM2 is low (L), it enters the charge temporary storage part 28a where the potential well is formed and does not enter the charge temporary storage part 28b.

  In this way, in the odd-numbered vertical charge transfer paths, the R signal charge is always distributed in the temporary charge storage unit 28a, and the G signal charge is always distributed in the temporary charge storage unit 28b. Charges are stored in the same charge temporary storage unit. The same applies to the even-numbered charge temporary storage units.

  After time t, the line memory control pulse φLM1 temporarily becomes low (L) 42 when the horizontal transfer pulse φH1 is high (H) 40 (pulse φH2 is low (L) 41). As a result, the R signal charge in the temporary charge storage unit 28 a corresponding to the odd-numbered vertical charge transfer paths is transferred to the horizontal charge transfer path 26. Then, the R signal charge is sent to the amplifier 27 by the high-speed driving horizontal transfer pulse 43 and is output as a captured image signal.

  Since the signal charge in the charge temporary storage portion corresponding to the vertical charge transfer path of the even-numbered column is a barrier (barrier) by the applied voltage (φH2) under the corresponding horizontal transfer electrode 26a (particularly the short portion), It cannot move to the horizontal charge transfer path and remains in the temporary charge storage section.

  Next, when the line memory control pulse φLM2 temporarily becomes low (L) 44 in a state where the horizontal transfer pulse φH1 is kept high (H) 40 (φH2 is low (L) 41), the odd column vertical The G signal charge in the temporary charge storage unit 28b corresponding to the charge transfer path is transferred to the horizontal charge transfer path 26, and the G signal charge is sent to the amplifier 27 by the horizontal transfer pulse 45 driven at high speed, and is output as a captured image signal. The

  Next, the horizontal transfer pulse φH 1 becomes low (L) 46 and the horizontal transfer pulse φH 2 becomes high (H) 47. As a result, a barrier is formed between the horizontal charge transfer path and the charge temporary storage section end corresponding to the odd-numbered vertical charge transfer path, and the charge temporary storage section end corresponding to the even-numbered vertical charge transfer path. The barrier between the part and the horizontal charge transfer path disappears.

  Then, when the line memory control pulse φLM1 temporarily becomes low (L) 48, the G signal charge of the temporary charge storage section 28a corresponding to the vertical charge transfer path in the even column (right side in FIG. 3) enters the horizontal charge transfer path. The G signal charge is sent to the amplifier 27 by the next horizontal transfer pulse 49 for high-speed driving, and is output as a captured image signal.

  Next, when the line memory control pulse φLM2 temporarily becomes low (L) 50, the B signal charge in the temporary charge storage unit 28b corresponding to the vertical charge transfer path in the even-numbered column moves to the horizontal charge transfer path. The B signal charge is sent to the amplifier 27 by the high-speed driving horizontal transfer pulse 51 and is output as a captured image signal.

  Next, although not shown in FIG. 4, vertical transfer pulses φV1 to φV4 are applied, and signal charges are transferred while being distributed to the temporary charge storage units 28a and 28b in the same manner as described above. Similarly, signal charges of all pixels are output as captured image signals.

  As described above, in this embodiment, since the charge temporary storage unit 28 provided in the portion where the vertical charge transfer path is connected to the horizontal charge transfer path is a parallel two-branch type, it is possible to avoid deterioration in quality of the captured image signal. Play. The reason is as follows.

  It is assumed that only one charge temporary storage unit 28 is used instead of the branch type, and a transfer failure from a certain charge temporary storage unit to the horizontal charge transfer path occurs. In other words, it is assumed that the physical characteristics of this temporary charge storage unit are different from those of other temporary charge storage units. In this case, vertical stripes resulting from this transfer failure appear in the captured image, degrading the image quality.

  However, as in the present embodiment, a two-branch type (not limited to a two-branch type, a three-branch type or a four-branch type) may be used. Due to the structure of transfer to the transfer path, even if a transfer failure occurs in any of the temporary charge storage units 28a and 28b, the remaining transfer charge is mixed with the signal charge of the same color in the subsequent stage, so vertical streaks are conspicuous Absent.

  In addition, by passing only one charge temporary storage unit without branching the same color signal charges, even if there is a difference in transfer efficiency from the vertical charge transfer path to each charge temporary storage unit, it is not affected. In addition, it is possible to avoid the horizontal streak that may occur when the same color is branched.

  5 and 6 are explanatory diagrams of the operation of another embodiment of the present invention. 3 and 4 show the operation when the signal charges of all the pixels are read out by all the pixels (progressive) to create a still image. In the present embodiment, for example, the signal of the GRGR. The example which reads an electric charge is shown.

  In this case, only the R signal charge is transferred to the odd-numbered vertical charge transfer paths, and only the G signal charge is transferred to the even-numbered vertical charge transfer paths. In this case, transfer driving is performed by using only one of the two-charged temporary charge storage units 28a and 28b (28a in the illustrated example).

  FIG. 5 is a diagram illustrating a state at time t in the timing chart of FIG. The timing chart of FIG. 6 is a timing chart in which the transfer from the vertical charge transfer path to the temporary charge storage section 28b and the transfer section from the temporary charge storage section 28b to the horizontal charge transfer path are deleted from the timing chart of FIG. Therefore, the same parts as those in FIG.

  7 and 8 are operation explanatory views of still another embodiment of the present invention. FIG. 7 is a diagram showing a state at time t in the timing chart shown in FIG. 3 and 4, when the R signal charge is stored in the temporary charge storage unit 28a and the G signal charge is stored in the temporary charge storage unit 28b, the signal charges R and G are used as the horizontal charge transfer path. However, the present embodiment is different in that the vertical two-pixel addition is performed by the charge temporary storage units 28a and 28b.

  That is, since the G signal charge and the R signal charge are alternately transferred in the odd-numbered vertical charge transfer paths, two R signal charges are distributed by the branching portion 25a and transferred before time t in FIG. Is stored in the temporary charge storage unit 28a and two G signal charges are stored in the temporary charge storage unit 28b, and then transferred to the horizontal charge transfer path by the transfer pulse after the same time t as in FIG. Output.

  As described above, in this embodiment, since the charge temporary storage unit is branched into two branches in parallel for each vertical charge transfer path, the vertical addition of the signal charges of the same color is facilitated, and the vertical pixel addition is performed inside the solid-state imaging device. It becomes possible.

  Of course, when performing vertical two-pixel addition as in this embodiment, it is necessary to provide a capacity of the charge temporary storage units 28a and 28b at least twice as large as the saturation charge amount of the pixel 24. When performing vertical n (n = integer greater than or equal to 3) pixel addition, at least n times the capacity is required.

  Further, when performing horizontal pixel addition, it can be easily performed by adjusting the timings of the horizontal transfer pulse and the line memory control pulse in the same manner as in the prior art. For example, when the G signal charge is transferred on the horizontal charge transfer path and comes to the horizontal transfer stage before the charge temporary storage unit holding the G signal charge, the G signal charge in the temporary charge storage unit is converted into the horizontal charge. If transferred to the transfer path, horizontal pixel addition can be realized on the horizontal charge transfer path.

  In the example shown in the figure, two R signal charges are stored in the temporary charge storage unit 28a. However, the G signal charge is charged from the branch unit 25a of the vertical charge transfer path in a state where one R signal charge is stored. When transferring into the temporary storage unit 28b, the potential of the temporary charge storage unit 28a is set to a barrier state. However, the impurity concentration of the buried channel in each of the temporary charge storage units 28a and 28b is given a concentration gradient or the control electrode shape is devised. If this is done, the R signal charge will not leak out of the temporary charge storage section 28a.

  As described above, according to the present embodiment, vertical pixel addition can be easily performed inside the solid-state imaging device, so that the number of pixels to be horizontally transferred (number of signal charges) can be reduced, and the frame rate can be improved. This is advantageous for capturing moving images.

  9 and 10 are explanatory diagrams of the operation of still another embodiment of the present invention. In the present embodiment, an example in which vertical two-pixel addition is performed using one of the bifurcated charge temporary storage units is shown in the embodiments of FIGS. 5 and 6. Since only the potential temporary storage section 28a on one side of the configuration is operated, the description thereof is omitted.

  11 and 12 are explanatory diagrams of the operation of still another embodiment of the present invention. In the embodiment shown in FIGS. 5 and 6, the R signal charge and the G signal charge are respectively transferred only to one side 28a of the two-branch type charge temporary storage unit. However, in this embodiment, both charge temporary storage units 28a and 28b are transferred. The difference is that it is divided and transferred.

  In the present embodiment, when the signal charge is transferred to the branching portion 25a, both the charge temporary storage portions 28a and 28b become potential wells, so that the signal charge flows into both potential wells. Although it is not possible to control the ratio of the amount of charge entering the respective temporary charge storage units 28a and 28b, both the temporary charge storage units 28a and 28b are manufactured in the same manufacturing process and have the same physical structure. Therefore, it is divided by about 1/2.

  However, there is no problem even if the signal charge is divided at any ratio. As shown in FIG. 12, after time t, low pulses 55 and 56 are simultaneously applied to the line memory control pulses φLM1 and φLM2, and the divided signal charges are simultaneously transferred to the same transfer stage of the horizontal charge transfer path. This is because they are coupled on the charge transfer path.

  According to this embodiment, since the signal charge of one pixel is accumulated in the two charge temporary accumulation units, it is possible to handle almost twice the signal amount and improve the dynamic range of the image. In addition, as the amount of saturation signal increases, the temporary charge storage unit can be designed to be small, and the chip area of the solid-state imaging device can be reduced.

  13 and 14 are explanatory diagrams of the operation of still another embodiment of the present invention. 5 and 6 is the same as the relationship between the embodiment of FIG. 9 and FIG. 10, and in this embodiment, the vertical two-pixel addition is performed for both charge transients in the embodiment of FIG. 11 and FIG. The storage unit 28a, 28b is used for the configuration.

  In the embodiment shown in FIGS. 3 to 14, different wirings 36 and 37 are connected to each branch part (charge temporary storage parts 28 a and 28 b) constituting the branched charge temporary storage part 28, and line memory control is performed on one side. The pulse φLM1 is applied and the other wire is connected to apply the pulse φLM2. In the embodiment shown in FIGS. 11 to 14, the pulses φLM1 and φLM2 are applied as the same pulse.

  In this way, by making wiring that can apply pulses φLM1 and φLM2 of different phases as wiring connection, various operations described with reference to FIGS. 3 to 14 can be performed by one solid-state imaging device 22. It is possible to flexibly cope with signal readout methods (progressive readout, multi-field readout, moving picture readout, pixel thinning readout, etc.) corresponding to various photographing modes.

  In each of the above-described embodiments, the color of the signal charge transferred along the vertical charge transfer path depends on the color filter array stacked on each pixel of the solid-state imaging device. Also, in multi-field readout, what kind of color arrangement the signal charge arrangement along the vertical charge transfer path is, and what kind of signal charge arrangement is used when thinning out pixels during moving picture readout Therefore, the charge distribution control to the two-branch charge temporary storage unit may be performed accordingly.

  The charge temporary storage unit may be a 3-branch type or a 4-branch type. In the case of the 2-branch type, the line memory control pulse is connected to the wiring that can be driven in two phases. Wiring that can be driven must be connected. In the case of a multi-branch type, it is preferable to connect all branched charge temporary storage units to the same transfer stage of the horizontal charge transfer path, but it is also possible to connect to different transfer stages.

  As described above, the embodiment of the present invention is formed along a plurality of pixels in which a color filter is stacked and arranged in a two-dimensional array on a semiconductor substrate, and a plurality of pixel columns composed of the pixels. A plurality of vertical charge transfer paths through which signal charges detected by the pixels are read and transferred; horizontal charge transfer paths formed along transfer direction ends of the plurality of vertical charge transfer paths; Corresponding to the vertical charge transfer path and provided between the horizontal charge transfer path and the transfer direction end of the vertical charge transfer path, the signal charge transferred along the vertical charge transfer path is temporarily accumulated and the horizontal charge transfer path. A solid-state imaging device comprising: a branch-type charge temporary storage unit for transferring to a charge transfer path; and a control signal application wiring separately connected to each of the individual charge temporary storage units constituting the branch-type charge temporary storage unit It is characterized by.

  The embodiment is the solid-state imaging device described above, wherein the branch charge temporary storage unit transfers the signal charge received from the vertical charge transfer path to the horizontal charge transfer path in one transfer stage. Features the configuration.

  In addition, the embodiment is a solid-state imaging device described above, characterized in that the individual charge temporary storage units constituting the branched charge temporary storage unit are connected to the same transfer stage of the horizontal charge transfer path. To do.

  Further, the embodiment is the solid-state imaging device described above, wherein each of the temporary charge storage units constituting the branched charge temporary storage unit has a charge of at least twice the saturation charge amount of the pixel. It is characterized by a configuration having a storage capacity.

  In addition, the embodiment is a solid-state imaging device described above, and is characterized in that a primary color filter is stacked in a mosaic pattern on the pixel.

  In addition, the embodiment is a solid-state imaging device described above, and is characterized in that a complementary color filter is stacked in a mosaic pattern on the pixel.

  In addition, an imaging apparatus according to an embodiment includes the solid-state imaging device according to any one of the above, and imaging device driving means that supplies a vertical transfer pulse, a horizontal transfer pulse, and the control signal to the solid-state imaging device. Features.

  In addition, the embodiment is a driving method of the solid-state imaging device described above, and the individual charge temporary storage units constituting the branch type charge temporary storage unit include the same color in the same temporary charge storage unit. Signal charges detected by a pixel having a filter are distributed.

  In addition, the embodiment is a driving method of the solid-state imaging device described above, and each of the charge temporary storage units constituting the branch type charge temporary storage unit includes a plurality of signal charges detected by a plurality of pixels. After the accumulation, it is transferred to the horizontal charge transfer path.

  In addition, the embodiment is a driving method of the solid-state imaging device described above, and when one vertical charge transfer path transfers only the signal charge detected by a pixel having a color filter of the same color, the branching is performed. The signal charges are divided and transferred in parallel to the individual charge temporary storage units constituting the type charge temporary storage unit.

  In addition, the embodiment is a driving method of the solid-state imaging device described above, wherein the branching charge temporary storage unit stores a plurality of signal charges detected by a plurality of pixels and then enters the horizontal charge transfer path. It is transferred.

  As a result, horizontal pixel addition and horizontal pixel addition can be easily performed inside the solid-state imaging device, and high-quality images can be flexibly supported for progressive readout, multi-field readout, moving image readout, and pixel thinning readout. Reading can be performed.

  Since the solid-state imaging device according to the present invention can easily perform horizontal pixel addition and vertical pixel addition inside the solid-state imaging device, a digital camera (digital still camera, digital video camera) equipped with a CCD solid-state imaging device can be used. , Including camera-equipped mobile phones).

DESCRIPTION OF SYMBOLS 1 Image pick-up part 4 Drive part 4a Image pick-up element drive means 9 System control part 22 CCD type solid-state image pick-up element 24 Pixel (photodiode: photoelectric conversion element)
25 Vertical charge transfer path (VCCD)
26 horizontal charge transfer path 27 output amplifier 28 bifurcated charge temporary storage units 28a, 28b temporary charge storage unit 36 wiring for line memory control pulse φLM1 37 wiring for line memory control pulse φLM2

Claims (11)

  A plurality of pixels arranged in a two-dimensional array on a semiconductor substrate and layered with color filters, and signal charges formed along a plurality of pixel columns composed of the pixels and detected by the pixels are read out and transferred. A plurality of vertical charge transfer paths, a horizontal charge transfer path formed along a transfer direction end of the plurality of vertical charge transfer paths, and a plurality of vertical charge transfer paths corresponding to each of the plurality of vertical charge transfer paths. A branch-type charge temporary storage unit that is provided between the transfer direction end and the horizontal charge transfer path, temporarily stores the signal charge transferred along the vertical charge transfer path, and transfers the signal charge to the horizontal charge transfer path; A solid-state imaging device comprising: a control signal applying wiring separately connected to each of the individual charge temporary storage units constituting the branched charge temporary storage unit.   2. The solid-state imaging device according to claim 1, wherein the branched charge temporary storage unit transfers the signal charge received from the vertical charge transfer path to the horizontal charge transfer path in one transfer stage. Image sensor.   3. The solid-state imaging device according to claim 1, wherein each individual charge temporary storage unit included in the branched charge temporary storage unit is connected to the same transfer stage of the horizontal charge transfer path. Image sensor.   4. The solid-state imaging device according to claim 1, wherein each of the individual charge temporary storage units included in the branched charge temporary storage unit is at least 2 of a saturation charge amount of the pixel. A solid-state imaging device having a structure for storing double charge.   5. The solid-state image pickup device according to claim 1, wherein primary pixels of color filters are stacked in a mosaic pattern on the pixels.   5. The solid-state imaging device according to claim 1, wherein a complementary color system color filter is stacked in a mosaic pattern on the pixels.   An image pickup apparatus comprising: the solid-state image pickup device according to any one of claims 1 to 6; and an image pickup device driving unit that supplies a vertical transfer pulse, a horizontal transfer pulse, and the control signal to the solid-state image pickup device.   7. The method for driving a solid-state imaging device according to claim 1, wherein each of the charge temporary storage units constituting the branch-type charge temporary storage unit includes the same charge temporary storage unit. A method for driving a solid-state imaging device in which signal charges detected by pixels having color filters of the same color are distributed.   9. The method for driving a solid-state imaging device according to claim 8, wherein each of the charge temporary storage units constituting the branch-type charge temporary storage unit stores a plurality of signal charges detected by a plurality of pixels. A method for driving a solid-state imaging device transferred to the horizontal charge transfer path.   7. The method for driving a solid-state imaging device according to claim 1, wherein one signal charge detected by a pixel having a color filter of the same color is transferred by one vertical charge transfer path. A method of driving a solid-state imaging device, wherein the signal charge is divided and transferred in parallel to individual charge temporary storage units constituting the branched charge temporary storage unit.   11. The driving method of a solid-state imaging device according to claim 10, wherein a plurality of signal charges detected by a plurality of pixels are stored in the branch-type charge temporary storage unit and then transferred to the horizontal charge transfer path. A method for driving a solid-state imaging device.

Images