JP2010157670A - Manufacturing method of semiconductor device, and semiconductor manufacturing device - Google Patents

Abstract

When a stacked semiconductor device has a very thin protrusion through a thinning process, chipping or cracking occurs even with a slight impact during transportation.
A method of manufacturing a semiconductor device includes a method in which an alignment mark whose surface outer peripheral diameter of one surface of two surfaces of a second semiconductor substrate to be bonded to a first semiconductor substrate overlaps each other. A shaping step of shaping the second semiconductor substrate so as to be equal to or less than the maximum outer diameter of the first semiconductor substrate, and the first semiconductor substrate so that one surface is in contact with the surface of the first semiconductor substrate. A bonding step of bonding the two semiconductor substrates and the first semiconductor substrate to each other, and a thinning step of thinning the second semiconductor substrate by grinding the second semiconductor substrate in the thickness direction.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device manufacturing method and a semiconductor manufacturing apparatus.

  There is a stacked semiconductor device manufactured by stacking semiconductor substrates each formed with an element, a circuit, and the like (see Patent Document 1). The stacked semiconductor device has a high integration density due to a three-dimensional structure without increasing the element area. In addition, since the wiring between the stacked semiconductor substrates is short, an improvement in operating speed and a reduction in power consumption are also expected.

In the case of stacking semiconductor substrates, a pair of semiconductor substrates held parallel to each other are positioned and stacked accurately with line width accuracy of the semiconductor circuit, and then heated and pressed to join the entire substrate. For this reason, a bonding apparatus is used that combines a positioning apparatus (see Patent Document 2) for positioning a pair of semiconductor substrates and a heating and pressurizing apparatus (see Patent Document 3) that holds the bonding permanently by heating and pressing. .
JP 11-261000 A JP 2005-251972 A JP 2007-115978 A

  In general, when a plurality of semiconductor substrates are stacked, the stacked semiconductor substrates other than the single semiconductor substrate serving as a base are thinned leaving an effective region of the element. At this time, when the semiconductor substrates are bonded to each other at positions shifted from each other, a state in which each semiconductor substrate protrudes from the other semiconductor substrate at the edge appears.

  Then, this protruding edge is in a very thin state after the thinning process, so when transporting the laminated semiconductor substrate between devices, even a slight impact due to contact etc. causes chipping and cracking, and as a whole It was a cause of worsening the yield.

  In order to solve the above-mentioned problem, in a first aspect of the present invention, there is provided a method for manufacturing a semiconductor device in which a plurality of semiconductor substrates are bonded to each other, wherein the second method is to bond to a first semiconductor substrate. The second semiconductor substrate is shaped so that the outer peripheral diameter of one of the two surfaces of the semiconductor substrate is equal to or smaller than the maximum outer peripheral diameter of the first semiconductor substrate when the alignment marks corresponding to each other are superimposed. A first shaping step, and a bonding step of bonding the second semiconductor substrate and the first semiconductor substrate together so that one surface of the second semiconductor substrate is in contact with the surface of the first semiconductor substrate; A thinning step of thinning the second semiconductor substrate by grinding the second semiconductor substrate in the thickness direction.

  According to a second aspect of the present invention, there is provided a manufacturing apparatus for manufacturing a semiconductor device in which a plurality of semiconductor substrates are bonded to each other, the second semiconductor substrate being bonded to the first semiconductor substrate. The first semiconductor substrate is shaped so that the outer peripheral diameter of one of the two surfaces is equal to or smaller than the maximum outer peripheral diameter of the first semiconductor substrate when the alignment marks corresponding to each other are superimposed. A shaping portion, a joining portion that joins the second semiconductor substrate and the first semiconductor substrate together so that one surface of the second semiconductor substrate is in contact with the surface of the first semiconductor substrate, and a second semiconductor And a thinning portion for thinning the second semiconductor substrate by grinding the substrate in the thickness direction.

  It should be noted that the above summary of the invention does not enumerate all the necessary features of the present invention. In addition, a sub-combination of these feature groups can also be an invention.

  Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. In addition, not all the combinations of features described in the embodiments are essential for the solving means of the invention.

  FIG. 1 is a schematic configuration diagram showing the entire system common to each embodiment described later. The semiconductor manufacturing apparatus 100 includes an alignment apparatus 200, a wafer storage unit 300, a bonding apparatus 400, a polishing apparatus 500, and a trimming apparatus 600 as constituent apparatuses that perform different processes, and is a space that connects these constituent apparatuses. A load lock chamber 101 is provided.

  In the load lock chamber 101, a transfer device 110 for transferring a wafer or a wafer holder is disposed. Note that the wafer holder here also includes a wafer holder that holds a wafer. The transport device 110 has a plurality of arm portions 111 and includes an actuator at the connection portion. Due to the action of the actuator, the transfer device 110 rotates or advances, for example, the wafer 120 held by the holding unit 112, and carries it in or out of each component device. In addition, the transfer device 110 includes an actuator at the base of the grip portion 112, and the grip portion 112 can be rotated while the grip portion 112 holds the wafer or wafer holder, so that the wafer or wafer holder can be reversed.

  The holding unit 112 includes a vacuum or negative pressure suction unit so that the wafer or the wafer holder can be sucked, and the wafer or the wafer holder is attached or detached by controlling the suction by the suction unit. The gripping by the gripping unit 112 is not limited to suction, and may be configured to be attracted by, for example, electrostatic attraction.

  By the operation as described above, the transfer device 110 can transfer the wafer or the wafer holder between the component devices and can deliver the wafer or the wafer holder to each component device in a predetermined direction that is upward or downward. Note that according to the present embodiment using the system shown in FIG. 1, the wafer or the wafer holder can be carried into and out of all the constituent devices by the single transfer device 110. This is because only one load lock chamber 101 is arranged so as to be common to all the constituent devices, but this is not restrictive. For example, if a certain two component devices are arranged in series and a dedicated load lock chamber 101 is provided to connect them, the dedicated transfer device 110 may be arranged there. .

  Each component device is controlled so that the inside of the chamber has an optimal atmosphere according to the role each component plays. For example, a vacuum or an inert gas atmosphere. Therefore, the load lock chamber 101 serves as a waiting chamber when delivering a wafer or wafer holder between component apparatuses having different processing atmospheres. That is, the alignment apparatus 200 has a gate valve 201, the wafer storage unit 300 has a gate valve 301, the bonding apparatus 400 has a gate valve 401, the polishing apparatus 500 has a gate valve 501, and the trimming apparatus 600 has a gate valve. When all of these gate valves are closed, only the load lock chamber 101 becomes an isolated space, and this space can be in an arbitrary atmosphere. Therefore, when the wafer is unloaded from, for example, the alignment apparatus 200 filled with an inert gas and loaded into the bonding apparatus 400 in a vacuum state, the load lock chamber 101 is first filled with the inert gas, and the gate valve 201 is opened. Then, the transfer device 110 receives the wafer and closes the gate valve 201 again. Then, the inert gas is discharged from the load lock chamber 101 to be in a vacuum state. If the gate valve 401 is opened after achieving the vacuum state, the wafer can be delivered to the bonding apparatus 400 without any problem.

  Wafer storage unit 300 includes a wafer cassette that stocks wafers alone, a wafer holder rack that stocks wafer holders alone, or wafers that are still mounted. The unprocessed wafer is loaded from the external device through the opening and closing of the gate valve 302, and similarly, the processed wafer is unloaded from the external device through the opening and closing of the gate valve 302. The wafer storage unit 300 also has a function as a place for temporarily storing wafers in the middle of processing.

  FIG. 2 is a cross-sectional view schematically showing the structure of the alignment apparatus 200. The alignment apparatus 200 includes a fixed stage 221, a moving stage 222, and an elevating unit 260 that are disposed inside the frame body 211.

  The frame 211 includes a top plate 212 and a bottom plate 216 that are parallel and horizontal to each other, and a plurality of columns 214 that couple the top plate 212 and the bottom plate 216. The top plate 212, the support column 214, and the bottom plate 216 are each formed of a highly rigid material and do not deform even when a reaction force relating to the operation of the internal mechanism is applied.

  The fixed stage 221 is fixed to the lower surface of the top plate 212 and holds the wafer W held by the wafer holder WH on the lower surface. The wafer W is held on the lower surface of the wafer holder WH by electrostatic attraction and becomes one of alignment targets described later.

  The moving stage 222 is placed on the bottom plate 216 and moved in the X direction while being guided by a guide rail 252 fixed to the bottom plate 216, and moved in the Y direction on the X stage 254. Y stage 256. As a result, the member mounted on the moving stage 222 can be moved in any direction on the XY plane.

  The elevating unit 260 is mounted on the moving stage 222 and includes a cylinder 262 and a piston 264. The piston 264 moves up and down in the cylinder 262 in accordance with an instruction from the outside. Wafer holder WH is held on the upper surface of piston 264. Further, the wafer W is held on the wafer holder WH. The wafer W is one of alignment targets to be described later.

  The wafer W has an alignment mark M serving as an alignment reference on the surface (the lower surface in the drawing). However, the alignment mark M is not necessarily a graphic or the like provided for that purpose, but may be a wiring, a bump, a scribe line, or the like formed on the wafer W.

  The alignment apparatus 200 further includes a pair of microscopes 242 and 244 and a reflecting mirror 272. One microscope 242 is fixed to the lower surface of the top plate 212 at a predetermined interval with respect to the fixed stage 221.

  The other microscope 244 and reflecting mirror 272 are mounted on the moving stage 222 together with the lifting unit 260. Thereby, the microscope 244 and the reflecting mirror 272 move on the XY plane together with the lifting unit 260. When the moving stage 222 is in a stationary state, the microscope 244 and the reflecting mirror 272 and the elevating unit 260 have a known distance. Further, the distance between the center of the elevating unit 260 and the microscope 244 matches the distance between the center of the fixed stage 221 and the microscope 242.

  When the alignment apparatus 200 is in the state shown in the drawing, the alignment marks M of the opposing wafers W can be observed simultaneously or separately using the microscopes 242 and 244. Therefore, for example, the exact position of the wafer W placed on the moving stage 222 can be known from the image obtained by the microscope 242. Further, it is possible to know the exact position of the wafer W placed on the fixed stage 221 from the image obtained by the microscope 244.

  The reflecting mirror 272 is used when the moving amount of the moving stage 222 is measured using a measuring device such as an interferometer. In FIG. 2, a reflecting mirror 272 arranged at right angles to the paper surface is shown, but another reflecting mirror 272 that detects movement in the Y direction is also provided.

  FIG. 3 is a diagram illustrating the operation of the alignment apparatus 200. As shown in the figure, the moving stage 222 is moved in the X direction. Here, by making the amount of movement of the moving stage 222 the same as the distance between the center of the elevating unit 260 and the center of the microscope 244, the wafer W on the moving stage 222 is moved to the fixed stage 221. It is transported directly below. At this time, the alignment marks M of the upper and lower wafers W are located on one vertical line.

  In this state, the two elevators 260 are pushed up until the mutual wafers W come into contact with each other, and the two adsorbers provided on the wafer holder WH are operated to fix the two wafers in an accurately aligned state. In this state, the two wafer holders are fixed integrally with the two wafers sandwiched therebetween.

  Here, the description has been made assuming that the two wafers are simply aligned, but the other wafer may be a laminated wafer or a thinned wafer. Since the alignment mark M exists on the surface of the laminated wafer or the thinned wafer, the alignment can be performed in the same manner.

  FIG. 4 is a side sectional view showing a schematic configuration of the bonding apparatus 400. As shown in this figure, the joining apparatus 400 includes a pressing unit 446, a pressurizing stage 448, a pressure receiving stage 450, and a pressure detecting unit 452, which are disposed inside the frame body 444.

  The frame body 444 includes a top plate 454 and a bottom plate 456 that are parallel and horizontal to each other, and a plurality of support columns 458 that couple the top plate 454 and the bottom plate 456. The top plate 454, the support column 458, and the bottom plate 456 have such rigidity that no deformation occurs when a reaction force of pressure applied to the wafer W and the wafer holder WH is applied.

  A pressing portion 446 is disposed on the bottom plate 456 inside the frame body 444. The pressing portion 446 includes a cylinder 460 that is fixed to the upper surface of the bottom plate 456 and a piston 462 that is disposed inside the cylinder 460. The piston 462 is driven by an air pressure drive unit (not shown) and moves up and down in a direction perpendicular to the bottom plate 456 as indicated by an arrow Z in the drawing.

  A pressure stage 448 is mounted on the upper end of the piston 462. The pressure stage 448 includes a horizontal plate-like support portion 466 coupled to the upper end of the piston 462 and a plate-like substrate holding portion 468 parallel to the support portion 466.

  The substrate holding part 468 is supported from the support part 466 via a plurality of actuators 467. In addition to the pair of actuators 467 shown in the figure, the actuator 467 is also arranged forward and backward with respect to the paper surface. Each of these actuators 467 can be operated independently of each other. With such a structure, the inclination of the substrate holding portion 468 can be arbitrarily changed by appropriately operating the actuator 467. The substrate holding unit 468 includes a heater 470 and is heated by the heater 470.

  The two wafer holders WH integrated with the two wafers W aligned by the alignment apparatus 200 are unloaded from the alignment apparatus by the transfer device 110 and placed on the substrate holding unit 468. The mounted wafer holder WH is sucked onto the upper surface of the substrate holding part 468 by vacuum suction or the like. As a result, the wafer W swings together with the wafer holder WH and the substrate holder 468, while being prevented from moving or dropping from the substrate holder 468.

  The pressure receiving stage 450 includes a substrate contact portion 472 and a plurality of suspension portions 474. The suspension portion 474 is suspended from the lower surface of the top plate 454. The substrate contact portion 472 is supported from below in the vicinity of the lower end of the suspension portion 474 and is disposed to face the pressure stage 448. The substrate contact portion 472 includes a heater 476.

  The substrate contact portion 472 is supported by the suspension portion 474 from below, while upward movement is not restricted. However, a plurality of load cells 478, 480, and 482 are sandwiched between the top plate 454 and the substrate contact portion 472. The plurality of load cells 478, 480, and 482 form a part of the pressure detection unit 452, and regulate the upward movement of the substrate contact unit 472 and detect the pressure applied upward to the substrate contact unit 472. .

  When the pressing unit 446 is driven in a state where the wafer W and the wafer holder WH are placed on the substrate holding unit 468, the pressure stage 448 rises toward the pressure receiving stage 450, and the two wafers W are sandwiched and integrated. The two wafer holders WH are pressed. Further, the wafers W are bonded to each other by heating the pressure stage 448 and the pressure receiving stage 450 by the heaters 470 and 476 during the pressing.

  FIG. 5 is a side sectional view showing a schematic configuration of the polishing apparatus 500. In the present embodiment, a CMP apparatus including a liquid supply apparatus is used as the polishing apparatus 500, for example. The polishing apparatus 500 is installed above the rotating surface plate 505 and held on the rotating surface plate 505 to hold the wafer W, which is the object to be polished, by suction with its surface exposed upward. And a polishing head 520 having a polishing pad 521 facing the surface to be polished, which is the surface of the wafer W, on the lower surface. In this polishing apparatus 500, the diameter of the polishing pad 521 is smaller than the diameter of the wafer W, and the entire surface of the wafer W can be polished by relatively moving both of the polishing pad 521 in contact with the wafer W from above. It has become. The wafer W is loaded by the transfer device 110 and placed on the rotating surface plate 505. Here, the wafer W may be mounted on the rotating surface plate 505 in a single state and the surface thereof may be polished, or a wafer on which an already laminated wafer is mounted to constitute the outermost surface. The surface may be polished.

  A support frame 502 that supports the rotating surface plate 505 and the polishing head 520 is movable on a horizontal base 503 and a rail provided on the base 503 so as to extend in the Y direction, which is a direction perpendicular to the paper surface. A first stage 506 provided, a vertical frame 507 extending vertically from the first stage 506, a second stage 508 movably provided on the vertical frame 507, and the second stage 508 A horizontal frame 509 extending horizontally from the horizontal frame 509 and a third stage 510 movably provided on the horizontal frame 509 are configured.

  A motor M1 is provided in the first stage 506, and the first stage 506 can be moved along the rail, that is, in the Y direction by being rotationally driven by a control device. A motor M2 is provided in the second stage 508, and the second stage 508 can be moved along the vertical frame 507, that is, in the Z direction by being rotationally driven by a control device. In addition, a motor M3 is provided in the third stage 510, and the third stage 510 can be moved along the horizontal frame 509, that is, in the X direction by being rotationally driven by the control device. Therefore, the third stage 510 can be moved to an arbitrary position above the rotating surface plate 505 by combining the rotational operations of the motors M1, M2, and M3.

  The rotating surface plate 505 is horizontally attached to an upper end portion of a rotating shaft 511 provided so as to extend upward from a table support portion 504 provided on the base 503. The rotating shaft 511 can be rotated around the Z axis by driving a motor M4 provided in the table support portion 504 by a control device, whereby the rotating surface plate 505 can be rotated in the XY plane. it can.

  The polishing head 520 is attached to a lower end portion of a spindle 516 provided extending downward from the third stage 510. The spindle 516 can be rotated around the Z-axis by rotating a motor M5 provided in the third stage 510 by a control device, whereby the entire polishing head 520 is rotated and the polishing pad 521 is moved to the XY plane. Can be rotated within. Further, the spindle 516 can move in the vertical direction by driving an air cylinder 517 as an elevating mechanism for elevating and moving the polishing head 520 provided in the third stage 510.

  The polishing pad 521 is pressed against the wafer W placed on the rotating surface plate 505 with a predetermined contact pressure, and the motors M1 and M2 are driven to swing the polishing head 520 in the XY directions. During polishing of the wafer W, a slurry containing silica particles, which is a polishing liquid, is pumped from a polishing liquid supply device, and the polishing liquid is supplied to the lower surface side of the polishing pad 521. Thus, the surface of the wafer W is uniformly polished by the rotational movement of the wafer W itself and the rotation and swinging movement of the polishing head 520, that is, the polishing pad 521, while being supplied with the polishing liquid. The wafer thinning process, which will be described later, is realized by polishing the wafer until the wafer has a predetermined thickness by the polishing apparatus 500.

  The polishing apparatus 500 includes a cleaning apparatus for cleaning the polished wafer W and a drying apparatus for drying the cleaned wafer W in succession to the CMP apparatus main body to be polished. Therefore, the wafer W carried out by the transfer device 110 is a wafer that has been polished and then cleaned and dried and has no foreign matter attached thereto.

  FIG. 6 is a side sectional view showing a schematic configuration of the trimming apparatus 600. The trimming apparatus 600 is installed above the rotating surface plate 605 and held on the rotating surface plate 605 and holds the wafer W, which is the object to be ground, by suction with its surface exposed upward. And a grinding blade 620 facing the surface to be ground which is the surface of the wafer W. In the trimming apparatus 600, an arbitrary portion of the surface of the wafer W can be ground by relatively moving both of the grinding blade 620 and the wafer W from above. The wafer W is carried in by the transfer device 110 and placed on the rotating surface plate 605. Here, the wafer W may be placed on the rotating surface plate 605 in a single single state and the surface thereof may be ground, or a wafer on which an already laminated wafer is placed to constitute its outermost surface. The surface may be ground.

  The support frame 602 that supports the rotating surface plate 605 and the grinding blade 620 is movable on a horizontal base 603 and a rail provided on the base 603 so as to extend in the Y direction that is perpendicular to the paper surface. A first stage 606 provided, a vertical frame 607 extending vertically from the first stage 606, a second stage 608 movably provided on the vertical frame 607, and the second stage 608 A horizontal frame 609 provided horizontally extending from the horizontal frame 609 and a third stage 610 provided movably on the horizontal frame 609 are configured.

  A motor M1 is provided in the first stage 606, and the first stage 606 can be moved along the rail, that is, in the Y direction by being rotationally driven by a control device. A motor M2 is provided in the second stage 608, and the second stage 608 can be moved along the vertical frame 607, that is, in the Z direction by being rotationally driven by a control device. In addition, a motor M3 is provided in the third stage 610, and the third stage 610 can be moved along the horizontal frame 609, that is, in the X direction by being rotationally driven by the control device. For this reason, the third stage 610 can be moved to an arbitrary position above the rotating surface plate 605 by combining the rotational operations of the motors M1, M2, and M3.

  The rotating surface plate 605 is horizontally attached to an upper end portion of a rotating shaft 611 provided to extend upward from a table support portion 604 provided on the base 603. The rotating shaft 611 can be rotated around the Z axis by driving a motor M4 provided in the table support portion 604 by a control device, whereby the rotating surface plate 605 can be rotated in the XY plane. it can.

  The grinding blade 620 is attached to a lower end portion of a blade holder 616 provided to extend downward from the third stage 610. Inside the blade holder 616, a shaft for connecting the motor M5 and the grinding blade 620 is provided, and the disc-shaped grinding blade can be rotated around the X axis through a worm gear. The blade holder 616 is movable in the vertical direction by driving an air cylinder 617 as a lifting mechanism that moves the grinding blade 620 provided in the third stage 610 up and down.

  In the third stage 610, a microscope 630 is installed at a position facing the surface to be ground which is the surface of the wafer W held on the rotating surface plate 605. By using the microscope 630, the alignment mark M of the wafer W can be observed. Accordingly, the exact position of the wafer W placed on the rotating surface plate 605 can be known from the image obtained by the microscope 630. If the alignment mark M of the wafer W can be observed, the wafer W can be ground with this position as a reference.

  Here, the relationship between the position of the alignment mark M and the peripheral edge to be ground will be described. In the present embodiment, when the alignment marks M corresponding to each other are superimposed on the bonding surface of the second wafer W on the bonding side with the first wafer W on the bonding side, the maximum of the first wafer W is obtained. The second wafer W is shaped so as to be equal to or smaller than the outer diameter. A plurality of alignment marks M are provided on the bonding surfaces of the first wafer W and the second wafer W, respectively, but the actual position of the alignment mark M depends on the error between the apparatuses performing the process and the expansion of the wafer W. In addition, the design position is shifted due to distortion or the like. The direction and size of the deviation (hereinafter simply referred to as “deviation amount”) differs for each wafer W, and also differs for each alignment mark M within the same wafer W.

  As described above, a global alignment method or the like is known as a method of superimposing two wafers W having different shift amounts for each wafer W and further for each alignment mark M. In alignment apparatus 200, two wafers W are aligned by such a method, but in trimming apparatus 600, similar position identification is performed using microscope 630 in order to determine a region to be ground. However, the purpose here is that of the region to be ground for shaping the second wafer W so that the respective outer peripheral diameters of the first wafer W are equal to or less than the maximum outer peripheral diameter when the corresponding alignment marks M are superimposed. Because it is a decision, it is not a strict global alignment method but a simple method. The example of the specific procedure is shown below.

  First, using the center of the first wafer W as the origin, the actual coordinates of each in-plane alignment mark M are obtained using the microscope 630. Similarly, the actual coordinates of each alignment mark M in the plane are obtained using the microscope 630 with the center of the second wafer W as the origin. The shift amounts are individually determined from the actual coordinate values obtained for the alignment mark M of the first wafer W and the alignment mark M of the second wafer W, respectively. And the average value is calculated | required with respect to each deviation | shift amount calculated | required separately. Since this average value can be simply regarded as the amount of deviation of the center of the second wafer W from the center of the first wafer W, a position obtained by adding this average value to the center of the second wafer W is newly set. Can be central.

  Then, since it can be assumed that the center of the first wafer W and the new center of the second wafer W are aligned at the time of bonding, the maximum outer peripheral diameter of the first wafer W is obtained when they are overlapped. On the other hand, it is possible to calculate what region of the second wafer W protrudes. Specifically, the second wafer W is outside the circle surrounded by the radius of the first wafer W from the new center. Therefore, the second wafer W is shaped so that the bonding surface of the second wafer W on the bonding side with the first wafer W on the bonding side is equal to or smaller than the maximum outer peripheral diameter of the first wafer W. For this purpose, at least this region may be ground. More realistically, it is preferable to set a radius smaller than the radius of the first wafer W and larger than the distance from the new center to the farthest alignment mark M, and to grind the outside. When the first wafer W is ground so as to be the same as the outer peripheral diameter of the surface of the second wafer W to be ground, with respect to the first wafer W, from the center of the first wafer W, What is necessary is just to grind the outer side of the calculated | required radius. Note that the wafer W for setting a new center may be the first wafer W instead of the second wafer W.

  Further, a simpler method can also be adopted. For example, the following method can be adopted. First, one alignment mark M as a representative of the first wafer W is selected, and the center coordinates (x0, y0) of the first wafer W with respect to the alignment mark M are stored. Next, the corresponding alignment mark M of the second wafer W is searched, and the positional relationship with the first wafer W is made equal, that is, the coordinates (x0, y0) from the corresponding alignment mark M are set to the second wafer. Let W be the center. Then, if a radius smaller than the radius of the first wafer W and larger than the distance from the new center to the farthest alignment mark M is set, grinding is performed so that the outer peripheral diameters of both wafers W coincide. Can do.

  As another example, the relative displacement amount between the alignment generation position in the first apparatus for manufacturing the first wafer W and the alignment generation position in the second apparatus for manufacturing the second wafer W is acquired in advance. If possible, this may be stored. That is, by changing the center positions of the first wafer W and the second wafer W with respect to the alignment marks M according to the positional deviation amount, the outer peripheral diameters of the surfaces can be made while relatively matching the circuit areas of the two. Can also be ground to match.

  It should be noted that the amount of deviation may not be easily obtained, but of course may be obtained in accordance with a more accurate method such as the global alignment method. Further, the determination of the shift amount and the grinding area may be performed by the alignment apparatus 200 instead of by the trimming apparatus 600.

  FIG. 7 is a conceptual diagram of the wafer W to be ground by the trimming apparatus 600. The wafer W before being thinned by the polishing apparatus 500 is chamfered at the periphery, and the periphery generally has an R shape. FIG. 7 shows a case where the grinding blade 620 is ground from above the wafer W and brought into contact with the peripheral portion near the R shape. The grinding blade 620 rotates around the X axis, and the grinding blade 620 is pressed against the surface of the wafer W by the lowering of the air cylinder 617 in the Z axis direction and is ground. The grinding depth is controlled by the vertical movement of the air cylinder 617.

  Since the rotating surface plate 605 rotates around the Z axis, the wafer W also rotates around the Z axis, whereby the surface of the wafer W is ground circumferentially around the rotation center C. As described above, a plurality of alignment marks M are provided on the surface of the wafer W. In the figure, one representative one is shown. A rotation center C, which is a new center determined by the above-described method, is determined, and the grinding blade 620 is disposed at a position away from the rotation center C by a set radius.

  As shown in the figure, grinding and shaping the peripheral edge of the wafer W is called trimming. By trimming, the outer peripheral diameter of the surface of the wafer can be made smaller than the original outer peripheral diameter of the surface. Trimming can be performed from the surface of the wafer W to a predetermined depth as shown in the drawing, or the outer periphery can be completely removed to form a cylindrical shape. When applied to a predetermined depth, the cross-sectional shape of the wafer W becomes a substantially convex shape. Further, in the illustrated trimming, the ground surface is ground so as to be a right-angled edge. However, even if the wafer W is thinned by the polishing apparatus 500, an acute-angled edge does not appear, and This is preferable in that cracks and chips are less likely to occur.

  Next, a plurality of embodiments will be described with respect to a processing procedure up to a stacked semiconductor device in which another wafer is bonded and thinned to one wafer. In the following description, alignment is performed as an operation of taking a single wafer W or an already stacked wafer W into and out of the wafer storage unit 300, attaching / detaching the wafer W to / from the wafer holder WH, and a pre-process of carrying it into the bonding apparatus 400. The operation of aligning the two wafers by the apparatus 200 is not described unless particularly necessary, but such an operation is performed as necessary.

(First embodiment)
FIG. 8 is a flowchart showing the first embodiment and a schematic view of a wafer in each process. In the schematic view, wafer A represents a first semiconductor substrate to be bonded, and wafer B represents a second semiconductor substrate to be bonded. A region surrounded by a dotted line represents a portion removed by polishing in the thinning process.

  Step S101 is a process of trimming 1 as the first shaping stage. First, the peripheral portion of the wafer B is trimmed by the trimming apparatus 600. In the trimming step 1, the peripheral portion of the wafer B is ground to a predetermined depth at the same time as grinding in the radial direction so that the outer peripheral diameter of the wafer B is equal to or less than the maximum outer peripheral diameter of the wafer A. As a result, the wafer B has a convex cross-sectional shape. Note that the surface to be trimmed is a surface to be bonded to the wafer A later.

  The grinding of the wafer B in the radial direction is preferably performed so that the surfaces thereof have the same shape when bonded to the wafer A. That is, it is preferable that the diameter of the surface of the wafer A to be trimmed in the next step S102 is equal to the diameter of the surface of the wafer B to be trimmed in step S101. When trimming is performed in this manner, each wafer receives a uniform pressing force during bonding, so that deformation and cracking due to pressure distribution can be avoided.

  The next step S102 is a trimming 2 step as a second shaping stage, in which the peripheral portion of the wafer A is trimmed by the trimming apparatus 600. In the trimming 2 step, the outer peripheral diameter of the surface of the wafer A is ground in the radial direction so as to be smaller than the original diameter, and at the same time, the peripheral edge is ground to a predetermined depth. As a result, the wafer A has a convex cross-sectional shape. Note that the surface to be trimmed is a surface to be bonded to the wafer B later.

  Since the process of trimming 1 in step S101 and the process of trimming 2 in step S102 are performed independently for each of the wafers A and B, the order may be interchanged or may be performed simultaneously. good.

  The next step S103 is a bonding process as a bonding stage, in which the wafer A and the wafer B are bonded by the bonding apparatus 400. In addition, as mentioned above, it joins so that the surface which trimmed each may oppose.

  Next, in step S104, a thinning process as a thinning stage, in which the surface of the wafer B opposite to the surface bonded to the wafer A is polished and removed by the polishing apparatus 500. Polishing is performed in the thickness direction of the wafer B as described above, and the polishing amount is until the flange portion remaining without being removed in the trimming 1 process is completely removed. Specifically, grinding is performed until the area surrounded by the dotted line shown in the schematic diagram of the wafer is removed. As a result, the outer peripheral diameter of the wafer B falls within the maximum outer peripheral diameter of the wafer A.

  When three or more wafers are stacked, the stacked wafers are handled as a new wafer A, step S102 is skipped, and steps S101 to S104 are repeated. By doing so, the trimmed second, third,... Wafers are stacked so as to be within the maximum outer diameter of the first wafer A.

  As described above, according to the first embodiment, the thinned wafer B is within the outer peripheral diameter of the wafer A when viewed from above. Even if it is carried out, there is a low possibility that other elements will come into contact with the end of the thinned wafer B during transportation, and the effect that cracks and chips are not likely to occur can be obtained.

  Further, according to the first embodiment, the thinned wafer B that is not trimmed does not appear bonded to the wafer A even in the processing stage. That is, the thinned wafer B does not protrude from the maximum outer peripheral diameter of the wafer A when viewed from above after being stacked. Therefore, there is no fear that cracks and chips are generated not only when transporting by an external apparatus but also when transporting by the transport apparatus 110 within the semiconductor manufacturing apparatus 100.

  Note that when the thinned wafer B that has not been trimmed is bonded to the wafer A, the outer periphery of the wafer B may protrude from the outer periphery of the wafer A. This is due to a relative deviation between the alignment mark M and the center C. That is, the removal of the peripheral portion by trimming is to absorb this shift. The significance of removing the peripheral portion by trimming is the same in the following embodiments.

(Second embodiment)
FIG. 9 is a flowchart showing the second embodiment and a schematic view of a wafer in each process. In the schematic view, wafer A represents a first semiconductor substrate to be bonded, and wafer B represents a second semiconductor substrate to be bonded. A region surrounded by a dotted line represents a portion removed by polishing in the thinning process.

  Step S201 is a process of trimming 1 as the first shaping stage. First, the peripheral portion of the wafer B is trimmed by the trimming apparatus 600. In the trimming step 1, the peripheral portion of the wafer B is ground to a predetermined depth at the same time as grinding in the radial direction so that the outer peripheral diameter of the wafer B is equal to or less than the maximum outer peripheral diameter of the wafer A. As a result, the wafer B has a convex cross-sectional shape. Note that the surface to be trimmed is a surface to be bonded to the wafer A later.

  The grinding of the wafer B in the radial direction is preferably performed so that the surfaces thereof have the same shape when bonded to the wafer A. That is, it is preferable that the diameter of the surface of the wafer A to be trimmed in the next step S202 is equal to the diameter of the surface of the wafer B to be trimmed in step S201. When trimming is performed in this manner, each wafer receives a uniform pressing force during bonding, so that deformation and cracking due to pressure distribution can be avoided.

  The next step S202 is a trimming 2 step as the second shaping stage, in which the peripheral portion of the wafer A is trimmed by the trimming apparatus 600. In the trimming 2 step, the outer peripheral diameter of the surface of the wafer A is ground in the radial direction so as to be smaller than the original diameter, and at the same time, the peripheral edge is ground to a predetermined depth. As a result, the wafer A has a convex cross-sectional shape. Note that the surface to be trimmed is a surface to be bonded to the wafer B later.

  Since the process of trimming 1 in step S201 and the process of trimming 2 in step S202 are performed independently for each of the wafers A and B, the order may be interchanged or may be performed simultaneously. good.

  Next, in step S203, a thinning process as a thinning stage, in which the surface of the wafer B opposite to the surface bonded to the wafer A is polished and removed by the polishing apparatus 500. Polishing is performed in the thickness direction of the wafer B as described above, and the polishing amount is until the flange portion remaining without being removed in the trimming 1 process is completely removed. As a result, the outer peripheral diameter of the wafer B is smaller than the maximum outer peripheral diameter of the wafer A.

  The next step S204 is a bonding step as a bonding stage, and bonding is performed by the bonding apparatus 400 so that the outer peripheral diameter of the wafer B is within the maximum outer peripheral diameter of the wafer A. When three or more wafers are stacked, the stacked wafers are handled as a new wafer A, step S202 is skipped, and steps S201 to S204 are repeated. By doing so, the trimmed second, third,... Wafers are stacked so as to be within the maximum outer diameter of the first wafer A.

  As described above, according to the second embodiment, the thinned wafer B is within the outer peripheral diameter of the wafer A when viewed from above. Even if it is carried out, there is a low possibility that other elements will come into contact with the end of the thinned wafer B during transportation, and the effect that cracks and chips are not likely to occur can be obtained.

  In addition, according to the second embodiment, the thinned wafer B that has not been trimmed does not appear bonded to the wafer A even in the processing stage. That is, the thinned wafer B does not protrude from the maximum outer peripheral diameter of the wafer A when viewed from above after being stacked. Therefore, there is no fear that cracks and chips are generated not only when transporting by an external apparatus but also when transporting by the transport apparatus 110 within the semiconductor manufacturing apparatus 100.

(Third embodiment)
FIG. 10 is a flowchart showing the third embodiment and a schematic view of a wafer in each process. In the schematic view, wafer A represents a first semiconductor substrate to be bonded, and wafer B represents a second semiconductor substrate to be bonded. A region surrounded by a dotted line represents a portion removed by polishing in the thinning process.

  Step S301 is a trimming 2 step as the second shaping stage, in which the peripheral portion of the wafer A is trimmed by the trimming apparatus 600. In the trimming 2 step, the outer peripheral diameter of the surface of the wafer A is ground in the radial direction so as to be smaller than the original diameter, and at the same time, the peripheral edge is ground to a predetermined depth. As a result, the wafer A has a convex cross-sectional shape. Note that the surface to be trimmed is a surface to be bonded to the wafer B later.

  The next step S302 is a bonding process as a bonding stage, in which the wafer A and the wafer B are bonded by the bonding apparatus 400. At this stage, the wafer B has not been trimmed or thinned yet.

  The next step S303 is a trimming 1 step as the first shaping stage, in which the peripheral portion of the wafer B is trimmed by the trimming apparatus 600. In the trimming 1 step, grinding is performed in the radial direction so that the outer peripheral diameter of the wafer B is equal to or smaller than the maximum outer peripheral diameter of the wafer A. In the trimming apparatus 600, the wafer B is placed on the rotating surface plate 605 with the bonding surface with the wafer A facing down, and is ground by pressing the grinding blade 620 from the surface opposite to the bonding surface. As a result, the wafer B has a cylindrical shape without having a flange portion.

  Next, in step S304, a thinning process as a thinning stage, in which the surface of the wafer B opposite to the surface bonded to the wafer A is polished and removed by the polishing apparatus 500. Polishing is performed in the thickness direction of the wafer B as described above. When three or more wafers are stacked, the stacked wafers are handled as a new wafer A, and steps S302 to S304 are repeated. By doing so, the trimmed second, third,... Wafers are stacked so as to be within the maximum outer diameter of the first wafer A.

  As described above, according to the third embodiment, the thinned wafer B is within the outer peripheral diameter of the wafer A when viewed from above. Even if it is carried out, there is a low possibility that other elements will come into contact with the end of the thinned wafer B during transportation, and the effect that cracks and chips are not likely to occur can be obtained.

  Further, according to the third embodiment, the thinned wafer B that is not trimmed does not appear bonded to the wafer A even in the processing stage. That is, the thinned wafer B does not protrude from the maximum outer peripheral diameter of the wafer A when viewed from above after being stacked. Therefore, there is no fear that cracks and chips are generated not only when transporting by an external apparatus but also when transporting by the transport apparatus 110 within the semiconductor manufacturing apparatus 100.

(Fourth embodiment)
FIG. 11 is a flowchart showing the fourth embodiment and a schematic view of a wafer in each process. In the schematic view, wafer A represents a first semiconductor substrate to be bonded, and wafer B represents a second semiconductor substrate to be bonded. A region surrounded by a dotted line represents a portion removed by polishing in the thinning process.

  Step S401 is a trimming 2 step as the second shaping stage, and the peripheral portion of the wafer A is trimmed by the trimming apparatus 600. In the trimming 2 step, the outer peripheral diameter of the surface of the wafer A is ground in the radial direction so as to be smaller than the original diameter, and at the same time, the peripheral edge is ground to a predetermined depth. As a result, the wafer A has a convex cross-sectional shape. Note that the surface to be trimmed is a surface to be bonded to the wafer B later.

  The next step S402 is a bonding process as a bonding stage, in which the wafer A and the wafer B are bonded by the bonding apparatus 400. At this stage, the wafer B has not been trimmed or thinned yet.

  Next, in step S403, a thinning step as a thinning step, the surface of the wafer B opposite to the surface bonded to the wafer A is polished and removed by the polishing apparatus 500. Polishing is performed in the thickness direction of the wafer B as described above.

  The next step S404 is a trimming 1 step as the first shaping stage, and the peripheral portion of the wafer B is trimmed by the trimming apparatus 600. In the trimming 1 step, grinding is performed in the radial direction so that the outer peripheral diameter of the wafer B is equal to or smaller than the maximum outer peripheral diameter of the wafer A. In the trimming apparatus 600, the wafer B is placed on the rotating surface plate 605 with the bonding surface with the wafer A facing down, and is ground by pressing the grinding blade 620 from the surface opposite to the bonding surface. As a result, the wafer B has a cylindrical shape. When three or more wafers are stacked, the stacked wafers are handled as a new wafer A, and steps S402 to S404 are repeated. By doing so, the trimmed second, third,... Wafers are stacked so as to be within the maximum outer diameter of the first wafer A.

  As described above, according to the fourth embodiment, the thinned wafer B is within the outer peripheral diameter of the wafer A when viewed from above. In this state, the wafer B is transferred to the external device. Even if it is carried out, there is a low possibility that other elements will come into contact with the end of the thinned wafer B during transportation, and the effect that cracks and chips are not likely to occur can be obtained.

(5th Example)
FIG. 12 is a flowchart showing the fifth embodiment and a schematic view of a wafer in each process. In the schematic view, wafer A represents a first semiconductor substrate to be bonded, and wafer B represents a second semiconductor substrate to be bonded. A region surrounded by a dotted line represents a portion removed by polishing in the thinning process.

  Step S501 is a trimming 2 step as the second shaping stage, and the peripheral portion of the wafer A is trimmed by the trimming apparatus 600. In the trimming 2 step, the outer peripheral diameter of the surface of the wafer A is ground in the radial direction so as to be smaller than the original diameter, and at the same time, the peripheral edge is ground to a predetermined depth. As a result, the wafer A has a convex cross-sectional shape. Note that the surface to be trimmed is a surface to be bonded to the wafer B later.

  Next, in step S502, a thinning process as a thinning stage, in which the surface of the wafer B opposite to the surface bonded to the wafer A is polished and removed by the polishing apparatus 500. Polishing is performed in the thickness direction of the wafer B as described above.

  The next step S503 is a bonding process as a bonding stage, in which the wafer A and the wafer B are bonded by the bonding apparatus 400. Of the wafer B, the surface bonded to the wafer A is the surface opposite to the surface polished in step S502.

  The next step S504 is a trimming 1 step as a first shaping stage, in which the peripheral edge of the wafer B is trimmed by the trimming apparatus 600. In the trimming 1 step, grinding is performed in the radial direction so that the outer peripheral diameter of the wafer B is equal to or smaller than the maximum outer peripheral diameter of the wafer A. In the trimming apparatus 600, the wafer B is placed on the rotating surface plate 605 with the bonding surface with the wafer A facing down, and is ground by pressing the grinding blade 620 from the surface opposite to the bonding surface. As a result, the wafer B has a cylindrical shape. When three or more wafers are stacked, the stacked wafers are handled as a new wafer A, and steps S502 to S504 are repeated. By doing so, the trimmed second, third,... Wafers are stacked so as to be within the maximum outer diameter of the first wafer A.

  As described above, according to the fifth embodiment, the thinned wafer B is within the outer peripheral diameter of the wafer A when viewed from above. In this state, the wafer B is transferred to the external device. Even if it is carried out, there is a low possibility that other elements will come into contact with the end of the thinned wafer B during transportation, and the effect that cracks and chips are not likely to occur can be obtained. In the example shown in FIG. 12, an example is shown in which the surface opposite to the surface to be bonded to the wafer A is polished among the two surfaces of the wafer B. Instead, the wafer B is bonded to the wafer A. The surface may be polished.

(Sixth embodiment)
FIG. 13 is a flowchart showing the sixth embodiment and a schematic view of a wafer in each process. In the schematic view, wafer A represents a first semiconductor substrate to be bonded, and wafer B represents a second semiconductor substrate to be bonded. A region surrounded by a dotted line represents a portion removed by polishing in the thinning process.

  Step S601 is a trimming 2 step as the second shaping step, and the peripheral portion of the wafer A is trimmed by the trimming apparatus 600. In the trimming 2 step, the outer peripheral diameter of the surface of the wafer A is ground in the radial direction so as to be smaller than the original diameter, and at the same time, the peripheral edge is ground to a predetermined depth. As a result, the wafer A has a convex cross-sectional shape. Note that the surface to be trimmed is a surface to be bonded to the wafer B later.

  Next, step S602 is a thinning process as a thinning stage, in which the surface of the wafer B opposite to the surface bonded to the wafer A is polished and removed by the polishing apparatus 500. Polishing is performed in the thickness direction of the wafer B as described above.

  The next step S603 is a trimming 1 step as the first shaping stage, and the peripheral portion of the wafer B is trimmed by the trimming apparatus 600. In the trimming 1 step, grinding is performed in the radial direction so that the outer peripheral diameter of the wafer B is equal to or smaller than the maximum outer peripheral diameter of the wafer A. As a result, the wafer B has a cylindrical shape.

  The next step S604 is a bonding step as a bonding stage, and bonding is performed by the bonding apparatus 400 so that the outer peripheral diameter of the wafer B is within the maximum outer peripheral diameter of the wafer A. When three or more wafers are stacked, the stacked wafers are handled as a new wafer A, and steps S602 to S604 are repeated. By doing so, the trimmed second, third,... Wafers are stacked so as to be within the maximum outer diameter of the first wafer A.

  As described above, according to the sixth embodiment, the thinned wafer B is within the outer peripheral diameter of the wafer A when viewed from above. In this state, the wafer B is transferred to the external device. Even if it is carried out, there is a low possibility that other elements will come into contact with the end of the thinned wafer B during transportation, and the effect that cracks and chips are not likely to occur can be obtained. In the example shown in FIG. 13, an example is shown in which the surface opposite to the surface to be bonded to the wafer A out of the two surfaces of the wafer B is polished. Instead, the wafer B is bonded to the wafer A. The surface may be polished.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. For example, even if the wafer is not circular, for example, an elliptical shape, it can be similarly achieved by the above description that the outer periphery of the wafer to be overlapped does not protrude from the outer periphery of the wafer to be overlapped. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

It is a schematic block diagram which shows the whole system common to each embodiment. 2 is a cross-sectional view schematically showing the structure of alignment apparatus 200. FIG. It is a figure which shows operation | movement of the alignment apparatus. 4 is a side sectional view showing a schematic configuration of a bonding apparatus 400. FIG. 2 is a side sectional view showing a schematic configuration of a polishing apparatus 500. FIG. 3 is a side sectional view showing a schematic configuration of a trimming apparatus 600. FIG. It is a conceptual diagram of the wafer W ground by the trimming apparatus 600. It is the flowchart which shows a 1st Example, and the schematic of the wafer in each process. It is the flowchart which shows a 2nd Example, and the schematic of the wafer in each process. It is the flowchart which shows a 3rd Example, and the schematic of the wafer in each process. It is the flowchart which shows a 4th Example, and the schematic of the wafer in each process. It is the flowchart which shows a 5th Example, and the schematic of the wafer in each process. It is the flowchart which shows a 6th Example, and the schematic of the wafer in each process.

DESCRIPTION OF SYMBOLS 100 Semiconductor manufacturing apparatus, 101 Load lock chamber, 110 Conveyance apparatus, 111 Arm part, 112 Holding part, 120 Wafer, 200 Alignment apparatus, 201 Gate valve, 211 Frame, 212 Top plate, 214 Post, 216 Bottom plate, 221 Fixed stage 222 moving stage, 242 and 244 microscope, 252 guide rail, 254 X stage, 256 Y stage, 260 lifting and lowering part, 262 cylinder, 264 piston, 272 reflecting mirror, 300 wafer storage part, 301, 302 gate valve,
400 joining device, 401 gate valve, 444 frame, 446 pressing part, 448 pressure stage, 450 pressure receiving stage, 452 pressure detecting part, 454 top plate, 456 bottom plate, 458 column, 460 cylinder, 462 piston, 466 support part, 467 Actuator, 468 Substrate holding part, 470 Heater, 472 Substrate contact part, 474 Suspension part, 476 Heater, 478, 480, 482 Load cell, 500 Polishing device, 501 Gate valve, 502 Support frame, 503 Base, 504 Table support part , 505 Rotating surface plate, 506 1st stage, 507 Vertical frame, 508 2nd stage, 509 Horizontal frame, 510 3rd stage, 511 Rotating shaft, 516 Spindle, 517 Air cylinder, 520 Polishing head, 521 Polishing pad, 600 Trim 601 gate valve, 602 support frame, 603 base, 604 table support, 605 rotating surface plate, 606 first stage, 607 vertical frame, 608 second stage, 609 horizontal frame, 610 third stage, 611 rotation Shaft, 616 Blade holder, 617 Air cylinder, 620 Grinding blade, 630 Microscope

Claims (10)

A method of manufacturing a semiconductor device in which a plurality of semiconductor substrates are bonded and laminated,
The outer peripheral diameter of one surface of the two surfaces of the second semiconductor substrate bonded to the first semiconductor substrate is the maximum outer peripheral diameter of the first semiconductor substrate when the alignment marks corresponding to each other are superimposed. A first shaping step of shaping the second semiconductor substrate so that:
Bonding the second semiconductor substrate and the first semiconductor substrate to each other so that the one surface of the second semiconductor substrate is in contact with the surface of the first semiconductor substrate;
A thinning step of thinning the second semiconductor substrate by grinding the second semiconductor substrate in a thickness direction;
A method for manufacturing a semiconductor device comprising:   2. The method of manufacturing a semiconductor device according to claim 1, wherein in the first shaping step, shaping is performed so that a cross section of the second semiconductor substrate has a convex shape.   The method of manufacturing a semiconductor device according to claim 1, wherein the thinning step is performed prior to the bonding step.   4. The method of manufacturing a semiconductor device according to claim 1, wherein the joining step is performed prior to the first shaping step. 5.   Prior to the joining step, the first semiconductor substrate is shaped so that one of the two surfaces of the first semiconductor substrate, which is in contact with the surface of the second semiconductor substrate, has a smaller surface outer diameter. The method of manufacturing a semiconductor device according to claim 1, further comprising a second shaping step.   In the first shaping step, the outer periphery of the surface of the second semiconductor substrate is shaped so as to be equal to the outer peripheral diameter of the surface of the first semiconductor substrate shaped in the second shaping step. A method for manufacturing a semiconductor device according to claim 5.   In the first shaping step, the positional relationship of the outer periphery of the surface of the second semiconductor substrate with respect to the alignment mark of the second semiconductor substrate is such that the surface of the first semiconductor substrate with respect to the alignment mark of the first semiconductor substrate. The method for manufacturing a semiconductor device according to claim 6, wherein the outer periphery of the surface of the second semiconductor substrate is shaped so as to be equal to the positional relationship of the outer periphery.   In the first shaping step, the alignment mark of the first semiconductor substrate set in the first apparatus for manufacturing the first semiconductor substrate and the second apparatus for manufacturing the second semiconductor substrate are used. The method of manufacturing a semiconductor device according to claim 7, wherein the outer periphery of the surface of the second semiconductor substrate is shaped based on a relative positional deviation amount with respect to the alignment mark of the second semiconductor substrate that is set.   The first semiconductor substrate is a substrate group in which a plurality of semiconductor substrates are already stacked, and a semiconductor substrate constituting a surface opposite to a surface in contact with the second semiconductor substrate among the plurality of semiconductor substrates. The method for manufacturing a semiconductor device according to claim 1, wherein is a substrate group having a maximum outer peripheral diameter. A manufacturing apparatus for manufacturing a stacked semiconductor device by bonding a plurality of semiconductor substrates,
The outer peripheral diameter of one surface of the two surfaces of the second semiconductor substrate bonded to the first semiconductor substrate is the maximum outer peripheral diameter of the first semiconductor substrate when the alignment marks corresponding to each other are superimposed. A first shaping unit for shaping the second semiconductor substrate so that:
A bonding portion for bonding the second semiconductor substrate and the first semiconductor substrate to each other so that the one surface of the second semiconductor substrate is in contact with the surface of the first semiconductor substrate;
A thinning portion for thinning the second semiconductor substrate by grinding the second semiconductor substrate in a thickness direction;
A manufacturing apparatus comprising:

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