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JP2010010606A - Optical conversion element cell, integrated optical conversion device, method of manufacturing optical conversion element cell, and method of manufacturing integratedoptical conversion device - Google Patents

Optical conversion element cell, integrated optical conversion device, method of manufacturing optical conversion element cell, and method of manufacturing integratedoptical conversion device Download PDF

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JP2010010606A
JP2010010606A JP2008171157A JP2008171157A JP2010010606A JP 2010010606 A JP2010010606 A JP 2010010606A JP 2008171157 A JP2008171157 A JP 2008171157A JP 2008171157 A JP2008171157 A JP 2008171157A JP 2010010606 A JP2010010606 A JP 2010010606A
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optical conversion
conversion element
electrode layer
unit cell
back electrode
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Hiroshi Shirai
寛 白井
Makoto Miyamoto
真 宮本
Katsunori Miyata
勝則 宮田
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Maxell Ltd
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Hitachi Maxell Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/541CuInSe2 material PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an integrated optical conversion device which uses a high-performance optical conversion element cell, and a method of manufacturing the integrated optical conversion device that decreases the number of processes and reduces the cost. <P>SOLUTION: The optical conversion element cell 20 includes a plurality of unit cell elements 15a, 15b, 15c and 15d which are insulated and separated on a common substrate 8 with separation grooves 14a, 14b and 14c having a predetermined width, and electrically connected in series, each of the unit cell elements comprising a back electrode layer formed on the substrate 8 and provided with a back electrode lead-out portion, a crystalline semiconductor layer formed on a surface of a part, other than the back electrode lead-out portion, of the back electrode layer, and generating a pn junction by light irradiation, and a transparent surface electrode layer formed on the crystalline semiconductor layer and provided with a grid electrode. A plurality of optical conversion element cells 20 are electrically connected in series to obtain the integrated optical conversion device. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、光学変換素子セル等に関し、より詳しくは、太陽電池モジュールに用いられる光学変換素子セル等に関する。   The present invention relates to an optical conversion element cell and the like, and more particularly to an optical conversion element cell and the like used for a solar cell module.

地球温暖化の影響で自然災害が世界各地で起こり始めている。このような状況下において、エネルギー・環境問題への関心が高まり、世界中の人々がクリーンで持続可能な再生可能エネルギーの重要性を認識し始めている。太陽光発電はその中で最も期待されているエネルギー源である。このような背景のもと、太陽電池の実用化に向けての研究開発が進み、太陽電池産業は急速に成長している。
太陽電池の主力は、ウエハーを基調とした結晶系シリコン系太陽電池であるが、コストが高いという点から、光学変換層の膜厚を比較的薄くできる薄膜系太陽電池が注目されている。
Natural disasters are starting to occur around the world due to the effects of global warming. Under these circumstances, interest in energy and environmental issues has increased, and people around the world are beginning to recognize the importance of clean and sustainable renewable energy. Solar power generation is the most promising energy source. Against this background, research and development for practical application of solar cells has progressed, and the solar cell industry is growing rapidly.
The main solar cell is a crystalline silicon solar cell based on a wafer. From the viewpoint of high cost, a thin film solar cell in which the film thickness of the optical conversion layer can be made relatively thin is drawing attention.

太陽電池の1つ1つは単位セル素子と呼ばれ、その大きさは10cm角程度であるため、大きな電力を取り出すために、複数の単位セル素子を直列につないで光学変換素子セルを形成し、さらにこれを接続して製造される集積型薄膜太陽電池(太陽電池モジュール)が一般的である。   Each of the solar cells is called a unit cell element, and its size is about 10 cm square. Therefore, in order to extract large electric power, an optical conversion element cell is formed by connecting a plurality of unit cell elements in series. Further, an integrated thin film solar cell (solar cell module) manufactured by connecting them is common.

このような集積型薄膜太陽電池の製造方法としては、例えば、特許文献1には、隣接する太陽電池アレイは、予め互いに個別に製作し、太陽電池アレイ間の電気的接続後に、隣接する太陽電池アレイの隙間および太陽電池アレイ間を電気的に直列接続する部材の周囲を、接着性樹脂封止材により電気的に絶縁することにより、マイグレーション等による短絡の発生を防止し、発電の実効面積比率の高い太陽電池モジュールの製造方法が記載されている。   As a method for manufacturing such an integrated thin film solar cell, for example, in Patent Document 1, adjacent solar cell arrays are individually manufactured in advance and the adjacent solar cells are electrically connected after the solar cell arrays are electrically connected. Effective insulation ratio of power generation by preventing the occurrence of short circuit due to migration, etc. by electrically insulating the gap between the arrays and the periphery of the members that are connected in series between the solar cell arrays with an adhesive resin sealing material A manufacturing method of a solar cell module having a high height is described.

特開2003−124482号公報JP 2003-124482 A

ところで、カルコパイライト型化合物半導体を光吸収層に用いたCIS薄膜系太陽電池は、通常、以下の手順により製造される。
図4は、従来のCIS薄膜系太陽電池の製造工程を説明する図である。初めに、絶縁性の基板1上に短冊状の裏面電極層2を形成した後(図4(a))、スパッタリング法等により結晶質半導体層3を形成し、(図4(b))、続いて、メカニカルパターン法により結晶質半導体層3をストライプ状に除去し(図4(c))、その後、透明表面電極層4を形成し(図4(d))、最後に、透明表面電極層4を短冊状に分割する(図4(e))。
太陽電池の大面積化を行うためには、分割された各単位セルの透明表面電極層4が隣接する単位セルの裏面電極層2と接続することによって、各単位セルが直列に接続される。
By the way, a CIS thin film solar cell using a chalcopyrite type compound semiconductor for a light absorption layer is usually manufactured by the following procedure.
FIG. 4 is a diagram for explaining a manufacturing process of a conventional CIS thin film solar cell. First, after the strip-shaped back electrode layer 2 is formed on the insulating substrate 1 (FIG. 4A), the crystalline semiconductor layer 3 is formed by sputtering or the like (FIG. 4B), Subsequently, the crystalline semiconductor layer 3 is striped by a mechanical pattern method (FIG. 4C), and then a transparent surface electrode layer 4 is formed (FIG. 4D). Finally, a transparent surface electrode is formed. The layer 4 is divided into strips (FIG. 4E).
In order to increase the area of the solar cell, the unit cell is connected in series by connecting the transparent surface electrode layer 4 of each divided unit cell to the back electrode layer 2 of the adjacent unit cell.

しかし、上述した製造方法は、複数回の成膜、パターンニング操作を繰り返す必要があるので、工程数が多く、製造コストが高くなるという問題がある。
本発明の目的は、高性能な光学変換素子セルを用いた集積化光学変換装置と、少ない工程数と低コストである集積化光学変換装置の製造方法を提供することにある。
However, the above-described manufacturing method has a problem that the number of steps is large and the manufacturing cost increases because it is necessary to repeat the film formation and patterning operations a plurality of times.
An object of the present invention is to provide an integrated optical conversion device using a high-performance optical conversion element cell and a method for manufacturing an integrated optical conversion device with a small number of steps and low cost.

本発明によれば、共通の基板上に形成された複数の単位セル素子を有する光学変換素子セルであって、基板と、基板上に所定の幅を有する分離溝により絶縁分離され電気的に直列に接続された複数の単位セル素子と、を有し、単位セル素子は、基板上に形成され裏面電極取り出し部が設けられた裏面電極層と、裏面電極層の裏面電極取り出し部以外の部分の表面上に形成され光照射によりpn結合を生じる結晶質半導体層と、結晶質半導体層上に形成されグリッド電極が設けられた透明表面電極層と、から構成されることを特徴とする光学変換素子セルが提供される。
ここで、結晶質半導体層は、少なくとも銅(Cu)、インジウム(In)及びセレン(Se)を含むカルコパイライト構造を有するCu−In−Se系半導体材料からなる薄膜から構成されることが好ましい。
また、共通の基板上に形成される単位セル素子と分離溝を隔てて隣接する他の単位セル素子とは、単位セル素子にそれぞれ設けた裏面電極取り出し部が互いに180度回転した位置になるように配置されていることが好ましい。
According to the present invention, there is provided an optical conversion element cell having a plurality of unit cell elements formed on a common substrate, which is electrically isolated in series by a substrate and a separation groove having a predetermined width on the substrate. A plurality of unit cell elements connected to the back surface electrode layer formed on the substrate and provided with a back electrode extraction portion; and a portion of the back electrode layer other than the back electrode extraction portion An optical conversion element comprising: a crystalline semiconductor layer which is formed on a surface and generates a pn bond by light irradiation; and a transparent surface electrode layer formed on the crystalline semiconductor layer and provided with a grid electrode A cell is provided.
Here, the crystalline semiconductor layer is preferably composed of a thin film made of a Cu—In—Se based semiconductor material having a chalcopyrite structure containing at least copper (Cu), indium (In), and selenium (Se).
Further, the unit cell element formed on the common substrate and the other unit cell elements adjacent to each other with the separation groove interposed therebetween are positioned so that the back electrode extraction portions provided in the unit cell elements are rotated 180 degrees relative to each other. It is preferable to arrange | position.

本発明によれば、上記の光学変換素子セルを複数個備え、複数個の光学変換素子セルが電気的に直列に接続されることにより集積化されたことを特徴とする集積化光学変換装置が提供される。   According to the present invention, there is provided an integrated optical conversion device comprising a plurality of the above-described optical conversion element cells, wherein the plurality of optical conversion element cells are integrated by being electrically connected in series. Provided.

次に、本発明によれば、共通の基板上に複数の単位セル素子を有する光学変換素子セルの製造方法であって、基板上に、裏面電極層と結晶質半導体層と透明表面電極層とを順に積層する薄膜積層工程と、形成された裏面電極層の一部に裏面電極取り出し部を形成する電極取り出し部形成工程と、基板上に積層された透明表面電極層から基板に達する分離溝を設け、分離溝の所定の幅を隔てて絶縁分離された複数の単位セル素子を形成する単位セル素子分離工程と、形成された単位セル素子間を電気的に直列に接続する接続工程と、を有することを特徴とする光学変換素子セルの製造方法が提供される。   Next, according to the present invention, there is provided a method for manufacturing an optical conversion element cell having a plurality of unit cell elements on a common substrate, wherein a back electrode layer, a crystalline semiconductor layer, and a transparent surface electrode layer are formed on the substrate. A thin film laminating step for sequentially laminating, an electrode extracting portion forming step for forming a back electrode extracting portion in a part of the formed back electrode layer, and a separation groove reaching the substrate from the transparent surface electrode layer laminated on the substrate A unit cell element isolation step for forming a plurality of unit cell elements insulated and separated with a predetermined width of the isolation groove; and a connection step for electrically connecting the formed unit cell elements in series. A method for manufacturing an optical conversion element cell is provided.

ここで、本発明が適用される光学変換素子セルの製造方法において、電極取り出し部形成工程は、形成された裏面電極層の一部を防着マスクで被覆した後、裏面電極層上に、結晶質半導体層と透明表面電極層とを順に積層することが好ましい。   Here, in the method of manufacturing an optical conversion element cell to which the present invention is applied, the electrode extraction portion forming step includes coating a part of the formed back electrode layer with an adhesion mask, and then forming a crystal on the back electrode layer. It is preferable to laminate | stack a quality semiconductor layer and a transparent surface electrode layer in order.

また、本発明が適用される光学変換素子セルの製造方法において、電極取り出し部形成工程は、基板上に積層された裏面電極層と結晶質半導体層と透明表面電極層とから、結晶質半導体層と透明表面電極層の一部を除去することが好ましい。   Further, in the method of manufacturing an optical conversion element cell to which the present invention is applied, the electrode extraction portion forming step includes a crystalline semiconductor layer comprising a back electrode layer, a crystalline semiconductor layer, and a transparent surface electrode layer laminated on the substrate. It is preferable to remove a part of the transparent surface electrode layer.

本発明によれば、光学変換素子セルが集積化された集積化光学変換装置の製造方法であって、上記光学変換素子セルの製造方法により製造された複数個の光学変換素子セルを電気的に直列に接続することにより集積化することを特徴とする集積化光学変換装置の製造方法が提供される。   According to the present invention, there is provided a method of manufacturing an integrated optical conversion device in which optical conversion element cells are integrated, and a plurality of optical conversion element cells manufactured by the method of manufacturing an optical conversion element cell are electrically connected. There is provided a method of manufacturing an integrated optical conversion device, wherein the integrated optical conversion devices are integrated by connecting them in series.

本発明によれば、化合物半導体薄膜を有する高性能な光学変換素子セルと、これを直列に接続した集積化光学変換装置が、少ない工程数と低コストで製造することができる。   ADVANTAGE OF THE INVENTION According to this invention, the high performance optical conversion element cell which has a compound semiconductor thin film, and the integrated optical conversion apparatus which connected this in series can be manufactured with few processes and low cost.

以下、本発明の実施の形態について詳細に説明する。尚、本発明は、以下の実施の形態に限定されるものではなく、その要旨の範囲内で種々変形して実施することが出来る。また、使用する図面は本実施の形態を説明するためのものであり、実際の大きさを表すものではない。   Hereinafter, embodiments of the present invention will be described in detail. In addition, this invention is not limited to the following embodiment, It can implement by changing variously within the range of the summary. Further, the drawings to be used are for explaining the present embodiment and do not represent the actual size.

図1は、光学変換素子セル20の一例を説明する図である。図1に示すように、光学変換素子セル20は、共通の基板8上に形成された4個の単位セル素子(15a,15b,15c,15d)を有する。これらの単位セル素子(15a,15b,15c,15d)は、基板8上に設けられた3本の分離溝(14a,14b,14c)により所定の間隔を隔て絶縁分離されている。
分離溝(14a,14b,14c)の幅は、特に限定されないが、本実施の形態では約100μm程度である。
FIG. 1 is a diagram illustrating an example of the optical conversion element cell 20. As shown in FIG. 1, the optical conversion element cell 20 has four unit cell elements (15a, 15b, 15c, 15d) formed on a common substrate 8. These unit cell elements (15a, 15b, 15c, 15d) are insulated and separated at predetermined intervals by three separation grooves (14a, 14b, 14c) provided on the substrate 8.
The width of the separation grooves (14a, 14b, 14c) is not particularly limited, but is about 100 μm in the present embodiment.

次に、単位セル素子(15a,15b,15c,15d)について説明する。
共通の基板8上に形成された単位セル素子(15a,15b,15c,15d)は、それぞれ、基板8上に形成され裏面電極取り出し部(91a,91c)が設けられた裏面電極層(9a,9b,9c,9d)と、裏面電極層(9a,9b,9c,9d)の裏面電極取り出し部(91a,91c)以外の部分の表面上に形成され光照射によりpn結合を生じる結晶質半導体層(10a,10b,10c,10d)と、結晶質半導体層(10a,10b,10c,10d)上に形成されグリッド電極(112a,112b,112c,112d)が設けられた透明表面電極層(11a,11b,11c,11d)と、から構成されている。また、裏面電極取り出し部(91a,91c)には、取り出し電極(92a,92c)がそれぞれ形成されている。
尚、図示しないが、単位セル素子(15b,15d)の裏面電極層(9b,9d)にも、それぞれ裏面電極取り出し部が設けられており、各裏面電極取り出し部には、それぞれ取り出し電極が形成されている。
Next, the unit cell elements (15a, 15b, 15c, 15d) will be described.
The unit cell elements (15a, 15b, 15c, 15d) formed on the common substrate 8 are respectively formed on the substrate 8 and provided with back electrode layers (9a, 91c) provided with back electrode extraction portions (91a, 91c). 9b, 9c, 9d) and a crystalline semiconductor layer which is formed on the surface of the back electrode layer (9a, 9b, 9c, 9d) other than the back electrode take-out portion (91a, 91c) and generates a pn bond by light irradiation (10a, 10b, 10c, 10d) and transparent surface electrode layers (11a, 10b, 112c, 112d) formed on the crystalline semiconductor layers (10a, 10b, 10c, 10d) and provided with grid electrodes (112a, 112b, 112c, 112d) 11b, 11c, 11d). In addition, extraction electrodes (92a, 92c) are formed in the back electrode extraction portions (91a, 91c), respectively.
Although not shown, the back electrode layers (9b, 9d) of the unit cell elements (15b, 15d) are also provided with back electrode take-out portions, and take-out electrodes are formed in the back electrode take-out portions. Has been.

図1に示すように、単位セル素子(15a,15b,15c,15d)にそれぞれ設けられた裏面電極取り出し部(91a,91c)の配置は、効率的に電流を取り出せるように、各単位セル素子(15a,15b,15c,15d)の端部に配置される。
また同様に、単位セル素子(15a,15b,15c,15d)の透明表面電極層(11a,11b,11c,11d)の端部に、それぞれグリッド電極(112a,112b,112c,112d)が設けられる。
As shown in FIG. 1, the arrangement of the back electrode extraction portions (91a, 91c) provided in the unit cell elements (15a, 15b, 15c, 15d) is such that each unit cell element can efficiently extract current. It arrange | positions at the edge part of (15a, 15b, 15c, 15d).
Similarly, grid electrodes (112a, 112b, 112c, 112d) are provided at the ends of the transparent surface electrode layers (11a, 11b, 11c, 11d) of the unit cell elements (15a, 15b, 15c, 15d), respectively. .

さらに、例えば、単位セル素子15aと分離溝14aを隔てて隣接する他の単位セル素子15bとは、単位セル素子15aに設けた裏面電極取り出し部91aと、単位セル素子15bに設けた裏面電極取り出し部(図示せず)が互いに180度回転した位置になるように配置されている。   Further, for example, the unit cell element 15a and the other unit cell element 15b adjacent to each other with the separation groove 14a interposed therebetween are a back electrode extraction portion 91a provided in the unit cell element 15a and a back electrode extraction provided in the unit cell element 15b. The parts (not shown) are arranged so as to be rotated 180 degrees relative to each other.

単位セル素子15aの裏面電極取り出し部91aに形成した取り出し電極92aと単位セル素子15bの透明表面電極層11bに形成されたグリッド電極112bとを金属ワイヤ12abで接続することにより、単位セル素子15aと単位セル素子15bとは電気的に直列に接続される。   By connecting the extraction electrode 92a formed on the back surface electrode extraction portion 91a of the unit cell element 15a and the grid electrode 112b formed on the transparent surface electrode layer 11b of the unit cell element 15b with a metal wire 12ab, the unit cell element 15a The unit cell element 15b is electrically connected in series.

同様に、単位セル素子15bの取り出し電極(図示せず)と単位セル素子15cの透明表面電極層11cに形成されたグリッド電極112cとを金属ワイヤ12bcで接続することにより、単位セル素子15bと単位セル素子15cとが電気的に直列に接続される。さらに、単位セル素子15cの取り出し電極92cと単位セル素子15dの透明表面電極層11dに形成されたグリッド電極112dとを金属ワイヤ12cdで接続することにより、単位セル素子15cと単位セル素子15dとが電気的に直列に接続される。   Similarly, the unit cell element 15b is connected to the unit cell element 15b by connecting the take-out electrode (not shown) of the unit cell element 15b and the grid electrode 112c formed on the transparent surface electrode layer 11c of the unit cell element 15c with a metal wire 12bc. The cell element 15c is electrically connected in series. Further, the unit cell element 15c and the unit cell element 15d are connected by connecting the extraction electrode 92c of the unit cell element 15c and the grid electrode 112d formed on the transparent surface electrode layer 11d of the unit cell element 15d with a metal wire 12cd. Electrically connected in series.

このように、共通の基板8上に形成され、分離溝(14a,14b,14c)によって絶縁分離された4個の単位セル素子(15a,15b,15c,15d)が電気的に直列に接続され、光学変換素子セル20が構成される。
さらに、光学変換素子セル20と同様な構造を有する複数の他の光学変換素子セルを、電気的に直列に接続することにより集積化された集積化光学変換装置(図示せず)が得られる。
In this way, the four unit cell elements (15a, 15b, 15c, 15d) formed on the common substrate 8 and insulated and separated by the separation grooves (14a, 14b, 14c) are electrically connected in series. The optical conversion element cell 20 is configured.
Furthermore, an integrated optical conversion device (not shown) is obtained by electrically connecting a plurality of other optical conversion element cells having the same structure as the optical conversion element cell 20 in series.

次に、光学変換素子セル20の構成要素について説明する。
基板8を構成する材料としては、例えば、ステンレス等の金属フィルム、有機フィルム、ガラス等が挙げられる。基板8の大きさは特に限定されないが、本実施の形態では縦×横が10cm×10cmであり、厚さは、0.5mmである。
裏面電極層(9a,9b,9c,9d)を構成する材料としては、金属が好ましく、例えば、Mo、Ti、Cr、Al、Ag、Au、CuおよびPtから選択された少なくとも1つの金属またはこれらの合金が挙げられる。裏面電極層(9a,9b,9c,9d)は、本実施の形態では厚さ0.3μm程度の金属薄膜である。裏面電極層(9a,9b,9c,9d)は、例えば、蒸着法、スパッタ法、CVD法(化学気相成長法:Chemical Vapor Deposition)等によって形成される。
Next, components of the optical conversion element cell 20 will be described.
As a material which comprises the board | substrate 8, metal films, such as stainless steel, an organic film, glass etc. are mentioned, for example. Although the magnitude | size of the board | substrate 8 is not specifically limited, In this Embodiment, length x width is 10 cm x 10 cm, and thickness is 0.5 mm.
The material constituting the back electrode layer (9a, 9b, 9c, 9d) is preferably a metal, for example, at least one metal selected from Mo, Ti, Cr, Al, Ag, Au, Cu and Pt, or these These alloys are mentioned. The back electrode layers (9a, 9b, 9c, 9d) are metal thin films having a thickness of about 0.3 μm in the present embodiment. The back electrode layers (9a, 9b, 9c, 9d) are formed by, for example, a vapor deposition method, a sputtering method, a CVD method (Chemical Vapor Deposition), or the like.

結晶質半導体層(10a,10b,10c,10d)は、例えば、周期表IB族、IIIB族、VIB族の元素を含むカルコパイライト型化合物半導体が挙げられる。本実施の形態では、銅(Cu)、インジウム(In)及びセレン(Se)を含むカルコパイライト構造を有するCu−In−Se系半導体材料により構成されることが好ましい。
ここで、Cu−In−Se系半導体材料を採用する場合、裏面電極層(9a,9b,9c,9d)側に、p型半導体を形成しやすいCuとSeとの混合物からなるp型半導体形成用前駆体層を成膜し、次に、透明表面電極層(11a,11b,11c,11d)側に、n型半導体を形成しやすいInとSeとの混合物からなるn型半導体形成用前駆体層を成膜することが好ましい。p型半導体形成用前駆体層とn型半導体形成用前駆体層とは、相互に溶融拡散することにより、良好な結晶性を有する結晶質半導体層(10a,10b,10c,10d)が生成し、pn接合を形成させることができる。
結晶質半導体層(10a,10b,10c,10d)の厚さは、本実施の形態では、0.3μm〜5μmの範囲内である。
Examples of the crystalline semiconductor layers (10a, 10b, 10c, 10d) include chalcopyrite type compound semiconductors containing elements from groups IB, IIIB, and VIB of the periodic table. In this embodiment mode, it is preferably formed using a Cu—In—Se semiconductor material having a chalcopyrite structure including copper (Cu), indium (In), and selenium (Se).
Here, when a Cu—In—Se based semiconductor material is employed, a p-type semiconductor formed of a mixture of Cu and Se that is easy to form a p-type semiconductor on the back electrode layer (9a, 9b, 9c, 9d) side. N-type semiconductor forming precursor comprising a mixture of In and Se that is easy to form an n-type semiconductor on the transparent surface electrode layer (11a, 11b, 11c, 11d) side. It is preferable to form a layer. The p-type semiconductor forming precursor layer and the n-type semiconductor forming precursor layer melt and diffuse to each other, thereby producing crystalline semiconductor layers (10a, 10b, 10c, 10d) having good crystallinity. A pn junction can be formed.
The thickness of the crystalline semiconductor layers (10a, 10b, 10c, 10d) is in the range of 0.3 μm to 5 μm in the present embodiment.

透明表面電極層(11a,11b,11c,11d)は、本実施の形態では、ITO(Indium Tin Oxide)、SiO、ZnOから選択された少なくとも1つを含む金属材料を用い、スパッタリングまたは蒸着法により成膜することが好ましい。透明表面電極層(11a,11b,11c,11d)の厚さは、本実施の形態では、約0.6μmである。
グリット電極(112a,112b,112c,112d)は、例えば、Al、Ag、Au、CuおよびPtから選択された少なくとも1つの金属またはこれらの合金を含む櫛型状の金属電極として形成される。
取り出し電極(92a,92c)(但し、図示しないが、裏面電極層9b,9dに設けられた取り出し電極を含む)は、例えば、Al、Ag、CuおよびPtから選択された少なくとも1つの金属またはこれらの合金を用いて形成する。
金属ワイヤ(12ab、12bc、12cd)は、例えば、Au、Al等を用いることができる。
In the present embodiment, the transparent surface electrode layers (11a, 11b, 11c, and 11d) are made of a metal material including at least one selected from ITO (Indium Tin Oxide), SiO 2 , and ZnO, and are formed by sputtering or vapor deposition. It is preferable to form a film by. The thickness of the transparent surface electrode layers (11a, 11b, 11c, 11d) is about 0.6 μm in the present embodiment.
The grit electrodes (112a, 112b, 112c, 112d) are formed as comb-shaped metal electrodes including at least one metal selected from Al, Ag, Au, Cu, and Pt, or an alloy thereof, for example.
The extraction electrodes (92a, 92c) (however, although not shown, include the extraction electrodes provided on the back electrode layers 9b, 9d) are, for example, at least one metal selected from Al, Ag, Cu, and Pt, or these It is formed using the alloy.
As the metal wires (12ab, 12bc, 12cd), for example, Au, Al, or the like can be used.

次に、光学変換素子セル20の製造方法について説明する。図1と同じ構成については同じ符号を用い、その説明を省略する。
図2は、光学変換素子セル20の製造方法の第1の実施形態を説明する図である。図2(a)に示すように、基板8上にスパッタリングにより金属薄膜からなる裏面電極層9を成膜する。次に、図2(b)の(1)及び(2)に示すように、形成された裏面電極層9の一部を防着マスク(16a,16b,16c,16d)で被覆した後、裏面電極層9上に、結晶質半導体層を形成するための半導体前駆体層101と透明表面電極層11とをスパッタリングにより順に積層する。本実施の形態では、半導体前駆体層101は、複数のp型半導体形成用前駆体層とn型半導体形成用前駆体層とを積層させて成膜する。
尚、図2(b)の(2)は、防着マスク(16a,16b,16c,16d)の位置を説明する平面図である。本実施の形態では、防着マスク(16a,16b,16c,16d)を精度よく位置合わせする必要はあるが、パターンニングを何度も行う必要はなくなる。
Next, a method for manufacturing the optical conversion element cell 20 will be described. The same components as those in FIG.
FIG. 2 is a diagram for explaining the first embodiment of the method for manufacturing the optical conversion element cell 20. As shown in FIG. 2A, a back electrode layer 9 made of a metal thin film is formed on the substrate 8 by sputtering. Next, as shown in (1) and (2) of FIG. 2B, a part of the formed back electrode layer 9 is covered with a deposition mask (16a, 16b, 16c, 16d), and then the back surface On the electrode layer 9, a semiconductor precursor layer 101 for forming a crystalline semiconductor layer and a transparent surface electrode layer 11 are sequentially laminated by sputtering. In this embodiment, the semiconductor precursor layer 101 is formed by stacking a plurality of p-type semiconductor forming precursor layers and n-type semiconductor forming precursor layers.
In addition, (2) of FIG.2 (b) is a top view explaining the position of a deposition mask (16a, 16b, 16c, 16d). In the present embodiment, the deposition masks (16a, 16b, 16c, 16d) need to be aligned with high precision, but it is not necessary to perform patterning many times.

続いて、図2(c)の(1)及び(2)に示すように、YAGレーザーにより透明表面電極層11(図2(b)参照)から裏面電極層9(図2(b)参照)までエッチングし、所定の幅を有する3本の分離溝(14a,14b,14c)を形成し、分離溝(14a,14b,14c)により絶縁分離された4個の単位セル素子(15a,15b,15c,15d)を形成する。その後、赤外線を一定時間照射し、半導体前駆体層101を構成する複数の前駆体層と相互に溶融拡散させ、pn接合が形成される結晶質半導体層(10d)を調製する。   Subsequently, as shown in (1) and (2) of FIG. 2 (c), the transparent surface electrode layer 11 (see FIG. 2 (b)) to the back electrode layer 9 (see FIG. 2 (b)) using a YAG laser. Are etched to form three separation grooves (14a, 14b, 14c) having a predetermined width, and four unit cell elements (15a, 15b, 14c) insulated and separated by the separation grooves (14a, 14b, 14c). 15c, 15d). Thereafter, infrared rays are irradiated for a certain period of time, and a plurality of precursor layers constituting the semiconductor precursor layer 101 are mutually melted and diffused to prepare a crystalline semiconductor layer (10d) in which a pn junction is formed.

次に、図2(d)の(1)及び(2)に示すように、単位セル素子(15a,15b,15c,15d)の取り出し電極と隣接する他の単位セル素子のグリッド電極とを金属ワイヤ(12ab,12bc,12cd)により結合し、4個の単位セル素子(15a,15b,15c,15d)が電気的に直列に接続した光学変換素子セルを調製する。   Next, as shown in (1) and (2) of FIG. 2 (d), the extraction electrode of the unit cell element (15a, 15b, 15c, 15d) and the grid electrode of another adjacent unit cell element are made of metal. An optical conversion element cell in which four unit cell elements (15a, 15b, 15c, 15d) are electrically connected in series is prepared by bonding with wires (12ab, 12bc, 12cd).

次に、光学変換素子セル20の他の製造方法について説明する。図1と同じ構成については同じ符号を用い、その説明を省略する。
図3は、光学変換素子セル20の製造方法の第2の実施形態を説明する図である。図2と同じ構成については同じ符号を用い、その説明を省略する。
先ず、図3(a)に示すように、基板8上に、スパッタリングにより、金属薄膜からなる裏面電極層9と結晶質半導体層を形成するための半導体前駆体層101と透明表面電極層11とを順に積層する。
Next, another manufacturing method of the optical conversion element cell 20 will be described. The same components as those in FIG.
FIG. 3 is a diagram for explaining a second embodiment of the method for manufacturing the optical conversion element cell 20. The same components as those in FIG.
First, as shown in FIG. 3A, a semiconductor precursor layer 101 and a transparent surface electrode layer 11 for forming a back electrode layer 9 made of a metal thin film and a crystalline semiconductor layer on a substrate 8 by sputtering. Are sequentially stacked.

次に、図3(b)の(1)及び(2)に示すように、形成された透明表面電極層11の表面の一部を防着マスク(17a,17b,17c,17d)で被覆した後、レーザカッティングまたはエッチングにより、積層された透明表面電極層11と半導体前駆体層101の、後述する分離溝と裏面電極取り出し部を形成する部分に相当する範囲を取り除く。   Next, as shown in (1) and (2) of FIG. 3 (b), a part of the surface of the formed transparent surface electrode layer 11 was covered with a deposition mask (17a, 17b, 17c, 17d). Thereafter, by laser cutting or etching, a range corresponding to a portion of the laminated transparent surface electrode layer 11 and semiconductor precursor layer 101 that forms a separation groove and a back electrode extraction portion described later is removed.

続いて、図3(c)の(1)及び(2)に示すように、裏面電極層9の表面の裏面電極取り出し部を形成する部分(18a,18b,18c,18d)を残し、さらに裏面電極層9の分離溝を形成する部分を取り除き、所定の幅を有する3本の分離溝(14a,14b,14c)を形成し、4個の単位セル素子に絶縁分離する。
その後、赤外線を一定時間照射し、半導体前駆体層101を構成する複数の前駆体層と相互に溶融拡散させ、pn接合が形成される結晶質半導体層(10d)を調製する。
Subsequently, as shown in (1) and (2) of FIG. 3 (c), the portions (18a, 18b, 18c, 18d) for forming the back electrode extraction portion on the surface of the back electrode layer 9 are left, and the back surface The part of the electrode layer 9 where the separation groove is formed is removed, three separation grooves (14a, 14b, 14c) having a predetermined width are formed, and the unit cell elements are insulated and separated.
Thereafter, infrared rays are irradiated for a certain period of time, and a plurality of precursor layers constituting the semiconductor precursor layer 101 are mutually melted and diffused to prepare a crystalline semiconductor layer (10d) in which a pn junction is formed.

次に、図3(d)の(1)及び(2)に示すように、単位セル素子(15a,15b,15c,15d)の取り出し電極と隣接する他の単位セル素子のグリッド電極とを金属ワイヤ(12ab,12bc,12cd)により結合し、4個の単位セル素子(15a,15b,15c,15d)が電気的に直列に接続した光学変換素子セルが調製される。   Next, as shown in (1) and (2) of FIG. 3 (d), the extraction electrode of the unit cell element (15a, 15b, 15c, 15d) and the grid electrode of another adjacent unit cell element are made of metal. An optical conversion element cell is prepared in which four unit cell elements (15a, 15b, 15c, 15d) are electrically connected in series by being coupled by wires (12ab, 12bc, 12cd).

以下に、実施例に基づき本発明をさらに詳細に説明する。なお、本発明は以下の実施例に限定されない。
以下の手順により、カルコパイライト構造を有するCu−In−Se系半導体材料を用い、4個の単位セル素子を有する光学変換素子セルを調製した。さらに、調製した光学変換素子セルの16個を電気的に直列に接続することにより集積化された集積化光学変換装置を調製した。
Below, based on an Example, this invention is demonstrated further in detail. The present invention is not limited to the following examples.
The optical conversion element cell which has four unit cell elements was prepared with the following procedures using the Cu-In-Se type | system | group semiconductor material which has a chalcopyrite structure. Furthermore, an integrated optical conversion device integrated was prepared by electrically connecting 16 of the prepared optical conversion element cells in series.

(光学変換素子セルの調製)
以下の操作により、スパッタリングにより、基板上に、裏面電極層、半導体前駆体層、透明表面電極層を一貫成膜した。先ず、真空槽内でガラス基板(縦×横:10cm×10cm)上にスパッタリングにより、裏面電極層としてMo薄膜(膜厚0.3μm)を成膜した。続いて、真空槽内で、形成した裏面電極層の裏面電極取り出し部を形成する部分に防着マスクを被覆した後、スパッタリングによりp型半導体形成用前駆体層とn型半導体形成用前駆体層とを成膜(合計膜厚0.5μm)した。さらに、その上にスパッタリングにより透明表面電極層として、Al−Zn−O薄膜(膜厚0.6μm)を成膜した。
(Preparation of optical conversion element cell)
Through the following operations, a back electrode layer, a semiconductor precursor layer, and a transparent surface electrode layer were continuously formed on the substrate by sputtering. First, a Mo thin film (film thickness: 0.3 μm) was formed as a back electrode layer by sputtering on a glass substrate (vertical × horizontal: 10 cm × 10 cm) in a vacuum chamber. Subsequently, after depositing a deposition mask on the portion of the back electrode layer formed in the vacuum chamber where the back electrode extraction portion is to be formed, a p-type semiconductor forming precursor layer and an n-type semiconductor forming precursor layer are formed by sputtering. Were deposited (total film thickness 0.5 μm). Further, an Al—Zn—O thin film (film thickness: 0.6 μm) was formed thereon as a transparent surface electrode layer by sputtering.

続いて、透明表面電極層側から赤外線を一定時間照射し、p型半導体形成用前駆体層とn型半導体形成用前駆体層とを相互に溶融拡散させることにより、pn接合が形成される結晶質半導体層を調製した。その後、透明表面電極層上に集電のための櫛形状のグリッド電極を、また、裏面電極層の裏面電極取り出し部に取り出し電極を、それぞれ、スパッタリングまたは導電性ペーストを印刷することにより設置した。   Subsequently, a crystal in which a pn junction is formed by irradiating infrared rays from the transparent surface electrode layer side for a certain period of time and melting and diffusing the p-type semiconductor forming precursor layer and the n-type semiconductor forming precursor layer mutually. A quality semiconductor layer was prepared. Thereafter, a comb-shaped grid electrode for collecting current was placed on the transparent surface electrode layer, and a take-out electrode was placed on the back-side electrode take-out portion of the back-side electrode layer by printing with sputtering or conductive paste, respectively.

次に、YAGレーザーにより透明表面電極層から裏面電極層までエッチングし、幅100μmの分離溝を3本形成し、分離溝により絶縁分離された4個の単位セル素子を形成した。続いて、単位セル素子の取り出し電極と隣接する他の単位セル素子のグリッド電極とを金属ワイヤにより結合し、4個の単位セル素子が電気的に直列に接続した光学変換素子セルを調製した。
さらに、調製した16個の光学変換素子セルを電気的に直列に接続して集積し、集積化光学変換装置を調製した。
Next, etching was performed from the transparent front electrode layer to the back electrode layer with a YAG laser to form three separation grooves having a width of 100 μm, and four unit cell elements insulated and separated by the separation grooves were formed. Subsequently, an extraction electrode of the unit cell element and a grid electrode of another adjacent unit cell element were coupled by a metal wire to prepare an optical conversion element cell in which four unit cell elements were electrically connected in series.
Further, the 16 optical conversion element cells prepared were electrically connected in series and integrated to prepare an integrated optical conversion device.

4個の単位セル素子が電気的に直列に接続した光学変換素子セルの変換効率は、2端子測定により測定した結果、7.3%であった。
また、16個の光学変換素子セルを電気的に直列に接続して集積した集積化光学変換装置の変換効率は、7.4%であった。
上述したように、基板上に、裏面電極層、半導体前駆体層、透明表面電極層を一貫成膜することにより、集積化光学変換装置の製造工程数を削減することができる。そして、Cu−In−Se系半導体材料を用いた高性能の集積化光学変換装置が得られることが分かる。
The conversion efficiency of the optical conversion element cell in which the four unit cell elements were electrically connected in series was 7.3% as a result of measurement by two-terminal measurement.
Further, the conversion efficiency of the integrated optical conversion device in which 16 optical conversion element cells were electrically connected in series and integrated was 7.4%.
As described above, by consistently forming the back electrode layer, the semiconductor precursor layer, and the transparent surface electrode layer on the substrate, the number of manufacturing steps of the integrated optical conversion device can be reduced. It can be seen that a high-performance integrated optical conversion device using a Cu—In—Se based semiconductor material can be obtained.

光学変換素子セルの一例を説明する図である。It is a figure explaining an example of an optical conversion element cell. 光学変換素子セルの製造方法の第1の実施形態を説明する図である。It is a figure explaining 1st Embodiment of the manufacturing method of an optical conversion element cell. 光学変換素子セルの製造方法の第2の実施形態を説明する図である。It is a figure explaining 2nd Embodiment of the manufacturing method of an optical conversion element cell. 従来のCIS薄膜系太陽電池の製造工程を説明する図である。It is a figure explaining the manufacturing process of the conventional CIS thin film type solar cell.

符号の説明Explanation of symbols

1,8…基板、2,9,9a,9b,9c,9d…裏面電極層、3,10a,10b,10c,10d…結晶質半導体層、4,11a,11b,11c,11d…透明表面電極層、12ab,12bc,12cd…金属ワイヤ、14a,14b,14c…分離溝、15a,15b,15c,15d…単位セル素子、20…光学変換素子セル、91a,91c…裏面電極取り出し部、112a,112b,112c,112d…グリッド電極 DESCRIPTION OF SYMBOLS 1,8 ... Substrate, 2, 9, 9a, 9b, 9c, 9d ... Back electrode layer, 3, 10a, 10b, 10c, 10d ... Crystalline semiconductor layer, 4, 11a, 11b, 11c, 11d ... Transparent surface electrode Layer, 12ab, 12bc, 12cd ... metal wire, 14a, 14b, 14c ... separation groove, 15a, 15b, 15c, 15d ... unit cell element, 20 ... optical conversion element cell, 91a, 91c ... back electrode extraction part, 112a, 112b, 112c, 112d ... grid electrodes

Claims (8)

共通の基板上に形成された複数の単位セル素子を有する光学変換素子セルであって、
基板と、
前記基板上に所定の幅を有する分離溝により絶縁分離され電気的に直列に接続された複数の単位セル素子と、を有し、
前記単位セル素子は、
前記基板上に形成され裏面電極取り出し部が設けられた裏面電極層と、
前記裏面電極層の前記裏面電極取り出し部以外の部分の表面上に形成され光照射によりpn結合を生じる結晶質半導体層と、
前記結晶質半導体層上に形成されグリッド電極が設けられた透明表面電極層と、から構成される
ことを特徴とする光学変換素子セル。
An optical conversion element cell having a plurality of unit cell elements formed on a common substrate,
A substrate,
A plurality of unit cell elements electrically isolated and separated in series by a separation groove having a predetermined width on the substrate;
The unit cell element is
A back electrode layer formed on the substrate and provided with a back electrode take-out portion;
A crystalline semiconductor layer that is formed on the surface of the back electrode layer other than the back electrode take-out portion and generates a pn bond by light irradiation;
An optical conversion element cell comprising: a transparent surface electrode layer formed on the crystalline semiconductor layer and provided with a grid electrode.
前記結晶質半導体層は、少なくとも銅(Cu)、インジウム(In)及びセレン(Se)を含むカルコパイライト構造を有するCu−In−Se系半導体材料からなる薄膜から構成されることを特徴とする請求項1に記載の光学変換素子セル。   The crystalline semiconductor layer is composed of a thin film made of a Cu-In-Se based semiconductor material having a chalcopyrite structure containing at least copper (Cu), indium (In), and selenium (Se). Item 4. The optical conversion element cell according to Item 1. 前記単位セル素子と前記分離溝を隔てて隣接する他の単位セル素子とは、当該単位セル素子にそれぞれ設けた前記裏面電極取り出し部が互いに180度回転した位置になるように配置されていることを特徴とする請求項1又は2に記載の光学変換素子セル。   The unit cell element and another unit cell element adjacent to each other with the separation groove interposed therebetween are arranged such that the back surface electrode take-out portions provided in the unit cell element are rotated 180 degrees from each other. The optical conversion element cell according to claim 1 or 2. 請求項1乃至3のいずれか1項に記載の光学変換素子セルを複数個備え、
複数個の前記光学変換素子セルが電気的に直列に接続されることにより集積化されたことを特徴とする集積化光学変換装置。
A plurality of the optical conversion element cells according to any one of claims 1 to 3,
An integrated optical conversion device, wherein a plurality of the optical conversion element cells are integrated by being electrically connected in series.
共通の基板上に複数の単位セル素子を有する光学変換素子セルの製造方法であって、
基板上に、裏面電極層と結晶質半導体層と透明表面電極層とを順に積層する薄膜積層工程と、
形成された前記裏面電極層の一部に裏面電極取り出し部を形成する電極取り出し部形成工程と、
前記基板上に積層された前記透明表面電極層から当該基板に達する分離溝を設け、当該分離溝の所定の幅を隔てて絶縁分離された複数の単位セル素子を形成する単位セル素子分離工程と、
形成された前記単位セル素子間を電気的に直列に接続する接続工程と、を有する
ことを特徴とする光学変換素子セルの製造方法。
A method of manufacturing an optical conversion element cell having a plurality of unit cell elements on a common substrate,
A thin film laminating step for sequentially laminating a back electrode layer, a crystalline semiconductor layer, and a transparent surface electrode layer on the substrate;
An electrode extraction part forming step of forming a back electrode extraction part in a part of the formed back electrode layer;
A unit cell element separation step of providing a separation groove reaching the substrate from the transparent surface electrode layer laminated on the substrate and forming a plurality of unit cell elements insulated and separated with a predetermined width of the separation groove; ,
And a connecting step of electrically connecting the formed unit cell elements in series with each other.
前記電極取り出し部形成工程は、形成された前記裏面電極層の一部を防着マスクで被覆した後、当該裏面電極層上に、前記結晶質半導体層と前記透明表面電極層とを順に積層することを特徴とする請求項5に記載の光学変換素子セルの製造方法。   In the electrode extraction portion forming step, a part of the formed back electrode layer is covered with an adhesion mask, and then the crystalline semiconductor layer and the transparent surface electrode layer are sequentially laminated on the back electrode layer. The method of manufacturing an optical conversion element cell according to claim 5. 前記電極取り出し部形成工程は、前記基板上に積層された前記裏面電極層と前記結晶質半導体層と前記透明表面電極層とから、当該結晶質半導体層と当該透明表面電極層の一部を除去することを特徴とする請求項5に記載の光学変換素子セルの製造方法。   The electrode take-out portion forming step removes part of the crystalline semiconductor layer and the transparent surface electrode layer from the back electrode layer, the crystalline semiconductor layer, and the transparent surface electrode layer laminated on the substrate. The method of manufacturing an optical conversion element cell according to claim 5. 光学変換素子セルが集積化された集積化光学変換装置の製造方法であって、
請求項5乃至7のいずれか1項に記載された光学変換素子セルの製造方法により製造された複数個の光学変換素子セルを電気的に直列に接続することにより集積化することを特徴とする集積化光学変換装置の製造方法。
A method of manufacturing an integrated optical conversion device in which optical conversion element cells are integrated,
A plurality of optical conversion element cells manufactured by the method for manufacturing an optical conversion element cell according to any one of claims 5 to 7 are integrated by being electrically connected in series. A method of manufacturing an integrated optical conversion device.
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WO2010109567A1 (en) * 2009-03-24 2010-09-30 富士電機ホールディングス株式会社 Photoelectric conversion device, solar cell module and method for manufacturing photoelectric conversion device
JP2011187555A (en) * 2010-03-05 2011-09-22 Toyota Motor Corp Solar cell module
CN102782874A (en) * 2010-10-29 2012-11-14 Lg伊诺特有限公司 Solar cell apparatus and method for manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010109567A1 (en) * 2009-03-24 2010-09-30 富士電機ホールディングス株式会社 Photoelectric conversion device, solar cell module and method for manufacturing photoelectric conversion device
JP2011187555A (en) * 2010-03-05 2011-09-22 Toyota Motor Corp Solar cell module
CN102782874A (en) * 2010-10-29 2012-11-14 Lg伊诺特有限公司 Solar cell apparatus and method for manufacturing the same
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